hostap_pci.c 11 KB

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  1. #define PRISM2_PCI
  2. /* Host AP driver's support for Intersil Prism2.5 PCI cards is based on
  3. * driver patches from Reyk Floeter <reyk@vantronix.net> and
  4. * Andy Warner <andyw@pobox.com> */
  5. #include <linux/module.h>
  6. #include <linux/init.h>
  7. #include <linux/if.h>
  8. #include <linux/skbuff.h>
  9. #include <linux/netdevice.h>
  10. #include <linux/slab.h>
  11. #include <linux/workqueue.h>
  12. #include <linux/wireless.h>
  13. #include <net/iw_handler.h>
  14. #include <linux/ioport.h>
  15. #include <linux/pci.h>
  16. #include <asm/io.h>
  17. #include "hostap_wlan.h"
  18. static char *dev_info = "hostap_pci";
  19. MODULE_AUTHOR("Jouni Malinen");
  20. MODULE_DESCRIPTION("Support for Intersil Prism2.5-based 802.11 wireless LAN "
  21. "PCI cards.");
  22. MODULE_SUPPORTED_DEVICE("Intersil Prism2.5-based WLAN PCI cards");
  23. MODULE_LICENSE("GPL");
  24. /* struct local_info::hw_priv */
  25. struct hostap_pci_priv {
  26. void __iomem *mem_start;
  27. };
  28. /* FIX: do we need mb/wmb/rmb with memory operations? */
  29. static DEFINE_PCI_DEVICE_TABLE(prism2_pci_id_table) = {
  30. /* Intersil Prism3 ISL3872 11Mb/s WLAN Controller */
  31. { 0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID },
  32. /* Intersil Prism2.5 ISL3874 11Mb/s WLAN Controller */
  33. { 0x1260, 0x3873, PCI_ANY_ID, PCI_ANY_ID },
  34. /* Samsung MagicLAN SWL-2210P */
  35. { 0x167d, 0xa000, PCI_ANY_ID, PCI_ANY_ID },
  36. { 0 }
  37. };
  38. #ifdef PRISM2_IO_DEBUG
  39. static inline void hfa384x_outb_debug(struct net_device *dev, int a, u8 v)
  40. {
  41. struct hostap_interface *iface;
  42. struct hostap_pci_priv *hw_priv;
  43. local_info_t *local;
  44. unsigned long flags;
  45. iface = netdev_priv(dev);
  46. local = iface->local;
  47. hw_priv = local->hw_priv;
  48. spin_lock_irqsave(&local->lock, flags);
  49. prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTB, a, v);
  50. writeb(v, hw_priv->mem_start + a);
  51. spin_unlock_irqrestore(&local->lock, flags);
  52. }
  53. static inline u8 hfa384x_inb_debug(struct net_device *dev, int a)
  54. {
  55. struct hostap_interface *iface;
  56. struct hostap_pci_priv *hw_priv;
  57. local_info_t *local;
  58. unsigned long flags;
  59. u8 v;
  60. iface = netdev_priv(dev);
  61. local = iface->local;
  62. hw_priv = local->hw_priv;
  63. spin_lock_irqsave(&local->lock, flags);
  64. v = readb(hw_priv->mem_start + a);
  65. prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INB, a, v);
  66. spin_unlock_irqrestore(&local->lock, flags);
  67. return v;
  68. }
  69. static inline void hfa384x_outw_debug(struct net_device *dev, int a, u16 v)
  70. {
  71. struct hostap_interface *iface;
  72. struct hostap_pci_priv *hw_priv;
  73. local_info_t *local;
  74. unsigned long flags;
  75. iface = netdev_priv(dev);
  76. local = iface->local;
  77. hw_priv = local->hw_priv;
  78. spin_lock_irqsave(&local->lock, flags);
  79. prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_OUTW, a, v);
  80. writew(v, hw_priv->mem_start + a);
  81. spin_unlock_irqrestore(&local->lock, flags);
  82. }
  83. static inline u16 hfa384x_inw_debug(struct net_device *dev, int a)
  84. {
  85. struct hostap_interface *iface;
  86. struct hostap_pci_priv *hw_priv;
  87. local_info_t *local;
  88. unsigned long flags;
  89. u16 v;
  90. iface = netdev_priv(dev);
  91. local = iface->local;
  92. hw_priv = local->hw_priv;
  93. spin_lock_irqsave(&local->lock, flags);
  94. v = readw(hw_priv->mem_start + a);
  95. prism2_io_debug_add(dev, PRISM2_IO_DEBUG_CMD_INW, a, v);
  96. spin_unlock_irqrestore(&local->lock, flags);
  97. return v;
  98. }
  99. #define HFA384X_OUTB(v,a) hfa384x_outb_debug(dev, (a), (v))
  100. #define HFA384X_INB(a) hfa384x_inb_debug(dev, (a))
  101. #define HFA384X_OUTW(v,a) hfa384x_outw_debug(dev, (a), (v))
  102. #define HFA384X_INW(a) hfa384x_inw_debug(dev, (a))
  103. #define HFA384X_OUTW_DATA(v,a) hfa384x_outw_debug(dev, (a), le16_to_cpu((v)))
  104. #define HFA384X_INW_DATA(a) cpu_to_le16(hfa384x_inw_debug(dev, (a)))
  105. #else /* PRISM2_IO_DEBUG */
  106. static inline void hfa384x_outb(struct net_device *dev, int a, u8 v)
  107. {
  108. struct hostap_interface *iface;
  109. struct hostap_pci_priv *hw_priv;
  110. iface = netdev_priv(dev);
  111. hw_priv = iface->local->hw_priv;
  112. writeb(v, hw_priv->mem_start + a);
  113. }
  114. static inline u8 hfa384x_inb(struct net_device *dev, int a)
  115. {
  116. struct hostap_interface *iface;
  117. struct hostap_pci_priv *hw_priv;
  118. iface = netdev_priv(dev);
  119. hw_priv = iface->local->hw_priv;
  120. return readb(hw_priv->mem_start + a);
  121. }
  122. static inline void hfa384x_outw(struct net_device *dev, int a, u16 v)
  123. {
  124. struct hostap_interface *iface;
  125. struct hostap_pci_priv *hw_priv;
  126. iface = netdev_priv(dev);
  127. hw_priv = iface->local->hw_priv;
  128. writew(v, hw_priv->mem_start + a);
  129. }
  130. static inline u16 hfa384x_inw(struct net_device *dev, int a)
  131. {
  132. struct hostap_interface *iface;
  133. struct hostap_pci_priv *hw_priv;
  134. iface = netdev_priv(dev);
  135. hw_priv = iface->local->hw_priv;
  136. return readw(hw_priv->mem_start + a);
  137. }
  138. #define HFA384X_OUTB(v,a) hfa384x_outb(dev, (a), (v))
  139. #define HFA384X_INB(a) hfa384x_inb(dev, (a))
  140. #define HFA384X_OUTW(v,a) hfa384x_outw(dev, (a), (v))
  141. #define HFA384X_INW(a) hfa384x_inw(dev, (a))
  142. #define HFA384X_OUTW_DATA(v,a) hfa384x_outw(dev, (a), le16_to_cpu((v)))
  143. #define HFA384X_INW_DATA(a) cpu_to_le16(hfa384x_inw(dev, (a)))
  144. #endif /* PRISM2_IO_DEBUG */
  145. static int hfa384x_from_bap(struct net_device *dev, u16 bap, void *buf,
  146. int len)
  147. {
  148. u16 d_off;
  149. __le16 *pos;
  150. d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
  151. pos = (__le16 *) buf;
  152. for ( ; len > 1; len -= 2)
  153. *pos++ = HFA384X_INW_DATA(d_off);
  154. if (len & 1)
  155. *((char *) pos) = HFA384X_INB(d_off);
  156. return 0;
  157. }
  158. static int hfa384x_to_bap(struct net_device *dev, u16 bap, void *buf, int len)
  159. {
  160. u16 d_off;
  161. __le16 *pos;
  162. d_off = (bap == 1) ? HFA384X_DATA1_OFF : HFA384X_DATA0_OFF;
  163. pos = (__le16 *) buf;
  164. for ( ; len > 1; len -= 2)
  165. HFA384X_OUTW_DATA(*pos++, d_off);
  166. if (len & 1)
  167. HFA384X_OUTB(*((char *) pos), d_off);
  168. return 0;
  169. }
  170. /* FIX: This might change at some point.. */
  171. #include "hostap_hw.c"
  172. static void prism2_pci_cor_sreset(local_info_t *local)
  173. {
  174. struct net_device *dev = local->dev;
  175. u16 reg;
  176. reg = HFA384X_INB(HFA384X_PCICOR_OFF);
  177. printk(KERN_DEBUG "%s: Original COR value: 0x%0x\n", dev->name, reg);
  178. /* linux-wlan-ng uses extremely long hold and settle times for
  179. * COR sreset. A comment in the driver code mentions that the long
  180. * delays appear to be necessary. However, at least IBM 22P6901 seems
  181. * to work fine with shorter delays.
  182. *
  183. * Longer delays can be configured by uncommenting following line: */
  184. /* #define PRISM2_PCI_USE_LONG_DELAYS */
  185. #ifdef PRISM2_PCI_USE_LONG_DELAYS
  186. int i;
  187. HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF);
  188. mdelay(250);
  189. HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF);
  190. mdelay(500);
  191. /* Wait for f/w to complete initialization (CMD:BUSY == 0) */
  192. i = 2000000 / 10;
  193. while ((HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) && --i)
  194. udelay(10);
  195. #else /* PRISM2_PCI_USE_LONG_DELAYS */
  196. HFA384X_OUTW(reg | 0x0080, HFA384X_PCICOR_OFF);
  197. mdelay(2);
  198. HFA384X_OUTW(reg & ~0x0080, HFA384X_PCICOR_OFF);
  199. mdelay(2);
  200. #endif /* PRISM2_PCI_USE_LONG_DELAYS */
  201. if (HFA384X_INW(HFA384X_CMD_OFF) & HFA384X_CMD_BUSY) {
  202. printk(KERN_DEBUG "%s: COR sreset timeout\n", dev->name);
  203. }
  204. }
  205. static void prism2_pci_genesis_reset(local_info_t *local, int hcr)
  206. {
  207. struct net_device *dev = local->dev;
  208. HFA384X_OUTW(0x00C5, HFA384X_PCICOR_OFF);
  209. mdelay(10);
  210. HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF);
  211. mdelay(10);
  212. HFA384X_OUTW(0x0045, HFA384X_PCICOR_OFF);
  213. mdelay(10);
  214. }
  215. static struct prism2_helper_functions prism2_pci_funcs =
  216. {
  217. .card_present = NULL,
  218. .cor_sreset = prism2_pci_cor_sreset,
  219. .genesis_reset = prism2_pci_genesis_reset,
  220. .hw_type = HOSTAP_HW_PCI,
  221. };
  222. static int prism2_pci_probe(struct pci_dev *pdev,
  223. const struct pci_device_id *id)
  224. {
  225. unsigned long phymem;
  226. void __iomem *mem = NULL;
  227. local_info_t *local = NULL;
  228. struct net_device *dev = NULL;
  229. static int cards_found /* = 0 */;
  230. int irq_registered = 0;
  231. struct hostap_interface *iface;
  232. struct hostap_pci_priv *hw_priv;
  233. hw_priv = kzalloc(sizeof(*hw_priv), GFP_KERNEL);
  234. if (hw_priv == NULL)
  235. return -ENOMEM;
  236. if (pci_enable_device(pdev))
  237. goto err_out_free;
  238. phymem = pci_resource_start(pdev, 0);
  239. if (!request_mem_region(phymem, pci_resource_len(pdev, 0), "Prism2")) {
  240. printk(KERN_ERR "prism2: Cannot reserve PCI memory region\n");
  241. goto err_out_disable;
  242. }
  243. mem = pci_ioremap_bar(pdev, 0);
  244. if (mem == NULL) {
  245. printk(KERN_ERR "prism2: Cannot remap PCI memory region\n") ;
  246. goto fail;
  247. }
  248. dev = prism2_init_local_data(&prism2_pci_funcs, cards_found,
  249. &pdev->dev);
  250. if (dev == NULL)
  251. goto fail;
  252. iface = netdev_priv(dev);
  253. local = iface->local;
  254. local->hw_priv = hw_priv;
  255. cards_found++;
  256. dev->irq = pdev->irq;
  257. hw_priv->mem_start = mem;
  258. dev->base_addr = (unsigned long) mem;
  259. prism2_pci_cor_sreset(local);
  260. pci_set_drvdata(pdev, dev);
  261. if (request_irq(dev->irq, prism2_interrupt, IRQF_SHARED, dev->name,
  262. dev)) {
  263. printk(KERN_WARNING "%s: request_irq failed\n", dev->name);
  264. goto fail;
  265. } else
  266. irq_registered = 1;
  267. if (!local->pri_only && prism2_hw_config(dev, 1)) {
  268. printk(KERN_DEBUG "%s: hardware initialization failed\n",
  269. dev_info);
  270. goto fail;
  271. }
  272. printk(KERN_INFO "%s: Intersil Prism2.5 PCI: "
  273. "mem=0x%lx, irq=%d\n", dev->name, phymem, dev->irq);
  274. return hostap_hw_ready(dev);
  275. fail:
  276. if (irq_registered && dev)
  277. free_irq(dev->irq, dev);
  278. if (mem)
  279. iounmap(mem);
  280. release_mem_region(phymem, pci_resource_len(pdev, 0));
  281. err_out_disable:
  282. pci_disable_device(pdev);
  283. prism2_free_local_data(dev);
  284. err_out_free:
  285. kfree(hw_priv);
  286. return -ENODEV;
  287. }
  288. static void prism2_pci_remove(struct pci_dev *pdev)
  289. {
  290. struct net_device *dev;
  291. struct hostap_interface *iface;
  292. void __iomem *mem_start;
  293. struct hostap_pci_priv *hw_priv;
  294. dev = pci_get_drvdata(pdev);
  295. iface = netdev_priv(dev);
  296. hw_priv = iface->local->hw_priv;
  297. /* Reset the hardware, and ensure interrupts are disabled. */
  298. prism2_pci_cor_sreset(iface->local);
  299. hfa384x_disable_interrupts(dev);
  300. if (dev->irq)
  301. free_irq(dev->irq, dev);
  302. mem_start = hw_priv->mem_start;
  303. prism2_free_local_data(dev);
  304. kfree(hw_priv);
  305. iounmap(mem_start);
  306. release_mem_region(pci_resource_start(pdev, 0),
  307. pci_resource_len(pdev, 0));
  308. pci_disable_device(pdev);
  309. }
  310. #ifdef CONFIG_PM
  311. static int prism2_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  312. {
  313. struct net_device *dev = pci_get_drvdata(pdev);
  314. if (netif_running(dev)) {
  315. netif_stop_queue(dev);
  316. netif_device_detach(dev);
  317. }
  318. prism2_suspend(dev);
  319. pci_save_state(pdev);
  320. pci_disable_device(pdev);
  321. pci_set_power_state(pdev, PCI_D3hot);
  322. return 0;
  323. }
  324. static int prism2_pci_resume(struct pci_dev *pdev)
  325. {
  326. struct net_device *dev = pci_get_drvdata(pdev);
  327. int err;
  328. err = pci_enable_device(pdev);
  329. if (err) {
  330. printk(KERN_ERR "%s: pci_enable_device failed on resume\n",
  331. dev->name);
  332. return err;
  333. }
  334. pci_restore_state(pdev);
  335. prism2_hw_config(dev, 0);
  336. if (netif_running(dev)) {
  337. netif_device_attach(dev);
  338. netif_start_queue(dev);
  339. }
  340. return 0;
  341. }
  342. #endif /* CONFIG_PM */
  343. MODULE_DEVICE_TABLE(pci, prism2_pci_id_table);
  344. static struct pci_driver prism2_pci_driver = {
  345. .name = "hostap_pci",
  346. .id_table = prism2_pci_id_table,
  347. .probe = prism2_pci_probe,
  348. .remove = prism2_pci_remove,
  349. #ifdef CONFIG_PM
  350. .suspend = prism2_pci_suspend,
  351. .resume = prism2_pci_resume,
  352. #endif /* CONFIG_PM */
  353. };
  354. static int __init init_prism2_pci(void)
  355. {
  356. return pci_register_driver(&prism2_pci_driver);
  357. }
  358. static void __exit exit_prism2_pci(void)
  359. {
  360. pci_unregister_driver(&prism2_pci_driver);
  361. }
  362. module_init(init_prism2_pci);
  363. module_exit(exit_prism2_pci);