rmi_fw_update.c 34 KB

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  1. /* Synaptics Register Mapped Interface (RMI4) I2C Physical Layer Driver.
  2. * Copyright (c) 2007-2012, Synaptics Incorporated
  3. *
  4. * This software is licensed under the terms of the GNU General Public
  5. * License version 2, as published by the Free Software Foundation, and
  6. * may be copied, distributed, and modified under those terms.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. */
  14. #include "synaptics_i2c_rmi.h"
  15. #define F01_DEVICE_STATUS 0X0004
  16. #define CHECKSUM_OFFSET 0x00
  17. #define BOOTLOADER_VERSION_OFFSET 0x07
  18. #define IMAGE_SIZE_OFFSET 0x08
  19. #define CONFIG_SIZE_OFFSET 0x0C
  20. #define PRODUCT_ID_OFFSET 0x10
  21. #define PRODUCT_INFO_OFFSET 0x1E
  22. #define FW_IMAGE_OFFSET 0x100
  23. #define PRODUCT_ID_SIZE 10
  24. #define BOOTLOADER_ID_OFFSET 0
  25. #define FLASH_PROPERTIES_OFFSET 1
  26. #define BLOCK_SIZE_OFFSET 2
  27. #define BLOCK_COUNT_OFFSET 3
  28. #define REG_MAP (1 << 0)
  29. #define UNLOCKED (1 << 1)
  30. #define HAS_CONFIG_ID (1 << 2)
  31. #define HAS_PERM_CONFIG (1 << 3)
  32. #define HAS_BL_CONFIG (1 << 4)
  33. #define HAS_DISP_CONFIG (1 << 5)
  34. #define HAS_CTRL1 (1 << 6)
  35. #define BLOCK_NUMBER_OFFSET 0
  36. #define BLOCK_DATA_OFFSET 1
  37. #define FLASH_COMMAND_OFFSET 2
  38. #define FLASH_STATUS_OFFSET 3
  39. #define UI_CONFIG_AREA 0x00
  40. #define PERM_CONFIG_AREA 0x01
  41. #define BL_CONFIG_AREA 0x02
  42. #define DISP_CONFIG_AREA 0x03
  43. #define CMD_WRITE_FW_BLOCK 0x2
  44. #define CMD_ERASE_ALL 0x3
  45. #define CMD_READ_CONFIG_BLOCK 0x5
  46. #define CMD_WRITE_CONFIG_BLOCK 0x6
  47. #define CMD_ERASE_CONFIG 0x7
  48. #define CMD_ERASE_BL_CONFIG 0x9
  49. #define CMD_ERASE_DISP_CONFIG 0xa
  50. #define CMD_ENABLE_FLASH_PROG 0xf
  51. #define SLEEP_MODE_NORMAL (0x00)
  52. #define SLEEP_MODE_SENSOR_SLEEP (0x01)
  53. #define SLEEP_MODE_RESERVED0 (0x02)
  54. #define SLEEP_MODE_RESERVED1 (0x03)
  55. #define ENABLE_WAIT_MS (1 * 1000)
  56. #define WRITE_WAIT_MS (3 * 1000)
  57. #define ERASE_WAIT_MS (5 * 1000)
  58. #define MIN_SLEEP_TIME_US 50
  59. #define MAX_SLEEP_TIME_US 100
  60. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  61. struct kobject *kobj, struct bin_attribute *attributes,
  62. char *buf, loff_t pos, size_t count);
  63. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  64. struct kobject *kobj, struct bin_attribute *attributes,
  65. char *buf, loff_t pos, size_t count);
  66. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  67. struct device_attribute *attr, const char *buf, size_t count);
  68. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  69. struct device_attribute *attr, const char *buf, size_t count);
  70. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  71. struct device_attribute *attr, const char *buf, size_t count);
  72. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  73. struct device_attribute *attr, const char *buf, size_t count);
  74. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  75. struct device_attribute *attr, const char *buf, size_t count);
  76. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  77. struct device_attribute *attr, char *buf);
  78. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  79. struct device_attribute *attr, char *buf);
  80. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  81. struct device_attribute *attr, char *buf);
  82. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  83. struct device_attribute *attr, char *buf);
  84. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  85. struct device_attribute *attr, char *buf);
  86. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  87. struct device_attribute *attr, char *buf);
  88. struct image_header {
  89. unsigned int checksum;
  90. unsigned int image_size;
  91. unsigned int config_size;
  92. unsigned char options;
  93. unsigned char bootloader_version;
  94. unsigned char product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE + 1];
  95. unsigned char product_info[SYNAPTICS_RMI4_PRODUCT_INFO_SIZE];
  96. };
  97. struct pdt_properties {
  98. union {
  99. struct {
  100. unsigned char reserved_1:6;
  101. unsigned char has_bsr:1;
  102. unsigned char reserved_2:1;
  103. } __packed;
  104. unsigned char data[1];
  105. };
  106. };
  107. struct f01_device_status {
  108. union {
  109. struct {
  110. unsigned char status_code:4;
  111. unsigned char reserved:2;
  112. unsigned char flash_prog:1;
  113. unsigned char unconfigured:1;
  114. } __packed;
  115. unsigned char data[1];
  116. };
  117. };
  118. struct f01_device_control {
  119. union {
  120. struct {
  121. unsigned char sleep_mode:2;
  122. unsigned char nosleep:1;
  123. unsigned char reserved:2;
  124. unsigned char charger_connected:1;
  125. unsigned char report_rate:1;
  126. unsigned char configured:1;
  127. } __packed;
  128. unsigned char data[1];
  129. };
  130. };
  131. struct f34_flash_status {
  132. union {
  133. struct {
  134. unsigned char status:6;
  135. unsigned char reserved:1;
  136. unsigned char program_enabled:1;
  137. } __packed;
  138. unsigned char data[1];
  139. };
  140. };
  141. struct synaptics_rmi4_fwu_handle {
  142. bool initialized;
  143. bool has_perm_config;
  144. bool has_bl_config;
  145. bool has_disp_config;
  146. unsigned int image_size;
  147. unsigned int data_pos;
  148. unsigned char *ext_data_source;
  149. unsigned char *read_config_buf;
  150. unsigned char intr_mask;
  151. unsigned char command;
  152. unsigned char bootloader_id[2];
  153. unsigned char flash_properties;
  154. unsigned char productinfo1;
  155. unsigned char productinfo2;
  156. unsigned short block_size;
  157. unsigned short fw_block_count;
  158. unsigned short config_block_count;
  159. unsigned short perm_config_block_count;
  160. unsigned short bl_config_block_count;
  161. unsigned short disp_config_block_count;
  162. unsigned short config_size;
  163. unsigned short config_area;
  164. char product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE + 1];
  165. const unsigned char *firmware_data;
  166. const unsigned char *config_data;
  167. struct f34_flash_status flash_status;
  168. struct synaptics_rmi4_fn_desc f01_fd;
  169. struct synaptics_rmi4_fn_desc f34_fd;
  170. struct synaptics_rmi4_exp_fn_ptr *fn_ptr;
  171. struct synaptics_rmi4_data *rmi4_data;
  172. };
  173. static struct bin_attribute dev_attr_data = {
  174. .attr = {
  175. .name = "data",
  176. .mode = (S_IRUGO | S_IWUSR | S_IWGRP),
  177. },
  178. .size = 0,
  179. .read = fwu_sysfs_show_image,
  180. .write = fwu_sysfs_store_image,
  181. };
  182. static struct device_attribute attrs[] = {
  183. __ATTR(doreflash, S_IWUSR | S_IWGRP,
  184. synaptics_rmi4_show_error,
  185. fwu_sysfs_do_reflash_store),
  186. __ATTR(writeconfig, S_IWUSR | S_IWGRP,
  187. synaptics_rmi4_show_error,
  188. fwu_sysfs_write_config_store),
  189. __ATTR(readconfig, S_IWUSR | S_IWGRP,
  190. synaptics_rmi4_show_error,
  191. fwu_sysfs_read_config_store),
  192. __ATTR(configarea, S_IWUSR | S_IWGRP,
  193. synaptics_rmi4_show_error,
  194. fwu_sysfs_config_area_store),
  195. __ATTR(imagesize, S_IWUSR | S_IWGRP,
  196. synaptics_rmi4_show_error,
  197. fwu_sysfs_image_size_store),
  198. __ATTR(blocksize, S_IRUGO,
  199. fwu_sysfs_block_size_show,
  200. synaptics_rmi4_store_error),
  201. __ATTR(fwblockcount, S_IRUGO,
  202. fwu_sysfs_firmware_block_count_show,
  203. synaptics_rmi4_store_error),
  204. __ATTR(configblockcount, S_IRUGO,
  205. fwu_sysfs_configuration_block_count_show,
  206. synaptics_rmi4_store_error),
  207. __ATTR(permconfigblockcount, S_IRUGO,
  208. fwu_sysfs_perm_config_block_count_show,
  209. synaptics_rmi4_store_error),
  210. __ATTR(blconfigblockcount, S_IRUGO,
  211. fwu_sysfs_bl_config_block_count_show,
  212. synaptics_rmi4_store_error),
  213. __ATTR(dispconfigblockcount, S_IRUGO,
  214. fwu_sysfs_disp_config_block_count_show,
  215. synaptics_rmi4_store_error),
  216. };
  217. static struct synaptics_rmi4_fwu_handle *fwu;
  218. static unsigned int extract_uint(const unsigned char *ptr)
  219. {
  220. return (unsigned int)ptr[0] +
  221. (unsigned int)ptr[1] * 0x100 +
  222. (unsigned int)ptr[2] * 0x10000 +
  223. (unsigned int)ptr[3] * 0x1000000;
  224. }
  225. static void parse_header(struct image_header *header,
  226. const unsigned char *fw_image)
  227. {
  228. header->checksum = extract_uint(&fw_image[CHECKSUM_OFFSET]);
  229. header->bootloader_version = fw_image[BOOTLOADER_VERSION_OFFSET];
  230. header->image_size = extract_uint(&fw_image[IMAGE_SIZE_OFFSET]);
  231. header->config_size = extract_uint(&fw_image[CONFIG_SIZE_OFFSET]);
  232. memcpy(header->product_id, &fw_image[PRODUCT_ID_OFFSET],
  233. SYNAPTICS_RMI4_PRODUCT_ID_SIZE);
  234. header->product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE] = 0;
  235. memcpy(header->product_info, &fw_image[PRODUCT_INFO_OFFSET],
  236. SYNAPTICS_RMI4_PRODUCT_INFO_SIZE);
  237. return;
  238. }
  239. static int fwu_read_f01_device_status(struct f01_device_status *status)
  240. {
  241. int retval;
  242. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  243. fwu->f01_fd.data_base_addr,
  244. status->data,
  245. sizeof(status->data));
  246. if (retval < 0) {
  247. dev_err(&fwu->rmi4_data->i2c_client->dev,
  248. "%s: Failed to read F01 device status\n",
  249. __func__);
  250. return retval;
  251. }
  252. return 0;
  253. }
  254. static int fwu_read_f34_queries(void)
  255. {
  256. int retval;
  257. unsigned char count;
  258. unsigned char buf[10];
  259. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  260. fwu->f34_fd.query_base_addr + BOOTLOADER_ID_OFFSET,
  261. fwu->bootloader_id,
  262. sizeof(fwu->bootloader_id));
  263. if (retval < 0) {
  264. dev_err(&fwu->rmi4_data->i2c_client->dev,
  265. "%s: Failed to read bootloader ID\n",
  266. __func__);
  267. return retval;
  268. }
  269. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  270. fwu->f34_fd.query_base_addr + FLASH_PROPERTIES_OFFSET,
  271. &fwu->flash_properties,
  272. sizeof(fwu->flash_properties));
  273. if (retval < 0) {
  274. dev_err(&fwu->rmi4_data->i2c_client->dev,
  275. "%s: Failed to read flash properties\n",
  276. __func__);
  277. return retval;
  278. }
  279. count = 4;
  280. if (fwu->flash_properties & HAS_PERM_CONFIG) {
  281. fwu->has_perm_config = 1;
  282. count += 2;
  283. }
  284. if (fwu->flash_properties & HAS_BL_CONFIG) {
  285. fwu->has_bl_config = 1;
  286. count += 2;
  287. }
  288. if (fwu->flash_properties & HAS_DISP_CONFIG) {
  289. fwu->has_disp_config = 1;
  290. count += 2;
  291. }
  292. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  293. fwu->f34_fd.query_base_addr + BLOCK_SIZE_OFFSET,
  294. buf,
  295. 2);
  296. if (retval < 0) {
  297. dev_err(&fwu->rmi4_data->i2c_client->dev,
  298. "%s: Failed to read block size info\n",
  299. __func__);
  300. return retval;
  301. }
  302. batohs(&fwu->block_size, &(buf[0]));
  303. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  304. fwu->f34_fd.query_base_addr + BLOCK_COUNT_OFFSET,
  305. buf,
  306. count);
  307. if (retval < 0) {
  308. dev_err(&fwu->rmi4_data->i2c_client->dev,
  309. "%s: Failed to read block count info\n",
  310. __func__);
  311. return retval;
  312. }
  313. batohs(&fwu->fw_block_count, &(buf[0]));
  314. batohs(&fwu->config_block_count, &(buf[2]));
  315. count = 4;
  316. if (fwu->has_perm_config) {
  317. batohs(&fwu->perm_config_block_count, &(buf[count]));
  318. count += 2;
  319. }
  320. if (fwu->has_bl_config) {
  321. batohs(&fwu->bl_config_block_count, &(buf[count]));
  322. count += 2;
  323. }
  324. if (fwu->has_disp_config)
  325. batohs(&fwu->disp_config_block_count, &(buf[count]));
  326. return 0;
  327. }
  328. static int fwu_read_f34_flash_status(void)
  329. {
  330. int retval;
  331. unsigned char status;
  332. unsigned char command;
  333. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  334. fwu->f34_fd.data_base_addr + FLASH_STATUS_OFFSET,
  335. &status,
  336. sizeof(status));
  337. if (retval < 0) {
  338. dev_err(&fwu->rmi4_data->i2c_client->dev,
  339. "%s: Failed to read flash status\n",
  340. __func__);
  341. return retval;
  342. }
  343. /* Program enabled bit not available - force bit to be set */
  344. fwu->flash_status.program_enabled = 1;
  345. fwu->flash_status.status = status & MASK_3BIT;
  346. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  347. fwu->f34_fd.data_base_addr + FLASH_COMMAND_OFFSET,
  348. &command,
  349. sizeof(command));
  350. if (retval < 0) {
  351. dev_err(&fwu->rmi4_data->i2c_client->dev,
  352. "%s: Failed to read flash command\n",
  353. __func__);
  354. return retval;
  355. }
  356. fwu->command = command & MASK_4BIT;
  357. return 0;
  358. }
  359. static int fwu_write_f34_command(unsigned char cmd)
  360. {
  361. int retval;
  362. unsigned char command = cmd;
  363. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  364. fwu->f34_fd.data_base_addr + FLASH_COMMAND_OFFSET,
  365. &command,
  366. sizeof(command));
  367. if (retval < 0) {
  368. dev_err(&fwu->rmi4_data->i2c_client->dev,
  369. "%s: Failed to write command 0x%02x\n",
  370. __func__, command);
  371. return retval;
  372. }
  373. fwu->command = cmd;
  374. return 0;
  375. }
  376. #define STATUS_POLLING_PERIOD_US 1000
  377. static int fwu_wait_for_idle(int timeout_ms)
  378. {
  379. int count = 0;
  380. int timeout_count = ((timeout_ms * 1000) / MAX_SLEEP_TIME_US) + 1;
  381. int polling_period = STATUS_POLLING_PERIOD_US / MAX_SLEEP_TIME_US;
  382. do {
  383. usleep_range(MIN_SLEEP_TIME_US, MAX_SLEEP_TIME_US);
  384. count++;
  385. if ((timeout_ms == WRITE_WAIT_MS) && (count >= polling_period) && ((count % polling_period) == 0)) {
  386. fwu_read_f34_flash_status();
  387. } else if (count == timeout_count)
  388. fwu_read_f34_flash_status();
  389. if ((fwu->command == 0x00) &&
  390. (fwu->flash_status.status == 0x00))
  391. return 0;
  392. } while (count < timeout_count);
  393. dev_err(&fwu->rmi4_data->i2c_client->dev,
  394. "%s: Timed out waiting for idle status\n",
  395. __func__);
  396. return -ETIMEDOUT;
  397. }
  398. static int fwu_scan_pdt(void)
  399. {
  400. int retval;
  401. unsigned char ii;
  402. unsigned char intr_count = 0;
  403. unsigned char intr_off;
  404. unsigned char intr_src;
  405. unsigned short addr;
  406. bool f01found = false;
  407. bool f34found = false;
  408. struct synaptics_rmi4_fn_desc rmi_fd;
  409. for (addr = PDT_START; addr > PDT_END; addr -= PDT_ENTRY_SIZE) {
  410. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  411. addr,
  412. (unsigned char *)&rmi_fd,
  413. sizeof(rmi_fd));
  414. if (retval < 0)
  415. return retval;
  416. if (rmi_fd.fn_number) {
  417. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  418. "%s: Found F%02x\n",
  419. __func__, rmi_fd.fn_number);
  420. switch (rmi_fd.fn_number) {
  421. case SYNAPTICS_RMI4_F01:
  422. f01found = true;
  423. fwu->f01_fd.query_base_addr =
  424. rmi_fd.query_base_addr;
  425. fwu->f01_fd.ctrl_base_addr =
  426. rmi_fd.ctrl_base_addr;
  427. fwu->f01_fd.data_base_addr =
  428. rmi_fd.data_base_addr;
  429. fwu->f01_fd.cmd_base_addr =
  430. rmi_fd.cmd_base_addr;
  431. break;
  432. case SYNAPTICS_RMI4_F34:
  433. f34found = true;
  434. fwu->f34_fd.query_base_addr =
  435. rmi_fd.query_base_addr;
  436. fwu->f34_fd.ctrl_base_addr =
  437. rmi_fd.ctrl_base_addr;
  438. fwu->f34_fd.data_base_addr =
  439. rmi_fd.data_base_addr;
  440. fwu->intr_mask = 0;
  441. intr_src = rmi_fd.intr_src_count;
  442. intr_off = intr_count % 8;
  443. for (ii = intr_off;
  444. ii < ((intr_src & MASK_3BIT) +
  445. intr_off);
  446. ii++) {
  447. fwu->intr_mask |= 1 << ii;
  448. }
  449. break;
  450. }
  451. } else {
  452. break;
  453. }
  454. intr_count += (rmi_fd.intr_src_count & MASK_3BIT);
  455. }
  456. if (!f01found || !f34found) {
  457. dev_err(&fwu->rmi4_data->i2c_client->dev,
  458. "%s: Failed to find both F01 and F34\n",
  459. __func__);
  460. return -EINVAL;
  461. }
  462. return 0;
  463. }
  464. static int fwu_write_blocks(unsigned char *block_ptr, unsigned short block_cnt,
  465. unsigned char command)
  466. {
  467. int retval;
  468. unsigned char block_offset[] = {0, 0};
  469. unsigned short block_num;
  470. block_offset[1] |= (fwu->config_area << 5);
  471. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  472. fwu->f34_fd.data_base_addr + BLOCK_NUMBER_OFFSET,
  473. block_offset,
  474. sizeof(block_offset));
  475. if (retval < 0) {
  476. dev_err(&fwu->rmi4_data->i2c_client->dev,
  477. "%s: Failed to write to block number registers\n",
  478. __func__);
  479. return retval;
  480. }
  481. for (block_num = 0; block_num < block_cnt; block_num++) {
  482. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  483. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  484. block_ptr,
  485. fwu->block_size);
  486. if (retval < 0) {
  487. dev_err(&fwu->rmi4_data->i2c_client->dev,
  488. "%s: Failed to write block data (block %d)\n",
  489. __func__, block_num);
  490. return retval;
  491. }
  492. retval = fwu_write_f34_command(command);
  493. if (retval < 0) {
  494. dev_err(&fwu->rmi4_data->i2c_client->dev,
  495. "%s: Failed to write command for block %d\n",
  496. __func__, block_num);
  497. return retval;
  498. }
  499. retval = fwu_wait_for_idle(WRITE_WAIT_MS);
  500. if (retval < 0) {
  501. dev_err(&fwu->rmi4_data->i2c_client->dev,
  502. "%s: Failed to wait for idle status (block %d)\n",
  503. __func__, block_num);
  504. return retval;
  505. }
  506. block_ptr += fwu->block_size;
  507. }
  508. pr_info("synaptics %s:%d\n",__func__,__LINE__);
  509. return 0;
  510. }
  511. static int fwu_write_firmware(void)
  512. {
  513. return fwu_write_blocks((unsigned char *)fwu->firmware_data,
  514. fwu->fw_block_count, CMD_WRITE_FW_BLOCK);
  515. }
  516. static int fwu_write_configuration(void)
  517. {
  518. return fwu_write_blocks((unsigned char *)fwu->config_data,
  519. fwu->config_block_count, CMD_WRITE_CONFIG_BLOCK);
  520. }
  521. static int fwu_write_bootloader_id(void)
  522. {
  523. int retval;
  524. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  525. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  526. fwu->bootloader_id,
  527. sizeof(fwu->bootloader_id));
  528. if (retval < 0) {
  529. dev_err(&fwu->rmi4_data->i2c_client->dev,
  530. "%s: Failed to write bootloader ID\n",
  531. __func__);
  532. return retval;
  533. }
  534. return 0;
  535. }
  536. static int fwu_enter_flash_prog(void)
  537. {
  538. int retval;
  539. struct f01_device_status f01_device_status;
  540. struct f01_device_control f01_device_control;
  541. retval = fwu_write_bootloader_id();
  542. if (retval < 0)
  543. return retval;
  544. retval = fwu_write_f34_command(CMD_ENABLE_FLASH_PROG);
  545. if (retval < 0)
  546. return retval;
  547. retval = fwu_wait_for_idle(ENABLE_WAIT_MS);
  548. if (retval < 0)
  549. return retval;
  550. if (!fwu->flash_status.program_enabled) {
  551. dev_err(&fwu->rmi4_data->i2c_client->dev,
  552. "%s: Program enabled bit not set\n",
  553. __func__);
  554. return -EINVAL;
  555. }
  556. retval = fwu_scan_pdt();
  557. if (retval < 0)
  558. return retval;
  559. retval = fwu_read_f01_device_status(&f01_device_status);
  560. if (retval < 0)
  561. return retval;
  562. if (!f01_device_status.flash_prog) {
  563. dev_err(&fwu->rmi4_data->i2c_client->dev,
  564. "%s: Not in flash prog mode\n",
  565. __func__);
  566. return -EINVAL;
  567. }
  568. retval = fwu_read_f34_queries();
  569. if (retval < 0)
  570. return retval;
  571. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  572. fwu->f01_fd.ctrl_base_addr,
  573. f01_device_control.data,
  574. sizeof(f01_device_control.data));
  575. if (retval < 0) {
  576. dev_err(&fwu->rmi4_data->i2c_client->dev,
  577. "%s: Failed to read F01 device control\n",
  578. __func__);
  579. return retval;
  580. }
  581. f01_device_control.nosleep = true;
  582. f01_device_control.sleep_mode = SLEEP_MODE_NORMAL;
  583. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  584. fwu->f01_fd.ctrl_base_addr,
  585. f01_device_control.data,
  586. sizeof(f01_device_control.data));
  587. if (retval < 0) {
  588. dev_err(&fwu->rmi4_data->i2c_client->dev,
  589. "%s: Failed to write F01 device control\n",
  590. __func__);
  591. return retval;
  592. }
  593. return retval;
  594. }
  595. static int fwu_do_reflash(void)
  596. {
  597. int retval;
  598. retval = fwu_enter_flash_prog();
  599. if (retval < 0)
  600. return retval;
  601. dev_info(&fwu->rmi4_data->i2c_client->dev,
  602. "%s: Entered flash prog mode\n",
  603. __func__);
  604. retval = fwu_write_bootloader_id();
  605. if (retval < 0)
  606. return retval;
  607. dev_info(&fwu->rmi4_data->i2c_client->dev,
  608. "%s: Bootloader ID written\n",
  609. __func__);
  610. retval = fwu_write_f34_command(CMD_ERASE_ALL);
  611. if (retval < 0)
  612. return retval;
  613. dev_info(&fwu->rmi4_data->i2c_client->dev,
  614. "%s: Erase all command written\n",
  615. __func__);
  616. retval = fwu_wait_for_idle(ERASE_WAIT_MS);
  617. if (retval < 0)
  618. return retval;
  619. dev_info(&fwu->rmi4_data->i2c_client->dev,
  620. "%s: Idle status detected\n",
  621. __func__);
  622. if (fwu->firmware_data) {
  623. retval = fwu_write_firmware();
  624. if (retval < 0)
  625. return retval;
  626. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Firmware programmed\n",
  627. __func__);
  628. }
  629. if (fwu->config_data) {
  630. retval = fwu_write_configuration();
  631. if (retval < 0)
  632. return retval;
  633. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Configuration programmed\n",
  634. __func__);
  635. }
  636. pr_info("synaptics %s:%d\n",__func__,__LINE__);
  637. return retval;
  638. }
  639. static int fwu_start_reflash(void)
  640. {
  641. int retval = 0, retry = 3;
  642. unsigned char device_status;
  643. struct image_header header;
  644. const unsigned char *fw_image;
  645. if (fwu->rmi4_data->sensor_sleep || fwu->rmi4_data->touch_stopped) {
  646. dev_err(&fwu->rmi4_data->i2c_client->dev,
  647. "%s: Sensor sleeping or stopped\n",
  648. __func__);
  649. return -ENODEV;
  650. }
  651. fwu->rmi4_data->stay_awake = true;
  652. if (!fwu->ext_data_source) {
  653. dev_err(&fwu->rmi4_data->i2c_client->dev,
  654. "%s: Firmware data is NULL\n", __func__);
  655. return -ENODEV;
  656. }
  657. fw_image = fwu->ext_data_source;
  658. parse_header(&header, fw_image);
  659. if (header.image_size)
  660. fwu->firmware_data = fw_image + FW_IMAGE_OFFSET;
  661. if (header.config_size) {
  662. fwu->config_data = fw_image + FW_IMAGE_OFFSET +
  663. header.image_size;
  664. }
  665. while (retry--) {
  666. mutex_lock(&(fwu->rmi4_data->rmi4_reflash_mutex));
  667. fwu->rmi4_data->doing_reflash = true;
  668. retval = fwu_do_reflash();
  669. if (retval < 0) {
  670. dev_err(&fwu->rmi4_data->i2c_client->dev,
  671. "%s: Failed to do reflash\n",
  672. __func__);
  673. }
  674. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  675. fwu->rmi4_data->doing_reflash = false;
  676. mutex_unlock(&(fwu->rmi4_data->rmi4_reflash_mutex));
  677. pr_info("synaptics %s:%d\n",__func__,__LINE__);
  678. fwu->fn_ptr->read(fwu->rmi4_data,
  679. F01_DEVICE_STATUS,
  680. &device_status,
  681. sizeof(device_status));
  682. if (!(device_status & (1 << 6)))
  683. break;
  684. else
  685. dev_info(&fwu->rmi4_data->i2c_client->dev,
  686. "%s: flash prog bit = %x, retry = %d\n",
  687. __func__, device_status & (1 << 6), retry);
  688. pr_info("synaptics %s:%d\n",__func__,__LINE__);
  689. }
  690. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: End of reflash process\n",
  691. __func__);
  692. fwu->rmi4_data->stay_awake = false;
  693. return retval;
  694. }
  695. static int fwu_do_write_config(void)
  696. {
  697. int retval;
  698. retval = fwu_enter_flash_prog();
  699. if (retval < 0)
  700. return retval;
  701. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  702. "%s: Entered flash prog mode\n",
  703. __func__);
  704. if (fwu->config_area == PERM_CONFIG_AREA) {
  705. fwu->config_block_count = fwu->perm_config_block_count;
  706. goto write_config;
  707. }
  708. retval = fwu_write_bootloader_id();
  709. if (retval < 0)
  710. return retval;
  711. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  712. "%s: Bootloader ID written\n",
  713. __func__);
  714. switch (fwu->config_area) {
  715. case UI_CONFIG_AREA:
  716. retval = fwu_write_f34_command(CMD_ERASE_CONFIG);
  717. break;
  718. case BL_CONFIG_AREA:
  719. retval = fwu_write_f34_command(CMD_ERASE_BL_CONFIG);
  720. fwu->config_block_count = fwu->bl_config_block_count;
  721. break;
  722. case DISP_CONFIG_AREA:
  723. retval = fwu_write_f34_command(CMD_ERASE_DISP_CONFIG);
  724. fwu->config_block_count = fwu->disp_config_block_count;
  725. break;
  726. }
  727. if (retval < 0)
  728. return retval;
  729. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  730. "%s: Erase command written\n",
  731. __func__);
  732. retval = fwu_wait_for_idle(ERASE_WAIT_MS);
  733. if (retval < 0)
  734. return retval;
  735. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  736. "%s: Idle status detected\n",
  737. __func__);
  738. write_config:
  739. retval = fwu_write_configuration();
  740. if (retval < 0)
  741. return retval;
  742. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Config written\n",
  743. __func__);
  744. return retval;
  745. }
  746. static int fwu_start_write_config(void)
  747. {
  748. int retval;
  749. struct image_header header;
  750. switch (fwu->config_area) {
  751. case UI_CONFIG_AREA:
  752. break;
  753. case PERM_CONFIG_AREA:
  754. if (!fwu->has_perm_config)
  755. return -EINVAL;
  756. break;
  757. case BL_CONFIG_AREA:
  758. if (!fwu->has_bl_config)
  759. return -EINVAL;
  760. break;
  761. case DISP_CONFIG_AREA:
  762. if (!fwu->has_disp_config)
  763. return -EINVAL;
  764. break;
  765. default:
  766. return -EINVAL;
  767. }
  768. if (fwu->ext_data_source)
  769. fwu->config_data = fwu->ext_data_source;
  770. else
  771. return -EINVAL;
  772. if (fwu->config_area == UI_CONFIG_AREA) {
  773. parse_header(&header, fwu->ext_data_source);
  774. if (header.config_size) {
  775. fwu->config_data = fwu->ext_data_source +
  776. FW_IMAGE_OFFSET +
  777. header.image_size;
  778. } else {
  779. return -EINVAL;
  780. }
  781. }
  782. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: Start of write config process\n",
  783. __func__);
  784. fwu->rmi4_data->doing_reflash = true;
  785. retval = fwu_do_write_config();
  786. if (retval < 0) {
  787. dev_err(&fwu->rmi4_data->i2c_client->dev,
  788. "%s: Failed to write config\n",
  789. __func__);
  790. }
  791. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  792. fwu->rmi4_data->doing_reflash = false;
  793. dev_info(&fwu->rmi4_data->i2c_client->dev, "%s: End of write config process\n",
  794. __func__);
  795. return retval;
  796. }
  797. static int fwu_do_read_config(void)
  798. {
  799. int retval;
  800. unsigned char block_offset[] = {0, 0};
  801. unsigned short block_num;
  802. unsigned short block_count;
  803. unsigned short index = 0;
  804. retval = fwu_enter_flash_prog();
  805. if (retval < 0)
  806. goto exit;
  807. dev_dbg(&fwu->rmi4_data->i2c_client->dev,
  808. "%s: Entered flash prog mode\n",
  809. __func__);
  810. switch (fwu->config_area) {
  811. case UI_CONFIG_AREA:
  812. block_count = fwu->config_block_count;
  813. break;
  814. case PERM_CONFIG_AREA:
  815. if (!fwu->has_perm_config) {
  816. retval = -EINVAL;
  817. goto exit;
  818. }
  819. block_count = fwu->perm_config_block_count;
  820. break;
  821. case BL_CONFIG_AREA:
  822. if (!fwu->has_bl_config) {
  823. retval = -EINVAL;
  824. goto exit;
  825. }
  826. block_count = fwu->bl_config_block_count;
  827. break;
  828. case DISP_CONFIG_AREA:
  829. if (!fwu->has_disp_config) {
  830. retval = -EINVAL;
  831. goto exit;
  832. }
  833. block_count = fwu->disp_config_block_count;
  834. break;
  835. default:
  836. retval = -EINVAL;
  837. goto exit;
  838. }
  839. fwu->config_size = fwu->block_size * block_count;
  840. kfree(fwu->read_config_buf);
  841. fwu->read_config_buf = kzalloc(fwu->config_size, GFP_KERNEL);
  842. block_offset[1] |= (fwu->config_area << 5);
  843. retval = fwu->fn_ptr->write(fwu->rmi4_data,
  844. fwu->f34_fd.data_base_addr + BLOCK_NUMBER_OFFSET,
  845. block_offset,
  846. sizeof(block_offset));
  847. if (retval < 0) {
  848. dev_err(&fwu->rmi4_data->i2c_client->dev,
  849. "%s: Failed to write to block number registers\n",
  850. __func__);
  851. goto exit;
  852. }
  853. for (block_num = 0; block_num < block_count; block_num++) {
  854. retval = fwu_write_f34_command(CMD_READ_CONFIG_BLOCK);
  855. if (retval < 0) {
  856. dev_err(&fwu->rmi4_data->i2c_client->dev,
  857. "%s: Failed to write read config command\n",
  858. __func__);
  859. goto exit;
  860. }
  861. retval = fwu_wait_for_idle(WRITE_WAIT_MS);
  862. if (retval < 0) {
  863. dev_err(&fwu->rmi4_data->i2c_client->dev,
  864. "%s: Failed to wait for idle status\n",
  865. __func__);
  866. goto exit;
  867. }
  868. retval = fwu->fn_ptr->read(fwu->rmi4_data,
  869. fwu->f34_fd.data_base_addr + BLOCK_DATA_OFFSET,
  870. &fwu->read_config_buf[index],
  871. fwu->block_size);
  872. if (retval < 0) {
  873. dev_err(&fwu->rmi4_data->i2c_client->dev,
  874. "%s: Failed to read block data (block %d)\n",
  875. __func__, block_num);
  876. goto exit;
  877. }
  878. index += fwu->block_size;
  879. }
  880. exit:
  881. fwu->rmi4_data->reset_device(fwu->rmi4_data);
  882. return retval;
  883. }
  884. int synaptics_fw_updater(unsigned char *fw_data)
  885. {
  886. int retval;
  887. if (!fwu)
  888. return -ENODEV;
  889. if (!fwu->initialized)
  890. return -ENODEV;
  891. if (!fw_data) {
  892. dev_err(&fwu->rmi4_data->i2c_client->dev,
  893. "%s: Firmware data is NULL\n", __func__);
  894. return -ENODEV;
  895. }
  896. fwu->ext_data_source = fw_data;
  897. fwu->config_area = UI_CONFIG_AREA;
  898. retval = fwu_start_reflash();
  899. pr_info("synaptics %s:%d\n",__func__,__LINE__);
  900. return retval;
  901. }
  902. EXPORT_SYMBOL(synaptics_fw_updater);
  903. static ssize_t fwu_sysfs_show_image(struct file *data_file,
  904. struct kobject *kobj, struct bin_attribute *attributes,
  905. char *buf, loff_t pos, size_t count)
  906. {
  907. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  908. if (count < fwu->config_size) {
  909. dev_err(&rmi4_data->i2c_client->dev,
  910. "%s: Not enough space (%d bytes) in buffer\n",
  911. __func__, count);
  912. return -EINVAL;
  913. }
  914. memcpy(buf, fwu->read_config_buf, fwu->config_size);
  915. return fwu->config_size;
  916. }
  917. static ssize_t fwu_sysfs_store_image(struct file *data_file,
  918. struct kobject *kobj, struct bin_attribute *attributes,
  919. char *buf, loff_t pos, size_t count)
  920. {
  921. memcpy((void *)(&fwu->ext_data_source[fwu->data_pos]),
  922. (const void *)buf,
  923. count);
  924. fwu->data_pos += count;
  925. return count;
  926. }
  927. static ssize_t fwu_sysfs_do_reflash_store(struct device *dev,
  928. struct device_attribute *attr, const char *buf, size_t count)
  929. {
  930. int retval;
  931. unsigned int input;
  932. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  933. if (sscanf(buf, "%u", &input) != 1) {
  934. retval = -EINVAL;
  935. goto exit;
  936. }
  937. if (input != 1) {
  938. retval = -EINVAL;
  939. goto exit;
  940. }
  941. retval = synaptics_fw_updater(fwu->ext_data_source);
  942. if (retval < 0) {
  943. dev_err(&rmi4_data->i2c_client->dev,
  944. "%s: Failed to do reflash\n",
  945. __func__);
  946. goto exit;
  947. }
  948. retval = count;
  949. exit:
  950. kfree(fwu->ext_data_source);
  951. fwu->ext_data_source = NULL;
  952. return retval;
  953. }
  954. static ssize_t fwu_sysfs_write_config_store(struct device *dev,
  955. struct device_attribute *attr, const char *buf, size_t count)
  956. {
  957. int retval;
  958. unsigned int input;
  959. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  960. if (sscanf(buf, "%u", &input) != 1) {
  961. retval = -EINVAL;
  962. goto exit;
  963. }
  964. if (input != 1) {
  965. retval = -EINVAL;
  966. goto exit;
  967. }
  968. retval = fwu_start_write_config();
  969. if (retval < 0) {
  970. dev_err(&rmi4_data->i2c_client->dev,
  971. "%s: Failed to write config\n",
  972. __func__);
  973. goto exit;
  974. }
  975. retval = count;
  976. exit:
  977. kfree(fwu->ext_data_source);
  978. fwu->ext_data_source = NULL;
  979. return retval;
  980. }
  981. static ssize_t fwu_sysfs_read_config_store(struct device *dev,
  982. struct device_attribute *attr, const char *buf, size_t count)
  983. {
  984. int retval;
  985. unsigned int input;
  986. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  987. if (sscanf(buf, "%u", &input) != 1)
  988. return -EINVAL;
  989. if (input != 1)
  990. return -EINVAL;
  991. retval = fwu_do_read_config();
  992. if (retval < 0) {
  993. dev_err(&rmi4_data->i2c_client->dev,
  994. "%s: Failed to read config\n",
  995. __func__);
  996. return retval;
  997. }
  998. return count;
  999. }
  1000. static ssize_t fwu_sysfs_config_area_store(struct device *dev,
  1001. struct device_attribute *attr, const char *buf, size_t count)
  1002. {
  1003. int retval;
  1004. unsigned long config_area;
  1005. retval = kstrtoul(buf, 10, &config_area);
  1006. if (retval)
  1007. return retval;
  1008. fwu->config_area = config_area;
  1009. return count;
  1010. }
  1011. static ssize_t fwu_sysfs_image_size_store(struct device *dev,
  1012. struct device_attribute *attr, const char *buf, size_t count)
  1013. {
  1014. int retval;
  1015. unsigned long size;
  1016. struct synaptics_rmi4_data *rmi4_data = fwu->rmi4_data;
  1017. retval = kstrtoul(buf, 10, &size);
  1018. if (retval)
  1019. return retval;
  1020. fwu->image_size = size;
  1021. fwu->data_pos = 0;
  1022. kfree(fwu->ext_data_source);
  1023. fwu->ext_data_source = kzalloc(fwu->image_size, GFP_KERNEL);
  1024. if (!fwu->ext_data_source) {
  1025. dev_err(&rmi4_data->i2c_client->dev,
  1026. "%s: Failed to alloc mem for image data\n",
  1027. __func__);
  1028. return -ENOMEM;
  1029. }
  1030. return count;
  1031. }
  1032. static ssize_t fwu_sysfs_block_size_show(struct device *dev,
  1033. struct device_attribute *attr, char *buf)
  1034. {
  1035. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->block_size);
  1036. }
  1037. static ssize_t fwu_sysfs_firmware_block_count_show(struct device *dev,
  1038. struct device_attribute *attr, char *buf)
  1039. {
  1040. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->fw_block_count);
  1041. }
  1042. static ssize_t fwu_sysfs_configuration_block_count_show(struct device *dev,
  1043. struct device_attribute *attr, char *buf)
  1044. {
  1045. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->config_block_count);
  1046. }
  1047. static ssize_t fwu_sysfs_perm_config_block_count_show(struct device *dev,
  1048. struct device_attribute *attr, char *buf)
  1049. {
  1050. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->perm_config_block_count);
  1051. }
  1052. static ssize_t fwu_sysfs_bl_config_block_count_show(struct device *dev,
  1053. struct device_attribute *attr, char *buf)
  1054. {
  1055. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->bl_config_block_count);
  1056. }
  1057. static ssize_t fwu_sysfs_disp_config_block_count_show(struct device *dev,
  1058. struct device_attribute *attr, char *buf)
  1059. {
  1060. return snprintf(buf, PAGE_SIZE, "%u\n", fwu->disp_config_block_count);
  1061. }
  1062. static void synaptics_rmi4_fwu_attn(struct synaptics_rmi4_data *rmi4_data,
  1063. unsigned char intr_mask)
  1064. {
  1065. if (fwu->intr_mask & intr_mask)
  1066. fwu_read_f34_flash_status();
  1067. return;
  1068. }
  1069. static int synaptics_rmi4_fwu_init(struct synaptics_rmi4_data *rmi4_data)
  1070. {
  1071. int retval;
  1072. unsigned char attr_count;
  1073. int attr_count_num;
  1074. struct pdt_properties pdt_props;
  1075. fwu = kzalloc(sizeof(*fwu), GFP_KERNEL);
  1076. if (!fwu) {
  1077. dev_err(&rmi4_data->i2c_client->dev,
  1078. "%s: Failed to alloc mem for fwu\n",
  1079. __func__);
  1080. goto exit;
  1081. }
  1082. fwu->fn_ptr = kzalloc(sizeof(*(fwu->fn_ptr)), GFP_KERNEL);
  1083. if (!fwu->fn_ptr) {
  1084. dev_err(&rmi4_data->i2c_client->dev,
  1085. "%s: Failed to alloc mem for fn_ptr\n",
  1086. __func__);
  1087. retval = -ENOMEM;
  1088. goto exit_free_fwu;
  1089. }
  1090. fwu->rmi4_data = rmi4_data;
  1091. fwu->fn_ptr->read = rmi4_data->i2c_read;
  1092. fwu->fn_ptr->write = rmi4_data->i2c_write;
  1093. fwu->fn_ptr->enable = rmi4_data->irq_enable;
  1094. retval = fwu->fn_ptr->read(rmi4_data,
  1095. PDT_PROPS,
  1096. pdt_props.data,
  1097. sizeof(pdt_props.data));
  1098. if (retval < 0) {
  1099. dev_info(&rmi4_data->i2c_client->dev,
  1100. "%s: Failed to read PDT properties, assuming 0x00\n",
  1101. __func__);
  1102. } else if (pdt_props.has_bsr) {
  1103. dev_err(&rmi4_data->i2c_client->dev,
  1104. "%s: Reflash for LTS not currently supported\n",
  1105. __func__);
  1106. goto exit_free_mem;
  1107. }
  1108. retval = fwu_scan_pdt();
  1109. if (retval < 0)
  1110. goto exit_free_mem;
  1111. fwu->productinfo1 = rmi4_data->rmi4_mod_info.product_info[0];
  1112. fwu->productinfo2 = rmi4_data->rmi4_mod_info.product_info[1];
  1113. memcpy(fwu->product_id, rmi4_data->rmi4_mod_info.product_id_string,
  1114. SYNAPTICS_RMI4_PRODUCT_ID_SIZE);
  1115. fwu->product_id[SYNAPTICS_RMI4_PRODUCT_ID_SIZE] = 0;
  1116. #if defined(CONFIG_MACH_JACTIVESKT)
  1117. /* Fortius Use only B Type. So read and use ic_revision_of_ic from IC */
  1118. #else
  1119. /* Check the IC revision from product ID value
  1120. * we can check the ic revision with f34_ctrl_3 but to read production
  1121. * ID is more safity. because it is non-user writerble area.
  1122. */
  1123. if (rmi4_data->ic_revision_of_ic < 0xB0) {
  1124. if ((strncmp(fwu->product_id,
  1125. SYNAPTICS_PRODUCT_ID_B0, 5) == 0)
  1126. || (strncmp(fwu->product_id,
  1127. SYNAPTICS_PRODUCT_ID_B0_SPAIR, 6) == 0)) {
  1128. rmi4_data->ic_revision_of_ic = 0xB0;
  1129. } else
  1130. rmi4_data->ic_revision_of_ic = 0xA1;
  1131. }
  1132. #endif
  1133. dev_info(&rmi4_data->i2c_client->dev, "%s: [IC] [F01 product info, ID(revision)] [0x%04X 0x%04X, %s(0X%X)]\n",
  1134. __func__, fwu->productinfo1,
  1135. fwu->productinfo2, fwu->product_id,
  1136. rmi4_data->ic_revision_of_ic);
  1137. retval = fwu_read_f34_queries();
  1138. if (retval < 0)
  1139. goto exit_free_mem;
  1140. fwu->initialized = true;
  1141. retval = sysfs_create_bin_file(&rmi4_data->input_dev->dev.kobj,
  1142. &dev_attr_data);
  1143. if (retval < 0) {
  1144. dev_err(&rmi4_data->i2c_client->dev,
  1145. "%s: Failed to create sysfs bin file\n",
  1146. __func__);
  1147. goto exit_free_mem;
  1148. }
  1149. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
  1150. retval = sysfs_create_file(&rmi4_data->input_dev->dev.kobj,
  1151. &attrs[attr_count].attr);
  1152. if (retval < 0) {
  1153. dev_err(&rmi4_data->i2c_client->dev,
  1154. "%s: Failed to create sysfs attributes\n",
  1155. __func__);
  1156. retval = -ENODEV;
  1157. goto exit_remove_attrs;
  1158. }
  1159. }
  1160. return 0;
  1161. exit_remove_attrs:
  1162. attr_count_num = (int)attr_count;
  1163. for (attr_count_num--; attr_count_num >= 0; attr_count_num--) {
  1164. sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
  1165. &attrs[attr_count].attr);
  1166. }
  1167. sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
  1168. exit_free_mem:
  1169. kfree(fwu->fn_ptr);
  1170. exit_free_fwu:
  1171. kfree(fwu);
  1172. exit:
  1173. return 0;
  1174. }
  1175. static void synaptics_rmi4_fwu_remove(struct synaptics_rmi4_data *rmi4_data)
  1176. {
  1177. unsigned char attr_count;
  1178. sysfs_remove_bin_file(&rmi4_data->input_dev->dev.kobj, &dev_attr_data);
  1179. for (attr_count = 0; attr_count < ARRAY_SIZE(attrs); attr_count++) {
  1180. sysfs_remove_file(&rmi4_data->input_dev->dev.kobj,
  1181. &attrs[attr_count].attr);
  1182. }
  1183. kfree(fwu->fn_ptr);
  1184. kfree(fwu);
  1185. return;
  1186. }
  1187. int rmi4_fw_update_module_register(void)
  1188. {
  1189. int retval;
  1190. retval = synaptics_rmi4_new_function(RMI_FW_UPDATER,
  1191. synaptics_rmi4_fwu_init,
  1192. synaptics_rmi4_fwu_remove,
  1193. synaptics_rmi4_fwu_attn);
  1194. return retval;
  1195. }