dev-usb.c 5.6 KB

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  1. /*
  2. * Atheros AR7XXX/AR9XXX USB Host Controller device
  3. *
  4. * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5. * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6. *
  7. * Parts of this file are based on Atheros' 2.6.15 BSP
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 as published
  11. * by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/irq.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/usb/ehci_pdriver.h>
  20. #include <linux/usb/ohci_pdriver.h>
  21. #include <asm/mach-ath79/ath79.h>
  22. #include <asm/mach-ath79/ar71xx_regs.h>
  23. #include "common.h"
  24. #include "dev-usb.h"
  25. static struct resource ath79_ohci_resources[] = {
  26. [0] = {
  27. /* .start and .end fields are filled dynamically */
  28. .flags = IORESOURCE_MEM,
  29. },
  30. [1] = {
  31. .start = ATH79_MISC_IRQ_OHCI,
  32. .end = ATH79_MISC_IRQ_OHCI,
  33. .flags = IORESOURCE_IRQ,
  34. },
  35. };
  36. static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
  37. static struct usb_ohci_pdata ath79_ohci_pdata = {
  38. };
  39. static struct platform_device ath79_ohci_device = {
  40. .name = "ohci-platform",
  41. .id = -1,
  42. .resource = ath79_ohci_resources,
  43. .num_resources = ARRAY_SIZE(ath79_ohci_resources),
  44. .dev = {
  45. .dma_mask = &ath79_ohci_dmamask,
  46. .coherent_dma_mask = DMA_BIT_MASK(32),
  47. .platform_data = &ath79_ohci_pdata,
  48. },
  49. };
  50. static struct resource ath79_ehci_resources[] = {
  51. [0] = {
  52. /* .start and .end fields are filled dynamically */
  53. .flags = IORESOURCE_MEM,
  54. },
  55. [1] = {
  56. .start = ATH79_CPU_IRQ_USB,
  57. .end = ATH79_CPU_IRQ_USB,
  58. .flags = IORESOURCE_IRQ,
  59. },
  60. };
  61. static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
  62. static struct usb_ehci_pdata ath79_ehci_pdata_v1 = {
  63. .has_synopsys_hc_bug = 1,
  64. .port_power_off = 1,
  65. };
  66. static struct usb_ehci_pdata ath79_ehci_pdata_v2 = {
  67. .caps_offset = 0x100,
  68. .has_tt = 1,
  69. .port_power_off = 1,
  70. };
  71. static struct platform_device ath79_ehci_device = {
  72. .name = "ehci-platform",
  73. .id = -1,
  74. .resource = ath79_ehci_resources,
  75. .num_resources = ARRAY_SIZE(ath79_ehci_resources),
  76. .dev = {
  77. .dma_mask = &ath79_ehci_dmamask,
  78. .coherent_dma_mask = DMA_BIT_MASK(32),
  79. },
  80. };
  81. #define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \
  82. AR71XX_RESET_USB_PHY | \
  83. AR71XX_RESET_USB_OHCI_DLL)
  84. static void __init ath79_usb_setup(void)
  85. {
  86. void __iomem *usb_ctrl_base;
  87. ath79_device_reset_set(AR71XX_USB_RESET_MASK);
  88. mdelay(1000);
  89. ath79_device_reset_clear(AR71XX_USB_RESET_MASK);
  90. usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
  91. /* Turning on the Buff and Desc swap bits */
  92. __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG);
  93. /* WAR for HW bug. Here it adjusts the duration between two SOFS */
  94. __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ);
  95. iounmap(usb_ctrl_base);
  96. mdelay(900);
  97. ath79_ohci_resources[0].start = AR71XX_OHCI_BASE;
  98. ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1;
  99. platform_device_register(&ath79_ohci_device);
  100. ath79_ehci_resources[0].start = AR71XX_EHCI_BASE;
  101. ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1;
  102. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
  103. platform_device_register(&ath79_ehci_device);
  104. }
  105. static void __init ar7240_usb_setup(void)
  106. {
  107. void __iomem *usb_ctrl_base;
  108. ath79_device_reset_clear(AR7240_RESET_OHCI_DLL);
  109. ath79_device_reset_set(AR7240_RESET_USB_HOST);
  110. mdelay(1000);
  111. ath79_device_reset_set(AR7240_RESET_OHCI_DLL);
  112. ath79_device_reset_clear(AR7240_RESET_USB_HOST);
  113. usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE);
  114. /* WAR for HW bug. Here it adjusts the duration between two SOFS */
  115. __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ);
  116. iounmap(usb_ctrl_base);
  117. ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
  118. ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
  119. platform_device_register(&ath79_ohci_device);
  120. }
  121. static void __init ar724x_usb_setup(void)
  122. {
  123. ath79_device_reset_set(AR724X_RESET_USBSUS_OVERRIDE);
  124. mdelay(10);
  125. ath79_device_reset_clear(AR724X_RESET_USB_HOST);
  126. mdelay(10);
  127. ath79_device_reset_clear(AR724X_RESET_USB_PHY);
  128. mdelay(10);
  129. ath79_ehci_resources[0].start = AR724X_EHCI_BASE;
  130. ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1;
  131. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
  132. platform_device_register(&ath79_ehci_device);
  133. }
  134. static void __init ar913x_usb_setup(void)
  135. {
  136. ath79_device_reset_set(AR913X_RESET_USBSUS_OVERRIDE);
  137. mdelay(10);
  138. ath79_device_reset_clear(AR913X_RESET_USB_HOST);
  139. mdelay(10);
  140. ath79_device_reset_clear(AR913X_RESET_USB_PHY);
  141. mdelay(10);
  142. ath79_ehci_resources[0].start = AR913X_EHCI_BASE;
  143. ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1;
  144. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
  145. platform_device_register(&ath79_ehci_device);
  146. }
  147. static void __init ar933x_usb_setup(void)
  148. {
  149. ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
  150. mdelay(10);
  151. ath79_device_reset_clear(AR933X_RESET_USB_HOST);
  152. mdelay(10);
  153. ath79_device_reset_clear(AR933X_RESET_USB_PHY);
  154. mdelay(10);
  155. ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
  156. ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
  157. ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
  158. platform_device_register(&ath79_ehci_device);
  159. }
  160. void __init ath79_register_usb(void)
  161. {
  162. if (soc_is_ar71xx())
  163. ath79_usb_setup();
  164. else if (soc_is_ar7240())
  165. ar7240_usb_setup();
  166. else if (soc_is_ar7241() || soc_is_ar7242())
  167. ar724x_usb_setup();
  168. else if (soc_is_ar913x())
  169. ar913x_usb_setup();
  170. else if (soc_is_ar933x())
  171. ar933x_usb_setup();
  172. else
  173. BUG();
  174. }