wm8940.c 22 KB

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  1. /*
  2. * wm8940.c -- WM8940 ALSA Soc Audio driver
  3. *
  4. * Author: Jonathan Cameron <jic23@cam.ac.uk>
  5. *
  6. * Based on wm8510.c
  7. * Copyright 2006 Wolfson Microelectronics PLC.
  8. * Author: Liam Girdwood <lrg@slimlogic.co.uk>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * Not currently handled:
  15. * Notch filter control
  16. * AUXMode (inverting vs mixer)
  17. * No means to obtain current gain if alc enabled.
  18. * No use made of gpio
  19. * Fast VMID discharge for power down
  20. * Soft Start
  21. * DLR and ALR Swaps not enabled
  22. * Digital Sidetone not supported
  23. */
  24. #include <linux/module.h>
  25. #include <linux/moduleparam.h>
  26. #include <linux/kernel.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/pm.h>
  30. #include <linux/i2c.h>
  31. #include <linux/spi/spi.h>
  32. #include <linux/slab.h>
  33. #include <sound/core.h>
  34. #include <sound/pcm.h>
  35. #include <sound/pcm_params.h>
  36. #include <sound/soc.h>
  37. #include <sound/initval.h>
  38. #include <sound/tlv.h>
  39. #include "wm8940.h"
  40. struct wm8940_priv {
  41. unsigned int sysclk;
  42. enum snd_soc_control_type control_type;
  43. };
  44. static int wm8940_volatile_register(struct snd_soc_codec *codec,
  45. unsigned int reg)
  46. {
  47. switch (reg) {
  48. case WM8940_SOFTRESET:
  49. return 1;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static u16 wm8940_reg_defaults[] = {
  55. 0x8940, /* Soft Reset */
  56. 0x0000, /* Power 1 */
  57. 0x0000, /* Power 2 */
  58. 0x0000, /* Power 3 */
  59. 0x0010, /* Interface Control */
  60. 0x0000, /* Companding Control */
  61. 0x0140, /* Clock Control */
  62. 0x0000, /* Additional Controls */
  63. 0x0000, /* GPIO Control */
  64. 0x0002, /* Auto Increment Control */
  65. 0x0000, /* DAC Control */
  66. 0x00FF, /* DAC Volume */
  67. 0,
  68. 0,
  69. 0x0100, /* ADC Control */
  70. 0x00FF, /* ADC Volume */
  71. 0x0000, /* Notch Filter 1 Control 1 */
  72. 0x0000, /* Notch Filter 1 Control 2 */
  73. 0x0000, /* Notch Filter 2 Control 1 */
  74. 0x0000, /* Notch Filter 2 Control 2 */
  75. 0x0000, /* Notch Filter 3 Control 1 */
  76. 0x0000, /* Notch Filter 3 Control 2 */
  77. 0x0000, /* Notch Filter 4 Control 1 */
  78. 0x0000, /* Notch Filter 4 Control 2 */
  79. 0x0032, /* DAC Limit Control 1 */
  80. 0x0000, /* DAC Limit Control 2 */
  81. 0,
  82. 0,
  83. 0,
  84. 0,
  85. 0,
  86. 0,
  87. 0x0038, /* ALC Control 1 */
  88. 0x000B, /* ALC Control 2 */
  89. 0x0032, /* ALC Control 3 */
  90. 0x0000, /* Noise Gate */
  91. 0x0041, /* PLLN */
  92. 0x000C, /* PLLK1 */
  93. 0x0093, /* PLLK2 */
  94. 0x00E9, /* PLLK3 */
  95. 0,
  96. 0,
  97. 0x0030, /* ALC Control 4 */
  98. 0,
  99. 0x0002, /* Input Control */
  100. 0x0050, /* PGA Gain */
  101. 0,
  102. 0x0002, /* ADC Boost Control */
  103. 0,
  104. 0x0002, /* Output Control */
  105. 0x0000, /* Speaker Mixer Control */
  106. 0,
  107. 0,
  108. 0,
  109. 0x0079, /* Speaker Volume */
  110. 0,
  111. 0x0000, /* Mono Mixer Control */
  112. };
  113. static const char *wm8940_companding[] = { "Off", "NC", "u-law", "A-law" };
  114. static const struct soc_enum wm8940_adc_companding_enum
  115. = SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 1, 4, wm8940_companding);
  116. static const struct soc_enum wm8940_dac_companding_enum
  117. = SOC_ENUM_SINGLE(WM8940_COMPANDINGCTL, 3, 4, wm8940_companding);
  118. static const char *wm8940_alc_mode_text[] = {"ALC", "Limiter"};
  119. static const struct soc_enum wm8940_alc_mode_enum
  120. = SOC_ENUM_SINGLE(WM8940_ALC3, 8, 2, wm8940_alc_mode_text);
  121. static const char *wm8940_mic_bias_level_text[] = {"0.9", "0.65"};
  122. static const struct soc_enum wm8940_mic_bias_level_enum
  123. = SOC_ENUM_SINGLE(WM8940_INPUTCTL, 8, 2, wm8940_mic_bias_level_text);
  124. static const char *wm8940_filter_mode_text[] = {"Audio", "Application"};
  125. static const struct soc_enum wm8940_filter_mode_enum
  126. = SOC_ENUM_SINGLE(WM8940_ADC, 7, 2, wm8940_filter_mode_text);
  127. static DECLARE_TLV_DB_SCALE(wm8940_spk_vol_tlv, -5700, 100, 1);
  128. static DECLARE_TLV_DB_SCALE(wm8940_att_tlv, -1000, 1000, 0);
  129. static DECLARE_TLV_DB_SCALE(wm8940_pga_vol_tlv, -1200, 75, 0);
  130. static DECLARE_TLV_DB_SCALE(wm8940_alc_min_tlv, -1200, 600, 0);
  131. static DECLARE_TLV_DB_SCALE(wm8940_alc_max_tlv, 675, 600, 0);
  132. static DECLARE_TLV_DB_SCALE(wm8940_alc_tar_tlv, -2250, 50, 0);
  133. static DECLARE_TLV_DB_SCALE(wm8940_lim_boost_tlv, 0, 100, 0);
  134. static DECLARE_TLV_DB_SCALE(wm8940_lim_thresh_tlv, -600, 100, 0);
  135. static DECLARE_TLV_DB_SCALE(wm8940_adc_tlv, -12750, 50, 1);
  136. static DECLARE_TLV_DB_SCALE(wm8940_capture_boost_vol_tlv, 0, 2000, 0);
  137. static const struct snd_kcontrol_new wm8940_snd_controls[] = {
  138. SOC_SINGLE("Digital Loopback Switch", WM8940_COMPANDINGCTL,
  139. 6, 1, 0),
  140. SOC_ENUM("DAC Companding", wm8940_dac_companding_enum),
  141. SOC_ENUM("ADC Companding", wm8940_adc_companding_enum),
  142. SOC_ENUM("ALC Mode", wm8940_alc_mode_enum),
  143. SOC_SINGLE("ALC Switch", WM8940_ALC1, 8, 1, 0),
  144. SOC_SINGLE_TLV("ALC Capture Max Gain", WM8940_ALC1,
  145. 3, 7, 1, wm8940_alc_max_tlv),
  146. SOC_SINGLE_TLV("ALC Capture Min Gain", WM8940_ALC1,
  147. 0, 7, 0, wm8940_alc_min_tlv),
  148. SOC_SINGLE_TLV("ALC Capture Target", WM8940_ALC2,
  149. 0, 14, 0, wm8940_alc_tar_tlv),
  150. SOC_SINGLE("ALC Capture Hold", WM8940_ALC2, 4, 10, 0),
  151. SOC_SINGLE("ALC Capture Decay", WM8940_ALC3, 4, 10, 0),
  152. SOC_SINGLE("ALC Capture Attach", WM8940_ALC3, 0, 10, 0),
  153. SOC_SINGLE("ALC ZC Switch", WM8940_ALC4, 1, 1, 0),
  154. SOC_SINGLE("ALC Capture Noise Gate Switch", WM8940_NOISEGATE,
  155. 3, 1, 0),
  156. SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8940_NOISEGATE,
  157. 0, 7, 0),
  158. SOC_SINGLE("DAC Playback Limiter Switch", WM8940_DACLIM1, 8, 1, 0),
  159. SOC_SINGLE("DAC Playback Limiter Attack", WM8940_DACLIM1, 0, 9, 0),
  160. SOC_SINGLE("DAC Playback Limiter Decay", WM8940_DACLIM1, 4, 11, 0),
  161. SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8940_DACLIM2,
  162. 4, 9, 1, wm8940_lim_thresh_tlv),
  163. SOC_SINGLE_TLV("DAC Playback Limiter Boost", WM8940_DACLIM2,
  164. 0, 12, 0, wm8940_lim_boost_tlv),
  165. SOC_SINGLE("Capture PGA ZC Switch", WM8940_PGAGAIN, 7, 1, 0),
  166. SOC_SINGLE_TLV("Capture PGA Volume", WM8940_PGAGAIN,
  167. 0, 63, 0, wm8940_pga_vol_tlv),
  168. SOC_SINGLE_TLV("Digital Playback Volume", WM8940_DACVOL,
  169. 0, 255, 0, wm8940_adc_tlv),
  170. SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
  171. 0, 255, 0, wm8940_adc_tlv),
  172. SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
  173. SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
  174. 8, 1, 0, wm8940_capture_boost_vol_tlv),
  175. SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
  176. 0, 63, 0, wm8940_spk_vol_tlv),
  177. SOC_SINGLE("Speaker Playback Switch", WM8940_SPKVOL, 6, 1, 1),
  178. SOC_SINGLE_TLV("Speaker Mixer Line Bypass Volume", WM8940_SPKVOL,
  179. 8, 1, 1, wm8940_att_tlv),
  180. SOC_SINGLE("Speaker Playback ZC Switch", WM8940_SPKVOL, 7, 1, 0),
  181. SOC_SINGLE("Mono Out Switch", WM8940_MONOMIX, 6, 1, 1),
  182. SOC_SINGLE_TLV("Mono Mixer Line Bypass Volume", WM8940_MONOMIX,
  183. 7, 1, 1, wm8940_att_tlv),
  184. SOC_SINGLE("High Pass Filter Switch", WM8940_ADC, 8, 1, 0),
  185. SOC_ENUM("High Pass Filter Mode", wm8940_filter_mode_enum),
  186. SOC_SINGLE("High Pass Filter Cut Off", WM8940_ADC, 4, 7, 0),
  187. SOC_SINGLE("ADC Inversion Switch", WM8940_ADC, 0, 1, 0),
  188. SOC_SINGLE("DAC Inversion Switch", WM8940_DAC, 0, 1, 0),
  189. SOC_SINGLE("DAC Auto Mute Switch", WM8940_DAC, 2, 1, 0),
  190. SOC_SINGLE("ZC Timeout Clock Switch", WM8940_ADDCNTRL, 0, 1, 0),
  191. };
  192. static const struct snd_kcontrol_new wm8940_speaker_mixer_controls[] = {
  193. SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_SPKMIX, 1, 1, 0),
  194. SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_SPKMIX, 5, 1, 0),
  195. SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_SPKMIX, 0, 1, 0),
  196. };
  197. static const struct snd_kcontrol_new wm8940_mono_mixer_controls[] = {
  198. SOC_DAPM_SINGLE("Line Bypass Switch", WM8940_MONOMIX, 1, 1, 0),
  199. SOC_DAPM_SINGLE("Aux Playback Switch", WM8940_MONOMIX, 2, 1, 0),
  200. SOC_DAPM_SINGLE("PCM Playback Switch", WM8940_MONOMIX, 0, 1, 0),
  201. };
  202. static DECLARE_TLV_DB_SCALE(wm8940_boost_vol_tlv, -1500, 300, 1);
  203. static const struct snd_kcontrol_new wm8940_input_boost_controls[] = {
  204. SOC_DAPM_SINGLE("Mic PGA Switch", WM8940_PGAGAIN, 6, 1, 1),
  205. SOC_DAPM_SINGLE_TLV("Aux Volume", WM8940_ADCBOOST,
  206. 0, 7, 0, wm8940_boost_vol_tlv),
  207. SOC_DAPM_SINGLE_TLV("Mic Volume", WM8940_ADCBOOST,
  208. 4, 7, 0, wm8940_boost_vol_tlv),
  209. };
  210. static const struct snd_kcontrol_new wm8940_micpga_controls[] = {
  211. SOC_DAPM_SINGLE("AUX Switch", WM8940_INPUTCTL, 2, 1, 0),
  212. SOC_DAPM_SINGLE("MICP Switch", WM8940_INPUTCTL, 0, 1, 0),
  213. SOC_DAPM_SINGLE("MICN Switch", WM8940_INPUTCTL, 1, 1, 0),
  214. };
  215. static const struct snd_soc_dapm_widget wm8940_dapm_widgets[] = {
  216. SND_SOC_DAPM_MIXER("Speaker Mixer", WM8940_POWER3, 2, 0,
  217. &wm8940_speaker_mixer_controls[0],
  218. ARRAY_SIZE(wm8940_speaker_mixer_controls)),
  219. SND_SOC_DAPM_MIXER("Mono Mixer", WM8940_POWER3, 3, 0,
  220. &wm8940_mono_mixer_controls[0],
  221. ARRAY_SIZE(wm8940_mono_mixer_controls)),
  222. SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8940_POWER3, 0, 0),
  223. SND_SOC_DAPM_PGA("SpkN Out", WM8940_POWER3, 5, 0, NULL, 0),
  224. SND_SOC_DAPM_PGA("SpkP Out", WM8940_POWER3, 6, 0, NULL, 0),
  225. SND_SOC_DAPM_PGA("Mono Out", WM8940_POWER3, 7, 0, NULL, 0),
  226. SND_SOC_DAPM_OUTPUT("MONOOUT"),
  227. SND_SOC_DAPM_OUTPUT("SPKOUTP"),
  228. SND_SOC_DAPM_OUTPUT("SPKOUTN"),
  229. SND_SOC_DAPM_PGA("Aux Input", WM8940_POWER1, 6, 0, NULL, 0),
  230. SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8940_POWER2, 0, 0),
  231. SND_SOC_DAPM_MIXER("Mic PGA", WM8940_POWER2, 2, 0,
  232. &wm8940_micpga_controls[0],
  233. ARRAY_SIZE(wm8940_micpga_controls)),
  234. SND_SOC_DAPM_MIXER("Boost Mixer", WM8940_POWER2, 4, 0,
  235. &wm8940_input_boost_controls[0],
  236. ARRAY_SIZE(wm8940_input_boost_controls)),
  237. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8940_POWER1, 4, 0),
  238. SND_SOC_DAPM_INPUT("MICN"),
  239. SND_SOC_DAPM_INPUT("MICP"),
  240. SND_SOC_DAPM_INPUT("AUX"),
  241. };
  242. static const struct snd_soc_dapm_route audio_map[] = {
  243. /* Mono output mixer */
  244. {"Mono Mixer", "PCM Playback Switch", "DAC"},
  245. {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
  246. {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
  247. /* Speaker output mixer */
  248. {"Speaker Mixer", "PCM Playback Switch", "DAC"},
  249. {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
  250. {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
  251. /* Outputs */
  252. {"Mono Out", NULL, "Mono Mixer"},
  253. {"MONOOUT", NULL, "Mono Out"},
  254. {"SpkN Out", NULL, "Speaker Mixer"},
  255. {"SpkP Out", NULL, "Speaker Mixer"},
  256. {"SPKOUTN", NULL, "SpkN Out"},
  257. {"SPKOUTP", NULL, "SpkP Out"},
  258. /* Microphone PGA */
  259. {"Mic PGA", "MICN Switch", "MICN"},
  260. {"Mic PGA", "MICP Switch", "MICP"},
  261. {"Mic PGA", "AUX Switch", "AUX"},
  262. /* Boost Mixer */
  263. {"Boost Mixer", "Mic PGA Switch", "Mic PGA"},
  264. {"Boost Mixer", "Mic Volume", "MICP"},
  265. {"Boost Mixer", "Aux Volume", "Aux Input"},
  266. {"ADC", NULL, "Boost Mixer"},
  267. };
  268. static int wm8940_add_widgets(struct snd_soc_codec *codec)
  269. {
  270. struct snd_soc_dapm_context *dapm = &codec->dapm;
  271. int ret;
  272. ret = snd_soc_dapm_new_controls(dapm, wm8940_dapm_widgets,
  273. ARRAY_SIZE(wm8940_dapm_widgets));
  274. if (ret)
  275. goto error_ret;
  276. ret = snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
  277. error_ret:
  278. return ret;
  279. }
  280. #define wm8940_reset(c) snd_soc_write(c, WM8940_SOFTRESET, 0);
  281. static int wm8940_set_dai_fmt(struct snd_soc_dai *codec_dai,
  282. unsigned int fmt)
  283. {
  284. struct snd_soc_codec *codec = codec_dai->codec;
  285. u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFE67;
  286. u16 clk = snd_soc_read(codec, WM8940_CLOCK) & 0x1fe;
  287. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  288. case SND_SOC_DAIFMT_CBM_CFM:
  289. clk |= 1;
  290. break;
  291. case SND_SOC_DAIFMT_CBS_CFS:
  292. break;
  293. default:
  294. return -EINVAL;
  295. }
  296. snd_soc_write(codec, WM8940_CLOCK, clk);
  297. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  298. case SND_SOC_DAIFMT_I2S:
  299. iface |= (2 << 3);
  300. break;
  301. case SND_SOC_DAIFMT_LEFT_J:
  302. iface |= (1 << 3);
  303. break;
  304. case SND_SOC_DAIFMT_RIGHT_J:
  305. break;
  306. case SND_SOC_DAIFMT_DSP_A:
  307. iface |= (3 << 3);
  308. break;
  309. case SND_SOC_DAIFMT_DSP_B:
  310. iface |= (3 << 3) | (1 << 7);
  311. break;
  312. }
  313. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  314. case SND_SOC_DAIFMT_NB_NF:
  315. break;
  316. case SND_SOC_DAIFMT_NB_IF:
  317. iface |= (1 << 7);
  318. break;
  319. case SND_SOC_DAIFMT_IB_NF:
  320. iface |= (1 << 8);
  321. break;
  322. case SND_SOC_DAIFMT_IB_IF:
  323. iface |= (1 << 8) | (1 << 7);
  324. break;
  325. }
  326. snd_soc_write(codec, WM8940_IFACE, iface);
  327. return 0;
  328. }
  329. static int wm8940_i2s_hw_params(struct snd_pcm_substream *substream,
  330. struct snd_pcm_hw_params *params,
  331. struct snd_soc_dai *dai)
  332. {
  333. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  334. struct snd_soc_codec *codec = rtd->codec;
  335. u16 iface = snd_soc_read(codec, WM8940_IFACE) & 0xFD9F;
  336. u16 addcntrl = snd_soc_read(codec, WM8940_ADDCNTRL) & 0xFFF1;
  337. u16 companding = snd_soc_read(codec,
  338. WM8940_COMPANDINGCTL) & 0xFFDF;
  339. int ret;
  340. /* LoutR control */
  341. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE
  342. && params_channels(params) == 2)
  343. iface |= (1 << 9);
  344. switch (params_rate(params)) {
  345. case 8000:
  346. addcntrl |= (0x5 << 1);
  347. break;
  348. case 11025:
  349. addcntrl |= (0x4 << 1);
  350. break;
  351. case 16000:
  352. addcntrl |= (0x3 << 1);
  353. break;
  354. case 22050:
  355. addcntrl |= (0x2 << 1);
  356. break;
  357. case 32000:
  358. addcntrl |= (0x1 << 1);
  359. break;
  360. case 44100:
  361. case 48000:
  362. break;
  363. }
  364. ret = snd_soc_write(codec, WM8940_ADDCNTRL, addcntrl);
  365. if (ret)
  366. goto error_ret;
  367. switch (params_format(params)) {
  368. case SNDRV_PCM_FORMAT_S8:
  369. companding = companding | (1 << 5);
  370. break;
  371. case SNDRV_PCM_FORMAT_S16_LE:
  372. break;
  373. case SNDRV_PCM_FORMAT_S20_3LE:
  374. iface |= (1 << 5);
  375. break;
  376. case SNDRV_PCM_FORMAT_S24_LE:
  377. iface |= (2 << 5);
  378. break;
  379. case SNDRV_PCM_FORMAT_S32_LE:
  380. iface |= (3 << 5);
  381. break;
  382. }
  383. ret = snd_soc_write(codec, WM8940_COMPANDINGCTL, companding);
  384. if (ret)
  385. goto error_ret;
  386. ret = snd_soc_write(codec, WM8940_IFACE, iface);
  387. error_ret:
  388. return ret;
  389. }
  390. static int wm8940_mute(struct snd_soc_dai *dai, int mute)
  391. {
  392. struct snd_soc_codec *codec = dai->codec;
  393. u16 mute_reg = snd_soc_read(codec, WM8940_DAC) & 0xffbf;
  394. if (mute)
  395. mute_reg |= 0x40;
  396. return snd_soc_write(codec, WM8940_DAC, mute_reg);
  397. }
  398. static int wm8940_set_bias_level(struct snd_soc_codec *codec,
  399. enum snd_soc_bias_level level)
  400. {
  401. u16 val;
  402. u16 pwr_reg = snd_soc_read(codec, WM8940_POWER1) & 0x1F0;
  403. int ret = 0;
  404. switch (level) {
  405. case SND_SOC_BIAS_ON:
  406. /* ensure bufioen and biasen */
  407. pwr_reg |= (1 << 2) | (1 << 3);
  408. /* Enable thermal shutdown */
  409. val = snd_soc_read(codec, WM8940_OUTPUTCTL);
  410. ret = snd_soc_write(codec, WM8940_OUTPUTCTL, val | 0x2);
  411. if (ret)
  412. break;
  413. /* set vmid to 75k */
  414. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
  415. break;
  416. case SND_SOC_BIAS_PREPARE:
  417. /* ensure bufioen and biasen */
  418. pwr_reg |= (1 << 2) | (1 << 3);
  419. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x1);
  420. break;
  421. case SND_SOC_BIAS_STANDBY:
  422. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  423. ret = snd_soc_cache_sync(codec);
  424. if (ret < 0) {
  425. dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
  426. return ret;
  427. }
  428. }
  429. /* ensure bufioen and biasen */
  430. pwr_reg |= (1 << 2) | (1 << 3);
  431. /* set vmid to 300k for standby */
  432. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg | 0x2);
  433. break;
  434. case SND_SOC_BIAS_OFF:
  435. ret = snd_soc_write(codec, WM8940_POWER1, pwr_reg);
  436. break;
  437. }
  438. codec->dapm.bias_level = level;
  439. return ret;
  440. }
  441. struct pll_ {
  442. unsigned int pre_scale:2;
  443. unsigned int n:4;
  444. unsigned int k;
  445. };
  446. static struct pll_ pll_div;
  447. /* The size in bits of the pll divide multiplied by 10
  448. * to allow rounding later */
  449. #define FIXED_PLL_SIZE ((1 << 24) * 10)
  450. static void pll_factors(unsigned int target, unsigned int source)
  451. {
  452. unsigned long long Kpart;
  453. unsigned int K, Ndiv, Nmod;
  454. /* The left shift ist to avoid accuracy loss when right shifting */
  455. Ndiv = target / source;
  456. if (Ndiv > 12) {
  457. source <<= 1;
  458. /* Multiply by 2 */
  459. pll_div.pre_scale = 0;
  460. Ndiv = target / source;
  461. } else if (Ndiv < 3) {
  462. source >>= 2;
  463. /* Divide by 4 */
  464. pll_div.pre_scale = 3;
  465. Ndiv = target / source;
  466. } else if (Ndiv < 6) {
  467. source >>= 1;
  468. /* divide by 2 */
  469. pll_div.pre_scale = 2;
  470. Ndiv = target / source;
  471. } else
  472. pll_div.pre_scale = 1;
  473. if ((Ndiv < 6) || (Ndiv > 12))
  474. printk(KERN_WARNING
  475. "WM8940 N value %d outwith recommended range!d\n",
  476. Ndiv);
  477. pll_div.n = Ndiv;
  478. Nmod = target % source;
  479. Kpart = FIXED_PLL_SIZE * (long long)Nmod;
  480. do_div(Kpart, source);
  481. K = Kpart & 0xFFFFFFFF;
  482. /* Check if we need to round */
  483. if ((K % 10) >= 5)
  484. K += 5;
  485. /* Move down to proper range now rounding is done */
  486. K /= 10;
  487. pll_div.k = K;
  488. }
  489. /* Untested at the moment */
  490. static int wm8940_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
  491. int source, unsigned int freq_in, unsigned int freq_out)
  492. {
  493. struct snd_soc_codec *codec = codec_dai->codec;
  494. u16 reg;
  495. /* Turn off PLL */
  496. reg = snd_soc_read(codec, WM8940_POWER1);
  497. snd_soc_write(codec, WM8940_POWER1, reg & 0x1df);
  498. if (freq_in == 0 || freq_out == 0) {
  499. /* Clock CODEC directly from MCLK */
  500. reg = snd_soc_read(codec, WM8940_CLOCK);
  501. snd_soc_write(codec, WM8940_CLOCK, reg & 0x0ff);
  502. /* Pll power down */
  503. snd_soc_write(codec, WM8940_PLLN, (1 << 7));
  504. return 0;
  505. }
  506. /* Pll is followed by a frequency divide by 4 */
  507. pll_factors(freq_out*4, freq_in);
  508. if (pll_div.k)
  509. snd_soc_write(codec, WM8940_PLLN,
  510. (pll_div.pre_scale << 4) | pll_div.n | (1 << 6));
  511. else /* No factional component */
  512. snd_soc_write(codec, WM8940_PLLN,
  513. (pll_div.pre_scale << 4) | pll_div.n);
  514. snd_soc_write(codec, WM8940_PLLK1, pll_div.k >> 18);
  515. snd_soc_write(codec, WM8940_PLLK2, (pll_div.k >> 9) & 0x1ff);
  516. snd_soc_write(codec, WM8940_PLLK3, pll_div.k & 0x1ff);
  517. /* Enable the PLL */
  518. reg = snd_soc_read(codec, WM8940_POWER1);
  519. snd_soc_write(codec, WM8940_POWER1, reg | 0x020);
  520. /* Run CODEC from PLL instead of MCLK */
  521. reg = snd_soc_read(codec, WM8940_CLOCK);
  522. snd_soc_write(codec, WM8940_CLOCK, reg | 0x100);
  523. return 0;
  524. }
  525. static int wm8940_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  526. int clk_id, unsigned int freq, int dir)
  527. {
  528. struct snd_soc_codec *codec = codec_dai->codec;
  529. struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
  530. switch (freq) {
  531. case 11289600:
  532. case 12000000:
  533. case 12288000:
  534. case 16934400:
  535. case 18432000:
  536. wm8940->sysclk = freq;
  537. return 0;
  538. }
  539. return -EINVAL;
  540. }
  541. static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
  542. int div_id, int div)
  543. {
  544. struct snd_soc_codec *codec = codec_dai->codec;
  545. u16 reg;
  546. int ret = 0;
  547. switch (div_id) {
  548. case WM8940_BCLKDIV:
  549. reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
  550. ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
  551. break;
  552. case WM8940_MCLKDIV:
  553. reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFF1F;
  554. ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 5));
  555. break;
  556. case WM8940_OPCLKDIV:
  557. reg = snd_soc_read(codec, WM8940_GPIO) & 0xFFCF;
  558. ret = snd_soc_write(codec, WM8940_GPIO, reg | (div << 4));
  559. break;
  560. }
  561. return ret;
  562. }
  563. #define WM8940_RATES SNDRV_PCM_RATE_8000_48000
  564. #define WM8940_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
  565. SNDRV_PCM_FMTBIT_S16_LE | \
  566. SNDRV_PCM_FMTBIT_S20_3LE | \
  567. SNDRV_PCM_FMTBIT_S24_LE | \
  568. SNDRV_PCM_FMTBIT_S32_LE)
  569. static const struct snd_soc_dai_ops wm8940_dai_ops = {
  570. .hw_params = wm8940_i2s_hw_params,
  571. .set_sysclk = wm8940_set_dai_sysclk,
  572. .digital_mute = wm8940_mute,
  573. .set_fmt = wm8940_set_dai_fmt,
  574. .set_clkdiv = wm8940_set_dai_clkdiv,
  575. .set_pll = wm8940_set_dai_pll,
  576. };
  577. static struct snd_soc_dai_driver wm8940_dai = {
  578. .name = "wm8940-hifi",
  579. .playback = {
  580. .stream_name = "Playback",
  581. .channels_min = 1,
  582. .channels_max = 2,
  583. .rates = WM8940_RATES,
  584. .formats = WM8940_FORMATS,
  585. },
  586. .capture = {
  587. .stream_name = "Capture",
  588. .channels_min = 1,
  589. .channels_max = 2,
  590. .rates = WM8940_RATES,
  591. .formats = WM8940_FORMATS,
  592. },
  593. .ops = &wm8940_dai_ops,
  594. .symmetric_rates = 1,
  595. };
  596. static int wm8940_suspend(struct snd_soc_codec *codec)
  597. {
  598. return wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
  599. }
  600. static int wm8940_resume(struct snd_soc_codec *codec)
  601. {
  602. wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  603. return 0;
  604. }
  605. static int wm8940_probe(struct snd_soc_codec *codec)
  606. {
  607. struct wm8940_priv *wm8940 = snd_soc_codec_get_drvdata(codec);
  608. struct wm8940_setup_data *pdata = codec->dev->platform_data;
  609. int ret;
  610. u16 reg;
  611. ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8940->control_type);
  612. if (ret < 0) {
  613. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  614. return ret;
  615. }
  616. ret = wm8940_reset(codec);
  617. if (ret < 0) {
  618. dev_err(codec->dev, "Failed to issue reset\n");
  619. return ret;
  620. }
  621. wm8940_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  622. ret = snd_soc_write(codec, WM8940_POWER1, 0x180);
  623. if (ret < 0)
  624. return ret;
  625. if (!pdata)
  626. dev_warn(codec->dev, "No platform data supplied\n");
  627. else {
  628. reg = snd_soc_read(codec, WM8940_OUTPUTCTL);
  629. ret = snd_soc_write(codec, WM8940_OUTPUTCTL, reg | pdata->vroi);
  630. if (ret < 0)
  631. return ret;
  632. }
  633. ret = snd_soc_add_codec_controls(codec, wm8940_snd_controls,
  634. ARRAY_SIZE(wm8940_snd_controls));
  635. if (ret)
  636. return ret;
  637. ret = wm8940_add_widgets(codec);
  638. return ret;
  639. }
  640. static int wm8940_remove(struct snd_soc_codec *codec)
  641. {
  642. wm8940_set_bias_level(codec, SND_SOC_BIAS_OFF);
  643. return 0;
  644. }
  645. static struct snd_soc_codec_driver soc_codec_dev_wm8940 = {
  646. .probe = wm8940_probe,
  647. .remove = wm8940_remove,
  648. .suspend = wm8940_suspend,
  649. .resume = wm8940_resume,
  650. .set_bias_level = wm8940_set_bias_level,
  651. .reg_cache_size = ARRAY_SIZE(wm8940_reg_defaults),
  652. .reg_word_size = sizeof(u16),
  653. .reg_cache_default = wm8940_reg_defaults,
  654. .volatile_register = wm8940_volatile_register,
  655. };
  656. static __devinit int wm8940_i2c_probe(struct i2c_client *i2c,
  657. const struct i2c_device_id *id)
  658. {
  659. struct wm8940_priv *wm8940;
  660. int ret;
  661. wm8940 = devm_kzalloc(&i2c->dev, sizeof(struct wm8940_priv),
  662. GFP_KERNEL);
  663. if (wm8940 == NULL)
  664. return -ENOMEM;
  665. i2c_set_clientdata(i2c, wm8940);
  666. wm8940->control_type = SND_SOC_I2C;
  667. ret = snd_soc_register_codec(&i2c->dev,
  668. &soc_codec_dev_wm8940, &wm8940_dai, 1);
  669. return ret;
  670. }
  671. static __devexit int wm8940_i2c_remove(struct i2c_client *client)
  672. {
  673. snd_soc_unregister_codec(&client->dev);
  674. return 0;
  675. }
  676. static const struct i2c_device_id wm8940_i2c_id[] = {
  677. { "wm8940", 0 },
  678. { }
  679. };
  680. MODULE_DEVICE_TABLE(i2c, wm8940_i2c_id);
  681. static struct i2c_driver wm8940_i2c_driver = {
  682. .driver = {
  683. .name = "wm8940",
  684. .owner = THIS_MODULE,
  685. },
  686. .probe = wm8940_i2c_probe,
  687. .remove = __devexit_p(wm8940_i2c_remove),
  688. .id_table = wm8940_i2c_id,
  689. };
  690. static int __init wm8940_modinit(void)
  691. {
  692. int ret = 0;
  693. ret = i2c_add_driver(&wm8940_i2c_driver);
  694. if (ret != 0) {
  695. printk(KERN_ERR "Failed to register wm8940 I2C driver: %d\n",
  696. ret);
  697. }
  698. return ret;
  699. }
  700. module_init(wm8940_modinit);
  701. static void __exit wm8940_exit(void)
  702. {
  703. i2c_del_driver(&wm8940_i2c_driver);
  704. }
  705. module_exit(wm8940_exit);
  706. MODULE_DESCRIPTION("ASoC WM8940 driver");
  707. MODULE_AUTHOR("Jonathan Cameron");
  708. MODULE_LICENSE("GPL");