wm8737.c 19 KB

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  1. /*
  2. * wm8737.c -- WM8737 ALSA SoC Audio driver
  3. *
  4. * Copyright 2010 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/i2c.h>
  18. #include <linux/regulator/consumer.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/slab.h>
  21. #include <linux/of_device.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "wm8737.h"
  30. #define WM8737_NUM_SUPPLIES 4
  31. static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
  32. "DCVDD",
  33. "DBVDD",
  34. "AVDD",
  35. "MVDD",
  36. };
  37. /* codec private data */
  38. struct wm8737_priv {
  39. enum snd_soc_control_type control_type;
  40. struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
  41. unsigned int mclk;
  42. };
  43. static const u16 wm8737_reg[WM8737_REGISTER_COUNT] = {
  44. 0x00C3, /* R0 - Left PGA volume */
  45. 0x00C3, /* R1 - Right PGA volume */
  46. 0x0007, /* R2 - AUDIO path L */
  47. 0x0007, /* R3 - AUDIO path R */
  48. 0x0000, /* R4 - 3D Enhance */
  49. 0x0000, /* R5 - ADC Control */
  50. 0x0000, /* R6 - Power Management */
  51. 0x000A, /* R7 - Audio Format */
  52. 0x0000, /* R8 - Clocking */
  53. 0x000F, /* R9 - MIC Preamp Control */
  54. 0x0003, /* R10 - Misc Bias Control */
  55. 0x0000, /* R11 - Noise Gate */
  56. 0x007C, /* R12 - ALC1 */
  57. 0x0000, /* R13 - ALC2 */
  58. 0x0032, /* R14 - ALC3 */
  59. };
  60. static int wm8737_reset(struct snd_soc_codec *codec)
  61. {
  62. return snd_soc_write(codec, WM8737_RESET, 0);
  63. }
  64. static const unsigned int micboost_tlv[] = {
  65. TLV_DB_RANGE_HEAD(4),
  66. 0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
  67. 1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
  68. 2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
  69. 3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0),
  70. };
  71. static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
  72. static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
  73. static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
  74. static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
  75. static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
  76. static const char *micbias_enum_text[] = {
  77. "25%",
  78. "50%",
  79. "75%",
  80. "100%",
  81. };
  82. static const struct soc_enum micbias_enum =
  83. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 0, 4, micbias_enum_text);
  84. static const char *low_cutoff_text[] = {
  85. "Low", "High"
  86. };
  87. static const struct soc_enum low_3d =
  88. SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 6, 2, low_cutoff_text);
  89. static const char *high_cutoff_text[] = {
  90. "High", "Low"
  91. };
  92. static const struct soc_enum high_3d =
  93. SOC_ENUM_SINGLE(WM8737_3D_ENHANCE, 5, 2, high_cutoff_text);
  94. static const char *alc_fn_text[] = {
  95. "Disabled", "Right", "Left", "Stereo"
  96. };
  97. static const struct soc_enum alc_fn =
  98. SOC_ENUM_SINGLE(WM8737_ALC1, 7, 4, alc_fn_text);
  99. static const char *alc_hold_text[] = {
  100. "0", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
  101. "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
  102. "10.916s", "21.832s", "43.691s"
  103. };
  104. static const struct soc_enum alc_hold =
  105. SOC_ENUM_SINGLE(WM8737_ALC2, 0, 16, alc_hold_text);
  106. static const char *alc_atk_text[] = {
  107. "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
  108. "1.075s", "2.15s", "4.3s", "8.6s"
  109. };
  110. static const struct soc_enum alc_atk =
  111. SOC_ENUM_SINGLE(WM8737_ALC3, 0, 11, alc_atk_text);
  112. static const char *alc_dcy_text[] = {
  113. "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
  114. "4.3s", "8.6s", "17.2s", "34.41s"
  115. };
  116. static const struct soc_enum alc_dcy =
  117. SOC_ENUM_SINGLE(WM8737_ALC3, 4, 11, alc_dcy_text);
  118. static const struct snd_kcontrol_new wm8737_snd_controls[] = {
  119. SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  120. 6, 3, 0, micboost_tlv),
  121. SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  122. 4, 1, 0),
  123. SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  124. 3, 1, 0),
  125. SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
  126. WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
  127. SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
  128. 2, 1, 0),
  129. SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
  130. SOC_ENUM("Mic PGA Bias", micbias_enum),
  131. SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
  132. SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
  133. SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
  134. SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
  135. SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
  136. SOC_ENUM("3D Low Cut-off", low_3d),
  137. SOC_ENUM("3D High Cut-off", low_3d),
  138. SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
  139. SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
  140. SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
  141. ng_tlv),
  142. SOC_ENUM("ALC", alc_fn),
  143. SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
  144. SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
  145. SOC_ENUM("ALC Hold Time", alc_hold),
  146. SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
  147. SOC_ENUM("ALC Attack Time", alc_atk),
  148. SOC_ENUM("ALC Decay Time", alc_dcy),
  149. };
  150. static const char *linsel_text[] = {
  151. "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
  152. };
  153. static const struct soc_enum linsel_enum =
  154. SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_L, 7, 4, linsel_text);
  155. static const struct snd_kcontrol_new linsel_mux =
  156. SOC_DAPM_ENUM("LINSEL", linsel_enum);
  157. static const char *rinsel_text[] = {
  158. "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
  159. };
  160. static const struct soc_enum rinsel_enum =
  161. SOC_ENUM_SINGLE(WM8737_AUDIO_PATH_R, 7, 4, rinsel_text);
  162. static const struct snd_kcontrol_new rinsel_mux =
  163. SOC_DAPM_ENUM("RINSEL", rinsel_enum);
  164. static const char *bypass_text[] = {
  165. "Direct", "Preamp"
  166. };
  167. static const struct soc_enum lbypass_enum =
  168. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 2, 2, bypass_text);
  169. static const struct snd_kcontrol_new lbypass_mux =
  170. SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
  171. static const struct soc_enum rbypass_enum =
  172. SOC_ENUM_SINGLE(WM8737_MIC_PREAMP_CONTROL, 3, 2, bypass_text);
  173. static const struct snd_kcontrol_new rbypass_mux =
  174. SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
  175. static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
  176. SND_SOC_DAPM_INPUT("LINPUT1"),
  177. SND_SOC_DAPM_INPUT("LINPUT2"),
  178. SND_SOC_DAPM_INPUT("LINPUT3"),
  179. SND_SOC_DAPM_INPUT("RINPUT1"),
  180. SND_SOC_DAPM_INPUT("RINPUT2"),
  181. SND_SOC_DAPM_INPUT("RINPUT3"),
  182. SND_SOC_DAPM_INPUT("LACIN"),
  183. SND_SOC_DAPM_INPUT("RACIN"),
  184. SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
  185. SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
  186. SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
  187. SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
  188. SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
  189. SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
  190. SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
  191. SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
  192. SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
  193. };
  194. static const struct snd_soc_dapm_route intercon[] = {
  195. { "LINSEL", "LINPUT1", "LINPUT1" },
  196. { "LINSEL", "LINPUT2", "LINPUT2" },
  197. { "LINSEL", "LINPUT3", "LINPUT3" },
  198. { "LINSEL", "LINPUT1 DC", "LINPUT1" },
  199. { "RINSEL", "RINPUT1", "RINPUT1" },
  200. { "RINSEL", "RINPUT2", "RINPUT2" },
  201. { "RINSEL", "RINPUT3", "RINPUT3" },
  202. { "RINSEL", "RINPUT1 DC", "RINPUT1" },
  203. { "Left Preamp Mux", "Preamp", "LINSEL" },
  204. { "Left Preamp Mux", "Direct", "LACIN" },
  205. { "Right Preamp Mux", "Preamp", "RINSEL" },
  206. { "Right Preamp Mux", "Direct", "RACIN" },
  207. { "PGAL", NULL, "Left Preamp Mux" },
  208. { "PGAR", NULL, "Right Preamp Mux" },
  209. { "ADCL", NULL, "PGAL" },
  210. { "ADCR", NULL, "PGAR" },
  211. { "AIF", NULL, "ADCL" },
  212. { "AIF", NULL, "ADCR" },
  213. };
  214. static int wm8737_add_widgets(struct snd_soc_codec *codec)
  215. {
  216. struct snd_soc_dapm_context *dapm = &codec->dapm;
  217. snd_soc_dapm_new_controls(dapm, wm8737_dapm_widgets,
  218. ARRAY_SIZE(wm8737_dapm_widgets));
  219. snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
  220. return 0;
  221. }
  222. /* codec mclk clock divider coefficients */
  223. static const struct {
  224. u32 mclk;
  225. u32 rate;
  226. u8 usb;
  227. u8 sr;
  228. } coeff_div[] = {
  229. { 12288000, 8000, 0, 0x4 },
  230. { 12288000, 12000, 0, 0x8 },
  231. { 12288000, 16000, 0, 0xa },
  232. { 12288000, 24000, 0, 0x1c },
  233. { 12288000, 32000, 0, 0xc },
  234. { 12288000, 48000, 0, 0 },
  235. { 12288000, 96000, 0, 0xe },
  236. { 11289600, 8000, 0, 0x14 },
  237. { 11289600, 11025, 0, 0x18 },
  238. { 11289600, 22050, 0, 0x1a },
  239. { 11289600, 44100, 0, 0x10 },
  240. { 11289600, 88200, 0, 0x1e },
  241. { 18432000, 8000, 0, 0x5 },
  242. { 18432000, 12000, 0, 0x9 },
  243. { 18432000, 16000, 0, 0xb },
  244. { 18432000, 24000, 0, 0x1b },
  245. { 18432000, 32000, 0, 0xd },
  246. { 18432000, 48000, 0, 0x1 },
  247. { 18432000, 96000, 0, 0x1f },
  248. { 16934400, 8000, 0, 0x15 },
  249. { 16934400, 11025, 0, 0x19 },
  250. { 16934400, 22050, 0, 0x1b },
  251. { 16934400, 44100, 0, 0x11 },
  252. { 16934400, 88200, 0, 0x1f },
  253. { 12000000, 8000, 1, 0x4 },
  254. { 12000000, 11025, 1, 0x19 },
  255. { 12000000, 12000, 1, 0x8 },
  256. { 12000000, 16000, 1, 0xa },
  257. { 12000000, 22050, 1, 0x1b },
  258. { 12000000, 24000, 1, 0x1c },
  259. { 12000000, 32000, 1, 0xc },
  260. { 12000000, 44100, 1, 0x11 },
  261. { 12000000, 48000, 1, 0x0 },
  262. { 12000000, 88200, 1, 0x1f },
  263. { 12000000, 96000, 1, 0xe },
  264. };
  265. static int wm8737_hw_params(struct snd_pcm_substream *substream,
  266. struct snd_pcm_hw_params *params,
  267. struct snd_soc_dai *dai)
  268. {
  269. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  270. struct snd_soc_codec *codec = rtd->codec;
  271. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  272. int i;
  273. u16 clocking = 0;
  274. u16 af = 0;
  275. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  276. if (coeff_div[i].rate != params_rate(params))
  277. continue;
  278. if (coeff_div[i].mclk == wm8737->mclk)
  279. break;
  280. if (coeff_div[i].mclk == wm8737->mclk * 2) {
  281. clocking |= WM8737_CLKDIV2;
  282. break;
  283. }
  284. }
  285. if (i == ARRAY_SIZE(coeff_div)) {
  286. dev_err(codec->dev, "%dHz MCLK can't support %dHz\n",
  287. wm8737->mclk, params_rate(params));
  288. return -EINVAL;
  289. }
  290. clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
  291. switch (params_format(params)) {
  292. case SNDRV_PCM_FORMAT_S16_LE:
  293. break;
  294. case SNDRV_PCM_FORMAT_S20_3LE:
  295. af |= 0x8;
  296. break;
  297. case SNDRV_PCM_FORMAT_S24_LE:
  298. af |= 0x10;
  299. break;
  300. case SNDRV_PCM_FORMAT_S32_LE:
  301. af |= 0x18;
  302. break;
  303. default:
  304. return -EINVAL;
  305. }
  306. snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
  307. snd_soc_update_bits(codec, WM8737_CLOCKING,
  308. WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
  309. clocking);
  310. return 0;
  311. }
  312. static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  313. int clk_id, unsigned int freq, int dir)
  314. {
  315. struct snd_soc_codec *codec = codec_dai->codec;
  316. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  317. int i;
  318. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  319. if (freq == coeff_div[i].mclk ||
  320. freq == coeff_div[i].mclk * 2) {
  321. wm8737->mclk = freq;
  322. return 0;
  323. }
  324. }
  325. dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq);
  326. return -EINVAL;
  327. }
  328. static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
  329. unsigned int fmt)
  330. {
  331. struct snd_soc_codec *codec = codec_dai->codec;
  332. u16 af = 0;
  333. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  334. case SND_SOC_DAIFMT_CBM_CFM:
  335. af |= WM8737_MS;
  336. break;
  337. case SND_SOC_DAIFMT_CBS_CFS:
  338. break;
  339. default:
  340. return -EINVAL;
  341. }
  342. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  343. case SND_SOC_DAIFMT_I2S:
  344. af |= 0x2;
  345. break;
  346. case SND_SOC_DAIFMT_RIGHT_J:
  347. break;
  348. case SND_SOC_DAIFMT_LEFT_J:
  349. af |= 0x1;
  350. break;
  351. case SND_SOC_DAIFMT_DSP_A:
  352. af |= 0x3;
  353. break;
  354. case SND_SOC_DAIFMT_DSP_B:
  355. af |= 0x13;
  356. break;
  357. default:
  358. return -EINVAL;
  359. }
  360. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  361. case SND_SOC_DAIFMT_NB_NF:
  362. break;
  363. case SND_SOC_DAIFMT_NB_IF:
  364. af |= WM8737_LRP;
  365. break;
  366. default:
  367. return -EINVAL;
  368. }
  369. snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT,
  370. WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
  371. return 0;
  372. }
  373. static int wm8737_set_bias_level(struct snd_soc_codec *codec,
  374. enum snd_soc_bias_level level)
  375. {
  376. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  377. int ret;
  378. switch (level) {
  379. case SND_SOC_BIAS_ON:
  380. break;
  381. case SND_SOC_BIAS_PREPARE:
  382. /* VMID at 2*75k */
  383. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  384. WM8737_VMIDSEL_MASK, 0);
  385. break;
  386. case SND_SOC_BIAS_STANDBY:
  387. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  388. ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
  389. wm8737->supplies);
  390. if (ret != 0) {
  391. dev_err(codec->dev,
  392. "Failed to enable supplies: %d\n",
  393. ret);
  394. return ret;
  395. }
  396. snd_soc_cache_sync(codec);
  397. /* Fast VMID ramp at 2*2.5k */
  398. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  399. WM8737_VMIDSEL_MASK,
  400. 2 << WM8737_VMIDSEL_SHIFT);
  401. /* Bring VMID up */
  402. snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
  403. WM8737_VMID_MASK |
  404. WM8737_VREF_MASK,
  405. WM8737_VMID_MASK |
  406. WM8737_VREF_MASK);
  407. msleep(500);
  408. }
  409. /* VMID at 2*300k */
  410. snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
  411. WM8737_VMIDSEL_MASK,
  412. 1 << WM8737_VMIDSEL_SHIFT);
  413. break;
  414. case SND_SOC_BIAS_OFF:
  415. snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
  416. WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
  417. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
  418. wm8737->supplies);
  419. break;
  420. }
  421. codec->dapm.bias_level = level;
  422. return 0;
  423. }
  424. #define WM8737_RATES SNDRV_PCM_RATE_8000_96000
  425. #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  426. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  427. static const struct snd_soc_dai_ops wm8737_dai_ops = {
  428. .hw_params = wm8737_hw_params,
  429. .set_sysclk = wm8737_set_dai_sysclk,
  430. .set_fmt = wm8737_set_dai_fmt,
  431. };
  432. static struct snd_soc_dai_driver wm8737_dai = {
  433. .name = "wm8737",
  434. .capture = {
  435. .stream_name = "Capture",
  436. .channels_min = 2, /* Mono modes not yet supported */
  437. .channels_max = 2,
  438. .rates = WM8737_RATES,
  439. .formats = WM8737_FORMATS,
  440. },
  441. .ops = &wm8737_dai_ops,
  442. };
  443. #ifdef CONFIG_PM
  444. static int wm8737_suspend(struct snd_soc_codec *codec)
  445. {
  446. wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
  447. return 0;
  448. }
  449. static int wm8737_resume(struct snd_soc_codec *codec)
  450. {
  451. wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  452. return 0;
  453. }
  454. #else
  455. #define wm8737_suspend NULL
  456. #define wm8737_resume NULL
  457. #endif
  458. static int wm8737_probe(struct snd_soc_codec *codec)
  459. {
  460. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  461. int ret, i;
  462. ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8737->control_type);
  463. if (ret != 0) {
  464. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  465. return ret;
  466. }
  467. for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
  468. wm8737->supplies[i].supply = wm8737_supply_names[i];
  469. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8737->supplies),
  470. wm8737->supplies);
  471. if (ret != 0) {
  472. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  473. return ret;
  474. }
  475. ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
  476. wm8737->supplies);
  477. if (ret != 0) {
  478. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  479. goto err_get;
  480. }
  481. ret = wm8737_reset(codec);
  482. if (ret < 0) {
  483. dev_err(codec->dev, "Failed to issue reset\n");
  484. goto err_enable;
  485. }
  486. snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
  487. WM8737_LVU);
  488. snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
  489. WM8737_RVU);
  490. wm8737_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  491. /* Bias level configuration will have done an extra enable */
  492. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  493. snd_soc_add_codec_controls(codec, wm8737_snd_controls,
  494. ARRAY_SIZE(wm8737_snd_controls));
  495. wm8737_add_widgets(codec);
  496. return 0;
  497. err_enable:
  498. regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  499. err_get:
  500. regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  501. return ret;
  502. }
  503. static int wm8737_remove(struct snd_soc_codec *codec)
  504. {
  505. struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
  506. wm8737_set_bias_level(codec, SND_SOC_BIAS_OFF);
  507. regulator_bulk_free(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
  508. return 0;
  509. }
  510. static struct snd_soc_codec_driver soc_codec_dev_wm8737 = {
  511. .probe = wm8737_probe,
  512. .remove = wm8737_remove,
  513. .suspend = wm8737_suspend,
  514. .resume = wm8737_resume,
  515. .set_bias_level = wm8737_set_bias_level,
  516. .reg_cache_size = WM8737_REGISTER_COUNT - 1, /* Skip reset */
  517. .reg_word_size = sizeof(u16),
  518. .reg_cache_default = wm8737_reg,
  519. };
  520. static const struct of_device_id wm8737_of_match[] = {
  521. { .compatible = "wlf,wm8737", },
  522. { }
  523. };
  524. MODULE_DEVICE_TABLE(of, wm8737_of_match);
  525. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  526. static __devinit int wm8737_i2c_probe(struct i2c_client *i2c,
  527. const struct i2c_device_id *id)
  528. {
  529. struct wm8737_priv *wm8737;
  530. int ret;
  531. wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL);
  532. if (wm8737 == NULL)
  533. return -ENOMEM;
  534. i2c_set_clientdata(i2c, wm8737);
  535. wm8737->control_type = SND_SOC_I2C;
  536. ret = snd_soc_register_codec(&i2c->dev,
  537. &soc_codec_dev_wm8737, &wm8737_dai, 1);
  538. if (ret < 0)
  539. kfree(wm8737);
  540. return ret;
  541. }
  542. static __devexit int wm8737_i2c_remove(struct i2c_client *client)
  543. {
  544. snd_soc_unregister_codec(&client->dev);
  545. kfree(i2c_get_clientdata(client));
  546. return 0;
  547. }
  548. static const struct i2c_device_id wm8737_i2c_id[] = {
  549. { "wm8737", 0 },
  550. { }
  551. };
  552. MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
  553. static struct i2c_driver wm8737_i2c_driver = {
  554. .driver = {
  555. .name = "wm8737",
  556. .owner = THIS_MODULE,
  557. .of_match_table = wm8737_of_match,
  558. },
  559. .probe = wm8737_i2c_probe,
  560. .remove = __devexit_p(wm8737_i2c_remove),
  561. .id_table = wm8737_i2c_id,
  562. };
  563. #endif
  564. #if defined(CONFIG_SPI_MASTER)
  565. static int __devinit wm8737_spi_probe(struct spi_device *spi)
  566. {
  567. struct wm8737_priv *wm8737;
  568. int ret;
  569. wm8737 = kzalloc(sizeof(struct wm8737_priv), GFP_KERNEL);
  570. if (wm8737 == NULL)
  571. return -ENOMEM;
  572. wm8737->control_type = SND_SOC_SPI;
  573. spi_set_drvdata(spi, wm8737);
  574. ret = snd_soc_register_codec(&spi->dev,
  575. &soc_codec_dev_wm8737, &wm8737_dai, 1);
  576. if (ret < 0)
  577. kfree(wm8737);
  578. return ret;
  579. }
  580. static int __devexit wm8737_spi_remove(struct spi_device *spi)
  581. {
  582. snd_soc_unregister_codec(&spi->dev);
  583. kfree(spi_get_drvdata(spi));
  584. return 0;
  585. }
  586. static struct spi_driver wm8737_spi_driver = {
  587. .driver = {
  588. .name = "wm8737",
  589. .owner = THIS_MODULE,
  590. .of_match_table = wm8737_of_match,
  591. },
  592. .probe = wm8737_spi_probe,
  593. .remove = __devexit_p(wm8737_spi_remove),
  594. };
  595. #endif /* CONFIG_SPI_MASTER */
  596. static int __init wm8737_modinit(void)
  597. {
  598. int ret;
  599. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  600. ret = i2c_add_driver(&wm8737_i2c_driver);
  601. if (ret != 0) {
  602. printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
  603. ret);
  604. }
  605. #endif
  606. #if defined(CONFIG_SPI_MASTER)
  607. ret = spi_register_driver(&wm8737_spi_driver);
  608. if (ret != 0) {
  609. printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
  610. ret);
  611. }
  612. #endif
  613. return 0;
  614. }
  615. module_init(wm8737_modinit);
  616. static void __exit wm8737_exit(void)
  617. {
  618. #if defined(CONFIG_SPI_MASTER)
  619. spi_unregister_driver(&wm8737_spi_driver);
  620. #endif
  621. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  622. i2c_del_driver(&wm8737_i2c_driver);
  623. #endif
  624. }
  625. module_exit(wm8737_exit);
  626. MODULE_DESCRIPTION("ASoC WM8737 driver");
  627. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  628. MODULE_LICENSE("GPL");