wcd9304.c 179 KB

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  1. /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/firmware.h>
  15. #include <linux/slab.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/device.h>
  18. #include <linux/printk.h>
  19. #include <linux/ratelimit.h>
  20. #include <linux/debugfs.h>
  21. #include <linux/mfd/wcd9xxx/core.h>
  22. #include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
  23. #include <linux/mfd/wcd9xxx/wcd9304_registers.h>
  24. #include <linux/mfd/wcd9xxx/pdata.h>
  25. #include <sound/pcm.h>
  26. #include <sound/pcm_params.h>
  27. #include <sound/jack.h>
  28. #include <sound/soc.h>
  29. #include <sound/soc-dapm.h>
  30. #include <sound/tlv.h>
  31. #include <linux/bitops.h>
  32. #include <linux/delay.h>
  33. #include <linux/pm_runtime.h>
  34. #include <linux/kernel.h>
  35. #include <linux/gpio.h>
  36. #include <linux/wait.h>
  37. #include "wcd9304.h"
  38. #define WCD9304_RATES (SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|\
  39. SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_48000)
  40. #define ADC_DMIC_SEL_ADC 0
  41. #define ADC_DMIC_SEL_DMIC 1
  42. #define NUM_AMIC 3
  43. #define NUM_DECIMATORS 4
  44. #define NUM_INTERPOLATORS 3
  45. #define BITS_PER_REG 8
  46. #define SITAR_RX_PORT_START_NUMBER 10
  47. enum {
  48. AIF1_PB = 0,
  49. AIF1_CAP,
  50. NUM_CODEC_DAIS,
  51. };
  52. struct wcd9xxx_ch sitar_rx_chs[SITAR_RX_MAX] = {
  53. WCD9XXX_CH(SITAR_RX_PORT_START_NUMBER, 0),
  54. WCD9XXX_CH(SITAR_RX_PORT_START_NUMBER + 1, 1),
  55. WCD9XXX_CH(SITAR_RX_PORT_START_NUMBER + 2, 2),
  56. WCD9XXX_CH(SITAR_RX_PORT_START_NUMBER + 3, 3),
  57. WCD9XXX_CH(SITAR_RX_PORT_START_NUMBER + 4, 4)
  58. };
  59. struct wcd9xxx_ch sitar_tx_chs[SITAR_TX_MAX] = {
  60. WCD9XXX_CH(0, 0),
  61. WCD9XXX_CH(1, 1),
  62. WCD9XXX_CH(2, 2),
  63. WCD9XXX_CH(3, 3),
  64. WCD9XXX_CH(4, 4),
  65. };
  66. #define SITAR_CFILT_FAST_MODE 0x00
  67. #define SITAR_CFILT_SLOW_MODE 0x40
  68. #define MBHC_FW_READ_ATTEMPTS 15
  69. #define MBHC_FW_READ_TIMEOUT 2000000
  70. #define SLIM_CLOSE_TIMEOUT 1000
  71. #define SITAR_JACK_MASK (SND_JACK_HEADSET | SND_JACK_OC_HPHL | SND_JACK_OC_HPHR)
  72. #define SITAR_I2S_MASTER_MODE_MASK 0x08
  73. #define SITAR_OCP_ATTEMPT 1
  74. #define COMP_DIGITAL_DB_GAIN_APPLY(a, b) \
  75. (((a) <= 0) ? ((a) - b) : (a))
  76. /* The wait time value comes from codec HW specification */
  77. #define COMP_BRINGUP_WAIT_TIME 3000
  78. #define SITAR_MCLK_RATE_12288KHZ 12288000
  79. #define SITAR_MCLK_RATE_9600KHZ 9600000
  80. #define SITAR_FAKE_INS_THRESHOLD_MS 2500
  81. #define SITAR_FAKE_REMOVAL_MIN_PERIOD_MS 50
  82. #define SITAR_MBHC_BUTTON_MIN 0x8000
  83. #define SITAR_GPIO_IRQ_DEBOUNCE_TIME_US 5000
  84. #define SITAR_ACQUIRE_LOCK(x) do { mutex_lock(&x); } while (0)
  85. #define SITAR_RELEASE_LOCK(x) do { mutex_unlock(&x); } while (0)
  86. #define MBHC_NUM_DCE_PLUG_DETECT 3
  87. #define SITAR_MBHC_FAKE_INSERT_LOW 10
  88. #define SITAR_MBHC_FAKE_INSERT_HIGH 80
  89. #define SITAR_MBHC_FAKE_INSERT_VOLT_DELTA_MV 500
  90. #define SITAR_HS_DETECT_PLUG_TIME_MS (5 * 1000)
  91. #define SITAR_HS_DETECT_PLUG_INERVAL_MS 100
  92. #define NUM_ATTEMPTS_TO_REPORT 5
  93. #define SITAR_MBHC_STATUS_REL_DETECTION 0x0C
  94. #define SITAR_MBHC_GPIO_REL_DEBOUNCE_TIME_MS 200
  95. #define CUT_OF_FREQ_MASK 0x30
  96. #define CF_MIN_3DB_4HZ 0x0
  97. #define CF_MIN_3DB_75HZ 0x01
  98. #define CF_MIN_3DB_150HZ 0x02
  99. static const DECLARE_TLV_DB_SCALE(digital_gain, 0, 1, 0);
  100. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  101. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  102. static struct snd_soc_dai_driver sitar_dai[];
  103. static int sitar_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
  104. struct snd_kcontrol *kcontrol, int event);
  105. static int sitar_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
  106. struct snd_kcontrol *kcontrol, int event);
  107. enum sitar_bandgap_type {
  108. SITAR_BANDGAP_OFF = 0,
  109. SITAR_BANDGAP_AUDIO_MODE,
  110. SITAR_BANDGAP_MBHC_MODE,
  111. };
  112. struct mbhc_micbias_regs {
  113. u16 cfilt_val;
  114. u16 cfilt_ctl;
  115. u16 mbhc_reg;
  116. u16 int_rbias;
  117. u16 ctl_reg;
  118. u8 cfilt_sel;
  119. };
  120. /* Codec supports 2 IIR filters */
  121. enum {
  122. IIR1 = 0,
  123. IIR2,
  124. IIR_MAX,
  125. };
  126. /* Codec supports 5 bands */
  127. enum {
  128. BAND1 = 0,
  129. BAND2,
  130. BAND3,
  131. BAND4,
  132. BAND5,
  133. BAND_MAX,
  134. };
  135. enum {
  136. COMPANDER_1 = 0,
  137. COMPANDER_2,
  138. COMPANDER_MAX,
  139. };
  140. enum {
  141. COMPANDER_FS_8KHZ = 0,
  142. COMPANDER_FS_16KHZ,
  143. COMPANDER_FS_32KHZ,
  144. COMPANDER_FS_48KHZ,
  145. COMPANDER_FS_96KHZ,
  146. COMPANDER_FS_192KHZ,
  147. COMPANDER_FS_MAX,
  148. };
  149. /* Flags to track of PA and DAC state.
  150. * PA and DAC should be tracked separately as AUXPGA loopback requires
  151. * only PA to be turned on without DAC being on. */
  152. enum sitar_priv_ack_flags {
  153. SITAR_HPHL_PA_OFF_ACK = 0,
  154. SITAR_HPHR_PA_OFF_ACK,
  155. SITAR_HPHL_DAC_OFF_ACK,
  156. SITAR_HPHR_DAC_OFF_ACK
  157. };
  158. struct comp_sample_dependent_params {
  159. u32 peak_det_timeout;
  160. u32 rms_meter_div_fact;
  161. u32 rms_meter_resamp_fact;
  162. };
  163. struct comp_dgtl_gain_offset {
  164. u8 whole_db_gain;
  165. u8 half_db_gain;
  166. };
  167. static const struct comp_dgtl_gain_offset comp_dgtl_gain[] = {
  168. {0, 0},
  169. {1, 1},
  170. {3, 0},
  171. {4, 1},
  172. {6, 0},
  173. {7, 1},
  174. {9, 0},
  175. {10, 1},
  176. {12, 0},
  177. {13, 1},
  178. {15, 0},
  179. {16, 1},
  180. {18, 0},
  181. };
  182. /* Data used by MBHC */
  183. struct mbhc_internal_cal_data {
  184. u16 dce_z;
  185. u16 dce_mb;
  186. u16 sta_z;
  187. u16 sta_mb;
  188. u32 t_sta_dce;
  189. u32 t_dce;
  190. u32 t_sta;
  191. u32 micb_mv;
  192. u16 v_ins_hu;
  193. u16 v_ins_h;
  194. u16 v_b1_hu;
  195. u16 v_b1_h;
  196. u16 v_b1_huc;
  197. u16 v_brh;
  198. u16 v_brl;
  199. u16 v_no_mic;
  200. u8 npoll;
  201. u8 nbounce_wait;
  202. };
  203. enum sitar_mbhc_plug_type {
  204. PLUG_TYPE_INVALID = -1,
  205. PLUG_TYPE_NONE,
  206. PLUG_TYPE_HEADSET,
  207. PLUG_TYPE_HEADPHONE,
  208. PLUG_TYPE_HIGH_HPH,
  209. };
  210. enum sitar_mbhc_state {
  211. MBHC_STATE_NONE = -1,
  212. MBHC_STATE_POTENTIAL,
  213. MBHC_STATE_POTENTIAL_RECOVERY,
  214. MBHC_STATE_RELEASE,
  215. };
  216. static const u32 vport_check_table[NUM_CODEC_DAIS] = {
  217. 0, /* AIF1_PB */
  218. 0, /* AIF1_CAP */
  219. };
  220. struct hpf_work {
  221. struct sitar_priv *sitar;
  222. u32 decimator;
  223. u8 tx_hpf_cut_of_freq;
  224. struct delayed_work dwork;
  225. };
  226. static struct hpf_work tx_hpf_work[NUM_DECIMATORS];
  227. struct sitar_priv {
  228. struct snd_soc_codec *codec;
  229. u32 mclk_freq;
  230. u32 adc_count;
  231. u32 cfilt1_cnt;
  232. u32 cfilt2_cnt;
  233. u32 cfilt3_cnt;
  234. u32 rx_bias_count;
  235. enum sitar_bandgap_type bandgap_type;
  236. bool mclk_enabled;
  237. bool clock_active;
  238. bool config_mode_active;
  239. bool mbhc_polling_active;
  240. unsigned long mbhc_fake_ins_start;
  241. int buttons_pressed;
  242. enum sitar_micbias_num micbias;
  243. /* void* calibration contains:
  244. * struct sitar_mbhc_general_cfg generic;
  245. * struct sitar_mbhc_plug_detect_cfg plug_det;
  246. * struct sitar_mbhc_plug_type_cfg plug_type;
  247. * struct sitar_mbhc_btn_detect_cfg btn_det;
  248. * struct sitar_mbhc_imped_detect_cfg imped_det;
  249. * Note: various size depends on btn_det->num_btn
  250. */
  251. void *calibration;
  252. struct mbhc_internal_cal_data mbhc_data;
  253. struct wcd9xxx_pdata *pdata;
  254. u32 anc_slot;
  255. bool no_mic_headset_override;
  256. struct mbhc_micbias_regs mbhc_bias_regs;
  257. u8 cfilt_k_value;
  258. bool mbhc_micbias_switched;
  259. /* track PA/DAC state */
  260. unsigned long hph_pa_dac_state;
  261. /*track sitar interface type*/
  262. u8 intf_type;
  263. u32 hph_status; /* track headhpone status */
  264. /* define separate work for left and right headphone OCP to avoid
  265. * additional checking on which OCP event to report so no locking
  266. * to ensure synchronization is required
  267. */
  268. struct work_struct hphlocp_work; /* reporting left hph ocp off */
  269. struct work_struct hphrocp_work; /* reporting right hph ocp off */
  270. u8 hphlocp_cnt; /* headphone left ocp retry */
  271. u8 hphrocp_cnt; /* headphone right ocp retry */
  272. /* Callback function to enable MCLK */
  273. int (*mclk_cb) (struct snd_soc_codec*, int);
  274. /* Work to perform MBHC Firmware Read */
  275. struct delayed_work mbhc_firmware_dwork;
  276. const struct firmware *mbhc_fw;
  277. /* num of slim ports required */
  278. struct wcd9xxx_codec_dai_data dai[NUM_CODEC_DAIS];
  279. /*compander*/
  280. int comp_enabled[COMPANDER_MAX];
  281. u32 comp_fs[COMPANDER_MAX];
  282. u8 comp_gain_offset[NUM_INTERPOLATORS];
  283. /* Currently, only used for mbhc purpose, to protect
  284. * concurrent execution of mbhc threaded irq handlers and
  285. * kill race between DAPM and MBHC.But can serve as a
  286. * general lock to protect codec resource
  287. */
  288. struct mutex codec_resource_lock;
  289. struct sitar_mbhc_config mbhc_cfg;
  290. bool in_gpio_handler;
  291. u8 current_plug;
  292. bool lpi_enabled;
  293. enum sitar_mbhc_state mbhc_state;
  294. struct work_struct hs_correct_plug_work;
  295. bool hs_detect_work_stop;
  296. struct delayed_work mbhc_btn_dwork;
  297. unsigned long mbhc_last_resume; /* in jiffies */
  298. };
  299. #ifdef CONFIG_DEBUG_FS
  300. struct sitar_priv *debug_sitar_priv;
  301. #endif
  302. static const int comp_rx_path[] = {
  303. COMPANDER_2,
  304. COMPANDER_1,
  305. COMPANDER_1,
  306. COMPANDER_MAX,
  307. };
  308. static const struct comp_sample_dependent_params
  309. comp_samp_params[COMPANDER_FS_MAX] = {
  310. {
  311. .peak_det_timeout = 0x6,
  312. .rms_meter_div_fact = 0x9 << 4,
  313. .rms_meter_resamp_fact = 0x06,
  314. },
  315. {
  316. .peak_det_timeout = 0x7,
  317. .rms_meter_div_fact = 0xA << 4,
  318. .rms_meter_resamp_fact = 0x0C,
  319. },
  320. {
  321. .peak_det_timeout = 0x8,
  322. .rms_meter_div_fact = 0xB << 4,
  323. .rms_meter_resamp_fact = 0x30,
  324. },
  325. {
  326. .peak_det_timeout = 0x9,
  327. .rms_meter_div_fact = 0xB << 4,
  328. .rms_meter_resamp_fact = 0x28,
  329. },
  330. {
  331. .peak_det_timeout = 0xA,
  332. .rms_meter_div_fact = 0xC << 4,
  333. .rms_meter_resamp_fact = 0x50,
  334. },
  335. {
  336. .peak_det_timeout = 0xB,
  337. .rms_meter_div_fact = 0xC << 4,
  338. .rms_meter_resamp_fact = 0x50,
  339. },
  340. };
  341. static int sitar_get_anc_slot(struct snd_kcontrol *kcontrol,
  342. struct snd_ctl_elem_value *ucontrol)
  343. {
  344. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  345. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  346. ucontrol->value.integer.value[0] = sitar->anc_slot;
  347. return 0;
  348. }
  349. static int sitar_put_anc_slot(struct snd_kcontrol *kcontrol,
  350. struct snd_ctl_elem_value *ucontrol)
  351. {
  352. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  353. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  354. sitar->anc_slot = ucontrol->value.integer.value[0];
  355. return 0;
  356. }
  357. static int sitar_pa_gain_get(struct snd_kcontrol *kcontrol,
  358. struct snd_ctl_elem_value *ucontrol)
  359. {
  360. u8 ear_pa_gain;
  361. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  362. ear_pa_gain = snd_soc_read(codec, SITAR_A_RX_EAR_GAIN);
  363. ear_pa_gain &= 0xE0;
  364. if (ear_pa_gain == 0x00) {
  365. ucontrol->value.integer.value[0] = 0;
  366. } else if (ear_pa_gain == 0x80) {
  367. ucontrol->value.integer.value[0] = 1;
  368. } else if (ear_pa_gain == 0xA0) {
  369. ucontrol->value.integer.value[0] = 2;
  370. } else if (ear_pa_gain == 0xE0) {
  371. ucontrol->value.integer.value[0] = 3;
  372. } else {
  373. pr_err("%s: ERROR: Unsupported Ear Gain = 0x%x\n",
  374. __func__, ear_pa_gain);
  375. return -EINVAL;
  376. }
  377. pr_debug("%s: ear_pa_gain = 0x%x\n", __func__, ear_pa_gain);
  378. return 0;
  379. }
  380. static int sitar_pa_gain_put(struct snd_kcontrol *kcontrol,
  381. struct snd_ctl_elem_value *ucontrol)
  382. {
  383. u8 ear_pa_gain;
  384. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  385. pr_debug("%s: ucontrol->value.integer.value[0] = %ld\n", __func__,
  386. ucontrol->value.integer.value[0]);
  387. switch (ucontrol->value.integer.value[0]) {
  388. case 0:
  389. ear_pa_gain = 0x00;
  390. break;
  391. case 1:
  392. ear_pa_gain = 0x80;
  393. break;
  394. case 2:
  395. ear_pa_gain = 0xA0;
  396. break;
  397. case 3:
  398. ear_pa_gain = 0xE0;
  399. break;
  400. default:
  401. return -EINVAL;
  402. }
  403. snd_soc_update_bits(codec, SITAR_A_RX_EAR_GAIN, 0xE0, ear_pa_gain);
  404. return 0;
  405. }
  406. static int sitar_get_iir_enable_audio_mixer(
  407. struct snd_kcontrol *kcontrol,
  408. struct snd_ctl_elem_value *ucontrol)
  409. {
  410. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  411. int iir_idx = ((struct soc_multi_mixer_control *)
  412. kcontrol->private_value)->reg;
  413. int band_idx = ((struct soc_multi_mixer_control *)
  414. kcontrol->private_value)->shift;
  415. ucontrol->value.integer.value[0] =
  416. snd_soc_read(codec, (SITAR_A_CDC_IIR1_CTL + 16 * iir_idx)) &
  417. (1 << band_idx);
  418. pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
  419. iir_idx, band_idx,
  420. (uint32_t)ucontrol->value.integer.value[0]);
  421. return 0;
  422. }
  423. static int sitar_put_iir_enable_audio_mixer(
  424. struct snd_kcontrol *kcontrol,
  425. struct snd_ctl_elem_value *ucontrol)
  426. {
  427. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  428. int iir_idx = ((struct soc_multi_mixer_control *)
  429. kcontrol->private_value)->reg;
  430. int band_idx = ((struct soc_multi_mixer_control *)
  431. kcontrol->private_value)->shift;
  432. int value = ucontrol->value.integer.value[0];
  433. /* Mask first 5 bits, 6-8 are reserved */
  434. snd_soc_update_bits(codec, (SITAR_A_CDC_IIR1_CTL + 16 * iir_idx),
  435. (1 << band_idx), (value << band_idx));
  436. pr_debug("%s: IIR #%d band #%d enable %d\n", __func__,
  437. iir_idx, band_idx, value);
  438. return 0;
  439. }
  440. static uint32_t get_iir_band_coeff(struct snd_soc_codec *codec,
  441. int iir_idx, int band_idx,
  442. int coeff_idx)
  443. {
  444. /* Address does not automatically update if reading */
  445. snd_soc_write(codec,
  446. (SITAR_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
  447. (band_idx * BAND_MAX + coeff_idx) & 0x1F);
  448. /* Mask bits top 2 bits since they are reserved */
  449. return ((snd_soc_read(codec,
  450. (SITAR_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx)) << 24) |
  451. (snd_soc_read(codec,
  452. (SITAR_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx)) << 16) |
  453. (snd_soc_read(codec,
  454. (SITAR_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx)) << 8) |
  455. (snd_soc_read(codec,
  456. (SITAR_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx)))) &
  457. 0x3FFFFFFF;
  458. }
  459. static int sitar_get_iir_band_audio_mixer(
  460. struct snd_kcontrol *kcontrol,
  461. struct snd_ctl_elem_value *ucontrol)
  462. {
  463. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  464. int iir_idx = ((struct soc_multi_mixer_control *)
  465. kcontrol->private_value)->reg;
  466. int band_idx = ((struct soc_multi_mixer_control *)
  467. kcontrol->private_value)->shift;
  468. ucontrol->value.integer.value[0] =
  469. get_iir_band_coeff(codec, iir_idx, band_idx, 0);
  470. ucontrol->value.integer.value[1] =
  471. get_iir_band_coeff(codec, iir_idx, band_idx, 1);
  472. ucontrol->value.integer.value[2] =
  473. get_iir_band_coeff(codec, iir_idx, band_idx, 2);
  474. ucontrol->value.integer.value[3] =
  475. get_iir_band_coeff(codec, iir_idx, band_idx, 3);
  476. ucontrol->value.integer.value[4] =
  477. get_iir_band_coeff(codec, iir_idx, band_idx, 4);
  478. pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
  479. "%s: IIR #%d band #%d b1 = 0x%x\n"
  480. "%s: IIR #%d band #%d b2 = 0x%x\n"
  481. "%s: IIR #%d band #%d a1 = 0x%x\n"
  482. "%s: IIR #%d band #%d a2 = 0x%x\n",
  483. __func__, iir_idx, band_idx,
  484. (uint32_t)ucontrol->value.integer.value[0],
  485. __func__, iir_idx, band_idx,
  486. (uint32_t)ucontrol->value.integer.value[1],
  487. __func__, iir_idx, band_idx,
  488. (uint32_t)ucontrol->value.integer.value[2],
  489. __func__, iir_idx, band_idx,
  490. (uint32_t)ucontrol->value.integer.value[3],
  491. __func__, iir_idx, band_idx,
  492. (uint32_t)ucontrol->value.integer.value[4]);
  493. return 0;
  494. }
  495. static void set_iir_band_coeff(struct snd_soc_codec *codec,
  496. int iir_idx, int band_idx,
  497. int coeff_idx, uint32_t value)
  498. {
  499. /* Mask top 3 bits, 6-8 are reserved */
  500. /* Update address manually each time */
  501. snd_soc_write(codec,
  502. (SITAR_A_CDC_IIR1_COEF_B1_CTL + 16 * iir_idx),
  503. (band_idx * BAND_MAX + coeff_idx) & 0x1F);
  504. /* Mask top 2 bits, 7-8 are reserved */
  505. snd_soc_write(codec,
  506. (SITAR_A_CDC_IIR1_COEF_B2_CTL + 16 * iir_idx),
  507. (value >> 24) & 0x3F);
  508. /* Isolate 8bits at a time */
  509. snd_soc_write(codec,
  510. (SITAR_A_CDC_IIR1_COEF_B3_CTL + 16 * iir_idx),
  511. (value >> 16) & 0xFF);
  512. snd_soc_write(codec,
  513. (SITAR_A_CDC_IIR1_COEF_B4_CTL + 16 * iir_idx),
  514. (value >> 8) & 0xFF);
  515. snd_soc_write(codec,
  516. (SITAR_A_CDC_IIR1_COEF_B5_CTL + 16 * iir_idx),
  517. value & 0xFF);
  518. }
  519. static int sitar_put_iir_band_audio_mixer(
  520. struct snd_kcontrol *kcontrol,
  521. struct snd_ctl_elem_value *ucontrol)
  522. {
  523. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  524. int iir_idx = ((struct soc_multi_mixer_control *)
  525. kcontrol->private_value)->reg;
  526. int band_idx = ((struct soc_multi_mixer_control *)
  527. kcontrol->private_value)->shift;
  528. set_iir_band_coeff(codec, iir_idx, band_idx, 0,
  529. ucontrol->value.integer.value[0]);
  530. set_iir_band_coeff(codec, iir_idx, band_idx, 1,
  531. ucontrol->value.integer.value[1]);
  532. set_iir_band_coeff(codec, iir_idx, band_idx, 2,
  533. ucontrol->value.integer.value[2]);
  534. set_iir_band_coeff(codec, iir_idx, band_idx, 3,
  535. ucontrol->value.integer.value[3]);
  536. set_iir_band_coeff(codec, iir_idx, band_idx, 4,
  537. ucontrol->value.integer.value[4]);
  538. pr_debug("%s: IIR #%d band #%d b0 = 0x%x\n"
  539. "%s: IIR #%d band #%d b1 = 0x%x\n"
  540. "%s: IIR #%d band #%d b2 = 0x%x\n"
  541. "%s: IIR #%d band #%d a1 = 0x%x\n"
  542. "%s: IIR #%d band #%d a2 = 0x%x\n",
  543. __func__, iir_idx, band_idx,
  544. get_iir_band_coeff(codec, iir_idx, band_idx, 0),
  545. __func__, iir_idx, band_idx,
  546. get_iir_band_coeff(codec, iir_idx, band_idx, 1),
  547. __func__, iir_idx, band_idx,
  548. get_iir_band_coeff(codec, iir_idx, band_idx, 2),
  549. __func__, iir_idx, band_idx,
  550. get_iir_band_coeff(codec, iir_idx, band_idx, 3),
  551. __func__, iir_idx, band_idx,
  552. get_iir_band_coeff(codec, iir_idx, band_idx, 4));
  553. return 0;
  554. }
  555. static int sitar_compander_gain_offset(
  556. struct snd_soc_codec *codec, u32 enable,
  557. unsigned int pa_reg, unsigned int vol_reg,
  558. int mask, int event,
  559. struct comp_dgtl_gain_offset *gain_offset,
  560. int index)
  561. {
  562. unsigned int pa_gain = snd_soc_read(codec, pa_reg);
  563. unsigned int digital_vol = snd_soc_read(codec, vol_reg);
  564. int pa_mode = pa_gain & mask;
  565. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  566. pr_debug("%s: pa_gain(0x%x=0x%x)digital_vol(0x%x=0x%x)event(0x%x) index(%d)\n",
  567. __func__, pa_reg, pa_gain, vol_reg, digital_vol, event, index);
  568. if (((pa_gain & 0xF) + 1) > ARRAY_SIZE(comp_dgtl_gain) ||
  569. (index >= ARRAY_SIZE(sitar->comp_gain_offset))) {
  570. pr_err("%s: Out of array boundary\n", __func__);
  571. return -EINVAL;
  572. }
  573. if (SND_SOC_DAPM_EVENT_ON(event) && (enable != 0)) {
  574. gain_offset->whole_db_gain = COMP_DIGITAL_DB_GAIN_APPLY(
  575. (digital_vol - comp_dgtl_gain[pa_gain & 0xF].whole_db_gain),
  576. comp_dgtl_gain[pa_gain & 0xF].half_db_gain);
  577. pr_debug("%s: listed whole_db_gain:0x%x, adjusted whole_db_gain:0x%x\n",
  578. __func__, comp_dgtl_gain[pa_gain & 0xF].whole_db_gain,
  579. gain_offset->whole_db_gain);
  580. gain_offset->half_db_gain =
  581. comp_dgtl_gain[pa_gain & 0xF].half_db_gain;
  582. sitar->comp_gain_offset[index] = digital_vol -
  583. gain_offset->whole_db_gain ;
  584. }
  585. if (SND_SOC_DAPM_EVENT_OFF(event) && (pa_mode == 0)) {
  586. gain_offset->whole_db_gain = digital_vol +
  587. sitar->comp_gain_offset[index];
  588. pr_debug("%s: listed whole_db_gain:0x%x, adjusted whole_db_gain:0x%x\n",
  589. __func__, comp_dgtl_gain[pa_gain & 0xF].whole_db_gain,
  590. gain_offset->whole_db_gain);
  591. gain_offset->half_db_gain = 0;
  592. }
  593. pr_debug("%s: half_db_gain(%d)whole_db_gain(0x%x)comp_gain_offset[%d](%d)\n",
  594. __func__, gain_offset->half_db_gain,
  595. gain_offset->whole_db_gain, index,
  596. sitar->comp_gain_offset[index]);
  597. return 0;
  598. }
  599. static int sitar_config_gain_compander(
  600. struct snd_soc_codec *codec,
  601. u32 compander, u32 enable, int event)
  602. {
  603. int value = 0;
  604. int mask = 1 << 4;
  605. struct comp_dgtl_gain_offset gain_offset = {0, 0};
  606. if (compander >= COMPANDER_MAX) {
  607. pr_err("%s: Error, invalid compander channel\n", __func__);
  608. return -EINVAL;
  609. }
  610. if ((enable == 0) || SND_SOC_DAPM_EVENT_OFF(event))
  611. value = 1 << 4;
  612. if (compander == COMPANDER_1) {
  613. sitar_compander_gain_offset(codec, enable,
  614. SITAR_A_RX_HPH_L_GAIN,
  615. SITAR_A_CDC_RX2_VOL_CTL_B2_CTL,
  616. mask, event, &gain_offset, 1);
  617. snd_soc_update_bits(codec, SITAR_A_RX_HPH_L_GAIN, mask, value);
  618. snd_soc_update_bits(codec, SITAR_A_CDC_RX2_VOL_CTL_B2_CTL,
  619. 0xFF, gain_offset.whole_db_gain);
  620. snd_soc_update_bits(codec, SITAR_A_CDC_RX2_B6_CTL,
  621. 0x02, gain_offset.half_db_gain);
  622. sitar_compander_gain_offset(codec, enable,
  623. SITAR_A_RX_HPH_R_GAIN,
  624. SITAR_A_CDC_RX3_VOL_CTL_B2_CTL,
  625. mask, event, &gain_offset, 2);
  626. snd_soc_update_bits(codec, SITAR_A_RX_HPH_R_GAIN, mask, value);
  627. snd_soc_update_bits(codec, SITAR_A_CDC_RX3_VOL_CTL_B2_CTL,
  628. 0xFF, gain_offset.whole_db_gain);
  629. snd_soc_update_bits(codec, SITAR_A_CDC_RX3_B6_CTL,
  630. 0x02, gain_offset.half_db_gain);
  631. } else if (compander == COMPANDER_2) {
  632. sitar_compander_gain_offset(codec, enable,
  633. SITAR_A_RX_LINE_1_GAIN,
  634. SITAR_A_CDC_RX1_VOL_CTL_B2_CTL,
  635. mask, event, &gain_offset, 0);
  636. snd_soc_update_bits(codec, SITAR_A_RX_LINE_1_GAIN, mask, value);
  637. snd_soc_update_bits(codec, SITAR_A_RX_LINE_2_GAIN, mask, value);
  638. snd_soc_update_bits(codec, SITAR_A_CDC_RX1_VOL_CTL_B2_CTL,
  639. 0xFF, gain_offset.whole_db_gain);
  640. snd_soc_update_bits(codec, SITAR_A_CDC_RX1_B6_CTL,
  641. 0x02, gain_offset.half_db_gain);
  642. }
  643. return 0;
  644. }
  645. static int sitar_get_compander(struct snd_kcontrol *kcontrol,
  646. struct snd_ctl_elem_value *ucontrol)
  647. {
  648. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  649. int comp = ((struct soc_multi_mixer_control *)
  650. kcontrol->private_value)->shift;
  651. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  652. ucontrol->value.integer.value[0] = sitar->comp_enabled[comp];
  653. return 0;
  654. }
  655. static int sitar_set_compander(struct snd_kcontrol *kcontrol,
  656. struct snd_ctl_elem_value *ucontrol)
  657. {
  658. struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
  659. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  660. int comp = ((struct soc_multi_mixer_control *)
  661. kcontrol->private_value)->shift;
  662. int value = ucontrol->value.integer.value[0];
  663. pr_debug("%s: compander #%d enable %d\n",
  664. __func__, comp + 1, value);
  665. if (value == sitar->comp_enabled[comp]) {
  666. pr_debug("%s: compander #%d enable %d no change\n",
  667. __func__, comp + 1, value);
  668. return 0;
  669. }
  670. sitar->comp_enabled[comp] = value;
  671. return 0;
  672. }
  673. static int sitar_config_compander(struct snd_soc_dapm_widget *w,
  674. struct snd_kcontrol *kcontrol,
  675. int event)
  676. {
  677. struct snd_soc_codec *codec = w->codec;
  678. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  679. u32 rate = sitar->comp_fs[w->shift];
  680. u32 value;
  681. pr_debug("%s: compander #%d enable %d event %d widget name %s\n",
  682. __func__, w->shift + 1,
  683. sitar->comp_enabled[w->shift], event , w->name);
  684. if (sitar->comp_enabled[w->shift] == 0)
  685. goto rtn;
  686. switch (event) {
  687. case SND_SOC_DAPM_PRE_PMU:
  688. /* Update compander sample rate */
  689. snd_soc_update_bits(codec, SITAR_A_CDC_COMP1_FS_CFG +
  690. w->shift * 8, 0x07, rate);
  691. /* Enable compander clock */
  692. snd_soc_update_bits(codec,
  693. SITAR_A_CDC_CLK_RX_B2_CTL,
  694. 1 << w->shift,
  695. 1 << w->shift);
  696. /* Toggle compander reset bits */
  697. snd_soc_update_bits(codec,
  698. SITAR_A_CDC_CLK_OTHR_RESET_CTL,
  699. 1 << w->shift,
  700. 1 << w->shift);
  701. snd_soc_update_bits(codec,
  702. SITAR_A_CDC_CLK_OTHR_RESET_CTL,
  703. 1 << w->shift, 0);
  704. sitar_config_gain_compander(codec, w->shift, 1, event);
  705. /* Compander enable -> 0x370/0x378 */
  706. snd_soc_update_bits(codec, SITAR_A_CDC_COMP1_B1_CTL +
  707. w->shift * 8, 0x03, 0x03);
  708. /* Update the RMS meter resampling */
  709. snd_soc_update_bits(codec,
  710. SITAR_A_CDC_COMP1_B3_CTL +
  711. w->shift * 8, 0xFF, 0x01);
  712. snd_soc_update_bits(codec,
  713. SITAR_A_CDC_COMP1_B2_CTL +
  714. w->shift * 8, 0xF0, 0x50);
  715. usleep_range(COMP_BRINGUP_WAIT_TIME, COMP_BRINGUP_WAIT_TIME);
  716. break;
  717. case SND_SOC_DAPM_POST_PMU:
  718. snd_soc_update_bits(codec,
  719. SITAR_A_CDC_CLSG_CTL,
  720. 0x11, 0x00);
  721. if (w->shift == COMPANDER_1)
  722. value = 0x22;
  723. else
  724. value = 0x11;
  725. snd_soc_write(codec,
  726. SITAR_A_CDC_CONN_CLSG_CTL, value);
  727. snd_soc_update_bits(codec, SITAR_A_CDC_COMP1_B2_CTL +
  728. w->shift * 8, 0x0F,
  729. comp_samp_params[rate].peak_det_timeout);
  730. snd_soc_update_bits(codec, SITAR_A_CDC_COMP1_B2_CTL +
  731. w->shift * 8, 0xF0,
  732. comp_samp_params[rate].rms_meter_div_fact);
  733. snd_soc_update_bits(codec, SITAR_A_CDC_COMP1_B3_CTL +
  734. w->shift * 8, 0xFF,
  735. comp_samp_params[rate].rms_meter_resamp_fact);
  736. break;
  737. case SND_SOC_DAPM_POST_PMD:
  738. snd_soc_update_bits(codec, SITAR_A_CDC_COMP1_B1_CTL +
  739. w->shift * 8, 0x03, 0x00);
  740. /* Toggle compander reset bits */
  741. snd_soc_update_bits(codec,
  742. SITAR_A_CDC_CLK_OTHR_RESET_CTL,
  743. 1 << w->shift,
  744. 1 << w->shift);
  745. snd_soc_update_bits(codec,
  746. SITAR_A_CDC_CLK_OTHR_RESET_CTL,
  747. 1 << w->shift, 0);
  748. /* Disable compander clock */
  749. snd_soc_update_bits(codec,
  750. SITAR_A_CDC_CLK_RX_B2_CTL,
  751. 1 << w->shift,
  752. 0);
  753. /* Restore the gain */
  754. sitar_config_gain_compander(codec, w->shift,
  755. sitar->comp_enabled[w->shift],
  756. event);
  757. snd_soc_update_bits(codec,
  758. SITAR_A_CDC_CLSG_CTL,
  759. 0x11, 0x11);
  760. snd_soc_write(codec,
  761. SITAR_A_CDC_CONN_CLSG_CTL, 0x14);
  762. break;
  763. }
  764. rtn:
  765. return 0;
  766. }
  767. static int sitar_codec_dem_input_selection(struct snd_soc_dapm_widget *w,
  768. struct snd_kcontrol *kcontrol,
  769. int event)
  770. {
  771. struct snd_soc_codec *codec = w->codec;
  772. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  773. pr_debug("%s: compander#1->enable(%d) compander#2->enable(%d) reg(0x%x = 0x%x) event(%d)\n",
  774. __func__, sitar->comp_enabled[COMPANDER_1],
  775. sitar->comp_enabled[COMPANDER_2],
  776. SITAR_A_CDC_RX1_B6_CTL + w->shift * 8,
  777. snd_soc_read(codec, SITAR_A_CDC_RX1_B6_CTL + w->shift * 8),
  778. event);
  779. switch (event) {
  780. case SND_SOC_DAPM_POST_PMU:
  781. if (sitar->comp_enabled[COMPANDER_1] ||
  782. sitar->comp_enabled[COMPANDER_2])
  783. snd_soc_update_bits(codec,
  784. SITAR_A_CDC_RX1_B6_CTL +
  785. w->shift * 8,
  786. 1 << 5, 0);
  787. else
  788. snd_soc_update_bits(codec,
  789. SITAR_A_CDC_RX1_B6_CTL +
  790. w->shift * 8,
  791. 1 << 5, 0x20);
  792. break;
  793. case SND_SOC_DAPM_POST_PMD:
  794. snd_soc_update_bits(codec,
  795. SITAR_A_CDC_RX1_B6_CTL + w->shift * 8,
  796. 1 << 5, 0);
  797. break;
  798. }
  799. return 0;
  800. }
  801. static const char * const sitar_ear_pa_gain_text[] = {"POS_6_DB",
  802. "POS_2_DB", "NEG_2P5_DB", "NEG_12_DB"};
  803. static const struct soc_enum sitar_ear_pa_gain_enum[] = {
  804. SOC_ENUM_SINGLE_EXT(4, sitar_ear_pa_gain_text),
  805. };
  806. /*cut of frequency for high pass filter*/
  807. static const char *cf_text[] = {
  808. "MIN_3DB_4Hz", "MIN_3DB_75Hz", "MIN_3DB_150Hz"
  809. };
  810. static const struct soc_enum cf_dec1_enum =
  811. SOC_ENUM_SINGLE(SITAR_A_CDC_TX1_MUX_CTL, 4, 3, cf_text);
  812. static const struct soc_enum cf_rxmix1_enum =
  813. SOC_ENUM_SINGLE(SITAR_A_CDC_RX1_B4_CTL, 1, 3, cf_text);
  814. static const struct snd_kcontrol_new sitar_snd_controls[] = {
  815. SOC_ENUM_EXT("EAR PA Gain", sitar_ear_pa_gain_enum[0],
  816. sitar_pa_gain_get, sitar_pa_gain_put),
  817. SOC_SINGLE_TLV("LINEOUT1 Volume", SITAR_A_RX_LINE_1_GAIN, 0, 12, 1,
  818. line_gain),
  819. SOC_SINGLE_TLV("LINEOUT2 Volume", SITAR_A_RX_LINE_2_GAIN, 0, 12, 1,
  820. line_gain),
  821. SOC_SINGLE_TLV("HPHL Volume", SITAR_A_RX_HPH_L_GAIN, 0, 12, 1,
  822. line_gain),
  823. SOC_SINGLE_TLV("HPHR Volume", SITAR_A_RX_HPH_R_GAIN, 0, 12, 1,
  824. line_gain),
  825. SOC_SINGLE_S8_TLV("RX1 Digital Volume", SITAR_A_CDC_RX1_VOL_CTL_B2_CTL,
  826. -84, 40, digital_gain),
  827. SOC_SINGLE_S8_TLV("RX2 Digital Volume", SITAR_A_CDC_RX2_VOL_CTL_B2_CTL,
  828. -84, 40, digital_gain),
  829. SOC_SINGLE_S8_TLV("RX3 Digital Volume", SITAR_A_CDC_RX3_VOL_CTL_B2_CTL,
  830. -84, 40, digital_gain),
  831. SOC_SINGLE_S8_TLV("DEC1 Volume", SITAR_A_CDC_TX1_VOL_CTL_GAIN, -84, 40,
  832. digital_gain),
  833. SOC_SINGLE_S8_TLV("DEC2 Volume", SITAR_A_CDC_TX2_VOL_CTL_GAIN, -84, 40,
  834. digital_gain),
  835. SOC_SINGLE_S8_TLV("DEC3 Volume", SITAR_A_CDC_TX3_VOL_CTL_GAIN, -84, 40,
  836. digital_gain),
  837. SOC_SINGLE_S8_TLV("DEC4 Volume", SITAR_A_CDC_TX4_VOL_CTL_GAIN, -84, 40,
  838. digital_gain),
  839. SOC_SINGLE_S8_TLV("IIR1 INP1 Volume", SITAR_A_CDC_IIR1_GAIN_B1_CTL, -84,
  840. 40, digital_gain),
  841. SOC_SINGLE_S8_TLV("IIR1 INP2 Volume", SITAR_A_CDC_IIR1_GAIN_B2_CTL, -84,
  842. 40, digital_gain),
  843. SOC_SINGLE_S8_TLV("IIR1 INP3 Volume", SITAR_A_CDC_IIR1_GAIN_B3_CTL, -84,
  844. 40, digital_gain),
  845. SOC_SINGLE_S8_TLV("IIR1 INP4 Volume", SITAR_A_CDC_IIR1_GAIN_B4_CTL, -84,
  846. 40, digital_gain),
  847. SOC_SINGLE_TLV("ADC1 Volume", SITAR_A_TX_1_2_EN, 5, 3, 0, analog_gain),
  848. SOC_SINGLE_TLV("ADC2 Volume", SITAR_A_TX_1_2_EN, 1, 3, 0, analog_gain),
  849. SOC_SINGLE_TLV("ADC3 Volume", SITAR_A_TX_3_EN, 5, 3, 0, analog_gain),
  850. SOC_SINGLE_EXT("ANC Slot", SND_SOC_NOPM, 0, 0, 100, sitar_get_anc_slot,
  851. sitar_put_anc_slot),
  852. SOC_ENUM("TX1 HPF cut off", cf_dec1_enum),
  853. SOC_SINGLE("TX1 HPF Switch", SITAR_A_CDC_TX1_MUX_CTL, 3, 1, 0),
  854. SOC_SINGLE("RX1 HPF Switch", SITAR_A_CDC_RX1_B5_CTL, 2, 1, 0),
  855. SOC_ENUM("RX1 HPF cut off", cf_rxmix1_enum),
  856. SOC_SINGLE_EXT("IIR1 Enable Band1", IIR1, BAND1, 1, 0,
  857. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  858. SOC_SINGLE_EXT("IIR1 Enable Band2", IIR1, BAND2, 1, 0,
  859. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  860. SOC_SINGLE_EXT("IIR1 Enable Band3", IIR1, BAND3, 1, 0,
  861. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  862. SOC_SINGLE_EXT("IIR1 Enable Band4", IIR1, BAND4, 1, 0,
  863. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  864. SOC_SINGLE_EXT("IIR1 Enable Band5", IIR1, BAND5, 1, 0,
  865. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  866. SOC_SINGLE_EXT("IIR2 Enable Band1", IIR2, BAND1, 1, 0,
  867. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  868. SOC_SINGLE_EXT("IIR2 Enable Band2", IIR2, BAND2, 1, 0,
  869. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  870. SOC_SINGLE_EXT("IIR2 Enable Band3", IIR2, BAND3, 1, 0,
  871. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  872. SOC_SINGLE_EXT("IIR2 Enable Band4", IIR2, BAND4, 1, 0,
  873. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  874. SOC_SINGLE_EXT("IIR2 Enable Band5", IIR2, BAND5, 1, 0,
  875. sitar_get_iir_enable_audio_mixer, sitar_put_iir_enable_audio_mixer),
  876. SOC_SINGLE_MULTI_EXT("IIR1 Band1", IIR1, BAND1, 255, 0, 5,
  877. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  878. SOC_SINGLE_MULTI_EXT("IIR1 Band2", IIR1, BAND2, 255, 0, 5,
  879. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  880. SOC_SINGLE_MULTI_EXT("IIR1 Band3", IIR1, BAND3, 255, 0, 5,
  881. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  882. SOC_SINGLE_MULTI_EXT("IIR1 Band4", IIR1, BAND4, 255, 0, 5,
  883. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  884. SOC_SINGLE_MULTI_EXT("IIR1 Band5", IIR1, BAND5, 255, 0, 5,
  885. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  886. SOC_SINGLE_MULTI_EXT("IIR2 Band1", IIR2, BAND1, 255, 0, 5,
  887. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  888. SOC_SINGLE_MULTI_EXT("IIR2 Band2", IIR2, BAND2, 255, 0, 5,
  889. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  890. SOC_SINGLE_MULTI_EXT("IIR2 Band3", IIR2, BAND3, 255, 0, 5,
  891. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  892. SOC_SINGLE_MULTI_EXT("IIR2 Band4", IIR2, BAND4, 255, 0, 5,
  893. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  894. SOC_SINGLE_MULTI_EXT("IIR2 Band5", IIR2, BAND5, 255, 0, 5,
  895. sitar_get_iir_band_audio_mixer, sitar_put_iir_band_audio_mixer),
  896. SOC_SINGLE_EXT("COMP1 Switch", SND_SOC_NOPM, COMPANDER_1, 1, 0,
  897. sitar_get_compander, sitar_set_compander),
  898. SOC_SINGLE_EXT("COMP2 Switch", SND_SOC_NOPM, COMPANDER_2, 1, 0,
  899. sitar_get_compander, sitar_set_compander),
  900. };
  901. static const char *rx_mix1_text[] = {
  902. "ZERO", "SRC1", "SRC2", "IIR1", "IIR2", "RX1", "RX2", "RX3", "RX4",
  903. "RX5"
  904. };
  905. static const char *rx_dac1_text[] = {
  906. "ZERO", "RX1", "RX2"
  907. };
  908. static const char *rx_dac2_text[] = {
  909. "ZERO", "RX1",
  910. };
  911. static const char *rx_dac3_text[] = {
  912. "ZERO", "RX1", "INV_RX1", "RX2"
  913. };
  914. static const char *rx_dac4_text[] = {
  915. "ZERO", "ON"
  916. };
  917. static const char *sb_tx1_mux_text[] = {
  918. "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
  919. "DEC1"
  920. };
  921. static const char *sb_tx2_mux_text[] = {
  922. "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
  923. "DEC2"
  924. };
  925. static const char *sb_tx3_mux_text[] = {
  926. "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
  927. "DEC3"
  928. };
  929. static const char *sb_tx4_mux_text[] = {
  930. "ZERO", "RMIX1", "RMIX2", "RMIX3", "RMIX4", "RMIX5", "RMIX6", "RMIX7",
  931. "DEC4"
  932. };
  933. static const char *sb_tx5_mux_text[] = {
  934. "ZERO", "RMIX1", "RMIX2", "RMIX3", "DEC1", "DEC2", "DEC3", "DEC4"
  935. };
  936. static const char *dec1_mux_text[] = {
  937. "ZERO", "DMIC1", "ADC1", "ADC2", "ADC3", "MBADC", "DMIC4", "ANC1_FB",
  938. };
  939. static const char *dec2_mux_text[] = {
  940. "ZERO", "DMIC2", "ADC1", "ADC2", "ADC3", "MBADC", "DMIC3", "ANC2_FB",
  941. };
  942. static const char *dec3_mux_text[] = {
  943. "ZERO", "DMIC3", "ADC1", "ADC2", "ADC3", "MBADC", "DMIC2", "DMIC4"
  944. };
  945. static const char *dec4_mux_text[] = {
  946. "ZERO", "DMIC4", "ADC1", "ADC2", "ADC3", "DMIC3", "DMIC2", "DMIC1"
  947. };
  948. static const char const *anc_mux_text[] = {
  949. "ZERO", "ADC1", "ADC2", "ADC3", "RSVD1", "RSVD2", "RSVD3",
  950. "MBADC", "RSVD4", "DMIC1", "DMIC2", "DMIC3", "DMIC4"
  951. };
  952. static const char const *anc1_fb_mux_text[] = {
  953. "ZERO", "EAR_HPH_L", "EAR_LINE_1",
  954. };
  955. static const char const *iir_inp1_text[] = {
  956. "ZERO", "DEC1", "DEC2", "DEC3", "DEC4", "ZERO", "ZERO", "ZERO",
  957. "ZERO", "ZERO", "ZERO", "RX1", "RX2", "RX3", "RX4", "RX5",
  958. };
  959. static const struct soc_enum rx_mix1_inp1_chain_enum =
  960. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX1_B1_CTL, 0, 10, rx_mix1_text);
  961. static const struct soc_enum rx_mix1_inp2_chain_enum =
  962. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX1_B1_CTL, 4, 10, rx_mix1_text);
  963. static const struct soc_enum rx2_mix1_inp1_chain_enum =
  964. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX2_B1_CTL, 0, 10, rx_mix1_text);
  965. static const struct soc_enum rx2_mix1_inp2_chain_enum =
  966. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX2_B1_CTL, 4, 10, rx_mix1_text);
  967. static const struct soc_enum rx3_mix1_inp1_chain_enum =
  968. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX3_B1_CTL, 0, 10, rx_mix1_text);
  969. static const struct soc_enum rx3_mix1_inp2_chain_enum =
  970. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_RX3_B1_CTL, 4, 10, rx_mix1_text);
  971. static const struct soc_enum rx_dac1_enum =
  972. SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 6, 3, rx_dac1_text);
  973. static const struct soc_enum rx_dac2_enum =
  974. SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 4, 2, rx_dac2_text);
  975. static const struct soc_enum rx_dac3_enum =
  976. SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 2, 4, rx_dac3_text);
  977. static const struct soc_enum rx_dac4_enum =
  978. SOC_ENUM_SINGLE(SITAR_A_CDC_TOP_RDAC_DOUT_CTL, 0, 2, rx_dac4_text);
  979. static const struct soc_enum sb_tx5_mux_enum =
  980. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B5_CTL, 0, 9, sb_tx5_mux_text);
  981. static const struct soc_enum sb_tx4_mux_enum =
  982. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B4_CTL, 0, 9, sb_tx4_mux_text);
  983. static const struct soc_enum sb_tx3_mux_enum =
  984. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B3_CTL, 0, 9, sb_tx3_mux_text);
  985. static const struct soc_enum sb_tx2_mux_enum =
  986. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B2_CTL, 0, 9, sb_tx2_mux_text);
  987. static const struct soc_enum sb_tx1_mux_enum =
  988. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_SB_B1_CTL, 0, 9, sb_tx1_mux_text);
  989. static const struct soc_enum dec1_mux_enum =
  990. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B1_CTL, 0, 8, dec1_mux_text);
  991. static const struct soc_enum dec2_mux_enum =
  992. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B1_CTL, 3, 8, dec2_mux_text);
  993. static const struct soc_enum dec3_mux_enum =
  994. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B2_CTL, 0, 8, dec3_mux_text);
  995. static const struct soc_enum dec4_mux_enum =
  996. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_TX_B2_CTL, 3, 8, dec4_mux_text);
  997. static const struct soc_enum anc1_mux_enum =
  998. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_ANC_B1_CTL, 0, 13, anc_mux_text);
  999. static const struct soc_enum anc2_mux_enum =
  1000. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_ANC_B1_CTL, 4, 13, anc_mux_text);
  1001. static const struct soc_enum anc1_fb_mux_enum =
  1002. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_ANC_B2_CTL, 0, 3, anc1_fb_mux_text);
  1003. static const struct soc_enum iir1_inp1_mux_enum =
  1004. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_EQ1_B1_CTL, 0, 16, iir_inp1_text);
  1005. static const struct soc_enum iir2_inp1_mux_enum =
  1006. SOC_ENUM_SINGLE(SITAR_A_CDC_CONN_EQ2_B1_CTL, 0, 16, iir_inp1_text);
  1007. static const struct snd_kcontrol_new rx_mix1_inp1_mux =
  1008. SOC_DAPM_ENUM("RX1 MIX1 INP1 Mux", rx_mix1_inp1_chain_enum);
  1009. static const struct snd_kcontrol_new rx_mix1_inp2_mux =
  1010. SOC_DAPM_ENUM("RX1 MIX1 INP2 Mux", rx_mix1_inp2_chain_enum);
  1011. static const struct snd_kcontrol_new rx2_mix1_inp1_mux =
  1012. SOC_DAPM_ENUM("RX2 MIX1 INP1 Mux", rx2_mix1_inp1_chain_enum);
  1013. static const struct snd_kcontrol_new rx2_mix1_inp2_mux =
  1014. SOC_DAPM_ENUM("RX2 MIX1 INP2 Mux", rx2_mix1_inp2_chain_enum);
  1015. static const struct snd_kcontrol_new rx3_mix1_inp1_mux =
  1016. SOC_DAPM_ENUM("RX3 MIX1 INP1 Mux", rx3_mix1_inp1_chain_enum);
  1017. static const struct snd_kcontrol_new rx3_mix1_inp2_mux =
  1018. SOC_DAPM_ENUM("RX3 MIX1 INP2 Mux", rx3_mix1_inp2_chain_enum);
  1019. static const struct snd_kcontrol_new rx_dac1_mux =
  1020. SOC_DAPM_ENUM("RX DAC1 Mux", rx_dac1_enum);
  1021. static const struct snd_kcontrol_new rx_dac2_mux =
  1022. SOC_DAPM_ENUM("RX DAC2 Mux", rx_dac2_enum);
  1023. static const struct snd_kcontrol_new rx_dac3_mux =
  1024. SOC_DAPM_ENUM("RX DAC3 Mux", rx_dac3_enum);
  1025. static const struct snd_kcontrol_new rx_dac4_mux =
  1026. SOC_DAPM_ENUM("RX DAC4 Mux", rx_dac4_enum);
  1027. static const struct snd_kcontrol_new sb_tx5_mux =
  1028. SOC_DAPM_ENUM("SLIM TX5 MUX Mux", sb_tx5_mux_enum);
  1029. static const struct snd_kcontrol_new sb_tx4_mux =
  1030. SOC_DAPM_ENUM("SLIM TX4 MUX Mux", sb_tx4_mux_enum);
  1031. static const struct snd_kcontrol_new sb_tx3_mux =
  1032. SOC_DAPM_ENUM("SLIM TX3 MUX Mux", sb_tx3_mux_enum);
  1033. static const struct snd_kcontrol_new sb_tx2_mux =
  1034. SOC_DAPM_ENUM("SLIM TX2 MUX Mux", sb_tx2_mux_enum);
  1035. static const struct snd_kcontrol_new sb_tx1_mux =
  1036. SOC_DAPM_ENUM("SLIM TX1 MUX Mux", sb_tx1_mux_enum);
  1037. static int wcd9304_put_dec_enum(struct snd_kcontrol *kcontrol,
  1038. struct snd_ctl_elem_value *ucontrol)
  1039. {
  1040. struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
  1041. struct snd_soc_dapm_widget *w = wlist->widgets[0];
  1042. struct snd_soc_codec *codec = w->codec;
  1043. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  1044. unsigned int dec_mux, decimator;
  1045. char *dec_name = NULL;
  1046. char *widget_name = NULL;
  1047. char *temp;
  1048. u16 tx_mux_ctl_reg;
  1049. u8 adc_dmic_sel = 0x0;
  1050. int ret = 0;
  1051. if (ucontrol->value.enumerated.item[0] > e->max - 1)
  1052. return -EINVAL;
  1053. dec_mux = ucontrol->value.enumerated.item[0];
  1054. widget_name = kstrndup(w->name, 15, GFP_KERNEL);
  1055. if (!widget_name)
  1056. return -ENOMEM;
  1057. temp = widget_name;
  1058. dec_name = strsep(&widget_name, " ");
  1059. widget_name = temp;
  1060. if (!dec_name) {
  1061. pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
  1062. ret = -EINVAL;
  1063. goto out;
  1064. }
  1065. ret = kstrtouint(strpbrk(dec_name, "1234"), 10, &decimator);
  1066. if (ret < 0) {
  1067. pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
  1068. ret = -EINVAL;
  1069. goto out;
  1070. }
  1071. dev_dbg(w->dapm->dev, "%s(): widget = %s dec_name = %s decimator = %u"\
  1072. "dec_mux = %u\n", __func__, w->name, dec_name, decimator,
  1073. dec_mux);
  1074. switch (decimator) {
  1075. case 1:
  1076. case 2:
  1077. if ((dec_mux == 1) || (dec_mux == 6))
  1078. adc_dmic_sel = ADC_DMIC_SEL_DMIC;
  1079. else
  1080. adc_dmic_sel = ADC_DMIC_SEL_ADC;
  1081. break;
  1082. case 3:
  1083. if ((dec_mux == 1) || (dec_mux == 6) || (dec_mux == 7))
  1084. adc_dmic_sel = ADC_DMIC_SEL_DMIC;
  1085. else
  1086. adc_dmic_sel = ADC_DMIC_SEL_ADC;
  1087. break;
  1088. case 4:
  1089. if ((dec_mux == 1) || (dec_mux == 5)
  1090. || (dec_mux == 6) || (dec_mux == 7))
  1091. adc_dmic_sel = ADC_DMIC_SEL_DMIC;
  1092. else
  1093. adc_dmic_sel = ADC_DMIC_SEL_ADC;
  1094. break;
  1095. default:
  1096. pr_err("%s: Invalid Decimator = %u\n", __func__, decimator);
  1097. ret = -EINVAL;
  1098. goto out;
  1099. }
  1100. tx_mux_ctl_reg = SITAR_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
  1101. snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x1, adc_dmic_sel);
  1102. ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
  1103. out:
  1104. kfree(widget_name);
  1105. return ret;
  1106. }
  1107. #define WCD9304_DEC_ENUM(xname, xenum) \
  1108. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
  1109. .info = snd_soc_info_enum_double, \
  1110. .get = snd_soc_dapm_get_enum_double, \
  1111. .put = wcd9304_put_dec_enum, \
  1112. .private_value = (unsigned long)&xenum }
  1113. static const struct snd_kcontrol_new dec1_mux =
  1114. WCD9304_DEC_ENUM("DEC1 MUX Mux", dec1_mux_enum);
  1115. static const struct snd_kcontrol_new dec2_mux =
  1116. WCD9304_DEC_ENUM("DEC2 MUX Mux", dec2_mux_enum);
  1117. static const struct snd_kcontrol_new dec3_mux =
  1118. WCD9304_DEC_ENUM("DEC3 MUX Mux", dec3_mux_enum);
  1119. static const struct snd_kcontrol_new dec4_mux =
  1120. WCD9304_DEC_ENUM("DEC4 MUX Mux", dec4_mux_enum);
  1121. static const struct snd_kcontrol_new iir1_inp1_mux =
  1122. SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
  1123. static const struct snd_kcontrol_new iir2_inp1_mux =
  1124. SOC_DAPM_ENUM("IIR2 INP1 Mux", iir2_inp1_mux_enum);
  1125. static const struct snd_kcontrol_new anc1_mux =
  1126. SOC_DAPM_ENUM("ANC1 MUX Mux", anc1_mux_enum);
  1127. static const struct snd_kcontrol_new anc2_mux =
  1128. SOC_DAPM_ENUM("ANC2 MUX Mux", anc2_mux_enum);
  1129. static const struct snd_kcontrol_new anc1_fb_mux =
  1130. SOC_DAPM_ENUM("ANC1 FB MUX Mux", anc1_fb_mux_enum);
  1131. static const struct snd_kcontrol_new dac1_switch[] = {
  1132. SOC_DAPM_SINGLE("Switch", SITAR_A_RX_EAR_EN, 5, 1, 0),
  1133. };
  1134. static int slim_tx_mixer_get(struct snd_kcontrol *kcontrol,
  1135. struct snd_ctl_elem_value *ucontrol)
  1136. {
  1137. struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
  1138. struct snd_soc_dapm_widget *widget = wlist->widgets[0];
  1139. ucontrol->value.integer.value[0] = widget->value;
  1140. return 0;
  1141. }
  1142. static int slim_tx_mixer_put(struct snd_kcontrol *kcontrol,
  1143. struct snd_ctl_elem_value *ucontrol)
  1144. {
  1145. struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
  1146. struct snd_soc_dapm_widget *widget = wlist->widgets[0];
  1147. struct snd_soc_codec *codec = widget->codec;
  1148. struct sitar_priv *sitar_p = snd_soc_codec_get_drvdata(codec);
  1149. struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
  1150. struct soc_multi_mixer_control *mixer =
  1151. ((struct soc_multi_mixer_control *)kcontrol->private_value);
  1152. u32 dai_id = widget->shift;
  1153. u32 port_id = mixer->shift;
  1154. u32 enable = ucontrol->value.integer.value[0];
  1155. mutex_lock(&codec->mutex);
  1156. if (sitar_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
  1157. if (dai_id != AIF1_CAP) {
  1158. dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
  1159. __func__);
  1160. mutex_unlock(&codec->mutex);
  1161. return -EINVAL;
  1162. }
  1163. }
  1164. switch (dai_id) {
  1165. case AIF1_CAP:
  1166. if (enable && !(widget->value & 1 << port_id)) {
  1167. if (wcd9xxx_tx_vport_validation(
  1168. vport_check_table[dai_id],
  1169. port_id,
  1170. sitar_p->dai, NUM_CODEC_DAIS)) {
  1171. dev_dbg(codec->dev, "%s: TX%u is used by other virtual port\n",
  1172. __func__, port_id + 1);
  1173. mutex_unlock(&codec->mutex);
  1174. return 0;
  1175. }
  1176. widget->value |= 1 << port_id;
  1177. list_add_tail(&core->tx_chs[port_id].list,
  1178. &sitar_p->dai[dai_id].wcd9xxx_ch_list);
  1179. } else if (!enable && (widget->value & 1 << port_id)) {
  1180. widget->value &= ~(1<<port_id);
  1181. list_del_init(&core->tx_chs[port_id].list);
  1182. } else {
  1183. if (enable)
  1184. dev_dbg(codec->dev, "%s: TX%u port is used by this virtual port\n",
  1185. __func__, port_id + 1);
  1186. else
  1187. dev_dbg(codec->dev, "%s: TX%u port is not used by this virtual port\n",
  1188. __func__, port_id + 1);
  1189. /* avoid update power function */
  1190. mutex_unlock(&codec->mutex);
  1191. return 0;
  1192. }
  1193. break;
  1194. default:
  1195. pr_err("Unknown AIF %d\n", dai_id);
  1196. mutex_unlock(&codec->mutex);
  1197. return -EINVAL;
  1198. }
  1199. pr_debug("%s: name %s sname %s updated value %u shift %d\n", __func__,
  1200. widget->name, widget->sname, widget->value, widget->shift);
  1201. snd_soc_dapm_mixer_update_power(widget, kcontrol, enable);
  1202. mutex_unlock(&codec->mutex);
  1203. return 0;
  1204. }
  1205. static int slim_rx_mux_get(struct snd_kcontrol *kcontrol,
  1206. struct snd_ctl_elem_value *ucontrol)
  1207. {
  1208. struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
  1209. struct snd_soc_dapm_widget *widget = wlist->widgets[0];
  1210. ucontrol->value.enumerated.item[0] = widget->value;
  1211. return 0;
  1212. }
  1213. static const char * const slim_rx_mux_text[] = {
  1214. "ZERO", "AIF1_PB"
  1215. };
  1216. static int slim_rx_mux_put(struct snd_kcontrol *kcontrol,
  1217. struct snd_ctl_elem_value *ucontrol)
  1218. {
  1219. struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
  1220. struct snd_soc_dapm_widget *widget = wlist->widgets[0];
  1221. struct snd_soc_codec *codec = widget->codec;
  1222. struct sitar_priv *sitar_p = snd_soc_codec_get_drvdata(codec);
  1223. struct wcd9xxx *core = dev_get_drvdata(codec->dev->parent);
  1224. struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
  1225. u32 port_id = widget->shift;
  1226. widget->value = ucontrol->value.enumerated.item[0];
  1227. mutex_lock(&codec->mutex);
  1228. if (sitar_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
  1229. if (widget->value > 1) {
  1230. dev_err(codec->dev, "%s: invalid AIF for I2C mode\n",
  1231. __func__);
  1232. goto err;
  1233. }
  1234. }
  1235. switch (widget->value) {
  1236. case 0:
  1237. list_del_init(&core->rx_chs[port_id].list);
  1238. break;
  1239. case 1:
  1240. if (wcd9xxx_rx_vport_validation(port_id +
  1241. SITAR_RX_PORT_START_NUMBER,
  1242. &sitar_p->dai[AIF1_PB].wcd9xxx_ch_list)) {
  1243. dev_dbg(codec->dev, "%s: RX%u is used by current requesting AIF_PB itself\n",
  1244. __func__, port_id + 1);
  1245. goto rtn;
  1246. }
  1247. list_add_tail(&core->rx_chs[port_id].list,
  1248. &sitar_p->dai[AIF1_PB].wcd9xxx_ch_list);
  1249. break;
  1250. break;
  1251. default:
  1252. pr_err("Unknown AIF %d\n", widget->value);
  1253. goto err;
  1254. }
  1255. rtn:
  1256. snd_soc_dapm_mux_update_power(widget, kcontrol, 1, widget->value, e);
  1257. mutex_unlock(&codec->mutex);
  1258. return 0;
  1259. err:
  1260. mutex_unlock(&codec->mutex);
  1261. return -EINVAL;
  1262. }
  1263. static const struct soc_enum slim_rx_mux_enum =
  1264. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(slim_rx_mux_text), slim_rx_mux_text);
  1265. static const struct snd_kcontrol_new sitar_aif_pb_mux[SITAR_RX_MAX] = {
  1266. SOC_DAPM_ENUM_EXT("SLIM RX1 MUX", slim_rx_mux_enum,
  1267. slim_rx_mux_get, slim_rx_mux_put),
  1268. SOC_DAPM_ENUM_EXT("SLIM RX2 MUX", slim_rx_mux_enum,
  1269. slim_rx_mux_get, slim_rx_mux_put),
  1270. SOC_DAPM_ENUM_EXT("SLIM RX3 MUX", slim_rx_mux_enum,
  1271. slim_rx_mux_get, slim_rx_mux_put),
  1272. SOC_DAPM_ENUM_EXT("SLIM RX4 MUX", slim_rx_mux_enum,
  1273. slim_rx_mux_get, slim_rx_mux_put),
  1274. SOC_DAPM_ENUM_EXT("SLIM RX5 MUX", slim_rx_mux_enum,
  1275. slim_rx_mux_get, slim_rx_mux_put)
  1276. };
  1277. static const struct snd_kcontrol_new sitar_aif_cap_mixer[SITAR_TX_MAX] = {
  1278. SOC_SINGLE_EXT("SLIM TX1", SND_SOC_NOPM, SITAR_TX1, 1, 0,
  1279. slim_tx_mixer_get, slim_tx_mixer_put),
  1280. SOC_SINGLE_EXT("SLIM TX2", SND_SOC_NOPM, SITAR_TX2, 1, 0,
  1281. slim_tx_mixer_get, slim_tx_mixer_put),
  1282. SOC_SINGLE_EXT("SLIM TX3", SND_SOC_NOPM, SITAR_TX3, 1, 0,
  1283. slim_tx_mixer_get, slim_tx_mixer_put),
  1284. SOC_SINGLE_EXT("SLIM TX4", SND_SOC_NOPM, SITAR_TX4, 1, 0,
  1285. slim_tx_mixer_get, slim_tx_mixer_put),
  1286. SOC_SINGLE_EXT("SLIM TX5", SND_SOC_NOPM, SITAR_TX5, 1, 0,
  1287. slim_tx_mixer_get, slim_tx_mixer_put),
  1288. };
  1289. static void sitar_codec_enable_adc_block(struct snd_soc_codec *codec,
  1290. int enable)
  1291. {
  1292. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1293. pr_debug("%s %d\n", __func__, enable);
  1294. if (enable) {
  1295. sitar->adc_count++;
  1296. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_CTL,
  1297. 0x02, 0x02);
  1298. } else {
  1299. sitar->adc_count--;
  1300. if (!sitar->adc_count) {
  1301. if (!sitar->mbhc_polling_active)
  1302. snd_soc_update_bits(codec,
  1303. SITAR_A_CDC_CLK_OTHR_CTL, 0xE0, 0x0);
  1304. }
  1305. }
  1306. }
  1307. static int sitar_codec_enable_adc(struct snd_soc_dapm_widget *w,
  1308. struct snd_kcontrol *kcontrol, int event)
  1309. {
  1310. struct snd_soc_codec *codec = w->codec;
  1311. u16 adc_reg;
  1312. u8 init_bit_shift;
  1313. pr_debug("%s %d\n", __func__, event);
  1314. if (w->reg == SITAR_A_TX_1_2_EN)
  1315. adc_reg = SITAR_A_TX_1_2_TEST_CTL;
  1316. else if (w->reg == SITAR_A_TX_3_EN)
  1317. adc_reg = SITAR_A_TX_3_TEST_CTL;
  1318. else {
  1319. pr_err("%s: Error, invalid adc register\n", __func__);
  1320. return -EINVAL;
  1321. }
  1322. if (w->shift == 3)
  1323. init_bit_shift = 6;
  1324. else if (w->shift == 7)
  1325. init_bit_shift = 7;
  1326. else {
  1327. pr_err("%s: Error, invalid init bit postion adc register\n",
  1328. __func__);
  1329. return -EINVAL;
  1330. }
  1331. switch (event) {
  1332. case SND_SOC_DAPM_PRE_PMU:
  1333. sitar_codec_enable_adc_block(codec, 1);
  1334. snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift,
  1335. 1 << init_bit_shift);
  1336. break;
  1337. case SND_SOC_DAPM_POST_PMU:
  1338. snd_soc_update_bits(codec, adc_reg, 1 << init_bit_shift, 0x00);
  1339. break;
  1340. case SND_SOC_DAPM_POST_PMD:
  1341. sitar_codec_enable_adc_block(codec, 0);
  1342. break;
  1343. }
  1344. return 0;
  1345. }
  1346. static int sitar_lineout_dac_event(struct snd_soc_dapm_widget *w,
  1347. struct snd_kcontrol *kcontrol, int event)
  1348. {
  1349. struct snd_soc_codec *codec = w->codec;
  1350. pr_debug("%s %s %d\n", __func__, w->name, event);
  1351. switch (event) {
  1352. case SND_SOC_DAPM_PRE_PMU:
  1353. snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
  1354. break;
  1355. case SND_SOC_DAPM_POST_PMD:
  1356. snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
  1357. break;
  1358. }
  1359. return 0;
  1360. }
  1361. static void sitar_enable_classg(struct snd_soc_codec *codec,
  1362. bool enable)
  1363. {
  1364. if (enable) {
  1365. snd_soc_update_bits(codec,
  1366. SITAR_A_CDC_CLK_OTHR_RESET_CTL, 0x10, 0x00);
  1367. snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x07, 0x00);
  1368. snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x08, 0x00);
  1369. snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x10, 0x00);
  1370. } else {
  1371. snd_soc_update_bits(codec,
  1372. SITAR_A_CDC_CLK_OTHR_RESET_CTL, 0x10, 0x10);
  1373. snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x07, 0x03);
  1374. snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x08, 0x08);
  1375. snd_soc_update_bits(codec, SITAR_A_CP_STATIC, 0x10, 0x10);
  1376. }
  1377. }
  1378. static bool sitar_is_hph_pa_on(struct snd_soc_codec *codec)
  1379. {
  1380. u8 hph_reg_val = 0;
  1381. hph_reg_val = snd_soc_read(codec, SITAR_A_RX_HPH_CNP_EN);
  1382. return (hph_reg_val & 0x30) ? true : false;
  1383. }
  1384. static bool sitar_is_line_pa_on(struct snd_soc_codec *codec)
  1385. {
  1386. u8 line_reg_val = 0;
  1387. line_reg_val = snd_soc_read(codec, SITAR_A_RX_LINE_CNP_EN);
  1388. return (line_reg_val & 0x03) ? true : false;
  1389. }
  1390. static int sitar_codec_enable_lineout(struct snd_soc_dapm_widget *w,
  1391. struct snd_kcontrol *kcontrol, int event)
  1392. {
  1393. struct snd_soc_codec *codec = w->codec;
  1394. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1395. u16 lineout_gain_reg;
  1396. pr_debug("%s %d %s comp2 enable %d\n", __func__, event, w->name,
  1397. sitar->comp_enabled[COMPANDER_2]);
  1398. if (sitar->comp_enabled[COMPANDER_2])
  1399. goto rtn;
  1400. switch (w->shift) {
  1401. case 0:
  1402. lineout_gain_reg = SITAR_A_RX_LINE_1_GAIN;
  1403. break;
  1404. case 1:
  1405. lineout_gain_reg = SITAR_A_RX_LINE_2_GAIN;
  1406. break;
  1407. default:
  1408. pr_err("%s: Error, incorrect lineout register value\n",
  1409. __func__);
  1410. return -EINVAL;
  1411. }
  1412. switch (event) {
  1413. case SND_SOC_DAPM_PRE_PMU:
  1414. if (sitar_is_hph_pa_on(codec)) {
  1415. snd_soc_update_bits(codec, SITAR_A_CDC_RX1_B6_CTL,
  1416. 0x20, 0x00);
  1417. sitar_enable_classg(codec, false);
  1418. } else {
  1419. snd_soc_update_bits(codec, SITAR_A_CDC_RX1_B6_CTL,
  1420. 0x20, 0x20);
  1421. sitar_enable_classg(codec, true);
  1422. }
  1423. snd_soc_update_bits(codec, lineout_gain_reg, 0x10, 0x10);
  1424. break;
  1425. case SND_SOC_DAPM_POST_PMU:
  1426. pr_debug("%s: sleeping 32 ms after %s PA turn on\n",
  1427. __func__, w->name);
  1428. usleep_range(32000, 32000);
  1429. break;
  1430. case SND_SOC_DAPM_POST_PMD:
  1431. if (sitar_is_hph_pa_on(codec))
  1432. sitar_enable_classg(codec, true);
  1433. else
  1434. sitar_enable_classg(codec, false);
  1435. snd_soc_update_bits(codec, lineout_gain_reg, 0x10, 0x00);
  1436. break;
  1437. }
  1438. rtn:
  1439. return 0;
  1440. }
  1441. static int sitar_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  1442. struct snd_kcontrol *kcontrol, int event)
  1443. {
  1444. struct snd_soc_codec *codec = w->codec;
  1445. u16 tx_dmic_ctl_reg;
  1446. u8 dmic_clk_sel, dmic_clk_en;
  1447. unsigned int dmic;
  1448. int ret;
  1449. ret = kstrtouint(strpbrk(w->name, "1234"), 10, &dmic);
  1450. if (ret < 0) {
  1451. pr_err("%s: Invalid DMIC line on the codec\n", __func__);
  1452. return -EINVAL;
  1453. }
  1454. switch (dmic) {
  1455. case 1:
  1456. case 2:
  1457. dmic_clk_sel = 0x02;
  1458. dmic_clk_en = 0x01;
  1459. break;
  1460. case 3:
  1461. case 4:
  1462. dmic_clk_sel = 0x08;
  1463. dmic_clk_en = 0x04;
  1464. break;
  1465. break;
  1466. default:
  1467. pr_err("%s: Invalid DMIC Selection\n", __func__);
  1468. return -EINVAL;
  1469. }
  1470. tx_dmic_ctl_reg = SITAR_A_CDC_TX1_DMIC_CTL + 8 * (dmic - 1);
  1471. pr_debug("%s %d\n", __func__, event);
  1472. switch (event) {
  1473. case SND_SOC_DAPM_PRE_PMU:
  1474. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_DMIC_CTL,
  1475. dmic_clk_sel, dmic_clk_sel);
  1476. snd_soc_update_bits(codec, tx_dmic_ctl_reg, 0x1, 0x1);
  1477. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_DMIC_CTL,
  1478. dmic_clk_en, dmic_clk_en);
  1479. break;
  1480. case SND_SOC_DAPM_POST_PMD:
  1481. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_DMIC_CTL,
  1482. dmic_clk_en, 0);
  1483. break;
  1484. }
  1485. return 0;
  1486. }
  1487. static int sitar_codec_enable_anc(struct snd_soc_dapm_widget *w,
  1488. struct snd_kcontrol *kcontrol, int event)
  1489. {
  1490. struct snd_soc_codec *codec = w->codec;
  1491. const char *filename;
  1492. const struct firmware *fw;
  1493. int i;
  1494. int ret;
  1495. int num_anc_slots;
  1496. struct anc_header *anc_head;
  1497. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1498. u32 anc_writes_size = 0;
  1499. int anc_size_remaining;
  1500. u32 *anc_ptr;
  1501. u16 reg;
  1502. u8 mask, val, old_val;
  1503. pr_debug("%s %d\n", __func__, event);
  1504. switch (event) {
  1505. case SND_SOC_DAPM_PRE_PMU:
  1506. /* Use the same firmware file as that of WCD9310,
  1507. * since the register sequences are same for
  1508. * WCD9310 and WCD9304
  1509. */
  1510. filename = "wcd9310/wcd9310_anc.bin";
  1511. ret = request_firmware(&fw, filename, codec->dev);
  1512. if (ret != 0) {
  1513. dev_err(codec->dev, "Failed to acquire ANC data: %d\n",
  1514. ret);
  1515. return -ENODEV;
  1516. }
  1517. if (fw->size < sizeof(struct anc_header)) {
  1518. dev_err(codec->dev, "Not enough data\n");
  1519. release_firmware(fw);
  1520. return -ENOMEM;
  1521. }
  1522. /* First number is the number of register writes */
  1523. anc_head = (struct anc_header *)(fw->data);
  1524. anc_ptr = (u32 *)((u32)fw->data + sizeof(struct anc_header));
  1525. anc_size_remaining = fw->size - sizeof(struct anc_header);
  1526. num_anc_slots = anc_head->num_anc_slots;
  1527. if (sitar->anc_slot >= num_anc_slots) {
  1528. dev_err(codec->dev, "Invalid ANC slot selected\n");
  1529. release_firmware(fw);
  1530. return -EINVAL;
  1531. }
  1532. for (i = 0; i < num_anc_slots; i++) {
  1533. if (anc_size_remaining < SITAR_PACKED_REG_SIZE) {
  1534. dev_err(codec->dev, "Invalid register format\n");
  1535. release_firmware(fw);
  1536. return -EINVAL;
  1537. }
  1538. anc_writes_size = (u32)(*anc_ptr);
  1539. anc_size_remaining -= sizeof(u32);
  1540. anc_ptr += 1;
  1541. if (anc_writes_size * SITAR_PACKED_REG_SIZE
  1542. > anc_size_remaining) {
  1543. dev_err(codec->dev, "Invalid register format\n");
  1544. release_firmware(fw);
  1545. return -ENOMEM;
  1546. }
  1547. if (sitar->anc_slot == i)
  1548. break;
  1549. anc_size_remaining -= (anc_writes_size *
  1550. SITAR_PACKED_REG_SIZE);
  1551. anc_ptr += anc_writes_size;
  1552. }
  1553. if (i == num_anc_slots) {
  1554. dev_err(codec->dev, "Selected ANC slot not present\n");
  1555. release_firmware(fw);
  1556. return -ENOMEM;
  1557. }
  1558. for (i = 0; i < anc_writes_size; i++) {
  1559. SITAR_CODEC_UNPACK_ENTRY(anc_ptr[i], reg,
  1560. mask, val);
  1561. old_val = snd_soc_read(codec, reg);
  1562. snd_soc_write(codec, reg, (old_val & ~mask) |
  1563. (val & mask));
  1564. }
  1565. release_firmware(fw);
  1566. /* For Sitar, it is required to enable both Feed-forward
  1567. * and Feed back clocks to enable ANC
  1568. */
  1569. snd_soc_write(codec, SITAR_A_CDC_CLK_ANC_CLK_EN_CTL, 0x0F);
  1570. break;
  1571. case SND_SOC_DAPM_POST_PMD:
  1572. snd_soc_write(codec, SITAR_A_CDC_CLK_ANC_RESET_CTL, 0xFF);
  1573. snd_soc_write(codec, SITAR_A_CDC_CLK_ANC_CLK_EN_CTL, 0x00);
  1574. break;
  1575. }
  1576. return 0;
  1577. }
  1578. static void sitar_codec_start_hs_polling(struct snd_soc_codec *codec)
  1579. {
  1580. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1581. int mbhc_state = sitar->mbhc_state;
  1582. pr_debug("%s: enter\n", __func__);
  1583. if (!sitar->mbhc_polling_active) {
  1584. pr_debug("Polling is not active, do not start polling\n");
  1585. return;
  1586. }
  1587. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x84);
  1588. if (!sitar->no_mic_headset_override) {
  1589. if (mbhc_state == MBHC_STATE_POTENTIAL) {
  1590. pr_debug("%s recovering MBHC state macine\n", __func__);
  1591. sitar->mbhc_state = MBHC_STATE_POTENTIAL_RECOVERY;
  1592. /* set to max button press threshold */
  1593. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B2_CTL,
  1594. 0x7F);
  1595. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B1_CTL,
  1596. 0xFF);
  1597. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B4_CTL,
  1598. 0x7F);
  1599. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B3_CTL,
  1600. 0xFF);
  1601. /* set to max */
  1602. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B6_CTL,
  1603. 0x7F);
  1604. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B5_CTL,
  1605. 0xFF);
  1606. }
  1607. }
  1608. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x84);
  1609. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x1);
  1610. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
  1611. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x1);
  1612. }
  1613. static void sitar_codec_pause_hs_polling(struct snd_soc_codec *codec)
  1614. {
  1615. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1616. pr_debug("%s: enter\n", __func__);
  1617. if (!sitar->mbhc_polling_active) {
  1618. pr_debug("polling not active, nothing to pause\n");
  1619. return;
  1620. }
  1621. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
  1622. pr_debug("%s: leave\n", __func__);
  1623. }
  1624. static void sitar_codec_switch_cfilt_mode(struct snd_soc_codec *codec,
  1625. int mode)
  1626. {
  1627. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1628. u8 reg_mode_val, cur_mode_val;
  1629. bool mbhc_was_polling = false;
  1630. if (mode)
  1631. reg_mode_val = SITAR_CFILT_FAST_MODE;
  1632. else
  1633. reg_mode_val = SITAR_CFILT_SLOW_MODE;
  1634. cur_mode_val = snd_soc_read(codec,
  1635. sitar->mbhc_bias_regs.cfilt_ctl) & 0x40;
  1636. if (cur_mode_val != reg_mode_val) {
  1637. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  1638. if (sitar->mbhc_polling_active) {
  1639. sitar_codec_pause_hs_polling(codec);
  1640. mbhc_was_polling = true;
  1641. }
  1642. snd_soc_update_bits(codec,
  1643. sitar->mbhc_bias_regs.cfilt_ctl, 0x40, reg_mode_val);
  1644. if (mbhc_was_polling)
  1645. sitar_codec_start_hs_polling(codec);
  1646. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  1647. pr_debug("%s: CFILT mode change (%x to %x)\n", __func__,
  1648. cur_mode_val, reg_mode_val);
  1649. } else {
  1650. pr_err("%s: CFILT Value is already %x\n",
  1651. __func__, cur_mode_val);
  1652. }
  1653. }
  1654. static void sitar_codec_update_cfilt_usage(struct snd_soc_codec *codec,
  1655. u8 cfilt_sel, int inc)
  1656. {
  1657. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1658. u32 *cfilt_cnt_ptr = NULL;
  1659. u16 micb_cfilt_reg;
  1660. switch (cfilt_sel) {
  1661. case SITAR_CFILT1_SEL:
  1662. cfilt_cnt_ptr = &sitar->cfilt1_cnt;
  1663. micb_cfilt_reg = SITAR_A_MICB_CFILT_1_CTL;
  1664. break;
  1665. case SITAR_CFILT2_SEL:
  1666. cfilt_cnt_ptr = &sitar->cfilt2_cnt;
  1667. micb_cfilt_reg = SITAR_A_MICB_CFILT_2_CTL;
  1668. break;
  1669. default:
  1670. return; /* should not happen */
  1671. }
  1672. if (inc) {
  1673. if (!(*cfilt_cnt_ptr)++) {
  1674. /* Switch CFILT to slow mode if MBHC CFILT being used */
  1675. if (cfilt_sel == sitar->mbhc_bias_regs.cfilt_sel)
  1676. sitar_codec_switch_cfilt_mode(codec, 0);
  1677. snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0x80);
  1678. }
  1679. } else {
  1680. /* check if count not zero, decrement
  1681. * then check if zero, go ahead disable cfilter
  1682. */
  1683. if ((*cfilt_cnt_ptr) && !--(*cfilt_cnt_ptr)) {
  1684. snd_soc_update_bits(codec, micb_cfilt_reg, 0x80, 0);
  1685. /* Switch CFILT to fast mode if MBHC CFILT being used */
  1686. if (cfilt_sel == sitar->mbhc_bias_regs.cfilt_sel)
  1687. sitar_codec_switch_cfilt_mode(codec, 1);
  1688. }
  1689. }
  1690. }
  1691. static int sitar_find_k_value(unsigned int ldoh_v, unsigned int cfilt_mv)
  1692. {
  1693. int rc = -EINVAL;
  1694. unsigned min_mv, max_mv;
  1695. switch (ldoh_v) {
  1696. case SITAR_LDOH_1P95_V:
  1697. min_mv = 160;
  1698. max_mv = 1800;
  1699. break;
  1700. case SITAR_LDOH_2P35_V:
  1701. min_mv = 200;
  1702. max_mv = 2200;
  1703. break;
  1704. case SITAR_LDOH_2P75_V:
  1705. min_mv = 240;
  1706. max_mv = 2600;
  1707. break;
  1708. case SITAR_LDOH_2P85_V:
  1709. min_mv = 250;
  1710. max_mv = 2700;
  1711. break;
  1712. default:
  1713. goto done;
  1714. }
  1715. if (cfilt_mv < min_mv || cfilt_mv > max_mv)
  1716. goto done;
  1717. for (rc = 4; rc <= 44; rc++) {
  1718. min_mv = max_mv * (rc) / 44;
  1719. if (min_mv >= cfilt_mv) {
  1720. rc -= 4;
  1721. break;
  1722. }
  1723. }
  1724. done:
  1725. return rc;
  1726. }
  1727. static bool sitar_is_hph_dac_on(struct snd_soc_codec *codec, int left)
  1728. {
  1729. u8 hph_reg_val = 0;
  1730. if (left)
  1731. hph_reg_val = snd_soc_read(codec,
  1732. SITAR_A_RX_HPH_L_DAC_CTL);
  1733. else
  1734. hph_reg_val = snd_soc_read(codec,
  1735. SITAR_A_RX_HPH_R_DAC_CTL);
  1736. return (hph_reg_val & 0xC0) ? true : false;
  1737. }
  1738. static void sitar_codec_switch_micbias(struct snd_soc_codec *codec,
  1739. int vddio_switch)
  1740. {
  1741. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1742. int cfilt_k_val;
  1743. bool mbhc_was_polling = false;
  1744. switch (vddio_switch) {
  1745. case 1:
  1746. if (sitar->mbhc_micbias_switched == 0 &&
  1747. sitar->mbhc_polling_active) {
  1748. sitar_codec_pause_hs_polling(codec);
  1749. /* Enable Mic Bias switch to VDDIO */
  1750. sitar->cfilt_k_value = snd_soc_read(codec,
  1751. sitar->mbhc_bias_regs.cfilt_val);
  1752. cfilt_k_val = sitar_find_k_value(
  1753. sitar->pdata->micbias.ldoh_v, 1800);
  1754. snd_soc_update_bits(codec,
  1755. sitar->mbhc_bias_regs.cfilt_val,
  1756. 0xFC, (cfilt_k_val << 2));
  1757. snd_soc_update_bits(codec,
  1758. sitar->mbhc_bias_regs.mbhc_reg, 0x80, 0x80);
  1759. snd_soc_update_bits(codec,
  1760. sitar->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
  1761. sitar_codec_start_hs_polling(codec);
  1762. sitar->mbhc_micbias_switched = true;
  1763. pr_debug("%s: Enabled MBHC Mic bias to VDDIO Switch\n",
  1764. __func__);
  1765. }
  1766. break;
  1767. case 0:
  1768. if (sitar->mbhc_micbias_switched) {
  1769. if (sitar->mbhc_polling_active) {
  1770. sitar_codec_pause_hs_polling(codec);
  1771. mbhc_was_polling = true;
  1772. }
  1773. /* Disable Mic Bias switch to VDDIO */
  1774. if (sitar->cfilt_k_value != 0)
  1775. snd_soc_update_bits(codec,
  1776. sitar->mbhc_bias_regs.cfilt_val, 0XFC,
  1777. sitar->cfilt_k_value);
  1778. snd_soc_update_bits(codec,
  1779. sitar->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
  1780. snd_soc_update_bits(codec,
  1781. sitar->mbhc_bias_regs.mbhc_reg, 0x10, 0x00);
  1782. if (mbhc_was_polling)
  1783. sitar_codec_start_hs_polling(codec);
  1784. sitar->mbhc_micbias_switched = false;
  1785. pr_debug("%s: Disabled MBHC Mic bias to VDDIO Switch\n",
  1786. __func__);
  1787. }
  1788. break;
  1789. }
  1790. }
  1791. static int sitar_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  1792. struct snd_kcontrol *kcontrol, int event)
  1793. {
  1794. struct snd_soc_codec *codec = w->codec;
  1795. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  1796. u16 micb_int_reg;
  1797. int micb_line;
  1798. u8 cfilt_sel_val = 0;
  1799. char *internal1_text = "Internal1";
  1800. char *internal2_text = "Internal2";
  1801. pr_debug("%s %d\n", __func__, event);
  1802. switch (w->reg) {
  1803. case SITAR_A_MICB_1_CTL:
  1804. micb_int_reg = SITAR_A_MICB_1_INT_RBIAS;
  1805. cfilt_sel_val = sitar->pdata->micbias.bias1_cfilt_sel;
  1806. micb_line = SITAR_MICBIAS1;
  1807. break;
  1808. case SITAR_A_MICB_2_CTL:
  1809. micb_int_reg = SITAR_A_MICB_2_INT_RBIAS;
  1810. cfilt_sel_val = sitar->pdata->micbias.bias2_cfilt_sel;
  1811. micb_line = SITAR_MICBIAS2;
  1812. break;
  1813. default:
  1814. pr_err("%s: Error, invalid micbias register\n", __func__);
  1815. return -EINVAL;
  1816. }
  1817. switch (event) {
  1818. case SND_SOC_DAPM_PRE_PMU:
  1819. /* Decide whether to switch the micbias for MBHC */
  1820. if (w->reg == sitar->mbhc_bias_regs.ctl_reg) {
  1821. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  1822. sitar_codec_switch_micbias(codec, 0);
  1823. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  1824. }
  1825. snd_soc_update_bits(codec, w->reg, 0x1E, 0x00);
  1826. sitar_codec_update_cfilt_usage(codec, cfilt_sel_val, 1);
  1827. if (strnstr(w->name, internal1_text, 30))
  1828. snd_soc_update_bits(codec, micb_int_reg, 0xFF, 0xA4);
  1829. else if (strnstr(w->name, internal2_text, 30))
  1830. snd_soc_update_bits(codec, micb_int_reg, 0x1C, 0x1C);
  1831. break;
  1832. case SND_SOC_DAPM_POST_PMU:
  1833. usleep_range(20000, 20000);
  1834. if (sitar->mbhc_polling_active &&
  1835. sitar->mbhc_cfg.micbias == micb_line) {
  1836. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  1837. sitar_codec_pause_hs_polling(codec);
  1838. sitar_codec_start_hs_polling(codec);
  1839. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  1840. }
  1841. break;
  1842. case SND_SOC_DAPM_POST_PMD:
  1843. if ((w->reg == sitar->mbhc_bias_regs.ctl_reg)
  1844. && sitar_is_hph_pa_on(codec))
  1845. sitar_codec_switch_micbias(codec, 1);
  1846. if (strnstr(w->name, internal1_text, 30))
  1847. snd_soc_update_bits(codec, micb_int_reg, 0x80, 0x00);
  1848. else if (strnstr(w->name, internal2_text, 30))
  1849. snd_soc_update_bits(codec, micb_int_reg, 0x10, 0x00);
  1850. sitar_codec_update_cfilt_usage(codec, cfilt_sel_val, 0);
  1851. break;
  1852. }
  1853. return 0;
  1854. }
  1855. static void tx_hpf_corner_freq_callback(struct work_struct *work)
  1856. {
  1857. struct delayed_work *hpf_delayed_work;
  1858. struct hpf_work *hpf_work;
  1859. struct sitar_priv *sitar;
  1860. struct snd_soc_codec *codec;
  1861. u16 tx_mux_ctl_reg;
  1862. u8 hpf_cut_of_freq;
  1863. hpf_delayed_work = to_delayed_work(work);
  1864. hpf_work = container_of(hpf_delayed_work, struct hpf_work, dwork);
  1865. sitar = hpf_work->sitar;
  1866. codec = hpf_work->sitar->codec;
  1867. hpf_cut_of_freq = hpf_work->tx_hpf_cut_of_freq;
  1868. tx_mux_ctl_reg = SITAR_A_CDC_TX1_MUX_CTL +
  1869. (hpf_work->decimator - 1) * 8;
  1870. pr_debug("%s(): decimator %u hpf_cut_of_freq 0x%x\n", __func__,
  1871. hpf_work->decimator, (unsigned int)hpf_cut_of_freq);
  1872. snd_soc_update_bits(codec, tx_mux_ctl_reg,
  1873. CUT_OF_FREQ_MASK, hpf_cut_of_freq << 4);
  1874. }
  1875. static int sitar_codec_enable_dec(struct snd_soc_dapm_widget *w,
  1876. struct snd_kcontrol *kcontrol, int event)
  1877. {
  1878. struct snd_soc_codec *codec = w->codec;
  1879. u16 dec_reset_reg, gain_reg, tx_vol_ctl_reg, tx_mux_ctl_reg;
  1880. unsigned int decimator;
  1881. char *dec_name = NULL;
  1882. char *widget_name = NULL;
  1883. char *temp;
  1884. int ret = 0;
  1885. u8 dec_hpf_cut_of_freq, current_gain;
  1886. pr_debug("%s %d\n", __func__, event);
  1887. widget_name = kstrndup(w->name, 15, GFP_KERNEL);
  1888. if (!widget_name)
  1889. return -ENOMEM;
  1890. temp = widget_name;
  1891. dec_name = strsep(&widget_name, " ");
  1892. widget_name = temp;
  1893. if (!dec_name) {
  1894. pr_err("%s: Invalid decimator = %s\n", __func__, w->name);
  1895. ret = -EINVAL;
  1896. goto out;
  1897. }
  1898. ret = kstrtouint(strpbrk(dec_name, "1234"), 10, &decimator);
  1899. if (ret < 0) {
  1900. pr_err("%s: Invalid decimator = %s\n", __func__, dec_name);
  1901. ret = -EINVAL;
  1902. goto out;
  1903. }
  1904. pr_debug("%s(): widget = %s dec_name = %s decimator = %u\n", __func__,
  1905. w->name, dec_name, decimator);
  1906. if (w->reg == SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL)
  1907. dec_reset_reg = SITAR_A_CDC_CLK_TX_RESET_B1_CTL;
  1908. else {
  1909. pr_err("%s: Error, incorrect dec\n", __func__);
  1910. ret = EINVAL;
  1911. goto out;
  1912. }
  1913. tx_vol_ctl_reg = SITAR_A_CDC_TX1_VOL_CTL_CFG + 8 * (decimator - 1);
  1914. tx_mux_ctl_reg = SITAR_A_CDC_TX1_MUX_CTL + 8 * (decimator - 1);
  1915. switch (event) {
  1916. case SND_SOC_DAPM_PRE_PMU:
  1917. /* Enable TX Digital Mute */
  1918. snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
  1919. snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift,
  1920. 1 << w->shift);
  1921. snd_soc_update_bits(codec, dec_reset_reg, 1 << w->shift, 0x0);
  1922. dec_hpf_cut_of_freq = snd_soc_read(codec, tx_mux_ctl_reg);
  1923. dec_hpf_cut_of_freq = (dec_hpf_cut_of_freq &
  1924. CUT_OF_FREQ_MASK) >> 4;
  1925. tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq =
  1926. dec_hpf_cut_of_freq;
  1927. if ((dec_hpf_cut_of_freq != CF_MIN_3DB_150HZ)) {
  1928. /* Set cut off freq to CF_MIN_3DB_150HZ (0x01) */
  1929. snd_soc_update_bits(codec, tx_mux_ctl_reg,
  1930. CUT_OF_FREQ_MASK, CF_MIN_3DB_150HZ << 4);
  1931. }
  1932. /* enable HPF */
  1933. snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x00);
  1934. break;
  1935. case SND_SOC_DAPM_POST_PMU:
  1936. /* Disable TX Digital Mute */
  1937. snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x00);
  1938. if (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq !=
  1939. CF_MIN_3DB_150HZ) {
  1940. schedule_delayed_work(&tx_hpf_work[decimator - 1].dwork,
  1941. msecs_to_jiffies(300));
  1942. }
  1943. /* Reprogram the digital gain after power up of Decimator */
  1944. gain_reg = SITAR_A_CDC_TX1_VOL_CTL_GAIN + (8 * w->shift);
  1945. current_gain = snd_soc_read(codec, gain_reg);
  1946. snd_soc_write(codec, gain_reg, current_gain);
  1947. break;
  1948. case SND_SOC_DAPM_PRE_PMD:
  1949. /* Enable Digital Mute, Cancel possibly scheduled work */
  1950. snd_soc_update_bits(codec, tx_vol_ctl_reg, 0x01, 0x01);
  1951. cancel_delayed_work_sync(&tx_hpf_work[decimator - 1].dwork);
  1952. break;
  1953. case SND_SOC_DAPM_POST_PMD:
  1954. snd_soc_update_bits(codec, tx_mux_ctl_reg, 0x08, 0x08);
  1955. snd_soc_update_bits(codec, tx_mux_ctl_reg, CUT_OF_FREQ_MASK,
  1956. (tx_hpf_work[decimator - 1].tx_hpf_cut_of_freq) << 4);
  1957. break;
  1958. }
  1959. out:
  1960. kfree(widget_name);
  1961. return ret;
  1962. }
  1963. static int sitar_codec_reset_interpolator(struct snd_soc_dapm_widget *w,
  1964. struct snd_kcontrol *kcontrol, int event)
  1965. {
  1966. struct snd_soc_codec *codec = w->codec;
  1967. u16 gain_reg;
  1968. u8 current_gain;
  1969. pr_debug("%s %d %s\n", __func__, event, w->name);
  1970. switch (event) {
  1971. case SND_SOC_DAPM_PRE_PMU:
  1972. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_RX_RESET_CTL,
  1973. 1 << w->shift, 1 << w->shift);
  1974. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_RX_RESET_CTL,
  1975. 1 << w->shift, 0x0);
  1976. break;
  1977. case SND_SOC_DAPM_POST_PMU:
  1978. /* Reprogram gain after power up interpolator */
  1979. gain_reg = SITAR_A_CDC_RX1_VOL_CTL_B2_CTL + (8 * w->shift);
  1980. current_gain = snd_soc_read(codec, gain_reg);
  1981. snd_soc_write(codec, gain_reg, current_gain);
  1982. }
  1983. return 0;
  1984. }
  1985. static int sitar_codec_enable_ldo_h(struct snd_soc_dapm_widget *w,
  1986. struct snd_kcontrol *kcontrol, int event)
  1987. {
  1988. switch (event) {
  1989. case SND_SOC_DAPM_POST_PMU:
  1990. case SND_SOC_DAPM_POST_PMD:
  1991. usleep_range(1000, 1000);
  1992. pr_debug("LDO_H\n");
  1993. break;
  1994. }
  1995. return 0;
  1996. }
  1997. static void sitar_enable_rx_bias(struct snd_soc_codec *codec, u32 enable)
  1998. {
  1999. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2000. if (enable) {
  2001. sitar->rx_bias_count++;
  2002. if (sitar->rx_bias_count == 1)
  2003. snd_soc_update_bits(codec, SITAR_A_RX_COM_BIAS,
  2004. 0x80, 0x80);
  2005. } else {
  2006. sitar->rx_bias_count--;
  2007. if (!sitar->rx_bias_count)
  2008. snd_soc_update_bits(codec, SITAR_A_RX_COM_BIAS,
  2009. 0x80, 0x00);
  2010. }
  2011. }
  2012. static int sitar_codec_enable_rx_bias(struct snd_soc_dapm_widget *w,
  2013. struct snd_kcontrol *kcontrol, int event)
  2014. {
  2015. struct snd_soc_codec *codec = w->codec;
  2016. pr_debug("%s %d\n", __func__, event);
  2017. switch (event) {
  2018. case SND_SOC_DAPM_PRE_PMU:
  2019. sitar_enable_rx_bias(codec, 1);
  2020. break;
  2021. case SND_SOC_DAPM_POST_PMD:
  2022. sitar_enable_rx_bias(codec, 0);
  2023. break;
  2024. }
  2025. return 0;
  2026. }
  2027. static int sitar_hph_dac_event(struct snd_soc_dapm_widget *w,
  2028. struct snd_kcontrol *kcontrol, int event)
  2029. {
  2030. struct snd_soc_codec *codec = w->codec;
  2031. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2032. pr_debug("%s %s %d comp#1 enable %d\n", __func__,
  2033. w->name, event, sitar->comp_enabled[COMPANDER_1]);
  2034. switch (event) {
  2035. case SND_SOC_DAPM_PRE_PMU:
  2036. if (w->reg == SITAR_A_RX_HPH_L_DAC_CTL) {
  2037. if (!sitar->comp_enabled[COMPANDER_1]) {
  2038. snd_soc_update_bits(codec,
  2039. SITAR_A_CDC_CONN_CLSG_CTL,
  2040. 0x30, 0x20);
  2041. snd_soc_update_bits(codec,
  2042. SITAR_A_CDC_CONN_CLSG_CTL,
  2043. 0x0C, 0x08);
  2044. }
  2045. }
  2046. snd_soc_update_bits(codec, w->reg, 0x40, 0x40);
  2047. break;
  2048. case SND_SOC_DAPM_POST_PMD:
  2049. snd_soc_update_bits(codec, w->reg, 0x40, 0x00);
  2050. if (w->reg == SITAR_A_RX_HPH_L_DAC_CTL) {
  2051. snd_soc_update_bits(codec, SITAR_A_CDC_CONN_CLSG_CTL,
  2052. 0x30, 0x10);
  2053. snd_soc_update_bits(codec, SITAR_A_CDC_CONN_CLSG_CTL,
  2054. 0x0C, 0x04);
  2055. }
  2056. break;
  2057. }
  2058. return 0;
  2059. }
  2060. static void sitar_snd_soc_jack_report(struct sitar_priv *sitar,
  2061. struct snd_soc_jack *jack, int status,
  2062. int mask)
  2063. {
  2064. /* XXX: wake_lock_timeout()? */
  2065. snd_soc_jack_report_no_dapm(jack, status, mask);
  2066. }
  2067. static void hphocp_off_report(struct sitar_priv *sitar,
  2068. u32 jack_status, int irq)
  2069. {
  2070. struct snd_soc_codec *codec;
  2071. if (!sitar) {
  2072. pr_err("%s: Bad sitar private data\n", __func__);
  2073. return;
  2074. }
  2075. pr_info("%s: clear ocp status %x\n", __func__, jack_status);
  2076. codec = sitar->codec;
  2077. if (sitar->hph_status & jack_status) {
  2078. sitar->hph_status &= ~jack_status;
  2079. if (sitar->mbhc_cfg.headset_jack)
  2080. sitar_snd_soc_jack_report(sitar,
  2081. sitar->mbhc_cfg.headset_jack,
  2082. sitar->hph_status,
  2083. SITAR_JACK_MASK);
  2084. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10, 0x00);
  2085. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10, 0x10);
  2086. /* reset retry counter as PA is turned off signifying
  2087. * start of new OCP detection session
  2088. */
  2089. if (WCD9XXX_IRQ_HPH_PA_OCPL_FAULT)
  2090. sitar->hphlocp_cnt = 0;
  2091. else
  2092. sitar->hphrocp_cnt = 0;
  2093. wcd9xxx_enable_irq(codec->control_data, irq);
  2094. }
  2095. }
  2096. static void hphlocp_off_report(struct work_struct *work)
  2097. {
  2098. struct sitar_priv *sitar = container_of(work, struct sitar_priv,
  2099. hphlocp_work);
  2100. hphocp_off_report(sitar, SND_JACK_OC_HPHL,
  2101. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
  2102. }
  2103. static void hphrocp_off_report(struct work_struct *work)
  2104. {
  2105. struct sitar_priv *sitar = container_of(work, struct sitar_priv,
  2106. hphrocp_work);
  2107. hphocp_off_report(sitar, SND_JACK_OC_HPHR,
  2108. WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
  2109. }
  2110. static int sitar_hph_pa_event(struct snd_soc_dapm_widget *w,
  2111. struct snd_kcontrol *kcontrol, int event)
  2112. {
  2113. struct snd_soc_codec *codec = w->codec;
  2114. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2115. u8 mbhc_micb_ctl_val;
  2116. pr_debug("%s: event = %d\n", __func__, event);
  2117. switch (event) {
  2118. case SND_SOC_DAPM_PRE_PMU:
  2119. mbhc_micb_ctl_val = snd_soc_read(codec,
  2120. sitar->mbhc_bias_regs.ctl_reg);
  2121. if (!(mbhc_micb_ctl_val & 0x80)) {
  2122. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  2123. sitar_codec_switch_micbias(codec, 1);
  2124. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  2125. }
  2126. if (sitar_is_line_pa_on(codec))
  2127. sitar_enable_classg(codec, false);
  2128. else
  2129. sitar_enable_classg(codec, true);
  2130. break;
  2131. case SND_SOC_DAPM_POST_PMD:
  2132. /* schedule work is required because at the time HPH PA DAPM
  2133. * event callback is called by DAPM framework, CODEC dapm mutex
  2134. * would have been locked while snd_soc_jack_report also
  2135. * attempts to acquire same lock.
  2136. */
  2137. if (w->shift == 5) {
  2138. clear_bit(SITAR_HPHL_PA_OFF_ACK,
  2139. &sitar->hph_pa_dac_state);
  2140. clear_bit(SITAR_HPHL_DAC_OFF_ACK,
  2141. &sitar->hph_pa_dac_state);
  2142. if (sitar->hph_status & SND_JACK_OC_HPHL)
  2143. schedule_work(&sitar->hphlocp_work);
  2144. } else if (w->shift == 4) {
  2145. clear_bit(SITAR_HPHR_PA_OFF_ACK,
  2146. &sitar->hph_pa_dac_state);
  2147. clear_bit(SITAR_HPHR_DAC_OFF_ACK,
  2148. &sitar->hph_pa_dac_state);
  2149. if (sitar->hph_status & SND_JACK_OC_HPHR)
  2150. schedule_work(&sitar->hphrocp_work);
  2151. }
  2152. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  2153. sitar_codec_switch_micbias(codec, 0);
  2154. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  2155. pr_debug("%s: sleep 10 ms after %s PA disable.\n", __func__,
  2156. w->name);
  2157. usleep_range(10000, 10000);
  2158. if (sitar_is_line_pa_on(codec))
  2159. sitar_enable_classg(codec, true);
  2160. else
  2161. sitar_enable_classg(codec, false);
  2162. break;
  2163. }
  2164. return 0;
  2165. }
  2166. static void sitar_get_mbhc_micbias_regs(struct snd_soc_codec *codec,
  2167. struct mbhc_micbias_regs *micbias_regs)
  2168. {
  2169. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2170. unsigned int cfilt;
  2171. switch (sitar->mbhc_cfg.micbias) {
  2172. case SITAR_MICBIAS1:
  2173. cfilt = sitar->pdata->micbias.bias1_cfilt_sel;
  2174. micbias_regs->mbhc_reg = SITAR_A_MICB_1_MBHC;
  2175. micbias_regs->int_rbias = SITAR_A_MICB_1_INT_RBIAS;
  2176. micbias_regs->ctl_reg = SITAR_A_MICB_1_CTL;
  2177. break;
  2178. case SITAR_MICBIAS2:
  2179. cfilt = sitar->pdata->micbias.bias2_cfilt_sel;
  2180. micbias_regs->mbhc_reg = SITAR_A_MICB_2_MBHC;
  2181. micbias_regs->int_rbias = SITAR_A_MICB_2_INT_RBIAS;
  2182. micbias_regs->ctl_reg = SITAR_A_MICB_2_CTL;
  2183. break;
  2184. default:
  2185. /* Should never reach here */
  2186. pr_err("%s: Invalid MIC BIAS for MBHC\n", __func__);
  2187. return;
  2188. }
  2189. micbias_regs->cfilt_sel = cfilt;
  2190. switch (cfilt) {
  2191. case SITAR_CFILT1_SEL:
  2192. micbias_regs->cfilt_val = SITAR_A_MICB_CFILT_1_VAL;
  2193. micbias_regs->cfilt_ctl = SITAR_A_MICB_CFILT_1_CTL;
  2194. sitar->mbhc_data.micb_mv = sitar->pdata->micbias.cfilt1_mv;
  2195. break;
  2196. case SITAR_CFILT2_SEL:
  2197. micbias_regs->cfilt_val = SITAR_A_MICB_CFILT_2_VAL;
  2198. micbias_regs->cfilt_ctl = SITAR_A_MICB_CFILT_2_CTL;
  2199. sitar->mbhc_data.micb_mv = sitar->pdata->micbias.cfilt2_mv;
  2200. break;
  2201. }
  2202. }
  2203. static int sitar_codec_enable_charge_pump(struct snd_soc_dapm_widget *w,
  2204. struct snd_kcontrol *kcontrol, int event)
  2205. {
  2206. struct snd_soc_codec *codec = w->codec;
  2207. pr_debug("%s %d\n", __func__, event);
  2208. switch (event) {
  2209. case SND_SOC_DAPM_POST_PMU:
  2210. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_CTL, 0x01,
  2211. 0x01);
  2212. snd_soc_update_bits(codec, SITAR_A_CDC_CLSG_CTL, 0x08, 0x08);
  2213. usleep_range(200, 200);
  2214. break;
  2215. case SND_SOC_DAPM_PRE_PMD:
  2216. snd_soc_update_bits(codec, SITAR_A_CDC_CLSG_CTL, 0x08, 0x00);
  2217. /*
  2218. * This delay is for the class G controller to settle down
  2219. * after turn OFF. The delay is as per the hardware spec for
  2220. * the codec
  2221. */
  2222. usleep_range(20, 20);
  2223. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_OTHR_CTL, 0x01,
  2224. 0x00);
  2225. break;
  2226. }
  2227. return 0;
  2228. }
  2229. static int sitar_ear_pa_event(struct snd_soc_dapm_widget *w,
  2230. struct snd_kcontrol *kcontrol, int event)
  2231. {
  2232. switch (event) {
  2233. case SND_SOC_DAPM_POST_PMU:
  2234. pr_debug("%s: Sleeping 20ms after enabling EAR PA\n",
  2235. __func__);
  2236. msleep(20);
  2237. break;
  2238. case SND_SOC_DAPM_POST_PMD:
  2239. pr_debug("%s: Sleeping 20ms after disabling EAR PA\n",
  2240. __func__);
  2241. msleep(20);
  2242. break;
  2243. }
  2244. return 0;
  2245. }
  2246. static const struct snd_soc_dapm_widget sitar_dapm_i2s_widgets[] = {
  2247. SND_SOC_DAPM_SUPPLY("RX_I2S_CLK", SITAR_A_CDC_CLK_RX_I2S_CTL,
  2248. 4, 0, NULL, 0),
  2249. SND_SOC_DAPM_SUPPLY("TX_I2S_CLK", SITAR_A_CDC_CLK_TX_I2S_CTL, 4,
  2250. 0, NULL, 0),
  2251. };
  2252. static const struct snd_soc_dapm_widget sitar_dapm_widgets[] = {
  2253. /*RX stuff */
  2254. SND_SOC_DAPM_OUTPUT("EAR"),
  2255. SND_SOC_DAPM_PGA_E("EAR PA", SITAR_A_RX_EAR_EN, 4, 0, NULL, 0,
  2256. sitar_ear_pa_event, SND_SOC_DAPM_POST_PMU |
  2257. SND_SOC_DAPM_POST_PMD),
  2258. SND_SOC_DAPM_MIXER("DAC1", SITAR_A_RX_EAR_EN, 6, 0, dac1_switch,
  2259. ARRAY_SIZE(dac1_switch)),
  2260. SND_SOC_DAPM_SUPPLY("EAR DRIVER", SITAR_A_RX_EAR_EN, 3, 0, NULL, 0),
  2261. SND_SOC_DAPM_AIF_IN_E("AIF1 PB", "AIF1 Playback", 0, SND_SOC_NOPM,
  2262. AIF1_PB, 0, sitar_codec_enable_slimrx,
  2263. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2264. SND_SOC_DAPM_MUX("SLIM RX1 MUX", SND_SOC_NOPM, SITAR_RX1, 0,
  2265. &sitar_aif_pb_mux[SITAR_RX1]),
  2266. SND_SOC_DAPM_MUX("SLIM RX2 MUX", SND_SOC_NOPM, SITAR_RX2, 0,
  2267. &sitar_aif_pb_mux[SITAR_RX2]),
  2268. SND_SOC_DAPM_MUX("SLIM RX3 MUX", SND_SOC_NOPM, SITAR_RX3, 0,
  2269. &sitar_aif_pb_mux[SITAR_RX3]),
  2270. SND_SOC_DAPM_MUX("SLIM RX4 MUX", SND_SOC_NOPM, SITAR_RX4, 0,
  2271. &sitar_aif_pb_mux[SITAR_RX4]),
  2272. SND_SOC_DAPM_MUX("SLIM RX5 MUX", SND_SOC_NOPM, SITAR_RX5, 0,
  2273. &sitar_aif_pb_mux[SITAR_RX5]),
  2274. SND_SOC_DAPM_MIXER("SLIM RX1", SND_SOC_NOPM, 0, 0, NULL, 0),
  2275. SND_SOC_DAPM_MIXER("SLIM RX2", SND_SOC_NOPM, 0, 0, NULL, 0),
  2276. SND_SOC_DAPM_MIXER("SLIM RX3", SND_SOC_NOPM, 0, 0, NULL, 0),
  2277. SND_SOC_DAPM_MIXER("SLIM RX4", SND_SOC_NOPM, 0, 0, NULL, 0),
  2278. SND_SOC_DAPM_MIXER("SLIM RX5", SND_SOC_NOPM, 0, 0, NULL, 0),
  2279. /* Headphone */
  2280. SND_SOC_DAPM_OUTPUT("HEADPHONE"),
  2281. SND_SOC_DAPM_PGA_E("HPHL", SITAR_A_RX_HPH_CNP_EN, 5, 0, NULL, 0,
  2282. sitar_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
  2283. SND_SOC_DAPM_POST_PMD),
  2284. SND_SOC_DAPM_PGA_E("HPHR", SITAR_A_RX_HPH_CNP_EN, 4, 0, NULL, 0,
  2285. sitar_hph_pa_event, SND_SOC_DAPM_PRE_PMU |
  2286. SND_SOC_DAPM_POST_PMD),
  2287. SND_SOC_DAPM_DAC_E("HPHL DAC", NULL, SITAR_A_RX_HPH_L_DAC_CTL, 7, 0,
  2288. sitar_hph_dac_event,
  2289. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2290. SND_SOC_DAPM_DAC_E("HPHR DAC", NULL, SITAR_A_RX_HPH_R_DAC_CTL, 7, 0,
  2291. sitar_hph_dac_event,
  2292. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2293. /* Speaker */
  2294. SND_SOC_DAPM_OUTPUT("LINEOUT1"),
  2295. SND_SOC_DAPM_OUTPUT("LINEOUT2"),
  2296. SND_SOC_DAPM_DAC_E("LINEOUT1 DAC", NULL, SITAR_A_RX_LINE_1_DAC_CTL, 7, 0
  2297. , sitar_lineout_dac_event,
  2298. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2299. SND_SOC_DAPM_DAC_E("LINEOUT2 DAC", NULL, SITAR_A_RX_LINE_2_DAC_CTL, 7, 0
  2300. , sitar_lineout_dac_event,
  2301. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  2302. SND_SOC_DAPM_PGA_E("LINEOUT1 PA", SITAR_A_RX_LINE_CNP_EN, 0, 0, NULL,
  2303. 0, sitar_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
  2304. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2305. SND_SOC_DAPM_PGA_E("LINEOUT2 PA", SITAR_A_RX_LINE_CNP_EN, 1, 0, NULL,
  2306. 0, sitar_codec_enable_lineout, SND_SOC_DAPM_PRE_PMU |
  2307. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2308. SND_SOC_DAPM_MIXER_E("RX1 MIX1", SITAR_A_CDC_CLK_RX_B1_CTL, 0, 0, NULL,
  2309. 0, sitar_codec_reset_interpolator,
  2310. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
  2311. SND_SOC_DAPM_MIXER_E("RX2 MIX1", SITAR_A_CDC_CLK_RX_B1_CTL, 1, 0, NULL,
  2312. 0, sitar_codec_reset_interpolator,
  2313. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
  2314. SND_SOC_DAPM_MIXER_E("RX3 MIX1", SITAR_A_CDC_CLK_RX_B1_CTL, 2, 0, NULL,
  2315. 0, sitar_codec_reset_interpolator,
  2316. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
  2317. SND_SOC_DAPM_MUX("DAC1 MUX", SND_SOC_NOPM, 0, 0,
  2318. &rx_dac1_mux),
  2319. SND_SOC_DAPM_MUX("DAC2 MUX", SND_SOC_NOPM, 0, 0,
  2320. &rx_dac2_mux),
  2321. SND_SOC_DAPM_MUX("DAC3 MUX", SND_SOC_NOPM, 0, 0,
  2322. &rx_dac3_mux),
  2323. SND_SOC_DAPM_MUX("DAC4 MUX", SND_SOC_NOPM, 0, 0,
  2324. &rx_dac4_mux),
  2325. SND_SOC_DAPM_MIXER_E("RX1 CHAIN", SND_SOC_NOPM, 0, 0, NULL,
  2326. 0, sitar_codec_dem_input_selection,
  2327. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
  2328. SND_SOC_DAPM_MIXER_E("RX2 CHAIN", SND_SOC_NOPM, 1, 0, NULL,
  2329. 0, sitar_codec_dem_input_selection,
  2330. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
  2331. SND_SOC_DAPM_MIXER_E("RX3 CHAIN", SND_SOC_NOPM, 2, 0, NULL,
  2332. 0, sitar_codec_dem_input_selection,
  2333. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_POST_PMD),
  2334. SND_SOC_DAPM_MUX("RX1 MIX1 INP1", SND_SOC_NOPM, 0, 0,
  2335. &rx_mix1_inp1_mux),
  2336. SND_SOC_DAPM_MUX("RX1 MIX1 INP2", SND_SOC_NOPM, 0, 0,
  2337. &rx_mix1_inp2_mux),
  2338. SND_SOC_DAPM_MUX("RX2 MIX1 INP1", SND_SOC_NOPM, 0, 0,
  2339. &rx2_mix1_inp1_mux),
  2340. SND_SOC_DAPM_MUX("RX2 MIX1 INP2", SND_SOC_NOPM, 0, 0,
  2341. &rx2_mix1_inp2_mux),
  2342. SND_SOC_DAPM_MUX("RX3 MIX1 INP1", SND_SOC_NOPM, 0, 0,
  2343. &rx3_mix1_inp1_mux),
  2344. SND_SOC_DAPM_MUX("RX3 MIX1 INP2", SND_SOC_NOPM, 0, 0,
  2345. &rx3_mix1_inp2_mux),
  2346. SND_SOC_DAPM_SUPPLY("CP", SITAR_A_CP_EN, 0, 0,
  2347. sitar_codec_enable_charge_pump, SND_SOC_DAPM_POST_PMU |
  2348. SND_SOC_DAPM_PRE_PMD),
  2349. SND_SOC_DAPM_SUPPLY("RX_BIAS", SND_SOC_NOPM, 0, 0,
  2350. sitar_codec_enable_rx_bias, SND_SOC_DAPM_PRE_PMU |
  2351. SND_SOC_DAPM_POST_PMD),
  2352. SND_SOC_DAPM_SUPPLY("LDO_H", SITAR_A_LDO_H_MODE_1, 7, 0,
  2353. sitar_codec_enable_ldo_h, SND_SOC_DAPM_POST_PMU),
  2354. /* TX */
  2355. SND_SOC_DAPM_SUPPLY("CDC_CONN", SITAR_A_CDC_CLK_OTHR_CTL, 2, 0, NULL,
  2356. 0),
  2357. SND_SOC_DAPM_INPUT("AMIC1"),
  2358. SND_SOC_DAPM_INPUT("AMIC2"),
  2359. SND_SOC_DAPM_INPUT("AMIC3"),
  2360. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 External", SITAR_A_MICB_1_CTL, 7, 0,
  2361. sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
  2362. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2363. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1 Internal1", SITAR_A_MICB_1_CTL, 7, 0,
  2364. sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
  2365. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2366. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 External", SITAR_A_MICB_2_CTL, 7, 0,
  2367. sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
  2368. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2369. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal1", SITAR_A_MICB_2_CTL, 7, 0,
  2370. sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
  2371. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2372. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2 Internal2", SITAR_A_MICB_2_CTL, 7, 0,
  2373. sitar_codec_enable_micbias, SND_SOC_DAPM_PRE_PMU |
  2374. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2375. SND_SOC_DAPM_ADC_E("ADC1", NULL, SITAR_A_TX_1_2_EN, 7, 0,
  2376. sitar_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
  2377. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2378. SND_SOC_DAPM_ADC_E("ADC2", NULL, SITAR_A_TX_1_2_EN, 3, 0,
  2379. sitar_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
  2380. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2381. SND_SOC_DAPM_ADC_E("ADC3", NULL, SITAR_A_TX_3_EN, 7, 0,
  2382. sitar_codec_enable_adc, SND_SOC_DAPM_PRE_PMU |
  2383. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2384. SND_SOC_DAPM_MUX_E("DEC1 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0, 0,
  2385. &dec1_mux, sitar_codec_enable_dec,
  2386. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2387. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2388. SND_SOC_DAPM_MUX_E("DEC2 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 1, 0,
  2389. &dec2_mux, sitar_codec_enable_dec,
  2390. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2391. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2392. SND_SOC_DAPM_MUX_E("DEC3 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 2, 0,
  2393. &dec3_mux, sitar_codec_enable_dec,
  2394. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2395. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2396. SND_SOC_DAPM_MUX_E("DEC4 MUX", SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 3, 0,
  2397. &dec4_mux, sitar_codec_enable_dec,
  2398. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  2399. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2400. SND_SOC_DAPM_MUX("ANC1 MUX", SND_SOC_NOPM, 0, 0, &anc1_mux),
  2401. SND_SOC_DAPM_MUX("ANC2 MUX", SND_SOC_NOPM, 0, 0, &anc2_mux),
  2402. SND_SOC_DAPM_MIXER_E("ANC", SND_SOC_NOPM, 0, 0, NULL, 0,
  2403. sitar_codec_enable_anc, SND_SOC_DAPM_PRE_PMU |
  2404. SND_SOC_DAPM_POST_PMD),
  2405. SND_SOC_DAPM_MUX("ANC1 FB MUX", SND_SOC_NOPM, 0, 0, &anc1_fb_mux),
  2406. SND_SOC_DAPM_AIF_OUT_E("AIF1 CAP", "AIF1 Capture", 0, SND_SOC_NOPM,
  2407. AIF1_CAP, 0, sitar_codec_enable_slimtx,
  2408. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2409. SND_SOC_DAPM_MIXER("AIF1_CAP Mixer", SND_SOC_NOPM, AIF1_CAP, 0,
  2410. sitar_aif_cap_mixer, ARRAY_SIZE(sitar_aif_cap_mixer)),
  2411. SND_SOC_DAPM_MUX("SLIM TX1 MUX", SND_SOC_NOPM, SITAR_TX1, 0,
  2412. &sb_tx1_mux),
  2413. SND_SOC_DAPM_MUX("SLIM TX2 MUX", SND_SOC_NOPM, SITAR_TX2, 0,
  2414. &sb_tx2_mux),
  2415. SND_SOC_DAPM_MUX("SLIM TX3 MUX", SND_SOC_NOPM, SITAR_TX3, 0,
  2416. &sb_tx3_mux),
  2417. SND_SOC_DAPM_MUX("SLIM TX4 MUX", SND_SOC_NOPM, SITAR_TX3, 0,
  2418. &sb_tx4_mux),
  2419. SND_SOC_DAPM_MUX("SLIM TX5 MUX", SND_SOC_NOPM, SITAR_TX3, 0,
  2420. &sb_tx5_mux),
  2421. SND_SOC_DAPM_AIF_OUT_E("SLIM TX5", "AIF1 Capture", 0, SND_SOC_NOPM, 0,
  2422. 0, sitar_codec_enable_slimtx,
  2423. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2424. /* Digital Mic Inputs */
  2425. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  2426. sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
  2427. SND_SOC_DAPM_POST_PMD),
  2428. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
  2429. sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
  2430. SND_SOC_DAPM_POST_PMD),
  2431. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
  2432. sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
  2433. SND_SOC_DAPM_POST_PMD),
  2434. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
  2435. sitar_codec_enable_dmic, SND_SOC_DAPM_PRE_PMU |
  2436. SND_SOC_DAPM_POST_PMD),
  2437. SND_SOC_DAPM_SUPPLY("COMP1_CLK", SND_SOC_NOPM, COMPANDER_1, 0,
  2438. sitar_config_compander, SND_SOC_DAPM_PRE_PMU |
  2439. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2440. SND_SOC_DAPM_SUPPLY("COMP2_CLK", SND_SOC_NOPM, COMPANDER_2, 0,
  2441. sitar_config_compander, SND_SOC_DAPM_PRE_PMU |
  2442. SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
  2443. /* Sidetone */
  2444. SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
  2445. SND_SOC_DAPM_PGA("IIR1", SITAR_A_CDC_CLK_SD_CTL, 0, 0, NULL, 0),
  2446. SND_SOC_DAPM_MUX("IIR2 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir2_inp1_mux),
  2447. SND_SOC_DAPM_PGA("IIR2", SITAR_A_CDC_CLK_SD_CTL, 1, 0, NULL, 0),
  2448. };
  2449. static const struct snd_soc_dapm_route audio_i2s_map[] = {
  2450. {"RX_I2S_CLK", NULL, "CP"},
  2451. {"RX_I2S_CLK", NULL, "CDC_CONN"},
  2452. {"SLIM RX1", NULL, "RX_I2S_CLK"},
  2453. {"SLIM RX2", NULL, "RX_I2S_CLK"},
  2454. {"SLIM RX3", NULL, "RX_I2S_CLK"},
  2455. {"SLIM RX4", NULL, "RX_I2S_CLK"},
  2456. {"SLIM TX1", NULL, "TX_I2S_CLK"},
  2457. {"SLIM TX2", NULL, "TX_I2S_CLK"},
  2458. {"SLIM TX3", NULL, "TX_I2S_CLK"},
  2459. {"SLIM TX4", NULL, "TX_I2S_CLK"},
  2460. };
  2461. #define SLIM_MIXER(x) (\
  2462. {x, "SLIM TX1", "SLIM TX1 MUX"}, \
  2463. {x, "SLIM TX2", "SLIM TX2 MUX"}, \
  2464. {x, "SLIM TX3", "SLIM TX3 MUX"}, \
  2465. {x, "SLIM TX4", "SLIM TX4 MUX"})
  2466. #define SLIM_MUX(x, y) (\
  2467. {"SLIM RX1 MUX", x, y}, \
  2468. {"SLIM RX2 MUX", x, y}, \
  2469. {"SLIM RX3 MUX", x, y}, \
  2470. {"SLIM RX4 MUX", x, y})
  2471. static const struct snd_soc_dapm_route audio_map[] = {
  2472. /* Earpiece (RX MIX1) */
  2473. {"EAR", NULL, "EAR PA"},
  2474. {"EAR PA", "NULL", "DAC1"},
  2475. {"DAC1", "Switch", "DAC1 MUX"},
  2476. {"DAC1", NULL, "CP"},
  2477. {"DAC1", NULL, "EAR DRIVER"},
  2478. {"CP", NULL, "RX_BIAS"},
  2479. {"LINEOUT1 DAC", NULL, "RX_BIAS"},
  2480. {"LINEOUT2 DAC", NULL, "RX_BIAS"},
  2481. {"LINEOUT2", NULL, "LINEOUT2 PA"},
  2482. {"LINEOUT2 PA", NULL, "CP"},
  2483. {"LINEOUT2 PA", NULL, "LINEOUT2 DAC"},
  2484. {"LINEOUT2 DAC", NULL, "DAC3 MUX"},
  2485. {"LINEOUT1", NULL, "LINEOUT1 PA"},
  2486. {"LINEOUT2 PA", NULL, "CP"},
  2487. {"LINEOUT1 PA", NULL, "LINEOUT1 DAC"},
  2488. {"LINEOUT1 DAC", NULL, "DAC2 MUX"},
  2489. {"ANC1 FB MUX", "EAR_HPH_L", "RX2 MIX1"},
  2490. {"ANC1 FB MUX", "EAR_LINE_1", "RX3 MIX1"},
  2491. {"ANC", NULL, "ANC1 FB MUX"},
  2492. /* Headset (RX MIX1 and RX MIX2) */
  2493. {"HEADPHONE", NULL, "HPHL"},
  2494. {"HEADPHONE", NULL, "HPHR"},
  2495. {"HPHL DAC", NULL, "CP"},
  2496. {"HPHR DAC", NULL, "CP"},
  2497. {"HPHL", NULL, "HPHL DAC"},
  2498. {"HPHL DAC", "NULL", "RX2 CHAIN"},
  2499. {"RX2 CHAIN", NULL, "DAC4 MUX"},
  2500. {"HPHR", NULL, "HPHR DAC"},
  2501. {"HPHR DAC", NULL, "RX3 CHAIN"},
  2502. {"RX3 CHAIN", NULL, "RX3 MIX1"},
  2503. {"DAC1 MUX", "RX1", "RX1 CHAIN"},
  2504. {"DAC2 MUX", "RX1", "RX1 CHAIN"},
  2505. {"DAC3 MUX", "RX1", "RX1 CHAIN"},
  2506. {"DAC3 MUX", "INV_RX1", "RX1 CHAIN"},
  2507. {"DAC3 MUX", "RX2", "RX2 MIX1"},
  2508. {"DAC4 MUX", "ON", "RX2 MIX1"},
  2509. {"RX1 CHAIN", NULL, "RX1 MIX1"},
  2510. {"RX1 MIX1", NULL, "RX1 MIX1 INP1"},
  2511. {"RX1 MIX1", NULL, "RX1 MIX1 INP2"},
  2512. {"RX2 MIX1", NULL, "RX2 MIX1 INP1"},
  2513. {"RX2 MIX1", NULL, "RX2 MIX1 INP2"},
  2514. {"RX3 MIX1", NULL, "RX3 MIX1 INP1"},
  2515. {"RX3 MIX1", NULL, "RX3 MIX1 INP2"},
  2516. /* ANC */
  2517. {"ANC", NULL, "ANC1 MUX"},
  2518. {"ANC", NULL, "ANC2 MUX"},
  2519. {"ANC1 MUX", "ADC1", "ADC1"},
  2520. {"ANC1 MUX", "ADC2", "ADC2"},
  2521. {"ANC1 MUX", "ADC3", "ADC3"},
  2522. {"ANC2 MUX", "ADC1", "ADC1"},
  2523. {"ANC2 MUX", "ADC2", "ADC2"},
  2524. {"ANC2 MUX", "ADC3", "ADC3"},
  2525. {"ANC", NULL, "CDC_CONN"},
  2526. {"RX2 MIX1", NULL, "ANC"},
  2527. {"RX3 MIX1", NULL, "ANC"},
  2528. /* SLIMBUS Connections */
  2529. {"AIF1 CAP", NULL, "AIF1_CAP Mixer"},
  2530. /* SLIM_MIXER("AIF1_CAP Mixer"),*/
  2531. {"AIF1_CAP Mixer", "SLIM TX1", "SLIM TX1 MUX"},
  2532. {"AIF1_CAP Mixer", "SLIM TX2", "SLIM TX2 MUX"},
  2533. {"AIF1_CAP Mixer", "SLIM TX3", "SLIM TX3 MUX"},
  2534. {"AIF1_CAP Mixer", "SLIM TX4", "SLIM TX4 MUX"},
  2535. /* SLIM_MUX("AIF1_PB", "AIF1 PB"), */
  2536. {"SLIM RX1 MUX", "AIF1_PB", "AIF1 PB"},
  2537. {"SLIM RX2 MUX", "AIF1_PB", "AIF1 PB"},
  2538. {"SLIM RX3 MUX", "AIF1_PB", "AIF1 PB"},
  2539. {"SLIM RX4 MUX", "AIF1_PB", "AIF1 PB"},
  2540. {"SLIM RX1", NULL, "SLIM RX1 MUX"},
  2541. {"SLIM RX2", NULL, "SLIM RX2 MUX"},
  2542. {"SLIM RX3", NULL, "SLIM RX3 MUX"},
  2543. {"SLIM RX4", NULL, "SLIM RX4 MUX"},
  2544. {"RX1 MIX1", NULL, "COMP2_CLK"},
  2545. {"RX2 MIX1", NULL, "COMP1_CLK"},
  2546. {"RX3 MIX1", NULL, "COMP1_CLK"},
  2547. /* Slimbus port 5 is non functional in Sitar 1.0 */
  2548. {"RX1 MIX1 INP1", "RX1", "SLIM RX1"},
  2549. {"RX1 MIX1 INP1", "RX2", "SLIM RX2"},
  2550. {"RX1 MIX1 INP1", "RX3", "SLIM RX3"},
  2551. {"RX1 MIX1 INP1", "RX4", "SLIM RX4"},
  2552. {"RX1 MIX1 INP1", "IIR1", "IIR1"},
  2553. {"RX1 MIX1 INP1", "IIR2", "IIR2"},
  2554. {"RX1 MIX1 INP2", "RX1", "SLIM RX1"},
  2555. {"RX1 MIX1 INP2", "RX2", "SLIM RX2"},
  2556. {"RX1 MIX1 INP2", "RX3", "SLIM RX3"},
  2557. {"RX1 MIX1 INP2", "RX4", "SLIM RX4"},
  2558. {"RX1 MIX1 INP2", "IIR1", "IIR1"},
  2559. {"RX1 MIX1 INP2", "IIR2", "IIR2"},
  2560. {"RX2 MIX1 INP1", "RX1", "SLIM RX1"},
  2561. {"RX2 MIX1 INP1", "RX2", "SLIM RX2"},
  2562. {"RX2 MIX1 INP1", "RX3", "SLIM RX3"},
  2563. {"RX2 MIX1 INP1", "RX4", "SLIM RX4"},
  2564. {"RX2 MIX1 INP1", "IIR1", "IIR1"},
  2565. {"RX2 MIX1 INP1", "IIR2", "IIR2"},
  2566. {"RX2 MIX1 INP2", "RX1", "SLIM RX1"},
  2567. {"RX2 MIX1 INP2", "RX2", "SLIM RX2"},
  2568. {"RX2 MIX1 INP2", "RX3", "SLIM RX3"},
  2569. {"RX2 MIX1 INP2", "RX4", "SLIM RX4"},
  2570. {"RX2 MIX1 INP2", "IIR1", "IIR1"},
  2571. {"RX2 MIX1 INP2", "IIR2", "IIR2"},
  2572. {"RX3 MIX1 INP1", "RX1", "SLIM RX1"},
  2573. {"RX3 MIX1 INP1", "RX2", "SLIM RX2"},
  2574. {"RX3 MIX1 INP1", "RX3", "SLIM RX3"},
  2575. {"RX3 MIX1 INP1", "RX4", "SLIM RX4"},
  2576. {"RX3 MIX1 INP1", "IIR1", "IIR1"},
  2577. {"RX3 MIX1 INP1", "IIR2", "IIR2"},
  2578. {"RX3 MIX1 INP2", "RX1", "SLIM RX1"},
  2579. {"RX3 MIX1 INP2", "RX2", "SLIM RX2"},
  2580. {"RX3 MIX1 INP2", "RX3", "SLIM RX3"},
  2581. {"RX3 MIX1 INP2", "RX4", "SLIM RX4"},
  2582. {"RX3 MIX1 INP2", "IIR1", "IIR1"},
  2583. {"RX3 MIX1 INP2", "IIR2", "IIR2"},
  2584. /* TX */
  2585. {"SLIM TX1 MUX", "DEC1", "DEC1 MUX"},
  2586. {"SLIM TX2 MUX", "DEC2", "DEC2 MUX"},
  2587. {"SLIM TX3 MUX", "DEC3", "DEC3 MUX"},
  2588. {"SLIM TX4 MUX", "DEC4", "DEC4 MUX"},
  2589. {"SLIM TX5 MUX", "DEC1", "DEC1 MUX"},
  2590. {"SLIM TX5 MUX", "DEC2", "DEC2 MUX"},
  2591. {"SLIM TX5 MUX", "DEC3", "DEC3 MUX"},
  2592. {"SLIM TX5 MUX", "DEC4", "DEC4 MUX"},
  2593. /* Decimator Inputs */
  2594. {"DEC1 MUX", "DMIC1", "DMIC1"},
  2595. {"DEC1 MUX", "DMIC4", "DMIC4"},
  2596. {"DEC1 MUX", "ADC1", "ADC1"},
  2597. {"DEC1 MUX", "ADC2", "ADC2"},
  2598. {"DEC1 MUX", "ADC3", "ADC3"},
  2599. {"DEC1 MUX", NULL, "CDC_CONN"},
  2600. {"DEC2 MUX", "DMIC2", "DMIC2"},
  2601. {"DEC2 MUX", "DMIC3", "DMIC3"},
  2602. {"DEC2 MUX", "ADC1", "ADC1"},
  2603. {"DEC2 MUX", "ADC2", "ADC2"},
  2604. {"DEC2 MUX", "ADC3", "ADC3"},
  2605. {"DEC2 MUX", NULL, "CDC_CONN"},
  2606. {"DEC3 MUX", "DMIC3", "DMIC3"},
  2607. {"DEC3 MUX", "ADC1", "ADC1"},
  2608. {"DEC3 MUX", "ADC2", "ADC2"},
  2609. {"DEC3 MUX", "ADC3", "ADC3"},
  2610. {"DEC3 MUX", "DMIC2", "DMIC2"},
  2611. {"DEC3 MUX", "DMIC4", "DMIC4"},
  2612. {"DEC3 MUX", NULL, "CDC_CONN"},
  2613. {"DEC4 MUX", "DMIC4", "DMIC4"},
  2614. {"DEC4 MUX", "ADC1", "ADC1"},
  2615. {"DEC4 MUX", "ADC2", "ADC2"},
  2616. {"DEC4 MUX", "ADC3", "ADC3"},
  2617. {"DEC4 MUX", "DMIC3", "DMIC3"},
  2618. {"DEC4 MUX", "DMIC2", "DMIC2"},
  2619. {"DEC4 MUX", "DMIC1", "DMIC1"},
  2620. {"DEC4 MUX", NULL, "CDC_CONN"},
  2621. /* ADC Connections */
  2622. {"ADC1", NULL, "AMIC1"},
  2623. {"ADC2", NULL, "AMIC2"},
  2624. {"ADC3", NULL, "AMIC3"},
  2625. /* IIR */
  2626. {"IIR1", NULL, "IIR1 INP1 MUX"},
  2627. {"IIR1 INP1 MUX", "DEC1", "DEC1 MUX"},
  2628. {"IIR1 INP1 MUX", "DEC2", "DEC2 MUX"},
  2629. {"IIR1 INP1 MUX", "DEC3", "DEC3 MUX"},
  2630. {"IIR1 INP1 MUX", "DEC4", "DEC4 MUX"},
  2631. {"IIR1 INP1 MUX", "RX1", "SLIM RX1"},
  2632. {"IIR1 INP1 MUX", "RX2", "SLIM RX2"},
  2633. {"IIR1 INP1 MUX", "RX3", "SLIM RX3"},
  2634. {"IIR1 INP1 MUX", "RX4", "SLIM RX4"},
  2635. {"IIR1 INP1 MUX", "RX5", "SLIM RX5"},
  2636. {"IIR2", NULL, "IIR2 INP1 MUX"},
  2637. {"IIR2 INP1 MUX", "DEC1", "DEC1 MUX"},
  2638. {"IIR2 INP1 MUX", "DEC2", "DEC2 MUX"},
  2639. {"IIR2 INP1 MUX", "DEC3", "DEC3 MUX"},
  2640. {"IIR2 INP1 MUX", "DEC4", "DEC4 MUX"},
  2641. {"IIR2 INP1 MUX", "RX1", "SLIM RX1"},
  2642. {"IIR2 INP1 MUX", "RX2", "SLIM RX2"},
  2643. {"IIR2 INP1 MUX", "RX3", "SLIM RX3"},
  2644. {"IIR2 INP1 MUX", "RX4", "SLIM RX4"},
  2645. {"IIR2 INP1 MUX", "RX5", "SLIM RX5"},
  2646. {"MIC BIAS1 Internal1", NULL, "LDO_H"},
  2647. {"MIC BIAS1 External", NULL, "LDO_H"},
  2648. {"MIC BIAS2 Internal1", NULL, "LDO_H"},
  2649. {"MIC BIAS2 External", NULL, "LDO_H"},
  2650. };
  2651. static int sitar_readable(struct snd_soc_codec *ssc, unsigned int reg)
  2652. {
  2653. return sitar_reg_readable[reg];
  2654. }
  2655. static int sitar_volatile(struct snd_soc_codec *ssc, unsigned int reg)
  2656. {
  2657. int i;
  2658. /* Registers lower than 0x100 are top level registers which can be
  2659. * written by the Sitar core driver.
  2660. */
  2661. if ((reg >= SITAR_A_CDC_MBHC_EN_CTL) || (reg < 0x100))
  2662. return 1;
  2663. /* IIR Coeff registers are not cacheable */
  2664. if ((reg >= SITAR_A_CDC_IIR1_COEF_B1_CTL) &&
  2665. (reg <= SITAR_A_CDC_IIR1_COEF_B5_CTL))
  2666. return 1;
  2667. for (i = 0; i < NUM_DECIMATORS; i++) {
  2668. if (reg == SITAR_A_CDC_TX1_VOL_CTL_GAIN + (8 * i))
  2669. return 1;
  2670. }
  2671. for (i = 0; i < NUM_INTERPOLATORS; i++) {
  2672. if (reg == SITAR_A_CDC_RX1_VOL_CTL_B2_CTL + (8 * i))
  2673. return 1;
  2674. }
  2675. if ((reg == SITAR_A_CDC_COMP1_SHUT_DOWN_STATUS) ||
  2676. (reg == SITAR_A_CDC_COMP2_SHUT_DOWN_STATUS))
  2677. return 1;
  2678. return 0;
  2679. }
  2680. #define SITAR_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)
  2681. static int sitar_write(struct snd_soc_codec *codec, unsigned int reg,
  2682. unsigned int value)
  2683. {
  2684. int ret;
  2685. if (reg == SND_SOC_NOPM)
  2686. return 0;
  2687. BUG_ON(reg > SITAR_MAX_REGISTER);
  2688. if (!sitar_volatile(codec, reg)) {
  2689. ret = snd_soc_cache_write(codec, reg, value);
  2690. if (ret != 0)
  2691. dev_err(codec->dev, "Cache write to %x failed: %d\n",
  2692. reg, ret);
  2693. }
  2694. return wcd9xxx_reg_write(codec->control_data, reg, value);
  2695. }
  2696. static unsigned int sitar_read(struct snd_soc_codec *codec,
  2697. unsigned int reg)
  2698. {
  2699. unsigned int val;
  2700. int ret;
  2701. if (reg == SND_SOC_NOPM)
  2702. return 0;
  2703. BUG_ON(reg > SITAR_MAX_REGISTER);
  2704. if (!sitar_volatile(codec, reg) && sitar_readable(codec, reg) &&
  2705. reg < codec->driver->reg_cache_size) {
  2706. ret = snd_soc_cache_read(codec, reg, &val);
  2707. if (ret >= 0) {
  2708. return val;
  2709. } else
  2710. dev_err(codec->dev, "Cache read from %x failed: %d\n",
  2711. reg, ret);
  2712. }
  2713. val = wcd9xxx_reg_read(codec->control_data, reg);
  2714. return val;
  2715. }
  2716. static void sitar_codec_enable_audio_mode_bandgap(struct snd_soc_codec *codec)
  2717. {
  2718. struct wcd9xxx *sitar_core = dev_get_drvdata(codec->dev->parent);
  2719. if (SITAR_IS_1P0(sitar_core->version))
  2720. snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1, 0x80, 0x80);
  2721. snd_soc_update_bits(codec, SITAR_A_BIAS_CURR_CTL_2, 0x0C, 0x08);
  2722. usleep_range(1000, 1000);
  2723. snd_soc_write(codec, SITAR_A_BIAS_REF_CTL, 0x1C);
  2724. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
  2725. 0x80);
  2726. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x04,
  2727. 0x04);
  2728. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x01,
  2729. 0x01);
  2730. usleep_range(1000, 1000);
  2731. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
  2732. 0x00);
  2733. }
  2734. static void sitar_codec_enable_bandgap(struct snd_soc_codec *codec,
  2735. enum sitar_bandgap_type choice)
  2736. {
  2737. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2738. struct wcd9xxx *sitar_core = dev_get_drvdata(codec->dev->parent);
  2739. /* TODO lock resources accessed by audio streams and threaded
  2740. * interrupt handlers
  2741. */
  2742. pr_debug("%s, choice is %d, current is %d\n", __func__, choice,
  2743. sitar->bandgap_type);
  2744. if (sitar->bandgap_type == choice)
  2745. return;
  2746. if ((sitar->bandgap_type == SITAR_BANDGAP_OFF) &&
  2747. (choice == SITAR_BANDGAP_AUDIO_MODE)) {
  2748. sitar_codec_enable_audio_mode_bandgap(codec);
  2749. } else if (choice == SITAR_BANDGAP_MBHC_MODE) {
  2750. snd_soc_update_bits(codec, SITAR_A_BIAS_CURR_CTL_2, 0x0C, 0x08);
  2751. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x2,
  2752. 0x2);
  2753. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
  2754. 0x80);
  2755. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x4,
  2756. 0x4);
  2757. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x01,
  2758. 0x1);
  2759. usleep_range(1000, 1000);
  2760. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x80,
  2761. 0x00);
  2762. } else if ((sitar->bandgap_type == SITAR_BANDGAP_MBHC_MODE) &&
  2763. (choice == SITAR_BANDGAP_AUDIO_MODE)) {
  2764. snd_soc_write(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x50);
  2765. usleep_range(100, 100);
  2766. sitar_codec_enable_audio_mode_bandgap(codec);
  2767. } else if (choice == SITAR_BANDGAP_OFF) {
  2768. snd_soc_update_bits(codec, SITAR_A_BIAS_CURR_CTL_2, 0x0C, 0x00);
  2769. snd_soc_write(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x50);
  2770. if (SITAR_IS_1P0(sitar_core->version))
  2771. snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1,
  2772. 0xF3, 0x61);
  2773. usleep_range(1000, 1000);
  2774. } else {
  2775. pr_err("%s: Error, Invalid bandgap settings\n", __func__);
  2776. }
  2777. sitar->bandgap_type = choice;
  2778. }
  2779. static int sitar_codec_enable_config_mode(struct snd_soc_codec *codec,
  2780. int enable)
  2781. {
  2782. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2783. if (enable) {
  2784. snd_soc_update_bits(codec, SITAR_A_RC_OSC_FREQ, 0x10, 0);
  2785. snd_soc_write(codec, SITAR_A_BIAS_OSC_BG_CTL, 0x17);
  2786. usleep_range(5, 5);
  2787. snd_soc_update_bits(codec, SITAR_A_RC_OSC_FREQ, 0x80,
  2788. 0x80);
  2789. snd_soc_update_bits(codec, SITAR_A_RC_OSC_TEST, 0x80,
  2790. 0x80);
  2791. usleep_range(10, 10);
  2792. snd_soc_update_bits(codec, SITAR_A_RC_OSC_TEST, 0x80, 0);
  2793. usleep_range(20, 20);
  2794. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x08, 0x08);
  2795. } else {
  2796. snd_soc_update_bits(codec, SITAR_A_BIAS_OSC_BG_CTL, 0x1,
  2797. 0);
  2798. snd_soc_update_bits(codec, SITAR_A_RC_OSC_FREQ, 0x80, 0);
  2799. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x08, 0x00);
  2800. }
  2801. sitar->config_mode_active = enable ? true : false;
  2802. return 0;
  2803. }
  2804. static int sitar_codec_enable_clock_block(struct snd_soc_codec *codec,
  2805. int config_mode)
  2806. {
  2807. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2808. pr_debug("%s\n", __func__);
  2809. if (config_mode) {
  2810. sitar_codec_enable_config_mode(codec, 1);
  2811. snd_soc_write(codec, SITAR_A_CLK_BUFF_EN2, 0x00);
  2812. snd_soc_write(codec, SITAR_A_CLK_BUFF_EN2, 0x02);
  2813. snd_soc_write(codec, SITAR_A_CLK_BUFF_EN1, 0x0D);
  2814. usleep_range(1000, 1000);
  2815. } else
  2816. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x08, 0x00);
  2817. if (!config_mode && sitar->mbhc_polling_active) {
  2818. snd_soc_write(codec, SITAR_A_CLK_BUFF_EN2, 0x02);
  2819. sitar_codec_enable_config_mode(codec, 0);
  2820. }
  2821. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x05, 0x05);
  2822. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x02, 0x00);
  2823. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x04, 0x04);
  2824. usleep_range(50, 50);
  2825. sitar->clock_active = true;
  2826. return 0;
  2827. }
  2828. static void sitar_codec_disable_clock_block(struct snd_soc_codec *codec)
  2829. {
  2830. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2831. pr_debug("%s\n", __func__);
  2832. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x04, 0x00);
  2833. ndelay(160);
  2834. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN2, 0x02, 0x02);
  2835. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x05, 0x00);
  2836. sitar->clock_active = false;
  2837. }
  2838. static int sitar_codec_mclk_index(const struct sitar_priv *sitar)
  2839. {
  2840. if (sitar->mbhc_cfg.mclk_rate == SITAR_MCLK_RATE_12288KHZ)
  2841. return 0;
  2842. else if (sitar->mbhc_cfg.mclk_rate == SITAR_MCLK_RATE_9600KHZ)
  2843. return 1;
  2844. else {
  2845. BUG_ON(1);
  2846. return -EINVAL;
  2847. }
  2848. }
  2849. static void sitar_codec_calibrate_hs_polling(struct snd_soc_codec *codec)
  2850. {
  2851. u8 *n_ready, *n_cic;
  2852. struct sitar_mbhc_btn_detect_cfg *btn_det;
  2853. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2854. btn_det = SITAR_MBHC_CAL_BTN_DET_PTR(sitar->mbhc_cfg.calibration);
  2855. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B1_CTL,
  2856. sitar->mbhc_data.v_ins_hu & 0xFF);
  2857. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B2_CTL,
  2858. (sitar->mbhc_data.v_ins_hu >> 8) & 0xFF);
  2859. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B3_CTL,
  2860. sitar->mbhc_data.v_b1_hu & 0xFF);
  2861. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B4_CTL,
  2862. (sitar->mbhc_data.v_b1_hu >> 8) & 0xFF);
  2863. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B5_CTL,
  2864. sitar->mbhc_data.v_b1_h & 0xFF);
  2865. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B6_CTL,
  2866. (sitar->mbhc_data.v_b1_h >> 8) & 0xFF);
  2867. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B9_CTL,
  2868. sitar->mbhc_data.v_brh & 0xFF);
  2869. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B10_CTL,
  2870. (sitar->mbhc_data.v_brh >> 8) & 0xFF);
  2871. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B11_CTL,
  2872. sitar->mbhc_data.v_brl & 0xFF);
  2873. snd_soc_write(codec, SITAR_A_CDC_MBHC_VOLT_B12_CTL,
  2874. (sitar->mbhc_data.v_brl >> 8) & 0xFF);
  2875. n_ready = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_N_READY);
  2876. snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B1_CTL,
  2877. n_ready[sitar_codec_mclk_index(sitar)]);
  2878. snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B2_CTL,
  2879. sitar->mbhc_data.npoll);
  2880. snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B3_CTL,
  2881. sitar->mbhc_data.nbounce_wait);
  2882. n_cic = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_N_CIC);
  2883. snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B6_CTL,
  2884. n_cic[sitar_codec_mclk_index(sitar)]);
  2885. }
  2886. static int sitar_startup(struct snd_pcm_substream *substream,
  2887. struct snd_soc_dai *dai)
  2888. {
  2889. struct wcd9xxx *wcd9xxx = dev_get_drvdata(dai->codec->dev->parent);
  2890. if ((wcd9xxx != NULL) && (wcd9xxx->dev != NULL) &&
  2891. (wcd9xxx->dev->parent != NULL))
  2892. pm_runtime_get_sync(wcd9xxx->dev->parent);
  2893. pr_debug("%s(): substream = %s stream = %d\n" , __func__,
  2894. substream->name, substream->stream);
  2895. return 0;
  2896. }
  2897. static void sitar_codec_pm_runtime_put(struct wcd9xxx *sitar)
  2898. {
  2899. if (sitar->dev != NULL &&
  2900. sitar->dev->parent != NULL) {
  2901. pm_runtime_mark_last_busy(sitar->dev->parent);
  2902. pm_runtime_put(sitar->dev->parent);
  2903. }
  2904. }
  2905. static void sitar_shutdown(struct snd_pcm_substream *substream,
  2906. struct snd_soc_dai *dai)
  2907. {
  2908. struct wcd9xxx *sitar_core = dev_get_drvdata(dai->codec->dev->parent);
  2909. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(dai->codec);
  2910. u32 active = 0;
  2911. pr_debug("%s(): substream = %s stream = %d\n" , __func__,
  2912. substream->name, substream->stream);
  2913. if (sitar->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS)
  2914. return;
  2915. if (dai->id <= NUM_CODEC_DAIS) {
  2916. if (sitar->dai[dai->id].ch_mask) {
  2917. active = 1;
  2918. pr_debug("%s(): Codec DAI: chmask[%d] = 0x%lx\n",
  2919. __func__, dai->id,
  2920. sitar->dai[dai->id].ch_mask);
  2921. }
  2922. }
  2923. if (sitar_core != NULL && active == 0)
  2924. sitar_codec_pm_runtime_put(sitar_core);
  2925. }
  2926. int sitar_mclk_enable(struct snd_soc_codec *codec, int mclk_enable, bool dapm)
  2927. {
  2928. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  2929. pr_debug("%s() mclk_enable = %u\n", __func__, mclk_enable);
  2930. if (dapm)
  2931. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  2932. if (mclk_enable) {
  2933. sitar->mclk_enabled = true;
  2934. if (sitar->mbhc_polling_active && (sitar->mclk_enabled)) {
  2935. sitar_codec_pause_hs_polling(codec);
  2936. sitar_codec_enable_bandgap(codec,
  2937. SITAR_BANDGAP_AUDIO_MODE);
  2938. sitar_codec_enable_clock_block(codec, 0);
  2939. sitar_codec_calibrate_hs_polling(codec);
  2940. sitar_codec_start_hs_polling(codec);
  2941. } else {
  2942. sitar_codec_enable_bandgap(codec,
  2943. SITAR_BANDGAP_AUDIO_MODE);
  2944. sitar_codec_enable_clock_block(codec, 0);
  2945. }
  2946. } else {
  2947. if (!sitar->mclk_enabled) {
  2948. if (dapm)
  2949. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  2950. pr_err("Error, MCLK already diabled\n");
  2951. return -EINVAL;
  2952. }
  2953. sitar->mclk_enabled = false;
  2954. if (sitar->mbhc_polling_active) {
  2955. if (!sitar->mclk_enabled) {
  2956. sitar_codec_pause_hs_polling(codec);
  2957. sitar_codec_enable_bandgap(codec,
  2958. SITAR_BANDGAP_MBHC_MODE);
  2959. sitar_enable_rx_bias(codec, 1);
  2960. sitar_codec_enable_clock_block(codec, 1);
  2961. sitar_codec_calibrate_hs_polling(codec);
  2962. sitar_codec_start_hs_polling(codec);
  2963. }
  2964. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1,
  2965. 0x05, 0x01);
  2966. } else {
  2967. sitar_codec_disable_clock_block(codec);
  2968. sitar_codec_enable_bandgap(codec,
  2969. SITAR_BANDGAP_OFF);
  2970. }
  2971. }
  2972. if (dapm)
  2973. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  2974. return 0;
  2975. }
  2976. static int sitar_set_dai_sysclk(struct snd_soc_dai *dai,
  2977. int clk_id, unsigned int freq, int dir)
  2978. {
  2979. pr_debug("%s\n", __func__);
  2980. return 0;
  2981. }
  2982. static int sitar_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
  2983. {
  2984. u8 val = 0;
  2985. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(dai->codec);
  2986. pr_debug("%s\n", __func__);
  2987. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  2988. case SND_SOC_DAIFMT_CBS_CFS:
  2989. /* CPU is master */
  2990. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
  2991. if (dai->id == AIF1_CAP)
  2992. snd_soc_update_bits(dai->codec,
  2993. SITAR_A_CDC_CLK_TX_I2S_CTL,
  2994. SITAR_I2S_MASTER_MODE_MASK, 0);
  2995. else if (dai->id == AIF1_PB)
  2996. snd_soc_update_bits(dai->codec,
  2997. SITAR_A_CDC_CLK_RX_I2S_CTL,
  2998. SITAR_I2S_MASTER_MODE_MASK, 0);
  2999. }
  3000. break;
  3001. case SND_SOC_DAIFMT_CBM_CFM:
  3002. /* CPU is slave */
  3003. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
  3004. val = SITAR_I2S_MASTER_MODE_MASK;
  3005. if (dai->id == AIF1_CAP)
  3006. snd_soc_update_bits(dai->codec,
  3007. SITAR_A_CDC_CLK_TX_I2S_CTL, val, val);
  3008. else if (dai->id == AIF1_PB)
  3009. snd_soc_update_bits(dai->codec,
  3010. SITAR_A_CDC_CLK_RX_I2S_CTL, val, val);
  3011. }
  3012. break;
  3013. default:
  3014. return -EINVAL;
  3015. }
  3016. return 0;
  3017. }
  3018. static int sitar_set_channel_map(struct snd_soc_dai *dai,
  3019. unsigned int tx_num, unsigned int *tx_slot,
  3020. unsigned int rx_num, unsigned int *rx_slot)
  3021. {
  3022. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(dai->codec);
  3023. struct wcd9xxx *core = dev_get_drvdata(dai->codec->dev->parent);
  3024. if (!tx_slot && !rx_slot) {
  3025. pr_err("%s: Invalid\n", __func__);
  3026. return -EINVAL;
  3027. }
  3028. pr_debug("%s: DAI-ID %x %d %d\n", __func__, dai->id, tx_num, rx_num);
  3029. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
  3030. wcd9xxx_init_slimslave(core, core->slim->laddr,
  3031. tx_num, tx_slot, rx_num, rx_slot);
  3032. return 0;
  3033. }
  3034. static int sitar_get_channel_map(struct snd_soc_dai *dai,
  3035. unsigned int *tx_num, unsigned int *tx_slot,
  3036. unsigned int *rx_num, unsigned int *rx_slot)
  3037. {
  3038. struct sitar_priv *sitar_p = snd_soc_codec_get_drvdata(dai->codec);
  3039. u32 i = 0;
  3040. struct wcd9xxx_ch *ch;
  3041. switch (dai->id) {
  3042. case AIF1_PB:
  3043. if (!rx_slot || !rx_num) {
  3044. pr_err("%s: Invalid rx_slot 0x%x or rx_num 0x%x\n",
  3045. __func__, (u32) rx_slot, (u32) rx_num);
  3046. return -EINVAL;
  3047. }
  3048. list_for_each_entry(ch, &sitar_p->dai[dai->id].wcd9xxx_ch_list,
  3049. list) {
  3050. rx_slot[i++] = ch->ch_num;
  3051. }
  3052. *rx_num = i;
  3053. break;
  3054. case AIF1_CAP:
  3055. if (!tx_slot || !tx_num) {
  3056. pr_err("%s: Invalid tx_slot 0x%x or tx_num 0x%x\n",
  3057. __func__, (u32) tx_slot, (u32) tx_num);
  3058. return -EINVAL;
  3059. }
  3060. list_for_each_entry(ch, &sitar_p->dai[dai->id].wcd9xxx_ch_list,
  3061. list) {
  3062. tx_slot[i++] = ch->ch_num;
  3063. }
  3064. *tx_num = i;
  3065. break;
  3066. default:
  3067. pr_err("%s: Invalid dai %d", __func__, dai->id);
  3068. return -EINVAL;
  3069. }
  3070. return 0;
  3071. }
  3072. static int sitar_hw_params(struct snd_pcm_substream *substream,
  3073. struct snd_pcm_hw_params *params,
  3074. struct snd_soc_dai *dai)
  3075. {
  3076. struct snd_soc_codec *codec = dai->codec;
  3077. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(dai->codec);
  3078. u8 path, shift;
  3079. u32 compander_fs;
  3080. u16 tx_fs_reg, rx_fs_reg;
  3081. u8 tx_fs_rate, rx_fs_rate, rx_state, tx_state;
  3082. pr_debug("%s: DAI-ID %x\n", __func__, dai->id);
  3083. switch (params_rate(params)) {
  3084. case 8000:
  3085. tx_fs_rate = 0x00;
  3086. rx_fs_rate = 0x00;
  3087. compander_fs = COMPANDER_FS_8KHZ;
  3088. break;
  3089. case 16000:
  3090. tx_fs_rate = 0x01;
  3091. rx_fs_rate = 0x20;
  3092. compander_fs = COMPANDER_FS_16KHZ;
  3093. break;
  3094. case 32000:
  3095. tx_fs_rate = 0x02;
  3096. rx_fs_rate = 0x40;
  3097. compander_fs = COMPANDER_FS_32KHZ;
  3098. break;
  3099. case 48000:
  3100. tx_fs_rate = 0x03;
  3101. rx_fs_rate = 0x60;
  3102. compander_fs = COMPANDER_FS_48KHZ;
  3103. break;
  3104. case 96000:
  3105. tx_fs_rate = 0x04;
  3106. rx_fs_rate = 0x80;
  3107. compander_fs = COMPANDER_FS_96KHZ;
  3108. break;
  3109. case 192000:
  3110. tx_fs_rate = 0x05;
  3111. rx_fs_rate = 0xa0;
  3112. compander_fs = COMPANDER_FS_192KHZ;
  3113. break;
  3114. default:
  3115. pr_err("%s: Invalid sampling rate %d\n", __func__,
  3116. params_rate(params));
  3117. return -EINVAL;
  3118. }
  3119. /**
  3120. * If current dai is a tx dai, set sample rate to
  3121. * all the txfe paths that are currently not active
  3122. */
  3123. if (dai->id == AIF1_CAP) {
  3124. tx_state = snd_soc_read(codec,
  3125. SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL);
  3126. for (path = 1, shift = 0;
  3127. path <= NUM_DECIMATORS; path++, shift++) {
  3128. if (!(tx_state & (1 << shift))) {
  3129. tx_fs_reg = SITAR_A_CDC_TX1_CLK_FS_CTL
  3130. + (BITS_PER_REG*(path-1));
  3131. snd_soc_update_bits(codec, tx_fs_reg,
  3132. 0x03, tx_fs_rate);
  3133. }
  3134. }
  3135. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
  3136. switch (params_format(params)) {
  3137. case SNDRV_PCM_FORMAT_S16_LE:
  3138. snd_soc_update_bits(codec,
  3139. SITAR_A_CDC_CLK_TX_I2S_CTL,
  3140. 0x20, 0x20);
  3141. break;
  3142. case SNDRV_PCM_FORMAT_S32_LE:
  3143. snd_soc_update_bits(codec,
  3144. SITAR_A_CDC_CLK_TX_I2S_CTL,
  3145. 0x20, 0x00);
  3146. break;
  3147. default:
  3148. pr_err("%s: Unsupport format %d\n", __func__,
  3149. params_format(params));
  3150. return -EINVAL;
  3151. }
  3152. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_TX_I2S_CTL,
  3153. 0x03, tx_fs_rate);
  3154. } else {
  3155. sitar->dai[dai->id].rate = params_rate(params);
  3156. }
  3157. }
  3158. /**
  3159. * TODO: Need to handle case where same RX chain takes 2 or more inputs
  3160. * with varying sample rates
  3161. */
  3162. /**
  3163. * If current dai is a rx dai, set sample rate to
  3164. * all the rx paths that are currently not active
  3165. */
  3166. if (dai->id == AIF1_PB) {
  3167. rx_state = snd_soc_read(codec,
  3168. SITAR_A_CDC_CLK_RX_B1_CTL);
  3169. for (path = 1, shift = 0;
  3170. path <= NUM_INTERPOLATORS; path++, shift++) {
  3171. if (!(rx_state & (1 << shift))) {
  3172. rx_fs_reg = SITAR_A_CDC_RX1_B5_CTL
  3173. + (BITS_PER_REG*(path-1));
  3174. snd_soc_update_bits(codec, rx_fs_reg,
  3175. 0xE0, rx_fs_rate);
  3176. if (comp_rx_path[shift] < COMPANDER_MAX)
  3177. sitar->comp_fs[comp_rx_path[shift]]
  3178. = compander_fs;
  3179. }
  3180. }
  3181. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
  3182. switch (params_format(params)) {
  3183. case SNDRV_PCM_FORMAT_S16_LE:
  3184. snd_soc_update_bits(codec,
  3185. SITAR_A_CDC_CLK_RX_I2S_CTL,
  3186. 0x20, 0x20);
  3187. break;
  3188. case SNDRV_PCM_FORMAT_S32_LE:
  3189. snd_soc_update_bits(codec,
  3190. SITAR_A_CDC_CLK_RX_I2S_CTL,
  3191. 0x20, 0x00);
  3192. break;
  3193. default:
  3194. pr_err("%s: Unsupport format %d\n", __func__,
  3195. params_format(params));
  3196. break;
  3197. }
  3198. snd_soc_update_bits(codec, SITAR_A_CDC_CLK_RX_I2S_CTL,
  3199. 0x03, (rx_fs_rate >> 0x05));
  3200. } else {
  3201. sitar->dai[dai->id].rate = params_rate(params);
  3202. }
  3203. }
  3204. return 0;
  3205. }
  3206. static struct snd_soc_dai_ops sitar_dai_ops = {
  3207. .startup = sitar_startup,
  3208. .shutdown = sitar_shutdown,
  3209. .hw_params = sitar_hw_params,
  3210. .set_sysclk = sitar_set_dai_sysclk,
  3211. .set_fmt = sitar_set_dai_fmt,
  3212. .set_channel_map = sitar_set_channel_map,
  3213. .get_channel_map = sitar_get_channel_map,
  3214. };
  3215. static struct snd_soc_dai_driver sitar_dai[] = {
  3216. {
  3217. .name = "sitar_rx1",
  3218. .id = AIF1_PB,
  3219. .playback = {
  3220. .stream_name = "AIF1 Playback",
  3221. .rates = WCD9304_RATES,
  3222. .formats = SITAR_FORMATS,
  3223. .rate_max = 48000,
  3224. .rate_min = 8000,
  3225. .channels_min = 1,
  3226. .channels_max = 2,
  3227. },
  3228. .ops = &sitar_dai_ops,
  3229. },
  3230. {
  3231. .name = "sitar_tx1",
  3232. .id = AIF1_CAP,
  3233. .capture = {
  3234. .stream_name = "AIF1 Capture",
  3235. .rates = WCD9304_RATES,
  3236. .formats = SITAR_FORMATS,
  3237. .rate_max = 48000,
  3238. .rate_min = 8000,
  3239. .channels_min = 1,
  3240. .channels_max = 2,
  3241. },
  3242. .ops = &sitar_dai_ops,
  3243. },
  3244. };
  3245. static struct snd_soc_dai_driver sitar_i2s_dai[] = {
  3246. {
  3247. .name = "sitar_i2s_rx1",
  3248. .id = AIF1_PB,
  3249. .playback = {
  3250. .stream_name = "AIF1 Playback",
  3251. .rates = WCD9304_RATES,
  3252. .formats = SITAR_FORMATS,
  3253. .rate_max = 192000,
  3254. .rate_min = 8000,
  3255. .channels_min = 1,
  3256. .channels_max = 4,
  3257. },
  3258. .ops = &sitar_dai_ops,
  3259. },
  3260. {
  3261. .name = "sitar_i2s_tx1",
  3262. .id = AIF1_CAP,
  3263. .capture = {
  3264. .stream_name = "AIF1 Capture",
  3265. .rates = WCD9304_RATES,
  3266. .formats = SITAR_FORMATS,
  3267. .rate_max = 192000,
  3268. .rate_min = 8000,
  3269. .channels_min = 1,
  3270. .channels_max = 4,
  3271. },
  3272. .ops = &sitar_dai_ops,
  3273. },
  3274. };
  3275. static int sitar_codec_enable_chmask(struct sitar_priv *sitar,
  3276. int event, int index)
  3277. {
  3278. int ret = 0;
  3279. struct wcd9xxx_ch *ch;
  3280. switch (event) {
  3281. case SND_SOC_DAPM_POST_PMU:
  3282. list_for_each_entry(ch,
  3283. &sitar->dai[index].wcd9xxx_ch_list, list) {
  3284. ret = wcd9xxx_get_slave_port(ch->ch_num);
  3285. if (ret < 0) {
  3286. pr_err("%s: Invalid slave port ID: %d\n",
  3287. __func__, ret);
  3288. ret = -EINVAL;
  3289. break;
  3290. }
  3291. sitar->dai[index].ch_mask |= 1 << ret;
  3292. }
  3293. break;
  3294. case SND_SOC_DAPM_POST_PMD:
  3295. ret = wait_event_timeout(sitar->dai[index].dai_wait,
  3296. (sitar->dai[index].ch_mask == 0),
  3297. msecs_to_jiffies(SLIM_CLOSE_TIMEOUT));
  3298. if (!ret) {
  3299. pr_err("%s: Slim close tx/rx wait timeout\n",
  3300. __func__);
  3301. ret = -EINVAL;
  3302. } else {
  3303. ret = 0;
  3304. }
  3305. break;
  3306. }
  3307. return ret;
  3308. }
  3309. static int sitar_codec_enable_slimrx(struct snd_soc_dapm_widget *w,
  3310. struct snd_kcontrol *kcontrol, int event)
  3311. {
  3312. struct wcd9xxx *core;
  3313. struct snd_soc_codec *codec = w->codec;
  3314. struct sitar_priv *sitar_p = snd_soc_codec_get_drvdata(codec);
  3315. int ret = 0;
  3316. struct wcd9xxx_codec_dai_data *dai;
  3317. core = dev_get_drvdata(codec->dev->parent);
  3318. /* Execute the callback only if interface type is slimbus */
  3319. if (sitar_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
  3320. if (event == SND_SOC_DAPM_POST_PMD && (core != NULL))
  3321. sitar_codec_pm_runtime_put(core);
  3322. return 0;
  3323. }
  3324. dai = &sitar_p->dai[w->shift];
  3325. switch (event) {
  3326. case SND_SOC_DAPM_POST_PMU:
  3327. ret = sitar_codec_enable_chmask(sitar_p, SND_SOC_DAPM_POST_PMU,
  3328. w->shift);
  3329. ret = wcd9xxx_cfg_slim_sch_rx(core, &dai->wcd9xxx_ch_list,
  3330. dai->rate, dai->bit_width,
  3331. &dai->grph);
  3332. break;
  3333. case SND_SOC_DAPM_POST_PMD:
  3334. ret = wcd9xxx_close_slim_sch_rx(core, &dai->wcd9xxx_ch_list,
  3335. dai->grph);
  3336. ret = sitar_codec_enable_chmask(sitar_p, SND_SOC_DAPM_POST_PMD,
  3337. w->shift);
  3338. if (ret < 0) {
  3339. ret = wcd9xxx_disconnect_port(core,
  3340. &dai->wcd9xxx_ch_list,
  3341. dai->grph);
  3342. pr_info("%s: Disconnect RX port ret = %d\n",
  3343. __func__, ret);
  3344. }
  3345. if (core != NULL)
  3346. sitar_codec_pm_runtime_put(core);
  3347. break;
  3348. }
  3349. return ret;
  3350. }
  3351. static int sitar_codec_enable_slimtx(struct snd_soc_dapm_widget *w,
  3352. struct snd_kcontrol *kcontrol, int event)
  3353. {
  3354. struct wcd9xxx *core;
  3355. struct snd_soc_codec *codec = w->codec;
  3356. struct sitar_priv *sitar_p = snd_soc_codec_get_drvdata(codec);
  3357. struct wcd9xxx_codec_dai_data *dai;
  3358. int ret = 0;
  3359. core = dev_get_drvdata(codec->dev->parent);
  3360. /* Execute the callback only if interface type is slimbus */
  3361. if (sitar_p->intf_type != WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
  3362. if (event == SND_SOC_DAPM_POST_PMD && (core != NULL))
  3363. sitar_codec_pm_runtime_put(core);
  3364. return 0;
  3365. }
  3366. dai = &sitar_p->dai[w->shift];
  3367. switch (event) {
  3368. case SND_SOC_DAPM_POST_PMU:
  3369. ret = sitar_codec_enable_chmask(sitar_p, SND_SOC_DAPM_POST_PMU,
  3370. w->shift);
  3371. ret = wcd9xxx_cfg_slim_sch_tx(core, &dai->wcd9xxx_ch_list,
  3372. dai->rate, dai->bit_width,
  3373. &dai->grph);
  3374. break;
  3375. case SND_SOC_DAPM_POST_PMD:
  3376. ret = wcd9xxx_close_slim_sch_tx(core, &dai->wcd9xxx_ch_list,
  3377. dai->grph);
  3378. ret = sitar_codec_enable_chmask(sitar_p, SND_SOC_DAPM_POST_PMD,
  3379. w->shift);
  3380. if (ret < 0) {
  3381. ret = wcd9xxx_disconnect_port(core,
  3382. &dai->wcd9xxx_ch_list,
  3383. dai->grph);
  3384. pr_info("%s: Disconnect RX port ret = %d\n",
  3385. __func__, ret);
  3386. }
  3387. if (core != NULL)
  3388. sitar_codec_pm_runtime_put(core);
  3389. break;
  3390. }
  3391. return ret;
  3392. }
  3393. static short sitar_codec_read_sta_result(struct snd_soc_codec *codec)
  3394. {
  3395. u8 bias_msb, bias_lsb;
  3396. short bias_value;
  3397. bias_msb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B3_STATUS);
  3398. bias_lsb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B2_STATUS);
  3399. bias_value = (bias_msb << 8) | bias_lsb;
  3400. return bias_value;
  3401. }
  3402. static short sitar_codec_read_dce_result(struct snd_soc_codec *codec)
  3403. {
  3404. u8 bias_msb, bias_lsb;
  3405. short bias_value;
  3406. bias_msb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B5_STATUS);
  3407. bias_lsb = snd_soc_read(codec, SITAR_A_CDC_MBHC_B4_STATUS);
  3408. bias_value = (bias_msb << 8) | bias_lsb;
  3409. return bias_value;
  3410. }
  3411. static void sitar_turn_onoff_rel_detection(struct snd_soc_codec *codec,
  3412. bool on)
  3413. {
  3414. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x02, on << 1);
  3415. }
  3416. static short __sitar_codec_sta_dce(struct snd_soc_codec *codec, int dce,
  3417. bool override_bypass, bool noreldetection)
  3418. {
  3419. short bias_value;
  3420. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  3421. struct wcd9xxx *core = codec->control_data;
  3422. struct wcd9xxx_core_resource *core_res = &core->core_res;
  3423. wcd9xxx_disable_irq(core_res, WCD9XXX_IRQ_MBHC_POTENTIAL);
  3424. if (noreldetection)
  3425. sitar_turn_onoff_rel_detection(codec, false);
  3426. /* Turn on the override */
  3427. if (!override_bypass)
  3428. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x4, 0x4);
  3429. if (dce) {
  3430. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
  3431. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x4);
  3432. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
  3433. usleep_range(sitar->mbhc_data.t_sta_dce,
  3434. sitar->mbhc_data.t_sta_dce);
  3435. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x4);
  3436. usleep_range(sitar->mbhc_data.t_dce,
  3437. sitar->mbhc_data.t_dce);
  3438. bias_value = sitar_codec_read_dce_result(codec);
  3439. } else {
  3440. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
  3441. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x2);
  3442. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x0);
  3443. usleep_range(sitar->mbhc_data.t_sta_dce,
  3444. sitar->mbhc_data.t_sta_dce);
  3445. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x2);
  3446. usleep_range(sitar->mbhc_data.t_sta,
  3447. sitar->mbhc_data.t_sta);
  3448. bias_value = sitar_codec_read_sta_result(codec);
  3449. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
  3450. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x0);
  3451. }
  3452. /* Turn off the override after measuring mic voltage */
  3453. if (!override_bypass)
  3454. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
  3455. if (noreldetection)
  3456. sitar_turn_onoff_rel_detection(codec, true);
  3457. wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
  3458. return bias_value;
  3459. }
  3460. static short sitar_codec_sta_dce(struct snd_soc_codec *codec, int dce,
  3461. bool norel)
  3462. {
  3463. return __sitar_codec_sta_dce(codec, dce, false, norel);
  3464. }
  3465. static void sitar_codec_shutdown_hs_removal_detect(struct snd_soc_codec *codec)
  3466. {
  3467. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  3468. const struct sitar_mbhc_general_cfg *generic =
  3469. SITAR_MBHC_CAL_GENERAL_PTR(sitar->mbhc_cfg.calibration);
  3470. if (!sitar->mclk_enabled && !sitar->mbhc_polling_active)
  3471. sitar_codec_enable_config_mode(codec, 1);
  3472. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
  3473. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x6, 0x0);
  3474. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.mbhc_reg, 0x80, 0x00);
  3475. usleep_range(generic->t_shutdown_plug_rem,
  3476. generic->t_shutdown_plug_rem);
  3477. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0xA, 0x8);
  3478. if (!sitar->mclk_enabled && !sitar->mbhc_polling_active)
  3479. sitar_codec_enable_config_mode(codec, 0);
  3480. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x00);
  3481. }
  3482. static void sitar_codec_cleanup_hs_polling(struct snd_soc_codec *codec)
  3483. {
  3484. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  3485. sitar_codec_shutdown_hs_removal_detect(codec);
  3486. if (!sitar->mclk_enabled) {
  3487. sitar_codec_disable_clock_block(codec);
  3488. sitar_codec_enable_bandgap(codec, SITAR_BANDGAP_OFF);
  3489. }
  3490. sitar->mbhc_polling_active = false;
  3491. sitar->mbhc_state = MBHC_STATE_NONE;
  3492. }
  3493. /* called only from interrupt which is under codec_resource_lock acquisition */
  3494. static short sitar_codec_setup_hs_polling(struct snd_soc_codec *codec)
  3495. {
  3496. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  3497. short bias_value;
  3498. u8 cfilt_mode;
  3499. if (!sitar->mbhc_cfg.calibration) {
  3500. pr_err("Error, no sitar calibration\n");
  3501. return -ENODEV;
  3502. }
  3503. if (!sitar->mclk_enabled) {
  3504. sitar_codec_enable_bandgap(codec, SITAR_BANDGAP_MBHC_MODE);
  3505. sitar_enable_rx_bias(codec, 1);
  3506. sitar_codec_enable_clock_block(codec, 1);
  3507. }
  3508. snd_soc_update_bits(codec, SITAR_A_CLK_BUFF_EN1, 0x05, 0x01);
  3509. /* Make sure CFILT is in fast mode, save current mode */
  3510. cfilt_mode = snd_soc_read(codec, sitar->mbhc_bias_regs.cfilt_ctl);
  3511. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.cfilt_ctl, 0x70, 0x00);
  3512. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.ctl_reg, 0x1F, 0x16);
  3513. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x2, 0x2);
  3514. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x84);
  3515. snd_soc_update_bits(codec, SITAR_A_TX_4_MBHC_EN, 0x80, 0x80);
  3516. snd_soc_update_bits(codec, SITAR_A_TX_4_MBHC_EN, 0x1F, 0x1C);
  3517. snd_soc_update_bits(codec, SITAR_A_TX_4_MBHC_TEST_CTL, 0x40, 0x40);
  3518. snd_soc_update_bits(codec, SITAR_A_TX_4_MBHC_EN, 0x80, 0x00);
  3519. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
  3520. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x00);
  3521. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x2, 0x2);
  3522. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x8, 0x8);
  3523. sitar_codec_calibrate_hs_polling(codec);
  3524. /* don't flip override */
  3525. bias_value = __sitar_codec_sta_dce(codec, 1, true, true);
  3526. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.cfilt_ctl, 0x40,
  3527. cfilt_mode);
  3528. snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x13, 0x00);
  3529. return bias_value;
  3530. }
  3531. static int sitar_cancel_btn_work(struct sitar_priv *sitar)
  3532. {
  3533. int r = 0;
  3534. struct wcd9xxx *core = dev_get_drvdata(sitar->codec->dev->parent);
  3535. struct wcd9xxx_core_resource *core_res = &core->core_res;
  3536. if (cancel_delayed_work_sync(&sitar->mbhc_btn_dwork)) {
  3537. /* if scheduled mbhc_btn_dwork is canceled from here,
  3538. * we have to unlock from here instead btn_work */
  3539. wcd9xxx_unlock_sleep(core_res);
  3540. r = 1;
  3541. }
  3542. return r;
  3543. }
  3544. static u16 sitar_codec_v_sta_dce(struct snd_soc_codec *codec, bool dce,
  3545. s16 vin_mv)
  3546. {
  3547. short diff, zero;
  3548. struct sitar_priv *sitar;
  3549. u32 mb_mv, in;
  3550. sitar = snd_soc_codec_get_drvdata(codec);
  3551. mb_mv = sitar->mbhc_data.micb_mv;
  3552. if (mb_mv == 0) {
  3553. pr_err("%s: Mic Bias voltage is set to zero\n", __func__);
  3554. return -EINVAL;
  3555. }
  3556. if (dce) {
  3557. diff = sitar->mbhc_data.dce_mb - sitar->mbhc_data.dce_z;
  3558. zero = sitar->mbhc_data.dce_z;
  3559. } else {
  3560. diff = sitar->mbhc_data.sta_mb - sitar->mbhc_data.sta_z;
  3561. zero = sitar->mbhc_data.sta_z;
  3562. }
  3563. in = (u32) diff * vin_mv;
  3564. return (u16) (in / mb_mv) + zero;
  3565. }
  3566. static s32 sitar_codec_sta_dce_v(struct snd_soc_codec *codec, s8 dce,
  3567. u16 bias_value)
  3568. {
  3569. struct sitar_priv *sitar;
  3570. s16 value, z, mb;
  3571. s32 mv;
  3572. sitar = snd_soc_codec_get_drvdata(codec);
  3573. value = bias_value;
  3574. if (dce) {
  3575. z = (sitar->mbhc_data.dce_z);
  3576. mb = (sitar->mbhc_data.dce_mb);
  3577. mv = (value - z) * (s32)sitar->mbhc_data.micb_mv / (mb - z);
  3578. } else {
  3579. z = (sitar->mbhc_data.sta_z);
  3580. mb = (sitar->mbhc_data.sta_mb);
  3581. mv = (value - z) * (s32)sitar->mbhc_data.micb_mv / (mb - z);
  3582. }
  3583. return mv;
  3584. }
  3585. static void btn_lpress_fn(struct work_struct *work)
  3586. {
  3587. struct delayed_work *delayed_work;
  3588. struct sitar_priv *sitar;
  3589. short bias_value;
  3590. int dce_mv, sta_mv;
  3591. struct wcd9xxx *core;
  3592. struct wcd9xxx_core_resource *core_res;
  3593. pr_debug("%s:\n", __func__);
  3594. delayed_work = to_delayed_work(work);
  3595. sitar = container_of(delayed_work, struct sitar_priv, mbhc_btn_dwork);
  3596. core = dev_get_drvdata(sitar->codec->dev->parent);
  3597. core_res = &core->core_res;
  3598. if (sitar) {
  3599. if (sitar->mbhc_cfg.button_jack) {
  3600. bias_value = sitar_codec_read_sta_result(sitar->codec);
  3601. sta_mv = sitar_codec_sta_dce_v(sitar->codec, 0,
  3602. bias_value);
  3603. bias_value = sitar_codec_read_dce_result(sitar->codec);
  3604. dce_mv = sitar_codec_sta_dce_v(sitar->codec, 1,
  3605. bias_value);
  3606. pr_debug("%s: Reporting long button press event"
  3607. " STA: %d, DCE: %d\n", __func__, sta_mv, dce_mv);
  3608. sitar_snd_soc_jack_report(sitar,
  3609. sitar->mbhc_cfg.button_jack,
  3610. sitar->buttons_pressed,
  3611. sitar->buttons_pressed);
  3612. }
  3613. } else {
  3614. pr_err("%s: Bad sitar private data\n", __func__);
  3615. }
  3616. pr_debug("%s: leave\n", __func__);
  3617. wcd9xxx_unlock_sleep(core_res);
  3618. }
  3619. void sitar_mbhc_cal(struct snd_soc_codec *codec)
  3620. {
  3621. struct sitar_priv *sitar;
  3622. struct sitar_mbhc_btn_detect_cfg *btn_det;
  3623. u8 cfilt_mode, bg_mode;
  3624. u8 ncic, nmeas, navg;
  3625. u32 mclk_rate;
  3626. u32 dce_wait, sta_wait;
  3627. u8 *n_cic;
  3628. void *calibration;
  3629. struct wcd9xxx *core = codec->control_data;
  3630. struct wcd9xxx_core_resource *core_res = &core->core_res;
  3631. sitar = snd_soc_codec_get_drvdata(codec);
  3632. calibration = sitar->mbhc_cfg.calibration;
  3633. wcd9xxx_disable_irq(core_res, WCD9XXX_IRQ_MBHC_POTENTIAL);
  3634. sitar_turn_onoff_rel_detection(codec, false);
  3635. /* First compute the DCE / STA wait times
  3636. * depending on tunable parameters.
  3637. * The value is computed in microseconds
  3638. */
  3639. btn_det = SITAR_MBHC_CAL_BTN_DET_PTR(calibration);
  3640. n_cic = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_N_CIC);
  3641. ncic = n_cic[sitar_codec_mclk_index(sitar)];
  3642. nmeas = SITAR_MBHC_CAL_BTN_DET_PTR(calibration)->n_meas;
  3643. navg = SITAR_MBHC_CAL_GENERAL_PTR(calibration)->mbhc_navg;
  3644. mclk_rate = sitar->mbhc_cfg.mclk_rate;
  3645. dce_wait = (1000 * 512 * 60 * (nmeas + 1)) / (mclk_rate / 1000);
  3646. sta_wait = (1000 * 128 * (navg + 1)) / (mclk_rate / 1000);
  3647. sitar->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
  3648. sitar->mbhc_data.t_sta = DEFAULT_STA_WAIT;
  3649. /* LDOH and CFILT are already configured during pdata handling.
  3650. * Only need to make sure CFILT and bandgap are in Fast mode.
  3651. * Need to restore defaults once calculation is done.
  3652. */
  3653. cfilt_mode = snd_soc_read(codec, sitar->mbhc_bias_regs.cfilt_ctl);
  3654. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.cfilt_ctl, 0x40, 0x00);
  3655. bg_mode = snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x02,
  3656. 0x02);
  3657. /* Micbias, CFILT, LDOH, MBHC MUX mode settings
  3658. * to perform ADC calibration
  3659. */
  3660. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.ctl_reg, 0x60,
  3661. sitar->mbhc_cfg.micbias << 5);
  3662. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
  3663. snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1, 0x60, 0x60);
  3664. snd_soc_write(codec, SITAR_A_TX_4_MBHC_TEST_CTL, 0x78);
  3665. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x04, 0x04);
  3666. /* DCE measurement for 0 volts */
  3667. snd_soc_write(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x0A);
  3668. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x04);
  3669. snd_soc_write(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x02);
  3670. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x81);
  3671. usleep_range(100, 100);
  3672. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x04);
  3673. usleep_range(sitar->mbhc_data.t_dce, sitar->mbhc_data.t_dce);
  3674. sitar->mbhc_data.dce_z = sitar_codec_read_dce_result(codec);
  3675. /* DCE measurment for MB voltage */
  3676. snd_soc_write(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x0A);
  3677. snd_soc_write(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x02);
  3678. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x82);
  3679. usleep_range(100, 100);
  3680. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x04);
  3681. usleep_range(sitar->mbhc_data.t_dce, sitar->mbhc_data.t_dce);
  3682. sitar->mbhc_data.dce_mb = sitar_codec_read_dce_result(codec);
  3683. /* Sta measuremnt for 0 volts */
  3684. snd_soc_write(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x0A);
  3685. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x02);
  3686. snd_soc_write(codec, SITAR_A_CDC_MBHC_CLK_CTL, 0x02);
  3687. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x81);
  3688. usleep_range(100, 100);
  3689. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x02);
  3690. usleep_range(sitar->mbhc_data.t_sta, sitar->mbhc_data.t_sta);
  3691. sitar->mbhc_data.sta_z = sitar_codec_read_sta_result(codec);
  3692. /* STA Measurement for MB Voltage */
  3693. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x82);
  3694. usleep_range(100, 100);
  3695. snd_soc_write(codec, SITAR_A_CDC_MBHC_EN_CTL, 0x02);
  3696. usleep_range(sitar->mbhc_data.t_sta, sitar->mbhc_data.t_sta);
  3697. sitar->mbhc_data.sta_mb = sitar_codec_read_sta_result(codec);
  3698. /* Restore default settings. */
  3699. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x04, 0x00);
  3700. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.cfilt_ctl, 0x40,
  3701. cfilt_mode);
  3702. snd_soc_update_bits(codec, SITAR_A_BIAS_CENTRAL_BG_CTL, 0x02, bg_mode);
  3703. snd_soc_write(codec, SITAR_A_MBHC_SCALING_MUX_1, 0x84);
  3704. usleep_range(100, 100);
  3705. wcd9xxx_enable_irq(codec->control_data, WCD9XXX_IRQ_MBHC_POTENTIAL);
  3706. sitar_turn_onoff_rel_detection(codec, true);
  3707. }
  3708. void *sitar_mbhc_cal_btn_det_mp(const struct sitar_mbhc_btn_detect_cfg* btn_det,
  3709. const enum sitar_mbhc_btn_det_mem mem)
  3710. {
  3711. void *ret = &btn_det->_v_btn_low;
  3712. switch (mem) {
  3713. case SITAR_BTN_DET_GAIN:
  3714. ret += sizeof(btn_det->_n_cic);
  3715. case SITAR_BTN_DET_N_CIC:
  3716. ret += sizeof(btn_det->_n_ready);
  3717. case SITAR_BTN_DET_N_READY:
  3718. ret += sizeof(btn_det->_v_btn_high[0]) * btn_det->num_btn;
  3719. case SITAR_BTN_DET_V_BTN_HIGH:
  3720. ret += sizeof(btn_det->_v_btn_low[0]) * btn_det->num_btn;
  3721. case SITAR_BTN_DET_V_BTN_LOW:
  3722. /* do nothing */
  3723. break;
  3724. default:
  3725. ret = NULL;
  3726. }
  3727. return ret;
  3728. }
  3729. static void sitar_mbhc_calc_thres(struct snd_soc_codec *codec)
  3730. {
  3731. struct sitar_priv *sitar;
  3732. s16 btn_mv = 0, btn_delta_mv;
  3733. struct sitar_mbhc_btn_detect_cfg *btn_det;
  3734. struct sitar_mbhc_plug_type_cfg *plug_type;
  3735. u16 *btn_high;
  3736. u8 *n_ready;
  3737. int i;
  3738. sitar = snd_soc_codec_get_drvdata(codec);
  3739. btn_det = SITAR_MBHC_CAL_BTN_DET_PTR(sitar->mbhc_cfg.calibration);
  3740. plug_type = SITAR_MBHC_CAL_PLUG_TYPE_PTR(sitar->mbhc_cfg.calibration);
  3741. n_ready = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_N_READY);
  3742. if (sitar->mbhc_cfg.mclk_rate == SITAR_MCLK_RATE_12288KHZ) {
  3743. sitar->mbhc_data.npoll = 9;
  3744. sitar->mbhc_data.nbounce_wait = 30;
  3745. } else if (sitar->mbhc_cfg.mclk_rate == SITAR_MCLK_RATE_9600KHZ) {
  3746. sitar->mbhc_data.npoll = 7;
  3747. sitar->mbhc_data.nbounce_wait = 23;
  3748. }
  3749. sitar->mbhc_data.t_sta_dce = ((1000 * 256) /
  3750. (sitar->mbhc_cfg.mclk_rate / 1000) *
  3751. n_ready[sitar_codec_mclk_index(sitar)]) +
  3752. 10;
  3753. sitar->mbhc_data.v_ins_hu =
  3754. sitar_codec_v_sta_dce(codec, STA, plug_type->v_hs_max);
  3755. sitar->mbhc_data.v_ins_h =
  3756. sitar_codec_v_sta_dce(codec, DCE, plug_type->v_hs_max);
  3757. btn_high = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_V_BTN_HIGH);
  3758. for (i = 0; i < btn_det->num_btn; i++)
  3759. btn_mv = btn_high[i] > btn_mv ? btn_high[i] : btn_mv;
  3760. sitar->mbhc_data.v_b1_h = sitar_codec_v_sta_dce(codec, DCE, btn_mv);
  3761. btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_sta;
  3762. sitar->mbhc_data.v_b1_hu =
  3763. sitar_codec_v_sta_dce(codec, STA, btn_delta_mv);
  3764. btn_delta_mv = btn_mv + btn_det->v_btn_press_delta_cic;
  3765. sitar->mbhc_data.v_b1_huc =
  3766. sitar_codec_v_sta_dce(codec, DCE, btn_delta_mv);
  3767. sitar->mbhc_data.v_brh = sitar->mbhc_data.v_b1_h;
  3768. sitar->mbhc_data.v_brl = SITAR_MBHC_BUTTON_MIN;
  3769. sitar->mbhc_data.v_no_mic =
  3770. sitar_codec_v_sta_dce(codec, STA, plug_type->v_no_mic);
  3771. }
  3772. void sitar_mbhc_init(struct snd_soc_codec *codec)
  3773. {
  3774. struct sitar_priv *sitar;
  3775. struct sitar_mbhc_general_cfg *generic;
  3776. struct sitar_mbhc_btn_detect_cfg *btn_det;
  3777. int n;
  3778. u8 *n_cic, *gain;
  3779. pr_err("%s(): ENTER\n", __func__);
  3780. sitar = snd_soc_codec_get_drvdata(codec);
  3781. generic = SITAR_MBHC_CAL_GENERAL_PTR(sitar->mbhc_cfg.calibration);
  3782. btn_det = SITAR_MBHC_CAL_BTN_DET_PTR(sitar->mbhc_cfg.calibration);
  3783. for (n = 0; n < 8; n++) {
  3784. if (n != 7) {
  3785. snd_soc_update_bits(codec,
  3786. SITAR_A_CDC_MBHC_FIR_B1_CFG,
  3787. 0x07, n);
  3788. snd_soc_write(codec, SITAR_A_CDC_MBHC_FIR_B2_CFG,
  3789. btn_det->c[n]);
  3790. }
  3791. }
  3792. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B2_CTL, 0x07,
  3793. btn_det->nc);
  3794. n_cic = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_N_CIC);
  3795. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_TIMER_B6_CTL, 0xFF,
  3796. n_cic[sitar_codec_mclk_index(sitar)]);
  3797. gain = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_GAIN);
  3798. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B2_CTL, 0x78,
  3799. gain[sitar_codec_mclk_index(sitar)] << 3);
  3800. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_TIMER_B4_CTL, 0x70,
  3801. generic->mbhc_nsa << 4);
  3802. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_TIMER_B4_CTL, 0x0F,
  3803. btn_det->n_meas);
  3804. snd_soc_write(codec, SITAR_A_CDC_MBHC_TIMER_B5_CTL, generic->mbhc_navg);
  3805. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x80, 0x80);
  3806. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x78,
  3807. btn_det->mbhc_nsc << 3);
  3808. snd_soc_update_bits(codec, SITAR_A_MICB_1_MBHC, 0x03,
  3809. sitar->mbhc_cfg.micbias);
  3810. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x02, 0x02);
  3811. snd_soc_update_bits(codec, SITAR_A_MBHC_SCALING_MUX_2, 0xF0, 0xF0);
  3812. }
  3813. static bool sitar_mbhc_fw_validate(const struct firmware *fw)
  3814. {
  3815. u32 cfg_offset;
  3816. struct sitar_mbhc_imped_detect_cfg *imped_cfg;
  3817. struct sitar_mbhc_btn_detect_cfg *btn_cfg;
  3818. if (fw->size < SITAR_MBHC_CAL_MIN_SIZE)
  3819. return false;
  3820. /* previous check guarantees that there is enough fw data up
  3821. * to num_btn
  3822. */
  3823. btn_cfg = SITAR_MBHC_CAL_BTN_DET_PTR(fw->data);
  3824. cfg_offset = (u32) ((void *) btn_cfg - (void *) fw->data);
  3825. if (fw->size < (cfg_offset + SITAR_MBHC_CAL_BTN_SZ(btn_cfg)))
  3826. return false;
  3827. /* previous check guarantees that there is enough fw data up
  3828. * to start of impedance detection configuration
  3829. */
  3830. imped_cfg = SITAR_MBHC_CAL_IMPED_DET_PTR(fw->data);
  3831. cfg_offset = (u32) ((void *) imped_cfg - (void *) fw->data);
  3832. if (fw->size < (cfg_offset + SITAR_MBHC_CAL_IMPED_MIN_SZ))
  3833. return false;
  3834. if (fw->size < (cfg_offset + SITAR_MBHC_CAL_IMPED_SZ(imped_cfg)))
  3835. return false;
  3836. return true;
  3837. }
  3838. static void sitar_turn_onoff_override(struct snd_soc_codec *codec, bool on)
  3839. {
  3840. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_B1_CTL, 0x04, on << 2);
  3841. }
  3842. /* called under codec_resource_lock acquisition */
  3843. void sitar_set_and_turnoff_hph_padac(struct snd_soc_codec *codec)
  3844. {
  3845. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  3846. u8 wg_time;
  3847. wg_time = snd_soc_read(codec, SITAR_A_RX_HPH_CNP_WG_TIME) ;
  3848. wg_time += 1;
  3849. /* If headphone PA is on, check if userspace receives
  3850. * removal event to sync-up PA's state */
  3851. if (sitar_is_hph_pa_on(codec)) {
  3852. pr_debug("%s PA is on, setting PA_OFF_ACK\n", __func__);
  3853. set_bit(SITAR_HPHL_PA_OFF_ACK, &sitar->hph_pa_dac_state);
  3854. set_bit(SITAR_HPHR_PA_OFF_ACK, &sitar->hph_pa_dac_state);
  3855. } else {
  3856. pr_debug("%s PA is off\n", __func__);
  3857. }
  3858. if (sitar_is_hph_dac_on(codec, 1))
  3859. set_bit(SITAR_HPHL_DAC_OFF_ACK, &sitar->hph_pa_dac_state);
  3860. if (sitar_is_hph_dac_on(codec, 0))
  3861. set_bit(SITAR_HPHR_DAC_OFF_ACK, &sitar->hph_pa_dac_state);
  3862. snd_soc_update_bits(codec, SITAR_A_RX_HPH_CNP_EN, 0x30, 0x00);
  3863. snd_soc_update_bits(codec, SITAR_A_RX_HPH_L_DAC_CTL,
  3864. 0xC0, 0x00);
  3865. snd_soc_update_bits(codec, SITAR_A_RX_HPH_R_DAC_CTL,
  3866. 0xC0, 0x00);
  3867. usleep_range(wg_time * 1000, wg_time * 1000);
  3868. }
  3869. static void sitar_clr_and_turnon_hph_padac(struct sitar_priv *sitar)
  3870. {
  3871. bool pa_turned_on = false;
  3872. struct snd_soc_codec *codec = sitar->codec;
  3873. u8 wg_time;
  3874. wg_time = snd_soc_read(codec, SITAR_A_RX_HPH_CNP_WG_TIME) ;
  3875. wg_time += 1;
  3876. if (test_and_clear_bit(SITAR_HPHR_DAC_OFF_ACK,
  3877. &sitar->hph_pa_dac_state)) {
  3878. pr_debug("%s: HPHR clear flag and enable DAC\n", __func__);
  3879. snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_R_DAC_CTL,
  3880. 0xC0, 0xC0);
  3881. }
  3882. if (test_and_clear_bit(SITAR_HPHL_DAC_OFF_ACK,
  3883. &sitar->hph_pa_dac_state)) {
  3884. pr_debug("%s: HPHL clear flag and enable DAC\n", __func__);
  3885. snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_L_DAC_CTL,
  3886. 0xC0, 0xC0);
  3887. }
  3888. if (test_and_clear_bit(SITAR_HPHR_PA_OFF_ACK,
  3889. &sitar->hph_pa_dac_state)) {
  3890. pr_debug("%s: HPHR clear flag and enable PA\n", __func__);
  3891. snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_CNP_EN, 0x10,
  3892. 1 << 4);
  3893. pa_turned_on = true;
  3894. }
  3895. if (test_and_clear_bit(SITAR_HPHL_PA_OFF_ACK,
  3896. &sitar->hph_pa_dac_state)) {
  3897. pr_debug("%s: HPHL clear flag and enable PA\n", __func__);
  3898. snd_soc_update_bits(sitar->codec, SITAR_A_RX_HPH_CNP_EN, 0x20,
  3899. 1 << 5);
  3900. pa_turned_on = true;
  3901. }
  3902. if (pa_turned_on) {
  3903. pr_debug("%s: PA was turned off by MBHC and not by DAPM\n",
  3904. __func__);
  3905. usleep_range(wg_time * 1000, wg_time * 1000);
  3906. }
  3907. }
  3908. static void sitar_codec_report_plug(struct snd_soc_codec *codec, int insertion,
  3909. enum snd_jack_types jack_type)
  3910. {
  3911. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  3912. if (!insertion) {
  3913. /* Report removal */
  3914. sitar->hph_status &= ~jack_type;
  3915. if (sitar->mbhc_cfg.headset_jack) {
  3916. /* cancel possibly scheduled btn work and
  3917. * report release if we reported button press */
  3918. if (sitar_cancel_btn_work(sitar)) {
  3919. pr_debug("%s: button press is canceled\n",
  3920. __func__);
  3921. } else if (sitar->buttons_pressed) {
  3922. pr_debug("%s: Reporting release for reported "
  3923. "button press %d\n", __func__,
  3924. jack_type);
  3925. sitar_snd_soc_jack_report(sitar,
  3926. sitar->mbhc_cfg.button_jack, 0,
  3927. sitar->buttons_pressed);
  3928. sitar->buttons_pressed &=
  3929. ~SITAR_JACK_BUTTON_MASK;
  3930. }
  3931. pr_debug("%s: Reporting removal %d\n", __func__,
  3932. jack_type);
  3933. sitar_snd_soc_jack_report(sitar,
  3934. sitar->mbhc_cfg.headset_jack,
  3935. sitar->hph_status,
  3936. SITAR_JACK_MASK);
  3937. }
  3938. sitar_set_and_turnoff_hph_padac(codec);
  3939. hphocp_off_report(sitar, SND_JACK_OC_HPHR,
  3940. WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
  3941. hphocp_off_report(sitar, SND_JACK_OC_HPHL,
  3942. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
  3943. sitar->current_plug = PLUG_TYPE_NONE;
  3944. sitar->mbhc_polling_active = false;
  3945. } else {
  3946. /* Report insertion */
  3947. sitar->hph_status |= jack_type;
  3948. if (jack_type == SND_JACK_HEADPHONE)
  3949. sitar->current_plug = PLUG_TYPE_HEADPHONE;
  3950. else if (jack_type == SND_JACK_HEADSET) {
  3951. sitar->mbhc_polling_active = true;
  3952. sitar->current_plug = PLUG_TYPE_HEADSET;
  3953. }
  3954. if (sitar->mbhc_cfg.headset_jack) {
  3955. pr_debug("%s: Reporting insertion %d\n", __func__,
  3956. jack_type);
  3957. sitar_snd_soc_jack_report(sitar,
  3958. sitar->mbhc_cfg.headset_jack,
  3959. sitar->hph_status,
  3960. SITAR_JACK_MASK);
  3961. }
  3962. sitar_clr_and_turnon_hph_padac(sitar);
  3963. }
  3964. }
  3965. static bool sitar_hs_gpio_level_remove(struct sitar_priv *sitar)
  3966. {
  3967. return (gpio_get_value_cansleep(sitar->mbhc_cfg.gpio) !=
  3968. sitar->mbhc_cfg.gpio_level_insert);
  3969. }
  3970. static bool sitar_is_invalid_insert_delta(struct snd_soc_codec *codec,
  3971. int mic_volt, int mic_volt_prev)
  3972. {
  3973. int delta = abs(mic_volt - mic_volt_prev);
  3974. if (delta > SITAR_MBHC_FAKE_INSERT_VOLT_DELTA_MV) {
  3975. pr_debug("%s: volt delta %dmv\n", __func__, delta);
  3976. return true;
  3977. }
  3978. return false;
  3979. }
  3980. static bool sitar_is_invalid_insertion_range(struct snd_soc_codec *codec,
  3981. s32 mic_volt)
  3982. {
  3983. bool invalid = false;
  3984. if (mic_volt < SITAR_MBHC_FAKE_INSERT_HIGH
  3985. && (mic_volt > SITAR_MBHC_FAKE_INSERT_LOW)) {
  3986. invalid = true;
  3987. }
  3988. return invalid;
  3989. }
  3990. static bool sitar_codec_is_invalid_plug(struct snd_soc_codec *codec,
  3991. s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT],
  3992. enum sitar_mbhc_plug_type plug_type[MBHC_NUM_DCE_PLUG_DETECT])
  3993. {
  3994. int i;
  3995. bool r = false;
  3996. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  3997. struct sitar_mbhc_plug_type_cfg *plug_type_ptr =
  3998. SITAR_MBHC_CAL_PLUG_TYPE_PTR(sitar->mbhc_cfg.calibration);
  3999. for (i = 0 ; i < MBHC_NUM_DCE_PLUG_DETECT && !r; i++) {
  4000. if (mic_mv[i] < plug_type_ptr->v_no_mic)
  4001. plug_type[i] = PLUG_TYPE_HEADPHONE;
  4002. else if (mic_mv[i] < plug_type_ptr->v_hs_max)
  4003. plug_type[i] = PLUG_TYPE_HEADSET;
  4004. else if (mic_mv[i] > plug_type_ptr->v_hs_max)
  4005. plug_type[i] = PLUG_TYPE_HIGH_HPH;
  4006. r = sitar_is_invalid_insertion_range(codec, mic_mv[i]);
  4007. if (!r && i > 0) {
  4008. if (plug_type[i-1] != plug_type[i])
  4009. r = true;
  4010. else
  4011. r = sitar_is_invalid_insert_delta(codec,
  4012. mic_mv[i],
  4013. mic_mv[i - 1]);
  4014. }
  4015. }
  4016. return r;
  4017. }
  4018. /* called under codec_resource_lock acquisition */
  4019. void sitar_find_plug_and_report(struct snd_soc_codec *codec,
  4020. enum sitar_mbhc_plug_type plug_type)
  4021. {
  4022. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  4023. if (plug_type == PLUG_TYPE_HEADPHONE
  4024. && sitar->current_plug == PLUG_TYPE_NONE) {
  4025. /* Nothing was reported previously
  4026. * reporte a headphone
  4027. */
  4028. sitar_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
  4029. sitar_codec_cleanup_hs_polling(codec);
  4030. } else if (plug_type == PLUG_TYPE_HEADSET) {
  4031. /* If Headphone was reported previously, this will
  4032. * only report the mic line
  4033. */
  4034. sitar_codec_report_plug(codec, 1, SND_JACK_HEADSET);
  4035. msleep(100);
  4036. sitar_codec_start_hs_polling(codec);
  4037. } else if (plug_type == PLUG_TYPE_HIGH_HPH) {
  4038. if (sitar->current_plug == PLUG_TYPE_NONE)
  4039. sitar_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
  4040. sitar_codec_cleanup_hs_polling(codec);
  4041. pr_debug("setup mic trigger for further detection\n");
  4042. sitar->lpi_enabled = true;
  4043. /* TODO ::: sitar_codec_enable_hs_detect */
  4044. pr_err("%s(): High impedence hph not supported\n", __func__);
  4045. }
  4046. }
  4047. /* should be called under interrupt context that hold suspend */
  4048. static void sitar_schedule_hs_detect_plug(struct sitar_priv *sitar)
  4049. {
  4050. struct wcd9xxx *core = sitar->codec->control_data;
  4051. struct wcd9xxx_core_resource *core_res = &core->core_res;
  4052. pr_debug("%s: scheduling sitar_hs_correct_gpio_plug\n", __func__);
  4053. sitar->hs_detect_work_stop = false;
  4054. wcd9xxx_lock_sleep(core_res);
  4055. schedule_work(&sitar->hs_correct_plug_work);
  4056. }
  4057. /* called under codec_resource_lock acquisition */
  4058. static void sitar_cancel_hs_detect_plug(struct sitar_priv *sitar)
  4059. {
  4060. struct wcd9xxx *core = sitar->codec->control_data;
  4061. struct wcd9xxx_core_resource *core_res = &core->core_res;
  4062. pr_debug("%s: canceling hs_correct_plug_work\n", __func__);
  4063. sitar->hs_detect_work_stop = true;
  4064. wmb();
  4065. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  4066. if (cancel_work_sync(&sitar->hs_correct_plug_work)) {
  4067. pr_debug("%s: hs_correct_plug_work is canceled\n", __func__);
  4068. wcd9xxx_unlock_sleep(core_res);
  4069. }
  4070. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  4071. }
  4072. static void sitar_hs_correct_gpio_plug(struct work_struct *work)
  4073. {
  4074. struct sitar_priv *sitar;
  4075. struct snd_soc_codec *codec;
  4076. int retry = 0, i;
  4077. bool correction = false;
  4078. s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
  4079. short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
  4080. enum sitar_mbhc_plug_type plug_type[MBHC_NUM_DCE_PLUG_DETECT];
  4081. unsigned long timeout;
  4082. struct wcd9xxx *core;
  4083. struct wcd9xxx_core_resource *core_res;
  4084. sitar = container_of(work, struct sitar_priv, hs_correct_plug_work);
  4085. codec = sitar->codec;
  4086. core = sitar->codec->control_data;
  4087. core_res = &core->core_res;
  4088. pr_debug("%s: enter\n", __func__);
  4089. sitar->mbhc_cfg.mclk_cb_fn(codec, 1, false);
  4090. /* Keep override on during entire plug type correction work.
  4091. *
  4092. * This is okay under the assumption that any GPIO irqs which use
  4093. * MBHC block cancel and sync this work so override is off again
  4094. * prior to GPIO interrupt handler's MBHC block usage.
  4095. * Also while this correction work is running, we can guarantee
  4096. * DAPM doesn't use any MBHC block as this work only runs with
  4097. * headphone detection.
  4098. */
  4099. sitar_turn_onoff_override(codec, true);
  4100. timeout = jiffies + msecs_to_jiffies(SITAR_HS_DETECT_PLUG_TIME_MS);
  4101. while (!time_after(jiffies, timeout)) {
  4102. ++retry;
  4103. rmb();
  4104. if (sitar->hs_detect_work_stop) {
  4105. pr_debug("%s: stop requested\n", __func__);
  4106. break;
  4107. }
  4108. msleep(SITAR_HS_DETECT_PLUG_INERVAL_MS);
  4109. if (sitar_hs_gpio_level_remove(sitar)) {
  4110. pr_debug("%s: GPIO value is low\n", __func__);
  4111. break;
  4112. }
  4113. /* can race with removal interrupt */
  4114. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  4115. for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
  4116. mb_v[i] = __sitar_codec_sta_dce(codec, 1, true, true);
  4117. mic_mv[i] = sitar_codec_sta_dce_v(codec, 1 , mb_v[i]);
  4118. pr_debug("%s : DCE run %d, mic_mv = %d(%x)\n",
  4119. __func__, retry, mic_mv[i], mb_v[i]);
  4120. }
  4121. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  4122. if (sitar_codec_is_invalid_plug(codec, mic_mv, plug_type)) {
  4123. pr_debug("Invalid plug in attempt # %d\n", retry);
  4124. if (retry == NUM_ATTEMPTS_TO_REPORT &&
  4125. sitar->current_plug == PLUG_TYPE_NONE) {
  4126. sitar_codec_report_plug(codec, 1,
  4127. SND_JACK_HEADPHONE);
  4128. }
  4129. } else if (!sitar_codec_is_invalid_plug(codec, mic_mv,
  4130. plug_type) &&
  4131. plug_type[0] == PLUG_TYPE_HEADPHONE) {
  4132. pr_debug("Good headphone detected, continue polling mic\n");
  4133. if (sitar->current_plug == PLUG_TYPE_NONE) {
  4134. sitar_codec_report_plug(codec, 1,
  4135. SND_JACK_HEADPHONE);
  4136. }
  4137. } else {
  4138. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  4139. /* Turn off override */
  4140. sitar_turn_onoff_override(codec, false);
  4141. sitar_find_plug_and_report(codec, plug_type[0]);
  4142. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  4143. pr_debug("Attempt %d found correct plug %d\n", retry,
  4144. plug_type[0]);
  4145. correction = true;
  4146. break;
  4147. }
  4148. }
  4149. /* Turn off override */
  4150. if (!correction)
  4151. sitar_turn_onoff_override(codec, false);
  4152. sitar->mbhc_cfg.mclk_cb_fn(codec, 0, false);
  4153. pr_debug("%s: leave\n", __func__);
  4154. /* unlock sleep */
  4155. wcd9xxx_unlock_sleep(core_res);
  4156. }
  4157. /* called under codec_resource_lock acquisition */
  4158. static void sitar_codec_decide_gpio_plug(struct snd_soc_codec *codec)
  4159. {
  4160. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  4161. short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
  4162. s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
  4163. enum sitar_mbhc_plug_type plug_type[MBHC_NUM_DCE_PLUG_DETECT];
  4164. int i;
  4165. pr_debug("%s: enter\n", __func__);
  4166. sitar_turn_onoff_override(codec, true);
  4167. mb_v[0] = sitar_codec_setup_hs_polling(codec);
  4168. mic_mv[0] = sitar_codec_sta_dce_v(codec, 1, mb_v[0]);
  4169. pr_debug("%s: DCE run 1, mic_mv = %d\n", __func__, mic_mv[0]);
  4170. for (i = 1; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
  4171. mb_v[i] = __sitar_codec_sta_dce(codec, 1, true, true);
  4172. mic_mv[i] = sitar_codec_sta_dce_v(codec, 1 , mb_v[i]);
  4173. pr_debug("%s: DCE run %d, mic_mv = %d\n", __func__, i + 1,
  4174. mic_mv[i]);
  4175. }
  4176. sitar_turn_onoff_override(codec, false);
  4177. if (sitar_hs_gpio_level_remove(sitar)) {
  4178. pr_debug("%s: GPIO value is low when determining plug\n",
  4179. __func__);
  4180. return;
  4181. }
  4182. if (sitar_codec_is_invalid_plug(codec, mic_mv, plug_type)) {
  4183. sitar_schedule_hs_detect_plug(sitar);
  4184. } else if (plug_type[0] == PLUG_TYPE_HEADPHONE) {
  4185. sitar_codec_report_plug(codec, 1, SND_JACK_HEADPHONE);
  4186. sitar_schedule_hs_detect_plug(sitar);
  4187. } else if (plug_type[0] == PLUG_TYPE_HEADSET) {
  4188. pr_debug("%s: Valid plug found, determine plug type\n",
  4189. __func__);
  4190. sitar_find_plug_and_report(codec, plug_type[0]);
  4191. }
  4192. }
  4193. /* called under codec_resource_lock acquisition */
  4194. static void sitar_codec_detect_plug_type(struct snd_soc_codec *codec)
  4195. {
  4196. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  4197. const struct sitar_mbhc_plug_detect_cfg *plug_det =
  4198. SITAR_MBHC_CAL_PLUG_DET_PTR(sitar->mbhc_cfg.calibration);
  4199. if (plug_det->t_ins_complete > 20)
  4200. msleep(plug_det->t_ins_complete);
  4201. else
  4202. usleep_range(plug_det->t_ins_complete * 1000,
  4203. plug_det->t_ins_complete * 1000);
  4204. if (sitar_hs_gpio_level_remove(sitar))
  4205. pr_debug("%s: GPIO value is low when determining "
  4206. "plug\n", __func__);
  4207. else
  4208. sitar_codec_decide_gpio_plug(codec);
  4209. return;
  4210. }
  4211. static void sitar_hs_gpio_handler(struct snd_soc_codec *codec)
  4212. {
  4213. bool insert;
  4214. struct sitar_priv *priv = snd_soc_codec_get_drvdata(codec);
  4215. bool is_removed = false;
  4216. pr_debug("%s: enter\n", __func__);
  4217. priv->in_gpio_handler = true;
  4218. /* Wait here for debounce time */
  4219. usleep_range(SITAR_GPIO_IRQ_DEBOUNCE_TIME_US,
  4220. SITAR_GPIO_IRQ_DEBOUNCE_TIME_US);
  4221. SITAR_ACQUIRE_LOCK(priv->codec_resource_lock);
  4222. /* cancel pending button press */
  4223. if (sitar_cancel_btn_work(priv))
  4224. pr_debug("%s: button press is canceled\n", __func__);
  4225. insert = (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
  4226. priv->mbhc_cfg.gpio_level_insert);
  4227. if ((priv->current_plug == PLUG_TYPE_NONE) && insert) {
  4228. priv->lpi_enabled = false;
  4229. wmb();
  4230. /* cancel detect plug */
  4231. sitar_cancel_hs_detect_plug(priv);
  4232. /* Disable Mic Bias pull down and HPH Switch to GND */
  4233. snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01,
  4234. 0x00);
  4235. snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x01, 0x00);
  4236. sitar_codec_detect_plug_type(codec);
  4237. } else if ((priv->current_plug != PLUG_TYPE_NONE) && !insert) {
  4238. priv->lpi_enabled = false;
  4239. wmb();
  4240. /* cancel detect plug */
  4241. sitar_cancel_hs_detect_plug(priv);
  4242. if (priv->current_plug == PLUG_TYPE_HEADPHONE) {
  4243. sitar_codec_report_plug(codec, 0, SND_JACK_HEADPHONE);
  4244. is_removed = true;
  4245. } else if (priv->current_plug == PLUG_TYPE_HEADSET) {
  4246. sitar_codec_pause_hs_polling(codec);
  4247. sitar_codec_cleanup_hs_polling(codec);
  4248. sitar_codec_report_plug(codec, 0, SND_JACK_HEADSET);
  4249. is_removed = true;
  4250. }
  4251. if (is_removed) {
  4252. /* Enable Mic Bias pull down and HPH Switch to GND */
  4253. snd_soc_update_bits(codec,
  4254. priv->mbhc_bias_regs.ctl_reg, 0x01,
  4255. 0x01);
  4256. snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x01,
  4257. 0x01);
  4258. /* Make sure mic trigger is turned off */
  4259. snd_soc_update_bits(codec,
  4260. priv->mbhc_bias_regs.ctl_reg,
  4261. 0x01, 0x01);
  4262. snd_soc_update_bits(codec,
  4263. priv->mbhc_bias_regs.mbhc_reg,
  4264. 0x90, 0x00);
  4265. /* Reset MBHC State Machine */
  4266. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL,
  4267. 0x08, 0x08);
  4268. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_CLK_CTL,
  4269. 0x08, 0x00);
  4270. /* Turn off override */
  4271. sitar_turn_onoff_override(codec, false);
  4272. }
  4273. }
  4274. priv->in_gpio_handler = false;
  4275. SITAR_RELEASE_LOCK(priv->codec_resource_lock);
  4276. pr_debug("%s: leave\n", __func__);
  4277. }
  4278. static irqreturn_t sitar_mechanical_plug_detect_irq(int irq, void *data)
  4279. {
  4280. int r = IRQ_HANDLED;
  4281. struct snd_soc_codec *codec = data;
  4282. struct wcd9xxx *core = codec->control_data;
  4283. struct wcd9xxx_core_resource *core_res = &core->core_res;
  4284. if (unlikely(wcd9xxx_lock_sleep(core_res) == false)) {
  4285. pr_warn("%s(): Failed to hold suspend\n", __func__);
  4286. r = IRQ_NONE;
  4287. } else {
  4288. sitar_hs_gpio_handler(codec);
  4289. wcd9xxx_unlock_sleep(codec->control_data);
  4290. }
  4291. return r;
  4292. }
  4293. static int sitar_mbhc_init_and_calibrate(struct snd_soc_codec *codec)
  4294. {
  4295. int rc = 0;
  4296. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  4297. sitar->mbhc_cfg.mclk_cb_fn(codec, 1, false);
  4298. sitar_mbhc_init(codec);
  4299. sitar_mbhc_cal(codec);
  4300. sitar_mbhc_calc_thres(codec);
  4301. sitar->mbhc_cfg.mclk_cb_fn(codec, 0, false);
  4302. sitar_codec_calibrate_hs_polling(codec);
  4303. /* Enable Mic Bias pull down and HPH Switch to GND */
  4304. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.ctl_reg,
  4305. 0x01, 0x01);
  4306. snd_soc_update_bits(codec, SITAR_A_MBHC_HPH,
  4307. 0x01, 0x01);
  4308. rc = request_threaded_irq(sitar->mbhc_cfg.gpio_irq,
  4309. NULL,
  4310. sitar_mechanical_plug_detect_irq,
  4311. (IRQF_TRIGGER_RISING |
  4312. IRQF_TRIGGER_FALLING),
  4313. "sitar-hs-gpio", codec);
  4314. if (!IS_ERR_VALUE(rc)) {
  4315. rc = enable_irq_wake(sitar->mbhc_cfg.gpio_irq);
  4316. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL,
  4317. 0x10, 0x10);
  4318. wcd9xxx_enable_irq(codec->control_data,
  4319. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
  4320. wcd9xxx_enable_irq(codec->control_data,
  4321. WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
  4322. /* Bootup time detection */
  4323. sitar_hs_gpio_handler(codec);
  4324. }
  4325. return rc;
  4326. }
  4327. static void mbhc_fw_read(struct work_struct *work)
  4328. {
  4329. struct delayed_work *dwork;
  4330. struct sitar_priv *sitar;
  4331. struct snd_soc_codec *codec;
  4332. const struct firmware *fw;
  4333. int ret = -1, retry = 0;
  4334. dwork = to_delayed_work(work);
  4335. sitar = container_of(dwork, struct sitar_priv,
  4336. mbhc_firmware_dwork);
  4337. codec = sitar->codec;
  4338. while (retry < MBHC_FW_READ_ATTEMPTS) {
  4339. retry++;
  4340. pr_info("%s:Attempt %d to request MBHC firmware\n",
  4341. __func__, retry);
  4342. ret = request_firmware(&fw, "wcd9310/wcd9310_mbhc.bin",
  4343. codec->dev);
  4344. if (ret != 0) {
  4345. usleep_range(MBHC_FW_READ_TIMEOUT,
  4346. MBHC_FW_READ_TIMEOUT);
  4347. } else {
  4348. pr_info("%s: MBHC Firmware read succesful\n", __func__);
  4349. break;
  4350. }
  4351. }
  4352. if (ret != 0) {
  4353. pr_err("%s: Cannot load MBHC firmware use default cal\n",
  4354. __func__);
  4355. } else if (sitar_mbhc_fw_validate(fw) == false) {
  4356. pr_err("%s: Invalid MBHC cal data size use default cal\n",
  4357. __func__);
  4358. release_firmware(fw);
  4359. } else {
  4360. sitar->calibration = (void *)fw->data;
  4361. sitar->mbhc_fw = fw;
  4362. }
  4363. sitar_mbhc_init_and_calibrate(codec);
  4364. }
  4365. int sitar_hs_detect(struct snd_soc_codec *codec,
  4366. const struct sitar_mbhc_config *cfg)
  4367. {
  4368. struct sitar_priv *sitar;
  4369. int rc = 0;
  4370. if (!codec || !cfg->calibration) {
  4371. pr_err("Error: no codec or calibration\n");
  4372. return -EINVAL;
  4373. }
  4374. if (cfg->mclk_rate != SITAR_MCLK_RATE_12288KHZ) {
  4375. if (cfg->mclk_rate == SITAR_MCLK_RATE_9600KHZ)
  4376. pr_err("Error: clock rate %dHz is not yet supported\n",
  4377. cfg->mclk_rate);
  4378. else
  4379. pr_err("Error: unsupported clock rate %d\n",
  4380. cfg->mclk_rate);
  4381. return -EINVAL;
  4382. }
  4383. sitar = snd_soc_codec_get_drvdata(codec);
  4384. sitar->mbhc_cfg = *cfg;
  4385. sitar->in_gpio_handler = false;
  4386. sitar->current_plug = PLUG_TYPE_NONE;
  4387. sitar->lpi_enabled = false;
  4388. sitar_get_mbhc_micbias_regs(codec, &sitar->mbhc_bias_regs);
  4389. /* Put CFILT in fast mode by default */
  4390. snd_soc_update_bits(codec, sitar->mbhc_bias_regs.cfilt_ctl,
  4391. 0x40, SITAR_CFILT_FAST_MODE);
  4392. INIT_DELAYED_WORK(&sitar->mbhc_firmware_dwork, mbhc_fw_read);
  4393. INIT_DELAYED_WORK(&sitar->mbhc_btn_dwork, btn_lpress_fn);
  4394. INIT_WORK(&sitar->hphlocp_work, hphlocp_off_report);
  4395. INIT_WORK(&sitar->hphrocp_work, hphrocp_off_report);
  4396. INIT_WORK(&sitar->hs_correct_plug_work,
  4397. sitar_hs_correct_gpio_plug);
  4398. if (!sitar->mbhc_cfg.read_fw_bin) {
  4399. rc = sitar_mbhc_init_and_calibrate(codec);
  4400. } else {
  4401. schedule_delayed_work(&sitar->mbhc_firmware_dwork,
  4402. usecs_to_jiffies(MBHC_FW_READ_TIMEOUT));
  4403. }
  4404. return rc;
  4405. }
  4406. EXPORT_SYMBOL_GPL(sitar_hs_detect);
  4407. static int sitar_determine_button(const struct sitar_priv *priv,
  4408. const s32 bias_mv)
  4409. {
  4410. s16 *v_btn_low, *v_btn_high;
  4411. struct sitar_mbhc_btn_detect_cfg *btn_det;
  4412. int i, btn = -1;
  4413. btn_det = SITAR_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
  4414. v_btn_low = sitar_mbhc_cal_btn_det_mp(btn_det, SITAR_BTN_DET_V_BTN_LOW);
  4415. v_btn_high = sitar_mbhc_cal_btn_det_mp(btn_det,
  4416. SITAR_BTN_DET_V_BTN_HIGH);
  4417. for (i = 0; i < btn_det->num_btn; i++) {
  4418. if ((v_btn_low[i] <= bias_mv) && (v_btn_high[i] >= bias_mv)) {
  4419. btn = i;
  4420. break;
  4421. }
  4422. }
  4423. if (btn == -1)
  4424. pr_debug("%s: couldn't find button number for mic mv %d\n",
  4425. __func__, bias_mv);
  4426. return btn;
  4427. }
  4428. static int sitar_get_button_mask(const int btn)
  4429. {
  4430. int mask = 0;
  4431. switch (btn) {
  4432. case 0:
  4433. mask = SND_JACK_BTN_0;
  4434. break;
  4435. case 1:
  4436. mask = SND_JACK_BTN_1;
  4437. break;
  4438. case 2:
  4439. mask = SND_JACK_BTN_2;
  4440. break;
  4441. case 3:
  4442. mask = SND_JACK_BTN_3;
  4443. break;
  4444. case 4:
  4445. mask = SND_JACK_BTN_4;
  4446. break;
  4447. case 5:
  4448. mask = SND_JACK_BTN_5;
  4449. break;
  4450. case 6:
  4451. mask = SND_JACK_BTN_6;
  4452. break;
  4453. case 7:
  4454. mask = SND_JACK_BTN_7;
  4455. break;
  4456. }
  4457. return mask;
  4458. }
  4459. static irqreturn_t sitar_dce_handler(int irq, void *data)
  4460. {
  4461. int i, mask;
  4462. short dce, sta, bias_value_dce;
  4463. s32 mv, stamv, bias_mv_dce;
  4464. int btn = -1, meas = 0;
  4465. struct sitar_priv *priv = data;
  4466. const struct sitar_mbhc_btn_detect_cfg *d =
  4467. SITAR_MBHC_CAL_BTN_DET_PTR(priv->mbhc_cfg.calibration);
  4468. short btnmeas[d->n_btn_meas + 1];
  4469. struct snd_soc_codec *codec = priv->codec;
  4470. struct wcd9xxx *core = dev_get_drvdata(priv->codec->dev->parent);
  4471. struct wcd9xxx_core_resource *core_res = &core->core_res;
  4472. int n_btn_meas = d->n_btn_meas;
  4473. u8 mbhc_status = snd_soc_read(codec, SITAR_A_CDC_MBHC_B1_STATUS) & 0x3E;
  4474. pr_debug("%s: enter\n", __func__);
  4475. SITAR_ACQUIRE_LOCK(priv->codec_resource_lock);
  4476. if (priv->mbhc_state == MBHC_STATE_POTENTIAL_RECOVERY) {
  4477. pr_debug("%s: mbhc is being recovered, skip button press\n",
  4478. __func__);
  4479. goto done;
  4480. }
  4481. priv->mbhc_state = MBHC_STATE_POTENTIAL;
  4482. if (!priv->mbhc_polling_active) {
  4483. pr_warn("%s: mbhc polling is not active, skip button press\n",
  4484. __func__);
  4485. goto done;
  4486. }
  4487. dce = sitar_codec_read_dce_result(codec);
  4488. mv = sitar_codec_sta_dce_v(codec, 1, dce);
  4489. /* If GPIO interrupt already kicked in, ignore button press */
  4490. if (priv->in_gpio_handler) {
  4491. pr_debug("%s: GPIO State Changed, ignore button press\n",
  4492. __func__);
  4493. btn = -1;
  4494. goto done;
  4495. }
  4496. if (mbhc_status != SITAR_MBHC_STATUS_REL_DETECTION) {
  4497. if (priv->mbhc_last_resume &&
  4498. !time_after(jiffies, priv->mbhc_last_resume + HZ)) {
  4499. pr_debug("%s: Button is already released shortly after "
  4500. "resume\n", __func__);
  4501. n_btn_meas = 0;
  4502. } else {
  4503. pr_debug("%s: Button is already released without "
  4504. "resume", __func__);
  4505. sta = sitar_codec_read_sta_result(codec);
  4506. stamv = sitar_codec_sta_dce_v(codec, 0, sta);
  4507. btn = sitar_determine_button(priv, mv);
  4508. if (btn != sitar_determine_button(priv, stamv))
  4509. btn = -1;
  4510. goto done;
  4511. }
  4512. }
  4513. /* determine pressed button */
  4514. btnmeas[meas++] = sitar_determine_button(priv, mv);
  4515. pr_debug("%s: meas %d - DCE %d,%d, button %d\n", __func__,
  4516. meas - 1, dce, mv, btnmeas[meas - 1]);
  4517. if (n_btn_meas == 0)
  4518. btn = btnmeas[0];
  4519. for (; ((d->n_btn_meas) && (meas < (d->n_btn_meas + 1))); meas++) {
  4520. bias_value_dce = sitar_codec_sta_dce(codec, 1, false);
  4521. bias_mv_dce = sitar_codec_sta_dce_v(codec, 1, bias_value_dce);
  4522. btnmeas[meas] = sitar_determine_button(priv, bias_mv_dce);
  4523. pr_debug("%s: meas %d - DCE %d,%d, button %d\n",
  4524. __func__, meas, bias_value_dce, bias_mv_dce,
  4525. btnmeas[meas]);
  4526. /* if large enough measurements are collected,
  4527. * start to check if last all n_btn_con measurements were
  4528. * in same button low/high range */
  4529. if (meas + 1 >= d->n_btn_con) {
  4530. for (i = 0; i < d->n_btn_con; i++)
  4531. if ((btnmeas[meas] < 0) ||
  4532. (btnmeas[meas] != btnmeas[meas - i]))
  4533. break;
  4534. if (i == d->n_btn_con) {
  4535. /* button pressed */
  4536. btn = btnmeas[meas];
  4537. break;
  4538. } else if ((n_btn_meas - meas) < (d->n_btn_con - 1)) {
  4539. /* if left measurements are less than n_btn_con,
  4540. * it's impossible to find button number */
  4541. break;
  4542. }
  4543. }
  4544. }
  4545. if (btn >= 0) {
  4546. if (priv->in_gpio_handler) {
  4547. pr_debug("%s: GPIO already triggered, ignore button "
  4548. "press\n", __func__);
  4549. goto done;
  4550. }
  4551. mask = sitar_get_button_mask(btn);
  4552. priv->buttons_pressed |= mask;
  4553. wcd9xxx_lock_sleep(core_res);
  4554. if (schedule_delayed_work(&priv->mbhc_btn_dwork,
  4555. msecs_to_jiffies(400)) == 0) {
  4556. WARN(1, "Button pressed twice without release"
  4557. "event\n");
  4558. wcd9xxx_unlock_sleep(core_res);
  4559. }
  4560. } else {
  4561. pr_debug("%s: bogus button press, too short press?\n",
  4562. __func__);
  4563. }
  4564. done:
  4565. pr_debug("%s: leave\n", __func__);
  4566. SITAR_RELEASE_LOCK(priv->codec_resource_lock);
  4567. return IRQ_HANDLED;
  4568. }
  4569. static int sitar_is_fake_press(struct sitar_priv *priv)
  4570. {
  4571. int i;
  4572. int r = 0;
  4573. struct snd_soc_codec *codec = priv->codec;
  4574. const int dces = MBHC_NUM_DCE_PLUG_DETECT;
  4575. short mb_v;
  4576. for (i = 0; i < dces; i++) {
  4577. usleep_range(10000, 10000);
  4578. if (i == 0) {
  4579. mb_v = sitar_codec_sta_dce(codec, 0, true);
  4580. pr_debug("%s: STA[0]: %d,%d\n", __func__, mb_v,
  4581. sitar_codec_sta_dce_v(codec, 0, mb_v));
  4582. if (mb_v < (short)priv->mbhc_data.v_b1_hu ||
  4583. mb_v > (short)priv->mbhc_data.v_ins_hu) {
  4584. r = 1;
  4585. break;
  4586. }
  4587. } else {
  4588. mb_v = sitar_codec_sta_dce(codec, 1, true);
  4589. pr_debug("%s: DCE[%d]: %d,%d\n", __func__, i, mb_v,
  4590. sitar_codec_sta_dce_v(codec, 1, mb_v));
  4591. if (mb_v < (short)priv->mbhc_data.v_b1_h ||
  4592. mb_v > (short)priv->mbhc_data.v_ins_h) {
  4593. r = 1;
  4594. break;
  4595. }
  4596. }
  4597. }
  4598. return r;
  4599. }
  4600. static irqreturn_t sitar_release_handler(int irq, void *data)
  4601. {
  4602. int ret;
  4603. struct sitar_priv *priv = data;
  4604. struct snd_soc_codec *codec = priv->codec;
  4605. pr_debug("%s: enter\n", __func__);
  4606. SITAR_ACQUIRE_LOCK(priv->codec_resource_lock);
  4607. priv->mbhc_state = MBHC_STATE_RELEASE;
  4608. if (priv->buttons_pressed & SITAR_JACK_BUTTON_MASK) {
  4609. ret = sitar_cancel_btn_work(priv);
  4610. if (ret == 0) {
  4611. pr_debug("%s: Reporting long button release event\n",
  4612. __func__);
  4613. if (priv->mbhc_cfg.button_jack)
  4614. sitar_snd_soc_jack_report(priv,
  4615. priv->mbhc_cfg.button_jack, 0,
  4616. priv->buttons_pressed);
  4617. } else {
  4618. if (sitar_is_fake_press(priv)) {
  4619. pr_debug("%s: Fake button press interrupt\n",
  4620. __func__);
  4621. } else if (priv->mbhc_cfg.button_jack) {
  4622. if (priv->in_gpio_handler) {
  4623. pr_debug("%s: GPIO kicked in, ignore\n",
  4624. __func__);
  4625. } else {
  4626. pr_debug("%s: Reporting short button 0 "
  4627. "press and release\n",
  4628. __func__);
  4629. sitar_snd_soc_jack_report(priv,
  4630. priv->mbhc_cfg.button_jack,
  4631. priv->buttons_pressed,
  4632. priv->buttons_pressed);
  4633. sitar_snd_soc_jack_report(priv,
  4634. priv->mbhc_cfg.button_jack, 0,
  4635. priv->buttons_pressed);
  4636. }
  4637. }
  4638. }
  4639. priv->buttons_pressed &= ~SITAR_JACK_BUTTON_MASK;
  4640. }
  4641. sitar_codec_calibrate_hs_polling(codec);
  4642. if (priv->mbhc_cfg.gpio)
  4643. msleep(SITAR_MBHC_GPIO_REL_DEBOUNCE_TIME_MS);
  4644. sitar_codec_start_hs_polling(codec);
  4645. pr_debug("%s: leave\n", __func__);
  4646. SITAR_RELEASE_LOCK(priv->codec_resource_lock);
  4647. return IRQ_HANDLED;
  4648. }
  4649. static irqreturn_t sitar_hphl_ocp_irq(int irq, void *data)
  4650. {
  4651. struct sitar_priv *sitar = data;
  4652. struct snd_soc_codec *codec;
  4653. struct wcd9xxx *core;
  4654. struct wcd9xxx_core_resource *core_res;
  4655. pr_info("%s: received HPHL OCP irq\n", __func__);
  4656. if (sitar) {
  4657. codec = sitar->codec;
  4658. core = codec->control_data;
  4659. core_res = &core->core_res;
  4660. if ((sitar->hphlocp_cnt < SITAR_OCP_ATTEMPT) &&
  4661. (!sitar->hphrocp_cnt)) {
  4662. pr_info("%s: retry\n", __func__);
  4663. sitar->hphlocp_cnt++;
  4664. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
  4665. 0x00);
  4666. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
  4667. 0x10);
  4668. } else {
  4669. wcd9xxx_disable_irq(core_res,
  4670. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
  4671. sitar->hph_status |= SND_JACK_OC_HPHL;
  4672. if (sitar->mbhc_cfg.headset_jack)
  4673. sitar_snd_soc_jack_report(sitar,
  4674. sitar->mbhc_cfg.headset_jack,
  4675. sitar->hph_status,
  4676. SITAR_JACK_MASK);
  4677. }
  4678. } else {
  4679. pr_err("%s: Bad sitar private data\n", __func__);
  4680. }
  4681. return IRQ_HANDLED;
  4682. }
  4683. static irqreturn_t sitar_hphr_ocp_irq(int irq, void *data)
  4684. {
  4685. struct sitar_priv *sitar = data;
  4686. struct snd_soc_codec *codec;
  4687. struct wcd9xxx *core;
  4688. struct wcd9xxx_core_resource *core_res;
  4689. pr_info("%s: received HPHR OCP irq\n", __func__);
  4690. if (sitar) {
  4691. codec = sitar->codec;
  4692. core = codec->control_data;
  4693. core_res = &core->core_res;
  4694. if ((sitar->hphrocp_cnt < SITAR_OCP_ATTEMPT) &&
  4695. (!sitar->hphlocp_cnt)) {
  4696. pr_info("%s: retry\n", __func__);
  4697. sitar->hphrocp_cnt++;
  4698. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
  4699. 0x00);
  4700. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL, 0x10,
  4701. 0x10);
  4702. } else {
  4703. wcd9xxx_disable_irq(core_res,
  4704. WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
  4705. sitar->hph_status |= SND_JACK_OC_HPHR;
  4706. if (sitar->mbhc_cfg.headset_jack)
  4707. sitar_snd_soc_jack_report(sitar,
  4708. sitar->mbhc_cfg.headset_jack,
  4709. sitar->hph_status,
  4710. SITAR_JACK_MASK);
  4711. }
  4712. } else {
  4713. pr_err("%s: Bad sitar private data\n", __func__);
  4714. }
  4715. return IRQ_HANDLED;
  4716. }
  4717. static irqreturn_t sitar_hs_insert_irq(int irq, void *data)
  4718. {
  4719. struct sitar_priv *priv = data;
  4720. struct snd_soc_codec *codec = priv->codec;
  4721. struct wcd9xxx *core = codec->control_data;
  4722. struct wcd9xxx_core_resource *core_res = &core->core_res;
  4723. pr_debug("%s: enter\n", __func__);
  4724. SITAR_ACQUIRE_LOCK(priv->codec_resource_lock);
  4725. wcd9xxx_disable_irq(core_res, WCD9XXX_IRQ_MBHC_INSERTION);
  4726. snd_soc_update_bits(codec, SITAR_A_CDC_MBHC_INT_CTL, 0x03, 0x00);
  4727. /* Turn off both HPH and MIC line schmitt triggers */
  4728. snd_soc_update_bits(codec, priv->mbhc_bias_regs.mbhc_reg, 0x90, 0x00);
  4729. snd_soc_update_bits(codec, SITAR_A_MBHC_HPH, 0x13, 0x00);
  4730. snd_soc_update_bits(codec, priv->mbhc_bias_regs.ctl_reg, 0x01, 0x00);
  4731. pr_debug("%s: MIC trigger insertion interrupt\n", __func__);
  4732. rmb();
  4733. if (priv->lpi_enabled)
  4734. msleep(100);
  4735. rmb();
  4736. if (!priv->lpi_enabled) {
  4737. pr_debug("%s: lpi is disabled\n", __func__);
  4738. } else if (gpio_get_value_cansleep(priv->mbhc_cfg.gpio) ==
  4739. priv->mbhc_cfg.gpio_level_insert) {
  4740. pr_debug("%s: Valid insertion, "
  4741. "detect plug type\n", __func__);
  4742. sitar_codec_decide_gpio_plug(codec);
  4743. } else {
  4744. pr_debug("%s: Invalid insertion, "
  4745. "stop plug detection\n", __func__);
  4746. }
  4747. SITAR_RELEASE_LOCK(priv->codec_resource_lock);
  4748. return IRQ_HANDLED;
  4749. }
  4750. static bool is_valid_mic_voltage(struct snd_soc_codec *codec, s32 mic_mv)
  4751. {
  4752. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  4753. struct sitar_mbhc_plug_type_cfg *plug_type =
  4754. SITAR_MBHC_CAL_PLUG_TYPE_PTR(sitar->mbhc_cfg.calibration);
  4755. return (!(mic_mv > SITAR_MBHC_FAKE_INSERT_LOW
  4756. && mic_mv < SITAR_MBHC_FAKE_INSERT_HIGH)
  4757. && (mic_mv > plug_type->v_no_mic)
  4758. && (mic_mv < plug_type->v_hs_max)) ? true : false;
  4759. }
  4760. /* called under codec_resource_lock acquisition
  4761. * returns true if mic voltage range is back to normal insertion
  4762. * returns false either if timedout or removed */
  4763. static bool sitar_hs_remove_settle(struct snd_soc_codec *codec)
  4764. {
  4765. int i;
  4766. bool timedout, settled = false;
  4767. s32 mic_mv[MBHC_NUM_DCE_PLUG_DETECT];
  4768. short mb_v[MBHC_NUM_DCE_PLUG_DETECT];
  4769. unsigned long retry = 0, timeout;
  4770. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  4771. timeout = jiffies + msecs_to_jiffies(SITAR_HS_DETECT_PLUG_TIME_MS);
  4772. while (!(timedout = time_after(jiffies, timeout))) {
  4773. retry++;
  4774. if (sitar_hs_gpio_level_remove(sitar)) {
  4775. pr_debug("%s: GPIO indicates removal\n", __func__);
  4776. break;
  4777. }
  4778. if (retry > 1)
  4779. msleep(250);
  4780. else
  4781. msleep(50);
  4782. if (sitar_hs_gpio_level_remove(sitar)) {
  4783. pr_debug("%s: GPIO indicates removal\n", __func__);
  4784. break;
  4785. }
  4786. sitar_turn_onoff_override(codec, true);
  4787. for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++) {
  4788. mb_v[i] = __sitar_codec_sta_dce(codec, 1, true, true);
  4789. mic_mv[i] = sitar_codec_sta_dce_v(codec, 1 , mb_v[i]);
  4790. pr_debug("%s : DCE run %lu, mic_mv = %d(%x)\n",
  4791. __func__, retry, mic_mv[i], mb_v[i]);
  4792. }
  4793. sitar_turn_onoff_override(codec, false);
  4794. if (sitar_hs_gpio_level_remove(sitar)) {
  4795. pr_debug("%s: GPIO indicates removal\n", __func__);
  4796. break;
  4797. }
  4798. for (i = 0; i < MBHC_NUM_DCE_PLUG_DETECT; i++)
  4799. if (!is_valid_mic_voltage(codec, mic_mv[i]))
  4800. break;
  4801. if (i == MBHC_NUM_DCE_PLUG_DETECT) {
  4802. pr_debug("%s: MIC voltage settled\n", __func__);
  4803. settled = true;
  4804. msleep(200);
  4805. break;
  4806. }
  4807. }
  4808. if (timedout)
  4809. pr_debug("%s: Microphone did not settle in %d seconds\n",
  4810. __func__, SITAR_HS_DETECT_PLUG_TIME_MS);
  4811. return settled;
  4812. }
  4813. static irqreturn_t sitar_hs_remove_irq(int irq, void *data)
  4814. {
  4815. struct sitar_priv *priv = data;
  4816. struct snd_soc_codec *codec = priv->codec;
  4817. pr_debug("%s: enter, removal interrupt\n", __func__);
  4818. SITAR_ACQUIRE_LOCK(priv->codec_resource_lock);
  4819. if (sitar_hs_remove_settle(codec))
  4820. sitar_codec_start_hs_polling(codec);
  4821. pr_debug("%s: remove settle done\n", __func__);
  4822. SITAR_RELEASE_LOCK(priv->codec_resource_lock);
  4823. return IRQ_HANDLED;
  4824. }
  4825. static irqreturn_t sitar_slimbus_irq(int irq, void *data)
  4826. {
  4827. struct sitar_priv *priv = data;
  4828. struct snd_soc_codec *codec = priv->codec;
  4829. unsigned long slimbus_value;
  4830. int i, j, k, port_id, ch_mask_temp;
  4831. u8 val;
  4832. for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++) {
  4833. slimbus_value = wcd9xxx_interface_reg_read(codec->control_data,
  4834. SITAR_SLIM_PGD_PORT_INT_STATUS0 + i);
  4835. for_each_set_bit(j, &slimbus_value, BITS_PER_BYTE) {
  4836. port_id = i*8 + j;
  4837. val = wcd9xxx_interface_reg_read(codec->control_data,
  4838. SITAR_SLIM_PGD_PORT_INT_SOURCE0 + port_id);
  4839. if (val & 0x1)
  4840. pr_err_ratelimited("overflow error on port %x, value %x\n",
  4841. port_id, val);
  4842. if (val & 0x2)
  4843. pr_err_ratelimited("underflow error on port %x,value %x\n",
  4844. port_id, val);
  4845. if (val & 0x4) {
  4846. pr_debug("%s: port %x disconnect value %x\n",
  4847. __func__, port_id, val);
  4848. for (k = 0; k < ARRAY_SIZE(sitar_dai); k++) {
  4849. ch_mask_temp = 1 << port_id;
  4850. if (ch_mask_temp &
  4851. priv->dai[k].ch_mask) {
  4852. priv->dai[k].ch_mask &=
  4853. ~ch_mask_temp;
  4854. if (!priv->dai[k].ch_mask)
  4855. wake_up(
  4856. &priv->dai[k].dai_wait);
  4857. }
  4858. }
  4859. }
  4860. }
  4861. wcd9xxx_interface_reg_write(codec->control_data,
  4862. SITAR_SLIM_PGD_PORT_INT_CLR0 + i, slimbus_value);
  4863. val = 0x0;
  4864. }
  4865. return IRQ_HANDLED;
  4866. }
  4867. static int sitar_handle_pdata(struct sitar_priv *sitar)
  4868. {
  4869. struct snd_soc_codec *codec = sitar->codec;
  4870. struct wcd9xxx_pdata *pdata = sitar->pdata;
  4871. int k1, k2, rc = 0;
  4872. u8 leg_mode = pdata->amic_settings.legacy_mode;
  4873. u8 txfe_bypass = pdata->amic_settings.txfe_enable;
  4874. u8 txfe_buff = pdata->amic_settings.txfe_buff;
  4875. u8 flag = pdata->amic_settings.use_pdata;
  4876. u8 i = 0, j = 0;
  4877. u8 val_txfe = 0, value = 0;
  4878. int amic_reg_count = 0;
  4879. if (!pdata) {
  4880. rc = -ENODEV;
  4881. goto done;
  4882. }
  4883. /* Make sure settings are correct */
  4884. if ((pdata->micbias.ldoh_v > SITAR_LDOH_2P85_V) ||
  4885. (pdata->micbias.bias1_cfilt_sel > SITAR_CFILT2_SEL) ||
  4886. (pdata->micbias.bias2_cfilt_sel > SITAR_CFILT2_SEL)) {
  4887. rc = -EINVAL;
  4888. goto done;
  4889. }
  4890. /* figure out k value */
  4891. k1 = sitar_find_k_value(pdata->micbias.ldoh_v,
  4892. pdata->micbias.cfilt1_mv);
  4893. k2 = sitar_find_k_value(pdata->micbias.ldoh_v,
  4894. pdata->micbias.cfilt2_mv);
  4895. if (IS_ERR_VALUE(k1) || IS_ERR_VALUE(k2)) {
  4896. rc = -EINVAL;
  4897. goto done;
  4898. }
  4899. /* Set voltage level and always use LDO */
  4900. snd_soc_update_bits(codec, SITAR_A_LDO_H_MODE_1, 0x0C,
  4901. (pdata->micbias.ldoh_v << 2));
  4902. snd_soc_update_bits(codec, SITAR_A_MICB_CFILT_1_VAL, 0xFC,
  4903. (k1 << 2));
  4904. snd_soc_update_bits(codec, SITAR_A_MICB_CFILT_2_VAL, 0xFC,
  4905. (k2 << 2));
  4906. snd_soc_update_bits(codec, SITAR_A_MICB_1_CTL, 0x60,
  4907. (pdata->micbias.bias1_cfilt_sel << 5));
  4908. snd_soc_update_bits(codec, SITAR_A_MICB_2_CTL, 0x60,
  4909. (pdata->micbias.bias2_cfilt_sel << 5));
  4910. /* Set micbias capless mode */
  4911. snd_soc_update_bits(codec, SITAR_A_MICB_1_CTL, 0x10,
  4912. (pdata->micbias.bias1_cap_mode << 4));
  4913. snd_soc_update_bits(codec, SITAR_A_MICB_2_CTL, 0x10,
  4914. (pdata->micbias.bias2_cap_mode << 4));
  4915. amic_reg_count = (NUM_AMIC % 2) ? NUM_AMIC + 1 : NUM_AMIC;
  4916. for (i = 0; i < amic_reg_count; j++, i += 2) {
  4917. if (flag & (0x01 << i)) {
  4918. value = (leg_mode & (0x01 << i)) ? 0x10 : 0x00;
  4919. val_txfe = (txfe_bypass & (0x01 << i)) ? 0x20 : 0x00;
  4920. val_txfe = val_txfe |
  4921. ((txfe_buff & (0x01 << i)) ? 0x10 : 0x00);
  4922. snd_soc_update_bits(codec, SITAR_A_TX_1_2_EN + j * 10,
  4923. 0x10, value);
  4924. snd_soc_update_bits(codec,
  4925. SITAR_A_TX_1_2_TEST_EN + j * 10,
  4926. 0x30, val_txfe);
  4927. }
  4928. if (flag & (0x01 << (i + 1))) {
  4929. value = (leg_mode & (0x01 << (i + 1))) ? 0x01 : 0x00;
  4930. val_txfe = (txfe_bypass &
  4931. (0x01 << (i + 1))) ? 0x02 : 0x00;
  4932. val_txfe |= (txfe_buff &
  4933. (0x01 << (i + 1))) ? 0x01 : 0x00;
  4934. snd_soc_update_bits(codec, SITAR_A_TX_1_2_EN + j * 10,
  4935. 0x01, value);
  4936. snd_soc_update_bits(codec,
  4937. SITAR_A_TX_1_2_TEST_EN + j * 10,
  4938. 0x03, val_txfe);
  4939. }
  4940. }
  4941. if (flag & 0x40) {
  4942. value = (leg_mode & 0x40) ? 0x10 : 0x00;
  4943. value = value | ((txfe_bypass & 0x40) ? 0x02 : 0x00);
  4944. value = value | ((txfe_buff & 0x40) ? 0x01 : 0x00);
  4945. snd_soc_update_bits(codec, SITAR_A_TX_4_MBHC_EN,
  4946. 0x13, value);
  4947. }
  4948. if (pdata->ocp.use_pdata) {
  4949. /* not defined in CODEC specification */
  4950. if (pdata->ocp.hph_ocp_limit == 1 ||
  4951. pdata->ocp.hph_ocp_limit == 5) {
  4952. rc = -EINVAL;
  4953. goto done;
  4954. }
  4955. snd_soc_update_bits(codec, SITAR_A_RX_COM_OCP_CTL,
  4956. 0x0F, pdata->ocp.num_attempts);
  4957. snd_soc_write(codec, SITAR_A_RX_COM_OCP_COUNT,
  4958. ((pdata->ocp.run_time << 4) | pdata->ocp.wait_time));
  4959. snd_soc_update_bits(codec, SITAR_A_RX_HPH_OCP_CTL,
  4960. 0xE0, (pdata->ocp.hph_ocp_limit << 5));
  4961. }
  4962. done:
  4963. return rc;
  4964. }
  4965. static const struct sitar_reg_mask_val sitar_1_1_reg_defaults[] = {
  4966. SITAR_REG_VAL(SITAR_A_MICB_1_INT_RBIAS, 0x24),
  4967. SITAR_REG_VAL(SITAR_A_MICB_2_INT_RBIAS, 0x24),
  4968. SITAR_REG_VAL(SITAR_A_RX_HPH_BIAS_PA, 0x57),
  4969. SITAR_REG_VAL(SITAR_A_RX_HPH_BIAS_LDO, 0x56),
  4970. SITAR_REG_VAL(SITAR_A_RX_EAR_BIAS_PA, 0xA6),
  4971. SITAR_REG_VAL(SITAR_A_RX_EAR_GAIN, 0x02),
  4972. SITAR_REG_VAL(SITAR_A_RX_EAR_VCM, 0x03),
  4973. SITAR_REG_VAL(SITAR_A_RX_LINE_BIAS_PA, 0xA7),
  4974. SITAR_REG_VAL(SITAR_A_CDC_RX1_B5_CTL, 0x78),
  4975. SITAR_REG_VAL(SITAR_A_CDC_RX2_B5_CTL, 0x78),
  4976. SITAR_REG_VAL(SITAR_A_CDC_RX3_B5_CTL, 0x78),
  4977. SITAR_REG_VAL(SITAR_A_CDC_RX1_B6_CTL, 0x80),
  4978. SITAR_REG_VAL(SITAR_A_CDC_CLSG_FREQ_THRESH_B3_CTL, 0x1B),
  4979. SITAR_REG_VAL(SITAR_A_CDC_CLSG_FREQ_THRESH_B4_CTL, 0x5B),
  4980. };
  4981. static void sitar_update_reg_defaults(struct snd_soc_codec *codec)
  4982. {
  4983. u32 i;
  4984. for (i = 0; i < ARRAY_SIZE(sitar_1_1_reg_defaults); i++)
  4985. snd_soc_write(codec, sitar_1_1_reg_defaults[i].reg,
  4986. sitar_1_1_reg_defaults[i].val);
  4987. }
  4988. static const struct sitar_reg_mask_val sitar_i2c_codec_reg_init_val[] = {
  4989. {WCD9XXX_A_CHIP_CTL, 0x1, 0x1},
  4990. };
  4991. static const struct sitar_reg_mask_val sitar_codec_reg_init_val[] = {
  4992. /* Initialize current threshold to 350MA
  4993. * number of wait and run cycles to 4096
  4994. */
  4995. {SITAR_A_RX_HPH_OCP_CTL, 0xE0, 0x60},
  4996. {SITAR_A_RX_COM_OCP_COUNT, 0xFF, 0xFF},
  4997. {SITAR_A_QFUSE_CTL, 0xFF, 0x03},
  4998. /* Initialize gain registers to use register gain */
  4999. {SITAR_A_RX_HPH_L_GAIN, 0x10, 0x10},
  5000. {SITAR_A_RX_HPH_R_GAIN, 0x10, 0x10},
  5001. {SITAR_A_RX_LINE_1_GAIN, 0x10, 0x10},
  5002. {SITAR_A_RX_LINE_2_GAIN, 0x10, 0x10},
  5003. /* Set the MICBIAS default output as pull down*/
  5004. {SITAR_A_MICB_1_CTL, 0x01, 0x01},
  5005. {SITAR_A_MICB_2_CTL, 0x01, 0x01},
  5006. /* Initialize mic biases to differential mode */
  5007. {SITAR_A_MICB_1_INT_RBIAS, 0x24, 0x24},
  5008. {SITAR_A_MICB_2_INT_RBIAS, 0x24, 0x24},
  5009. {SITAR_A_CDC_CONN_CLSG_CTL, 0x3C, 0x14},
  5010. /* Use 16 bit sample size for TX1 to TX6 */
  5011. {SITAR_A_CDC_CONN_TX_SB_B1_CTL, 0x30, 0x20},
  5012. {SITAR_A_CDC_CONN_TX_SB_B2_CTL, 0x30, 0x20},
  5013. {SITAR_A_CDC_CONN_TX_SB_B3_CTL, 0x30, 0x20},
  5014. {SITAR_A_CDC_CONN_TX_SB_B4_CTL, 0x30, 0x20},
  5015. {SITAR_A_CDC_CONN_TX_SB_B5_CTL, 0x30, 0x20},
  5016. {SITAR_A_CDC_CLK_TX_CLK_EN_B1_CTL, 0x1, 0x1},
  5017. /* Use 16 bit sample size for RX */
  5018. {SITAR_A_CDC_CONN_RX_SB_B1_CTL, 0xFF, 0xAA},
  5019. {SITAR_A_CDC_CONN_RX_SB_B2_CTL, 0x02, 0x02},
  5020. /*enable HPF filter for TX paths */
  5021. {SITAR_A_CDC_TX1_MUX_CTL, 0x8, 0x0},
  5022. {SITAR_A_CDC_TX2_MUX_CTL, 0x8, 0x0},
  5023. /*enable External clock select*/
  5024. {SITAR_A_CDC_CLK_MCLK_CTL, 0x01, 0x01},
  5025. };
  5026. static void sitar_i2c_codec_init_reg(struct snd_soc_codec *codec)
  5027. {
  5028. u32 i;
  5029. for (i = 0; i < ARRAY_SIZE(sitar_i2c_codec_reg_init_val); i++)
  5030. snd_soc_update_bits(codec, sitar_i2c_codec_reg_init_val[i].reg,
  5031. sitar_i2c_codec_reg_init_val[i].mask,
  5032. sitar_i2c_codec_reg_init_val[i].val);
  5033. }
  5034. static void sitar_codec_init_reg(struct snd_soc_codec *codec)
  5035. {
  5036. u32 i;
  5037. for (i = 0; i < ARRAY_SIZE(sitar_codec_reg_init_val); i++)
  5038. snd_soc_update_bits(codec, sitar_codec_reg_init_val[i].reg,
  5039. sitar_codec_reg_init_val[i].mask,
  5040. sitar_codec_reg_init_val[i].val);
  5041. }
  5042. static int sitar_codec_probe(struct snd_soc_codec *codec)
  5043. {
  5044. struct wcd9xxx *core;
  5045. struct sitar_priv *sitar;
  5046. struct snd_soc_dapm_context *dapm = &codec->dapm;
  5047. int ret = 0;
  5048. int i;
  5049. u8 sitar_version;
  5050. void *ptr = NULL;
  5051. struct wcd9xxx_core_resource *core_res;
  5052. codec->control_data = dev_get_drvdata(codec->dev->parent);
  5053. core = codec->control_data;
  5054. core_res = &core->core_res;
  5055. sitar = kzalloc(sizeof(struct sitar_priv), GFP_KERNEL);
  5056. if (!sitar) {
  5057. dev_err(codec->dev, "Failed to allocate private data\n");
  5058. return -ENOMEM;
  5059. }
  5060. for (i = 0; i < NUM_DECIMATORS; i++) {
  5061. tx_hpf_work[i].sitar = sitar;
  5062. tx_hpf_work[i].decimator = i + 1;
  5063. INIT_DELAYED_WORK(&tx_hpf_work[i].dwork,
  5064. tx_hpf_corner_freq_callback);
  5065. }
  5066. /* Make sure mbhc micbias register addresses are zeroed out */
  5067. memset(&sitar->mbhc_bias_regs, 0,
  5068. sizeof(struct mbhc_micbias_regs));
  5069. sitar->cfilt_k_value = 0;
  5070. sitar->mbhc_micbias_switched = false;
  5071. /* Make sure mbhc intenal calibration data is zeroed out */
  5072. memset(&sitar->mbhc_data, 0,
  5073. sizeof(struct mbhc_internal_cal_data));
  5074. sitar->mbhc_data.t_sta_dce = DEFAULT_DCE_STA_WAIT;
  5075. sitar->mbhc_data.t_dce = DEFAULT_DCE_WAIT;
  5076. sitar->mbhc_data.t_sta = DEFAULT_STA_WAIT;
  5077. snd_soc_codec_set_drvdata(codec, sitar);
  5078. sitar->mclk_enabled = false;
  5079. sitar->bandgap_type = SITAR_BANDGAP_OFF;
  5080. sitar->clock_active = false;
  5081. sitar->config_mode_active = false;
  5082. sitar->mbhc_polling_active = false;
  5083. sitar->no_mic_headset_override = false;
  5084. mutex_init(&sitar->codec_resource_lock);
  5085. sitar->codec = codec;
  5086. sitar->mbhc_state = MBHC_STATE_NONE;
  5087. sitar->mbhc_last_resume = 0;
  5088. sitar->pdata = dev_get_platdata(codec->dev->parent);
  5089. sitar_update_reg_defaults(codec);
  5090. sitar_codec_init_reg(codec);
  5091. sitar->intf_type = wcd9xxx_get_intf_type();
  5092. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C)
  5093. sitar_i2c_codec_init_reg(codec);
  5094. for (i = 0; i < COMPANDER_MAX; i++) {
  5095. sitar->comp_enabled[i] = 0;
  5096. sitar->comp_fs[i] = COMPANDER_FS_48KHZ;
  5097. }
  5098. ret = sitar_handle_pdata(sitar);
  5099. if (IS_ERR_VALUE(ret)) {
  5100. pr_err("%s: bad pdata\n", __func__);
  5101. goto err_pdata;
  5102. }
  5103. snd_soc_add_codec_controls(codec, sitar_snd_controls,
  5104. ARRAY_SIZE(sitar_snd_controls));
  5105. snd_soc_dapm_new_controls(dapm, sitar_dapm_widgets,
  5106. ARRAY_SIZE(sitar_dapm_widgets));
  5107. ptr = kmalloc((sizeof(sitar_rx_chs) +
  5108. sizeof(sitar_tx_chs)), GFP_KERNEL);
  5109. if (!ptr) {
  5110. pr_err("%s: no mem for slim chan ctl data\n", __func__);
  5111. ret = -ENOMEM;
  5112. goto err_nomem_slimch;
  5113. }
  5114. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_I2C) {
  5115. snd_soc_dapm_new_controls(dapm, sitar_dapm_i2s_widgets,
  5116. ARRAY_SIZE(sitar_dapm_i2s_widgets));
  5117. snd_soc_dapm_add_routes(dapm, audio_i2s_map,
  5118. ARRAY_SIZE(audio_i2s_map));
  5119. for (i = 0; i < ARRAY_SIZE(sitar_i2s_dai); i++)
  5120. INIT_LIST_HEAD(&sitar->dai[i].wcd9xxx_ch_list);
  5121. }
  5122. if (sitar->intf_type == WCD9XXX_INTERFACE_TYPE_SLIMBUS) {
  5123. for (i = 0; i < NUM_CODEC_DAIS; i++) {
  5124. INIT_LIST_HEAD(&sitar->dai[i].wcd9xxx_ch_list);
  5125. init_waitqueue_head(&sitar->dai[i].dai_wait);
  5126. }
  5127. }
  5128. core->num_rx_port = SITAR_RX_MAX;
  5129. core->rx_chs = ptr;
  5130. memcpy(core->rx_chs, sitar_rx_chs, sizeof(sitar_rx_chs));
  5131. core->num_tx_port = SITAR_TX_MAX;
  5132. core->tx_chs = ptr + sizeof(sitar_rx_chs);
  5133. memcpy(core->tx_chs, sitar_tx_chs, sizeof(sitar_tx_chs));
  5134. snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
  5135. sitar_version = snd_soc_read(codec, WCD9XXX_A_CHIP_VERSION);
  5136. pr_info("%s : Sitar version reg 0x%2x\n", __func__, (u32)sitar_version);
  5137. sitar_version &= 0x1F;
  5138. pr_info("%s : Sitar version %u\n", __func__, (u32)sitar_version);
  5139. snd_soc_dapm_sync(dapm);
  5140. ret = wcd9xxx_request_irq(core_res,
  5141. WCD9XXX_IRQ_MBHC_INSERTION,
  5142. sitar_hs_insert_irq, "Headset insert detect", sitar);
  5143. if (ret) {
  5144. pr_err("%s: Failed to request irq %d\n", __func__,
  5145. WCD9XXX_IRQ_MBHC_INSERTION);
  5146. goto err_insert_irq;
  5147. }
  5148. wcd9xxx_disable_irq(core_res, WCD9XXX_IRQ_MBHC_INSERTION);
  5149. ret = wcd9xxx_request_irq(core_res,
  5150. WCD9XXX_IRQ_MBHC_REMOVAL,
  5151. sitar_hs_remove_irq, "Headset remove detect", sitar);
  5152. if (ret) {
  5153. pr_err("%s: Failed to request irq %d\n", __func__,
  5154. WCD9XXX_IRQ_MBHC_REMOVAL);
  5155. goto err_remove_irq;
  5156. }
  5157. ret = wcd9xxx_request_irq(core_res,
  5158. WCD9XXX_IRQ_MBHC_POTENTIAL,
  5159. sitar_dce_handler, "DC Estimation detect", sitar);
  5160. if (ret) {
  5161. pr_err("%s: Failed to request irq %d\n", __func__,
  5162. WCD9XXX_IRQ_MBHC_POTENTIAL);
  5163. goto err_potential_irq;
  5164. }
  5165. ret = wcd9xxx_request_irq(core_res,
  5166. WCD9XXX_IRQ_MBHC_RELEASE,
  5167. sitar_release_handler,
  5168. "Button Release detect", sitar);
  5169. if (ret) {
  5170. pr_err("%s: Failed to request irq %d\n", __func__,
  5171. WCD9XXX_IRQ_MBHC_RELEASE);
  5172. goto err_release_irq;
  5173. }
  5174. ret = wcd9xxx_request_irq(core_res, WCD9XXX_IRQ_SLIMBUS,
  5175. sitar_slimbus_irq, "SLIMBUS Slave", sitar);
  5176. if (ret) {
  5177. pr_err("%s: Failed to request irq %d\n", __func__,
  5178. WCD9XXX_IRQ_SLIMBUS);
  5179. goto err_slimbus_irq;
  5180. }
  5181. for (i = 0; i < WCD9XXX_SLIM_NUM_PORT_REG; i++)
  5182. wcd9xxx_interface_reg_write(codec->control_data,
  5183. SITAR_SLIM_PGD_PORT_INT_EN0 + i, 0xFF);
  5184. ret = wcd9xxx_request_irq(core_res,
  5185. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT,
  5186. sitar_hphl_ocp_irq,
  5187. "HPH_L OCP detect", sitar);
  5188. if (ret) {
  5189. pr_err("%s: Failed to request irq %d\n", __func__,
  5190. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
  5191. goto err_hphl_ocp_irq;
  5192. }
  5193. wcd9xxx_disable_irq(core_res,
  5194. WCD9XXX_IRQ_HPH_PA_OCPL_FAULT);
  5195. ret = wcd9xxx_request_irq(core_res,
  5196. WCD9XXX_IRQ_HPH_PA_OCPR_FAULT,
  5197. sitar_hphr_ocp_irq, "HPH_R OCP detect",
  5198. sitar);
  5199. if (ret) {
  5200. pr_err("%s: Failed to request irq %d\n", __func__,
  5201. WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
  5202. goto err_hphr_ocp_irq;
  5203. }
  5204. wcd9xxx_disable_irq(core_res, WCD9XXX_IRQ_HPH_PA_OCPR_FAULT);
  5205. codec->ignore_pmdown_time = 1;
  5206. #ifdef CONFIG_DEBUG_FS
  5207. debug_sitar_priv = sitar;
  5208. #endif
  5209. return ret;
  5210. err_hphr_ocp_irq:
  5211. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_HPH_PA_OCPL_FAULT,
  5212. sitar);
  5213. err_hphl_ocp_irq:
  5214. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_SLIMBUS, sitar);
  5215. err_slimbus_irq:
  5216. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_RELEASE, sitar);
  5217. err_release_irq:
  5218. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_POTENTIAL,
  5219. sitar);
  5220. err_potential_irq:
  5221. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_REMOVAL, sitar);
  5222. err_remove_irq:
  5223. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_INSERTION,
  5224. sitar);
  5225. err_insert_irq:
  5226. kfree(ptr);
  5227. err_nomem_slimch:
  5228. err_pdata:
  5229. mutex_destroy(&sitar->codec_resource_lock);
  5230. kfree(sitar);
  5231. return ret;
  5232. }
  5233. static int sitar_codec_remove(struct snd_soc_codec *codec)
  5234. {
  5235. struct sitar_priv *sitar = snd_soc_codec_get_drvdata(codec);
  5236. struct wcd9xxx *core = codec->control_data;
  5237. struct wcd9xxx_core_resource *core_res = &core->core_res;
  5238. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_SLIMBUS, sitar);
  5239. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_RELEASE, sitar);
  5240. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_POTENTIAL,
  5241. sitar);
  5242. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_REMOVAL, sitar);
  5243. wcd9xxx_free_irq(core_res, WCD9XXX_IRQ_MBHC_INSERTION,
  5244. sitar);
  5245. SITAR_ACQUIRE_LOCK(sitar->codec_resource_lock);
  5246. sitar_codec_disable_clock_block(codec);
  5247. SITAR_RELEASE_LOCK(sitar->codec_resource_lock);
  5248. sitar_codec_enable_bandgap(codec, SITAR_BANDGAP_OFF);
  5249. if (sitar->mbhc_fw)
  5250. release_firmware(sitar->mbhc_fw);
  5251. mutex_destroy(&sitar->codec_resource_lock);
  5252. kfree(sitar);
  5253. return 0;
  5254. }
  5255. static struct snd_soc_codec_driver soc_codec_dev_sitar = {
  5256. .probe = sitar_codec_probe,
  5257. .remove = sitar_codec_remove,
  5258. .read = sitar_read,
  5259. .write = sitar_write,
  5260. .readable_register = sitar_readable,
  5261. .volatile_register = sitar_volatile,
  5262. .reg_cache_size = SITAR_CACHE_SIZE,
  5263. .reg_cache_default = sitar_reg_defaults,
  5264. .reg_word_size = 1,
  5265. };
  5266. #ifdef CONFIG_DEBUG_FS
  5267. static struct dentry *debugfs_poke;
  5268. static int codec_debug_open(struct inode *inode, struct file *file)
  5269. {
  5270. file->private_data = inode->i_private;
  5271. return 0;
  5272. }
  5273. static ssize_t codec_debug_write(struct file *filp,
  5274. const char __user *ubuf, size_t cnt, loff_t *ppos)
  5275. {
  5276. char lbuf[32];
  5277. char *buf;
  5278. int rc;
  5279. if (cnt > sizeof(lbuf) - 1)
  5280. return -EINVAL;
  5281. rc = copy_from_user(lbuf, ubuf, cnt);
  5282. if (rc)
  5283. return -EFAULT;
  5284. lbuf[cnt] = '\0';
  5285. buf = (char *)lbuf;
  5286. debug_sitar_priv->no_mic_headset_override = (*strsep(&buf, " ") == '0')
  5287. ? false : true;
  5288. return rc;
  5289. }
  5290. static const struct file_operations codec_debug_ops = {
  5291. .open = codec_debug_open,
  5292. .write = codec_debug_write,
  5293. };
  5294. #endif
  5295. #ifdef CONFIG_PM
  5296. static int sitar_suspend(struct device *dev)
  5297. {
  5298. dev_dbg(dev, "%s: system suspend\n", __func__);
  5299. return 0;
  5300. }
  5301. static int sitar_resume(struct device *dev)
  5302. {
  5303. struct platform_device *pdev = to_platform_device(dev);
  5304. struct sitar_priv *sitar = platform_get_drvdata(pdev);
  5305. dev_dbg(dev, "%s: system resume\n", __func__);
  5306. sitar->mbhc_last_resume = jiffies;
  5307. return 0;
  5308. }
  5309. static const struct dev_pm_ops sitar_pm_ops = {
  5310. .suspend = sitar_suspend,
  5311. .resume = sitar_resume,
  5312. };
  5313. #endif
  5314. static int __devinit sitar_probe(struct platform_device *pdev)
  5315. {
  5316. int ret = 0;
  5317. pr_err("%s\n", __func__);
  5318. #ifdef CONFIG_DEBUG_FS
  5319. debugfs_poke = debugfs_create_file("TRRS",
  5320. S_IFREG | S_IRUGO, NULL, (void *) "TRRS", &codec_debug_ops);
  5321. #endif
  5322. if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_SLIMBUS)
  5323. ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_sitar,
  5324. sitar_dai, ARRAY_SIZE(sitar_dai));
  5325. else if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
  5326. ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_sitar,
  5327. sitar_i2s_dai, ARRAY_SIZE(sitar_i2s_dai));
  5328. return ret;
  5329. }
  5330. static int __devexit sitar_remove(struct platform_device *pdev)
  5331. {
  5332. snd_soc_unregister_codec(&pdev->dev);
  5333. #ifdef CONFIG_DEBUG_FS
  5334. debugfs_remove(debugfs_poke);
  5335. #endif
  5336. return 0;
  5337. }
  5338. static struct platform_driver sitar_codec_driver = {
  5339. .probe = sitar_probe,
  5340. .remove = sitar_remove,
  5341. .driver = {
  5342. .name = "sitar_codec",
  5343. .owner = THIS_MODULE,
  5344. #ifdef CONFIG_PM
  5345. .pm = &sitar_pm_ops,
  5346. #endif
  5347. },
  5348. };
  5349. static int __init sitar_codec_init(void)
  5350. {
  5351. return platform_driver_register(&sitar_codec_driver);
  5352. }
  5353. static void __exit sitar_codec_exit(void)
  5354. {
  5355. platform_driver_unregister(&sitar_codec_driver);
  5356. }
  5357. module_init(sitar_codec_init);
  5358. module_exit(sitar_codec_exit);
  5359. MODULE_DESCRIPTION("Sitar codec driver");
  5360. MODULE_VERSION("1.0");
  5361. MODULE_LICENSE("GPL v2");