delta.c 25 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496,
  5. * Audiophile, Digigram VX442
  6. *
  7. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/slab.h>
  29. #include <linux/mutex.h>
  30. #include <sound/core.h>
  31. #include <sound/cs8427.h>
  32. #include <sound/asoundef.h>
  33. #include "ice1712.h"
  34. #include "delta.h"
  35. #define SND_CS8403
  36. #include <sound/cs8403.h>
  37. /*
  38. * CS8427 via SPI mode (for Audiophile), emulated I2C
  39. */
  40. /* send 8 bits */
  41. static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp)
  42. {
  43. int idx;
  44. for (idx = 7; idx >= 0; idx--) {
  45. tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK);
  46. if (data & (1 << idx))
  47. tmp |= ICE1712_DELTA_AP_DOUT;
  48. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  49. udelay(5);
  50. tmp |= ICE1712_DELTA_AP_CCLK;
  51. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  52. udelay(5);
  53. }
  54. }
  55. /* read 8 bits */
  56. static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp)
  57. {
  58. unsigned char data = 0;
  59. int idx;
  60. for (idx = 7; idx >= 0; idx--) {
  61. tmp &= ~ICE1712_DELTA_AP_CCLK;
  62. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  63. udelay(5);
  64. if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN)
  65. data |= 1 << idx;
  66. tmp |= ICE1712_DELTA_AP_CCLK;
  67. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  68. udelay(5);
  69. }
  70. return data;
  71. }
  72. /* assert chip select */
  73. static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice)
  74. {
  75. unsigned char tmp;
  76. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  77. switch (ice->eeprom.subvendor) {
  78. case ICE1712_SUBDEVICE_DELTA1010E:
  79. case ICE1712_SUBDEVICE_DELTA1010LT:
  80. tmp &= ~ICE1712_DELTA_1010LT_CS;
  81. tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427;
  82. break;
  83. case ICE1712_SUBDEVICE_AUDIOPHILE:
  84. case ICE1712_SUBDEVICE_DELTA410:
  85. tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC;
  86. tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL;
  87. break;
  88. case ICE1712_SUBDEVICE_DELTA66E:
  89. tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A |
  90. ICE1712_DELTA_66E_CS_CHIP_B;
  91. tmp &= ~ICE1712_DELTA_66E_CS_CS8427;
  92. break;
  93. case ICE1712_SUBDEVICE_VX442:
  94. tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B;
  95. tmp &= ~ICE1712_VX442_CS_DIGITAL;
  96. break;
  97. }
  98. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  99. udelay(5);
  100. return tmp;
  101. }
  102. /* deassert chip select */
  103. static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp)
  104. {
  105. switch (ice->eeprom.subvendor) {
  106. case ICE1712_SUBDEVICE_DELTA1010E:
  107. case ICE1712_SUBDEVICE_DELTA1010LT:
  108. tmp &= ~ICE1712_DELTA_1010LT_CS;
  109. tmp |= ICE1712_DELTA_1010LT_CS_NONE;
  110. break;
  111. case ICE1712_SUBDEVICE_AUDIOPHILE:
  112. case ICE1712_SUBDEVICE_DELTA410:
  113. tmp |= ICE1712_DELTA_AP_CS_DIGITAL;
  114. break;
  115. case ICE1712_SUBDEVICE_DELTA66E:
  116. tmp |= ICE1712_DELTA_66E_CS_CS8427;
  117. break;
  118. case ICE1712_SUBDEVICE_VX442:
  119. tmp |= ICE1712_VX442_CS_DIGITAL;
  120. break;
  121. }
  122. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  123. }
  124. /* sequential write */
  125. static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  126. {
  127. struct snd_ice1712 *ice = device->bus->private_data;
  128. int res = count;
  129. unsigned char tmp;
  130. mutex_lock(&ice->gpio_mutex);
  131. tmp = ap_cs8427_codec_select(ice);
  132. ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */
  133. while (count-- > 0)
  134. ap_cs8427_write_byte(ice, *bytes++, tmp);
  135. ap_cs8427_codec_deassert(ice, tmp);
  136. mutex_unlock(&ice->gpio_mutex);
  137. return res;
  138. }
  139. /* sequential read */
  140. static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count)
  141. {
  142. struct snd_ice1712 *ice = device->bus->private_data;
  143. int res = count;
  144. unsigned char tmp;
  145. mutex_lock(&ice->gpio_mutex);
  146. tmp = ap_cs8427_codec_select(ice);
  147. ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */
  148. while (count-- > 0)
  149. *bytes++ = ap_cs8427_read_byte(ice, tmp);
  150. ap_cs8427_codec_deassert(ice, tmp);
  151. mutex_unlock(&ice->gpio_mutex);
  152. return res;
  153. }
  154. static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr)
  155. {
  156. if (addr == 0x10)
  157. return 1;
  158. return -ENOENT;
  159. }
  160. static struct snd_i2c_ops ap_cs8427_i2c_ops = {
  161. .sendbytes = ap_cs8427_sendbytes,
  162. .readbytes = ap_cs8427_readbytes,
  163. .probeaddr = ap_cs8427_probeaddr,
  164. };
  165. /*
  166. */
  167. static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits)
  168. {
  169. unsigned char tmp, mask1, mask2;
  170. int idx;
  171. /* send byte to transmitter */
  172. mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK;
  173. mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA;
  174. mutex_lock(&ice->gpio_mutex);
  175. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  176. for (idx = 7; idx >= 0; idx--) {
  177. tmp &= ~(mask1 | mask2);
  178. if (bits & (1 << idx))
  179. tmp |= mask2;
  180. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  181. udelay(100);
  182. tmp |= mask1;
  183. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  184. udelay(100);
  185. }
  186. tmp &= ~mask1;
  187. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  188. mutex_unlock(&ice->gpio_mutex);
  189. }
  190. static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  191. {
  192. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits);
  193. }
  194. static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  195. {
  196. unsigned int val;
  197. int change;
  198. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  199. spin_lock_irq(&ice->reg_lock);
  200. change = ice->spdif.cs8403_bits != val;
  201. ice->spdif.cs8403_bits = val;
  202. if (change && ice->playback_pro_substream == NULL) {
  203. spin_unlock_irq(&ice->reg_lock);
  204. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  205. } else {
  206. spin_unlock_irq(&ice->reg_lock);
  207. }
  208. return change;
  209. }
  210. static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  211. {
  212. snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits);
  213. }
  214. static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol)
  215. {
  216. unsigned int val;
  217. int change;
  218. val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958);
  219. spin_lock_irq(&ice->reg_lock);
  220. change = ice->spdif.cs8403_stream_bits != val;
  221. ice->spdif.cs8403_stream_bits = val;
  222. if (change && ice->playback_pro_substream != NULL) {
  223. spin_unlock_irq(&ice->reg_lock);
  224. snd_ice1712_delta_cs8403_spdif_write(ice, val);
  225. } else {
  226. spin_unlock_irq(&ice->reg_lock);
  227. }
  228. return change;
  229. }
  230. /*
  231. * AK4524 on Delta 44 and 66 to choose the chip mask
  232. */
  233. static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  234. {
  235. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  236. struct snd_ice1712 *ice = ak->private_data[0];
  237. snd_ice1712_save_gpio_status(ice);
  238. priv->cs_mask =
  239. priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A :
  240. ICE1712_DELTA_CODEC_CHIP_B;
  241. }
  242. /*
  243. * AK4524 on Delta1010LT to choose the chip address
  244. */
  245. static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  246. {
  247. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  248. struct snd_ice1712 *ice = ak->private_data[0];
  249. snd_ice1712_save_gpio_status(ice);
  250. priv->cs_mask = ICE1712_DELTA_1010LT_CS;
  251. priv->cs_addr = chip << 4;
  252. }
  253. /*
  254. * AK4524 on Delta66 rev E to choose the chip address
  255. */
  256. static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  257. {
  258. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  259. struct snd_ice1712 *ice = ak->private_data[0];
  260. snd_ice1712_save_gpio_status(ice);
  261. priv->cs_mask =
  262. priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A :
  263. ICE1712_DELTA_66E_CS_CHIP_B;
  264. }
  265. /*
  266. * AK4528 on VX442 to choose the chip mask
  267. */
  268. static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  269. {
  270. struct snd_ak4xxx_private *priv = (void *)ak->private_value[0];
  271. struct snd_ice1712 *ice = ak->private_data[0];
  272. snd_ice1712_save_gpio_status(ice);
  273. priv->cs_mask =
  274. priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A :
  275. ICE1712_VX442_CODEC_CHIP_B;
  276. }
  277. /*
  278. * change the DFS bit according rate for Delta1010
  279. */
  280. static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate)
  281. {
  282. unsigned char tmp, tmp2;
  283. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  284. return;
  285. mutex_lock(&ice->gpio_mutex);
  286. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  287. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  288. if (rate > 48000)
  289. tmp2 |= ICE1712_DELTA_DFS;
  290. if (tmp != tmp2)
  291. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2);
  292. mutex_unlock(&ice->gpio_mutex);
  293. }
  294. /*
  295. * change the rate of AK4524 on Delta 44/66, AP, 1010LT
  296. */
  297. static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  298. {
  299. unsigned char tmp, tmp2;
  300. struct snd_ice1712 *ice = ak->private_data[0];
  301. if (rate == 0) /* no hint - S/PDIF input is master, simply return */
  302. return;
  303. /* check before reset ak4524 to avoid unnecessary clicks */
  304. mutex_lock(&ice->gpio_mutex);
  305. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  306. mutex_unlock(&ice->gpio_mutex);
  307. tmp2 = tmp & ~ICE1712_DELTA_DFS;
  308. if (rate > 48000)
  309. tmp2 |= ICE1712_DELTA_DFS;
  310. if (tmp == tmp2)
  311. return;
  312. /* do it again */
  313. snd_akm4xxx_reset(ak, 1);
  314. mutex_lock(&ice->gpio_mutex);
  315. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS;
  316. if (rate > 48000)
  317. tmp |= ICE1712_DELTA_DFS;
  318. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  319. mutex_unlock(&ice->gpio_mutex);
  320. snd_akm4xxx_reset(ak, 0);
  321. }
  322. /*
  323. * change the rate of AK4524 on VX442
  324. */
  325. static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate)
  326. {
  327. unsigned char val;
  328. val = (rate > 48000) ? 0x65 : 0x60;
  329. if (snd_akm4xxx_get(ak, 0, 0x02) != val ||
  330. snd_akm4xxx_get(ak, 1, 0x02) != val) {
  331. snd_akm4xxx_reset(ak, 1);
  332. snd_akm4xxx_write(ak, 0, 0x02, val);
  333. snd_akm4xxx_write(ak, 1, 0x02, val);
  334. snd_akm4xxx_reset(ak, 0);
  335. }
  336. }
  337. /*
  338. * SPDIF ops for Delta 1010, Dio, 66
  339. */
  340. /* open callback */
  341. static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
  342. {
  343. ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits;
  344. }
  345. /* set up */
  346. static void delta_setup_spdif(struct snd_ice1712 *ice, int rate)
  347. {
  348. unsigned long flags;
  349. unsigned int tmp;
  350. int change;
  351. spin_lock_irqsave(&ice->reg_lock, flags);
  352. tmp = ice->spdif.cs8403_stream_bits;
  353. if (tmp & 0x01) /* consumer */
  354. tmp &= (tmp & 0x01) ? ~0x06 : ~0x18;
  355. switch (rate) {
  356. case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break;
  357. case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break;
  358. case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break;
  359. default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break;
  360. }
  361. change = ice->spdif.cs8403_stream_bits != tmp;
  362. ice->spdif.cs8403_stream_bits = tmp;
  363. spin_unlock_irqrestore(&ice->reg_lock, flags);
  364. if (change)
  365. snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id);
  366. snd_ice1712_delta_cs8403_spdif_write(ice, tmp);
  367. }
  368. #define snd_ice1712_delta1010lt_wordclock_status_info \
  369. snd_ctl_boolean_mono_info
  370. static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol,
  371. struct snd_ctl_elem_value *ucontrol)
  372. {
  373. char reg = 0x10; /* CS8427 receiver error register */
  374. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  375. if (snd_i2c_sendbytes(ice->cs8427, &reg, 1) != 1)
  376. snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg);
  377. snd_i2c_readbytes(ice->cs8427, &reg, 1);
  378. ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0;
  379. return 0;
  380. }
  381. static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata =
  382. {
  383. .access = (SNDRV_CTL_ELEM_ACCESS_READ),
  384. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  385. .name = "Word Clock Status",
  386. .info = snd_ice1712_delta1010lt_wordclock_status_info,
  387. .get = snd_ice1712_delta1010lt_wordclock_status_get,
  388. };
  389. /*
  390. * initialize the chips on M-Audio cards
  391. */
  392. static struct snd_akm4xxx akm_audiophile __devinitdata = {
  393. .type = SND_AK4528,
  394. .num_adcs = 2,
  395. .num_dacs = 2,
  396. .ops = {
  397. .set_rate_val = delta_ak4524_set_rate_val
  398. }
  399. };
  400. static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = {
  401. .caddr = 2,
  402. .cif = 0,
  403. .data_mask = ICE1712_DELTA_AP_DOUT,
  404. .clk_mask = ICE1712_DELTA_AP_CCLK,
  405. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  406. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  407. .cs_none = 0,
  408. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  409. .mask_flags = 0,
  410. };
  411. static struct snd_akm4xxx akm_delta410 __devinitdata = {
  412. .type = SND_AK4529,
  413. .num_adcs = 2,
  414. .num_dacs = 8,
  415. .ops = {
  416. .set_rate_val = delta_ak4524_set_rate_val
  417. }
  418. };
  419. static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = {
  420. .caddr = 0,
  421. .cif = 0,
  422. .data_mask = ICE1712_DELTA_AP_DOUT,
  423. .clk_mask = ICE1712_DELTA_AP_CCLK,
  424. .cs_mask = ICE1712_DELTA_AP_CS_CODEC,
  425. .cs_addr = ICE1712_DELTA_AP_CS_CODEC,
  426. .cs_none = 0,
  427. .add_flags = ICE1712_DELTA_AP_CS_DIGITAL,
  428. .mask_flags = 0,
  429. };
  430. static struct snd_akm4xxx akm_delta1010lt __devinitdata = {
  431. .type = SND_AK4524,
  432. .num_adcs = 8,
  433. .num_dacs = 8,
  434. .ops = {
  435. .lock = delta1010lt_ak4524_lock,
  436. .set_rate_val = delta_ak4524_set_rate_val
  437. }
  438. };
  439. static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = {
  440. .caddr = 2,
  441. .cif = 0, /* the default level of the CIF pin from AK4524 */
  442. .data_mask = ICE1712_DELTA_1010LT_DOUT,
  443. .clk_mask = ICE1712_DELTA_1010LT_CCLK,
  444. .cs_mask = 0,
  445. .cs_addr = 0, /* set later */
  446. .cs_none = ICE1712_DELTA_1010LT_CS_NONE,
  447. .add_flags = 0,
  448. .mask_flags = 0,
  449. };
  450. static struct snd_akm4xxx akm_delta66e __devinitdata = {
  451. .type = SND_AK4524,
  452. .num_adcs = 4,
  453. .num_dacs = 4,
  454. .ops = {
  455. .lock = delta66e_ak4524_lock,
  456. .set_rate_val = delta_ak4524_set_rate_val
  457. }
  458. };
  459. static struct snd_ak4xxx_private akm_delta66e_priv __devinitdata = {
  460. .caddr = 2,
  461. .cif = 0, /* the default level of the CIF pin from AK4524 */
  462. .data_mask = ICE1712_DELTA_66E_DOUT,
  463. .clk_mask = ICE1712_DELTA_66E_CCLK,
  464. .cs_mask = 0,
  465. .cs_addr = 0, /* set later */
  466. .cs_none = 0,
  467. .add_flags = 0,
  468. .mask_flags = 0,
  469. };
  470. static struct snd_akm4xxx akm_delta44 __devinitdata = {
  471. .type = SND_AK4524,
  472. .num_adcs = 4,
  473. .num_dacs = 4,
  474. .ops = {
  475. .lock = delta_ak4524_lock,
  476. .set_rate_val = delta_ak4524_set_rate_val
  477. }
  478. };
  479. static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = {
  480. .caddr = 2,
  481. .cif = 0, /* the default level of the CIF pin from AK4524 */
  482. .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA,
  483. .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
  484. .cs_mask = 0,
  485. .cs_addr = 0, /* set later */
  486. .cs_none = 0,
  487. .add_flags = 0,
  488. .mask_flags = 0,
  489. };
  490. static struct snd_akm4xxx akm_vx442 __devinitdata = {
  491. .type = SND_AK4524,
  492. .num_adcs = 4,
  493. .num_dacs = 4,
  494. .ops = {
  495. .lock = vx442_ak4524_lock,
  496. .set_rate_val = vx442_ak4524_set_rate_val
  497. }
  498. };
  499. static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = {
  500. .caddr = 2,
  501. .cif = 0,
  502. .data_mask = ICE1712_VX442_DOUT,
  503. .clk_mask = ICE1712_VX442_CCLK,
  504. .cs_mask = 0,
  505. .cs_addr = 0, /* set later */
  506. .cs_none = 0,
  507. .add_flags = 0,
  508. .mask_flags = 0,
  509. };
  510. static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice)
  511. {
  512. int err;
  513. struct snd_akm4xxx *ak;
  514. unsigned char tmp;
  515. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 &&
  516. ice->eeprom.gpiodir == 0x7b)
  517. ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E;
  518. if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 &&
  519. ice->eeprom.gpiodir == 0xfb)
  520. ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E;
  521. /* determine I2C, DACs and ADCs */
  522. switch (ice->eeprom.subvendor) {
  523. case ICE1712_SUBDEVICE_AUDIOPHILE:
  524. ice->num_total_dacs = 2;
  525. ice->num_total_adcs = 2;
  526. break;
  527. case ICE1712_SUBDEVICE_DELTA410:
  528. ice->num_total_dacs = 8;
  529. ice->num_total_adcs = 2;
  530. break;
  531. case ICE1712_SUBDEVICE_DELTA44:
  532. case ICE1712_SUBDEVICE_DELTA66:
  533. ice->num_total_dacs = ice->omni ? 8 : 4;
  534. ice->num_total_adcs = ice->omni ? 8 : 4;
  535. break;
  536. case ICE1712_SUBDEVICE_DELTA1010:
  537. case ICE1712_SUBDEVICE_DELTA1010E:
  538. case ICE1712_SUBDEVICE_DELTA1010LT:
  539. case ICE1712_SUBDEVICE_MEDIASTATION:
  540. case ICE1712_SUBDEVICE_EDIROLDA2496:
  541. ice->num_total_dacs = 8;
  542. ice->num_total_adcs = 8;
  543. break;
  544. case ICE1712_SUBDEVICE_DELTADIO2496:
  545. ice->num_total_dacs = 4; /* two AK4324 codecs */
  546. break;
  547. case ICE1712_SUBDEVICE_VX442:
  548. case ICE1712_SUBDEVICE_DELTA66E: /* omni not suported yet */
  549. ice->num_total_dacs = 4;
  550. ice->num_total_adcs = 4;
  551. break;
  552. }
  553. /* initialize the SPI clock to high */
  554. tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
  555. tmp |= ICE1712_DELTA_AP_CCLK;
  556. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp);
  557. udelay(5);
  558. /* initialize spdif */
  559. switch (ice->eeprom.subvendor) {
  560. case ICE1712_SUBDEVICE_AUDIOPHILE:
  561. case ICE1712_SUBDEVICE_DELTA410:
  562. case ICE1712_SUBDEVICE_DELTA1010E:
  563. case ICE1712_SUBDEVICE_DELTA1010LT:
  564. case ICE1712_SUBDEVICE_VX442:
  565. case ICE1712_SUBDEVICE_DELTA66E:
  566. if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) {
  567. snd_printk(KERN_ERR "unable to create I2C bus\n");
  568. return err;
  569. }
  570. ice->i2c->private_data = ice;
  571. ice->i2c->ops = &ap_cs8427_i2c_ops;
  572. if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0)
  573. return err;
  574. break;
  575. case ICE1712_SUBDEVICE_DELTA1010:
  576. case ICE1712_SUBDEVICE_MEDIASTATION:
  577. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  578. break;
  579. case ICE1712_SUBDEVICE_DELTADIO2496:
  580. ice->gpio.set_pro_rate = delta_1010_set_rate_val;
  581. /* fall thru */
  582. case ICE1712_SUBDEVICE_DELTA66:
  583. ice->spdif.ops.open = delta_open_spdif;
  584. ice->spdif.ops.setup_rate = delta_setup_spdif;
  585. ice->spdif.ops.default_get = delta_spdif_default_get;
  586. ice->spdif.ops.default_put = delta_spdif_default_put;
  587. ice->spdif.ops.stream_get = delta_spdif_stream_get;
  588. ice->spdif.ops.stream_put = delta_spdif_stream_put;
  589. /* Set spdif defaults */
  590. snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits);
  591. break;
  592. }
  593. /* no analog? */
  594. switch (ice->eeprom.subvendor) {
  595. case ICE1712_SUBDEVICE_DELTA1010:
  596. case ICE1712_SUBDEVICE_DELTA1010E:
  597. case ICE1712_SUBDEVICE_DELTADIO2496:
  598. case ICE1712_SUBDEVICE_MEDIASTATION:
  599. return 0;
  600. }
  601. /* second stage of initialization, analog parts and others */
  602. ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  603. if (! ak)
  604. return -ENOMEM;
  605. ice->akm_codecs = 1;
  606. switch (ice->eeprom.subvendor) {
  607. case ICE1712_SUBDEVICE_AUDIOPHILE:
  608. err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice);
  609. break;
  610. case ICE1712_SUBDEVICE_DELTA410:
  611. err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice);
  612. break;
  613. case ICE1712_SUBDEVICE_DELTA1010LT:
  614. case ICE1712_SUBDEVICE_EDIROLDA2496:
  615. err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice);
  616. break;
  617. case ICE1712_SUBDEVICE_DELTA66:
  618. case ICE1712_SUBDEVICE_DELTA44:
  619. err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice);
  620. break;
  621. case ICE1712_SUBDEVICE_VX442:
  622. err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice);
  623. break;
  624. case ICE1712_SUBDEVICE_DELTA66E:
  625. err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice);
  626. break;
  627. default:
  628. snd_BUG();
  629. return -EINVAL;
  630. }
  631. return err;
  632. }
  633. /*
  634. * additional controls for M-Audio cards
  635. */
  636. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata =
  637. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0);
  638. static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata =
  639. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0);
  640. static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata =
  641. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  642. static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata =
  643. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0);
  644. static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata =
  645. ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE);
  646. static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice)
  647. {
  648. int err;
  649. /* 1010 and dio specific controls */
  650. switch (ice->eeprom.subvendor) {
  651. case ICE1712_SUBDEVICE_DELTA1010:
  652. case ICE1712_SUBDEVICE_MEDIASTATION:
  653. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice));
  654. if (err < 0)
  655. return err;
  656. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice));
  657. if (err < 0)
  658. return err;
  659. break;
  660. case ICE1712_SUBDEVICE_DELTADIO2496:
  661. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice));
  662. if (err < 0)
  663. return err;
  664. break;
  665. case ICE1712_SUBDEVICE_DELTA1010E:
  666. case ICE1712_SUBDEVICE_DELTA1010LT:
  667. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice));
  668. if (err < 0)
  669. return err;
  670. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice));
  671. if (err < 0)
  672. return err;
  673. break;
  674. }
  675. /* normal spdif controls */
  676. switch (ice->eeprom.subvendor) {
  677. case ICE1712_SUBDEVICE_DELTA1010:
  678. case ICE1712_SUBDEVICE_DELTADIO2496:
  679. case ICE1712_SUBDEVICE_DELTA66:
  680. case ICE1712_SUBDEVICE_MEDIASTATION:
  681. err = snd_ice1712_spdif_build_controls(ice);
  682. if (err < 0)
  683. return err;
  684. break;
  685. }
  686. /* spdif status in */
  687. switch (ice->eeprom.subvendor) {
  688. case ICE1712_SUBDEVICE_DELTA1010:
  689. case ICE1712_SUBDEVICE_DELTADIO2496:
  690. case ICE1712_SUBDEVICE_DELTA66:
  691. case ICE1712_SUBDEVICE_MEDIASTATION:
  692. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice));
  693. if (err < 0)
  694. return err;
  695. break;
  696. }
  697. /* ak4524 controls */
  698. switch (ice->eeprom.subvendor) {
  699. case ICE1712_SUBDEVICE_DELTA1010LT:
  700. case ICE1712_SUBDEVICE_AUDIOPHILE:
  701. case ICE1712_SUBDEVICE_DELTA410:
  702. case ICE1712_SUBDEVICE_DELTA44:
  703. case ICE1712_SUBDEVICE_DELTA66:
  704. case ICE1712_SUBDEVICE_VX442:
  705. case ICE1712_SUBDEVICE_DELTA66E:
  706. case ICE1712_SUBDEVICE_EDIROLDA2496:
  707. err = snd_ice1712_akm4xxx_build_controls(ice);
  708. if (err < 0)
  709. return err;
  710. break;
  711. }
  712. return 0;
  713. }
  714. /* entry point */
  715. struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = {
  716. {
  717. .subvendor = ICE1712_SUBDEVICE_DELTA1010,
  718. .name = "M Audio Delta 1010",
  719. .model = "delta1010",
  720. .chip_init = snd_ice1712_delta_init,
  721. .build_controls = snd_ice1712_delta_add_controls,
  722. },
  723. {
  724. .subvendor = ICE1712_SUBDEVICE_DELTADIO2496,
  725. .name = "M Audio Delta DiO 2496",
  726. .model = "dio2496",
  727. .chip_init = snd_ice1712_delta_init,
  728. .build_controls = snd_ice1712_delta_add_controls,
  729. .no_mpu401 = 1,
  730. },
  731. {
  732. .subvendor = ICE1712_SUBDEVICE_DELTA66,
  733. .name = "M Audio Delta 66",
  734. .model = "delta66",
  735. .chip_init = snd_ice1712_delta_init,
  736. .build_controls = snd_ice1712_delta_add_controls,
  737. .no_mpu401 = 1,
  738. },
  739. {
  740. .subvendor = ICE1712_SUBDEVICE_DELTA44,
  741. .name = "M Audio Delta 44",
  742. .model = "delta44",
  743. .chip_init = snd_ice1712_delta_init,
  744. .build_controls = snd_ice1712_delta_add_controls,
  745. .no_mpu401 = 1,
  746. },
  747. {
  748. .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE,
  749. .name = "M Audio Audiophile 24/96",
  750. .model = "audiophile",
  751. .chip_init = snd_ice1712_delta_init,
  752. .build_controls = snd_ice1712_delta_add_controls,
  753. },
  754. {
  755. .subvendor = ICE1712_SUBDEVICE_DELTA410,
  756. .name = "M Audio Delta 410",
  757. .model = "delta410",
  758. .chip_init = snd_ice1712_delta_init,
  759. .build_controls = snd_ice1712_delta_add_controls,
  760. },
  761. {
  762. .subvendor = ICE1712_SUBDEVICE_DELTA1010LT,
  763. .name = "M Audio Delta 1010LT",
  764. .model = "delta1010lt",
  765. .chip_init = snd_ice1712_delta_init,
  766. .build_controls = snd_ice1712_delta_add_controls,
  767. },
  768. {
  769. .subvendor = ICE1712_SUBDEVICE_VX442,
  770. .name = "Digigram VX442",
  771. .model = "vx442",
  772. .chip_init = snd_ice1712_delta_init,
  773. .build_controls = snd_ice1712_delta_add_controls,
  774. .no_mpu401 = 1,
  775. },
  776. {
  777. .subvendor = ICE1712_SUBDEVICE_MEDIASTATION,
  778. .name = "Lionstracs Mediastation",
  779. .model = "mediastation",
  780. .chip_init = snd_ice1712_delta_init,
  781. .build_controls = snd_ice1712_delta_add_controls,
  782. },
  783. {
  784. .subvendor = ICE1712_SUBDEVICE_EDIROLDA2496,
  785. .name = "Edirol DA2496",
  786. .model = "da2496",
  787. .chip_init = snd_ice1712_delta_init,
  788. .build_controls = snd_ice1712_delta_add_controls,
  789. },
  790. { } /* terminator */
  791. };