aureon.c 62 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. */
  48. #include <linux/io.h>
  49. #include <linux/delay.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/init.h>
  52. #include <linux/slab.h>
  53. #include <linux/mutex.h>
  54. #include <sound/core.h>
  55. #include "ice1712.h"
  56. #include "envy24ht.h"
  57. #include "aureon.h"
  58. #include <sound/tlv.h>
  59. /* AC97 register cache for Aureon */
  60. struct aureon_spec {
  61. unsigned short stac9744[64];
  62. unsigned int cs8415_mux;
  63. unsigned short master[2];
  64. unsigned short vol[8];
  65. unsigned char pca9554_out;
  66. };
  67. /* WM8770 registers */
  68. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  69. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  70. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  71. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  72. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  73. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  74. #define WM_MUTE 0x14 /* mute controls */
  75. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  76. #define WM_INT_CTRL 0x16 /* interface control */
  77. #define WM_MASTER 0x17 /* master clock and mode */
  78. #define WM_POWERDOWN 0x18 /* power-down controls */
  79. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  80. #define WM_ADC_MUX 0x1b /* input MUX */
  81. #define WM_OUT_MUX1 0x1c /* output MUX */
  82. #define WM_OUT_MUX2 0x1e /* output MUX */
  83. #define WM_RESET 0x1f /* software reset */
  84. /* CS8415A registers */
  85. #define CS8415_CTRL1 0x01
  86. #define CS8415_CTRL2 0x02
  87. #define CS8415_QSUB 0x14
  88. #define CS8415_RATIO 0x1E
  89. #define CS8415_C_BUFFER 0x20
  90. #define CS8415_ID 0x7F
  91. /* PCA9554 registers */
  92. #define PCA9554_DEV 0x40 /* I2C device address */
  93. #define PCA9554_IN 0x00 /* input port */
  94. #define PCA9554_OUT 0x01 /* output port */
  95. #define PCA9554_INVERT 0x02 /* input invert */
  96. #define PCA9554_DIR 0x03 /* port directions */
  97. /*
  98. * Aureon Universe additional controls using PCA9554
  99. */
  100. /*
  101. * Send data to pca9554
  102. */
  103. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  104. unsigned char data)
  105. {
  106. unsigned int tmp;
  107. int i, j;
  108. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  109. unsigned char val = 0;
  110. tmp = snd_ice1712_gpio_read(ice);
  111. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  112. AUREON_WM_RW|AUREON_WM_CS|
  113. AUREON_CS8415_CS));
  114. tmp |= AUREON_WM_RW;
  115. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  116. tmp &= ~AUREON_SPI_MOSI;
  117. tmp &= ~AUREON_SPI_CLK;
  118. snd_ice1712_gpio_write(ice, tmp);
  119. udelay(50);
  120. /*
  121. * send i2c stop condition and start condition
  122. * to obtain sane state
  123. */
  124. tmp |= AUREON_SPI_CLK;
  125. snd_ice1712_gpio_write(ice, tmp);
  126. udelay(50);
  127. tmp |= AUREON_SPI_MOSI;
  128. snd_ice1712_gpio_write(ice, tmp);
  129. udelay(100);
  130. tmp &= ~AUREON_SPI_MOSI;
  131. snd_ice1712_gpio_write(ice, tmp);
  132. udelay(50);
  133. tmp &= ~AUREON_SPI_CLK;
  134. snd_ice1712_gpio_write(ice, tmp);
  135. udelay(100);
  136. /*
  137. * send device address, command and value,
  138. * skipping ack cycles in between
  139. */
  140. for (j = 0; j < 3; j++) {
  141. switch (j) {
  142. case 0:
  143. val = dev;
  144. break;
  145. case 1:
  146. val = reg;
  147. break;
  148. case 2:
  149. val = data;
  150. break;
  151. }
  152. for (i = 7; i >= 0; i--) {
  153. tmp &= ~AUREON_SPI_CLK;
  154. snd_ice1712_gpio_write(ice, tmp);
  155. udelay(40);
  156. if (val & (1 << i))
  157. tmp |= AUREON_SPI_MOSI;
  158. else
  159. tmp &= ~AUREON_SPI_MOSI;
  160. snd_ice1712_gpio_write(ice, tmp);
  161. udelay(40);
  162. tmp |= AUREON_SPI_CLK;
  163. snd_ice1712_gpio_write(ice, tmp);
  164. udelay(40);
  165. }
  166. tmp &= ~AUREON_SPI_CLK;
  167. snd_ice1712_gpio_write(ice, tmp);
  168. udelay(40);
  169. tmp |= AUREON_SPI_CLK;
  170. snd_ice1712_gpio_write(ice, tmp);
  171. udelay(40);
  172. tmp &= ~AUREON_SPI_CLK;
  173. snd_ice1712_gpio_write(ice, tmp);
  174. udelay(40);
  175. }
  176. tmp &= ~AUREON_SPI_CLK;
  177. snd_ice1712_gpio_write(ice, tmp);
  178. udelay(40);
  179. tmp &= ~AUREON_SPI_MOSI;
  180. snd_ice1712_gpio_write(ice, tmp);
  181. udelay(40);
  182. tmp |= AUREON_SPI_CLK;
  183. snd_ice1712_gpio_write(ice, tmp);
  184. udelay(50);
  185. tmp |= AUREON_SPI_MOSI;
  186. snd_ice1712_gpio_write(ice, tmp);
  187. udelay(100);
  188. }
  189. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_info *uinfo)
  191. {
  192. char *texts[3] = {"Internal Aux", "Wavetable", "Rear Line-In"};
  193. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  194. uinfo->count = 1;
  195. uinfo->value.enumerated.items = 3;
  196. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  197. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  198. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  199. return 0;
  200. }
  201. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  202. struct snd_ctl_elem_value *ucontrol)
  203. {
  204. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  205. struct aureon_spec *spec = ice->spec;
  206. ucontrol->value.enumerated.item[0] = spec->pca9554_out;
  207. return 0;
  208. }
  209. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  210. struct snd_ctl_elem_value *ucontrol)
  211. {
  212. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  213. struct aureon_spec *spec = ice->spec;
  214. unsigned char oval, nval;
  215. int change;
  216. nval = ucontrol->value.enumerated.item[0];
  217. if (nval >= 3)
  218. return -EINVAL;
  219. snd_ice1712_save_gpio_status(ice);
  220. oval = spec->pca9554_out;
  221. change = (oval != nval);
  222. if (change) {
  223. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  224. spec->pca9554_out = nval;
  225. }
  226. snd_ice1712_restore_gpio_status(ice);
  227. return change;
  228. }
  229. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  230. unsigned short val)
  231. {
  232. struct aureon_spec *spec = ice->spec;
  233. unsigned int tmp;
  234. /* Send address to XILINX chip */
  235. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  236. snd_ice1712_gpio_write(ice, tmp);
  237. udelay(10);
  238. tmp |= AUREON_AC97_ADDR;
  239. snd_ice1712_gpio_write(ice, tmp);
  240. udelay(10);
  241. tmp &= ~AUREON_AC97_ADDR;
  242. snd_ice1712_gpio_write(ice, tmp);
  243. udelay(10);
  244. /* Send low-order byte to XILINX chip */
  245. tmp &= ~AUREON_AC97_DATA_MASK;
  246. tmp |= val & AUREON_AC97_DATA_MASK;
  247. snd_ice1712_gpio_write(ice, tmp);
  248. udelay(10);
  249. tmp |= AUREON_AC97_DATA_LOW;
  250. snd_ice1712_gpio_write(ice, tmp);
  251. udelay(10);
  252. tmp &= ~AUREON_AC97_DATA_LOW;
  253. snd_ice1712_gpio_write(ice, tmp);
  254. udelay(10);
  255. /* Send high-order byte to XILINX chip */
  256. tmp &= ~AUREON_AC97_DATA_MASK;
  257. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  258. snd_ice1712_gpio_write(ice, tmp);
  259. udelay(10);
  260. tmp |= AUREON_AC97_DATA_HIGH;
  261. snd_ice1712_gpio_write(ice, tmp);
  262. udelay(10);
  263. tmp &= ~AUREON_AC97_DATA_HIGH;
  264. snd_ice1712_gpio_write(ice, tmp);
  265. udelay(10);
  266. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  267. tmp |= AUREON_AC97_COMMIT;
  268. snd_ice1712_gpio_write(ice, tmp);
  269. udelay(10);
  270. tmp &= ~AUREON_AC97_COMMIT;
  271. snd_ice1712_gpio_write(ice, tmp);
  272. udelay(10);
  273. /* Store the data in out private buffer */
  274. spec->stac9744[(reg & 0x7F) >> 1] = val;
  275. }
  276. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  277. {
  278. struct aureon_spec *spec = ice->spec;
  279. return spec->stac9744[(reg & 0x7F) >> 1];
  280. }
  281. /*
  282. * Initialize STAC9744 chip
  283. */
  284. static int aureon_ac97_init(struct snd_ice1712 *ice)
  285. {
  286. struct aureon_spec *spec = ice->spec;
  287. int i;
  288. static const unsigned short ac97_defaults[] = {
  289. 0x00, 0x9640,
  290. 0x02, 0x8000,
  291. 0x04, 0x8000,
  292. 0x06, 0x8000,
  293. 0x0C, 0x8008,
  294. 0x0E, 0x8008,
  295. 0x10, 0x8808,
  296. 0x12, 0x8808,
  297. 0x14, 0x8808,
  298. 0x16, 0x8808,
  299. 0x18, 0x8808,
  300. 0x1C, 0x8000,
  301. 0x26, 0x000F,
  302. 0x28, 0x0201,
  303. 0x2C, 0xBB80,
  304. 0x32, 0xBB80,
  305. 0x7C, 0x8384,
  306. 0x7E, 0x7644,
  307. (unsigned short)-1
  308. };
  309. unsigned int tmp;
  310. /* Cold reset */
  311. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  312. snd_ice1712_gpio_write(ice, tmp);
  313. udelay(3);
  314. tmp &= ~AUREON_AC97_RESET;
  315. snd_ice1712_gpio_write(ice, tmp);
  316. udelay(3);
  317. tmp |= AUREON_AC97_RESET;
  318. snd_ice1712_gpio_write(ice, tmp);
  319. udelay(3);
  320. memset(&spec->stac9744, 0, sizeof(spec->stac9744));
  321. for (i = 0; ac97_defaults[i] != (unsigned short)-1; i += 2)
  322. spec->stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  323. /* Unmute AC'97 master volume permanently - muting is done by WM8770 */
  324. aureon_ac97_write(ice, AC97_MASTER, 0x0000);
  325. return 0;
  326. }
  327. #define AUREON_AC97_STEREO 0x80
  328. /*
  329. * AC'97 volume controls
  330. */
  331. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  332. {
  333. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  334. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  335. uinfo->value.integer.min = 0;
  336. uinfo->value.integer.max = 31;
  337. return 0;
  338. }
  339. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  340. {
  341. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  342. unsigned short vol;
  343. mutex_lock(&ice->gpio_mutex);
  344. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  345. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  346. if (kcontrol->private_value & AUREON_AC97_STEREO)
  347. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  348. mutex_unlock(&ice->gpio_mutex);
  349. return 0;
  350. }
  351. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  352. {
  353. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  354. unsigned short ovol, nvol;
  355. int change;
  356. snd_ice1712_save_gpio_status(ice);
  357. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  358. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  359. if (kcontrol->private_value & AUREON_AC97_STEREO)
  360. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  361. nvol |= ovol & ~0x1F1F;
  362. change = (ovol != nvol);
  363. if (change)
  364. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  365. snd_ice1712_restore_gpio_status(ice);
  366. return change;
  367. }
  368. /*
  369. * AC'97 mute controls
  370. */
  371. #define aureon_ac97_mute_info snd_ctl_boolean_mono_info
  372. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  373. {
  374. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  375. mutex_lock(&ice->gpio_mutex);
  376. ucontrol->value.integer.value[0] = aureon_ac97_read(ice,
  377. kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  378. mutex_unlock(&ice->gpio_mutex);
  379. return 0;
  380. }
  381. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  382. {
  383. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  384. unsigned short ovol, nvol;
  385. int change;
  386. snd_ice1712_save_gpio_status(ice);
  387. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  388. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~0x8000);
  389. change = (ovol != nvol);
  390. if (change)
  391. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  392. snd_ice1712_restore_gpio_status(ice);
  393. return change;
  394. }
  395. /*
  396. * AC'97 mute controls
  397. */
  398. #define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
  399. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  400. {
  401. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  402. mutex_lock(&ice->gpio_mutex);
  403. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  404. mutex_unlock(&ice->gpio_mutex);
  405. return 0;
  406. }
  407. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  408. {
  409. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  410. unsigned short ovol, nvol;
  411. int change;
  412. snd_ice1712_save_gpio_status(ice);
  413. ovol = aureon_ac97_read(ice, AC97_MIC);
  414. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  415. change = (ovol != nvol);
  416. if (change)
  417. aureon_ac97_write(ice, AC97_MIC, nvol);
  418. snd_ice1712_restore_gpio_status(ice);
  419. return change;
  420. }
  421. /*
  422. * write data in the SPI mode
  423. */
  424. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  425. {
  426. unsigned int tmp;
  427. int i;
  428. unsigned int mosi, clk;
  429. tmp = snd_ice1712_gpio_read(ice);
  430. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  431. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  432. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  433. mosi = PRODIGY_SPI_MOSI;
  434. clk = PRODIGY_SPI_CLK;
  435. } else {
  436. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  437. AUREON_WM_CS|AUREON_CS8415_CS));
  438. mosi = AUREON_SPI_MOSI;
  439. clk = AUREON_SPI_CLK;
  440. tmp |= AUREON_WM_RW;
  441. }
  442. tmp &= ~cs;
  443. snd_ice1712_gpio_write(ice, tmp);
  444. udelay(1);
  445. for (i = bits - 1; i >= 0; i--) {
  446. tmp &= ~clk;
  447. snd_ice1712_gpio_write(ice, tmp);
  448. udelay(1);
  449. if (data & (1 << i))
  450. tmp |= mosi;
  451. else
  452. tmp &= ~mosi;
  453. snd_ice1712_gpio_write(ice, tmp);
  454. udelay(1);
  455. tmp |= clk;
  456. snd_ice1712_gpio_write(ice, tmp);
  457. udelay(1);
  458. }
  459. tmp &= ~clk;
  460. tmp |= cs;
  461. snd_ice1712_gpio_write(ice, tmp);
  462. udelay(1);
  463. tmp |= clk;
  464. snd_ice1712_gpio_write(ice, tmp);
  465. udelay(1);
  466. }
  467. /*
  468. * Read data in SPI mode
  469. */
  470. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs,
  471. unsigned int data, int bits, unsigned char *buffer, int size)
  472. {
  473. int i, j;
  474. unsigned int tmp;
  475. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  476. snd_ice1712_gpio_write(ice, tmp);
  477. tmp &= ~cs;
  478. snd_ice1712_gpio_write(ice, tmp);
  479. udelay(1);
  480. for (i = bits-1; i >= 0; i--) {
  481. if (data & (1 << i))
  482. tmp |= AUREON_SPI_MOSI;
  483. else
  484. tmp &= ~AUREON_SPI_MOSI;
  485. snd_ice1712_gpio_write(ice, tmp);
  486. udelay(1);
  487. tmp |= AUREON_SPI_CLK;
  488. snd_ice1712_gpio_write(ice, tmp);
  489. udelay(1);
  490. tmp &= ~AUREON_SPI_CLK;
  491. snd_ice1712_gpio_write(ice, tmp);
  492. udelay(1);
  493. }
  494. for (j = 0; j < size; j++) {
  495. unsigned char outdata = 0;
  496. for (i = 7; i >= 0; i--) {
  497. tmp = snd_ice1712_gpio_read(ice);
  498. outdata <<= 1;
  499. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  500. udelay(1);
  501. tmp |= AUREON_SPI_CLK;
  502. snd_ice1712_gpio_write(ice, tmp);
  503. udelay(1);
  504. tmp &= ~AUREON_SPI_CLK;
  505. snd_ice1712_gpio_write(ice, tmp);
  506. udelay(1);
  507. }
  508. buffer[j] = outdata;
  509. }
  510. tmp |= cs;
  511. snd_ice1712_gpio_write(ice, tmp);
  512. }
  513. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg)
  514. {
  515. unsigned char val;
  516. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  517. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  518. return val;
  519. }
  520. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg,
  521. unsigned char *buffer, int size)
  522. {
  523. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  524. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  525. }
  526. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg,
  527. unsigned char val)
  528. {
  529. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  530. }
  531. /*
  532. * get the current register value of WM codec
  533. */
  534. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  535. {
  536. reg <<= 1;
  537. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  538. ice->akm[0].images[reg + 1];
  539. }
  540. /*
  541. * set the register value of WM codec
  542. */
  543. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  544. {
  545. aureon_spi_write(ice,
  546. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  547. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  548. PRODIGY_WM_CS : AUREON_WM_CS),
  549. (reg << 9) | (val & 0x1ff), 16);
  550. }
  551. /*
  552. * set the register value of WM codec and remember it
  553. */
  554. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  555. {
  556. wm_put_nocache(ice, reg, val);
  557. reg <<= 1;
  558. ice->akm[0].images[reg] = val >> 8;
  559. ice->akm[0].images[reg + 1] = val;
  560. }
  561. /*
  562. */
  563. #define aureon_mono_bool_info snd_ctl_boolean_mono_info
  564. /*
  565. * AC'97 master playback mute controls (Mute on WM8770 chip)
  566. */
  567. #define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
  568. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  569. {
  570. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  571. mutex_lock(&ice->gpio_mutex);
  572. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  573. mutex_unlock(&ice->gpio_mutex);
  574. return 0;
  575. }
  576. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  577. {
  578. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  579. unsigned short ovol, nvol;
  580. int change;
  581. snd_ice1712_save_gpio_status(ice);
  582. ovol = wm_get(ice, WM_OUT_MUX1);
  583. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  584. change = (ovol != nvol);
  585. if (change)
  586. wm_put(ice, WM_OUT_MUX1, nvol);
  587. snd_ice1712_restore_gpio_status(ice);
  588. return change;
  589. }
  590. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -10000, 100, 1);
  591. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  592. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  593. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  594. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  595. #define WM_VOL_MAX 100
  596. #define WM_VOL_CNT 101 /* 0dB .. -100dB */
  597. #define WM_VOL_MUTE 0x8000
  598. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  599. {
  600. unsigned char nvol;
  601. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) {
  602. nvol = 0;
  603. } else {
  604. nvol = ((vol % WM_VOL_CNT) * (master % WM_VOL_CNT)) /
  605. WM_VOL_MAX;
  606. nvol += 0x1b;
  607. }
  608. wm_put(ice, index, nvol);
  609. wm_put_nocache(ice, index, 0x180 | nvol);
  610. }
  611. /*
  612. * DAC mute control
  613. */
  614. #define wm_pcm_mute_info snd_ctl_boolean_mono_info
  615. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  616. {
  617. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  618. mutex_lock(&ice->gpio_mutex);
  619. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  620. mutex_unlock(&ice->gpio_mutex);
  621. return 0;
  622. }
  623. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  624. {
  625. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  626. unsigned short nval, oval;
  627. int change;
  628. snd_ice1712_save_gpio_status(ice);
  629. oval = wm_get(ice, WM_MUTE);
  630. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  631. change = (oval != nval);
  632. if (change)
  633. wm_put(ice, WM_MUTE, nval);
  634. snd_ice1712_restore_gpio_status(ice);
  635. return change;
  636. }
  637. /*
  638. * Master volume attenuation mixer control
  639. */
  640. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  641. {
  642. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  643. uinfo->count = 2;
  644. uinfo->value.integer.min = 0;
  645. uinfo->value.integer.max = WM_VOL_MAX;
  646. return 0;
  647. }
  648. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  649. {
  650. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  651. struct aureon_spec *spec = ice->spec;
  652. int i;
  653. for (i = 0; i < 2; i++)
  654. ucontrol->value.integer.value[i] =
  655. spec->master[i] & ~WM_VOL_MUTE;
  656. return 0;
  657. }
  658. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  659. {
  660. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  661. struct aureon_spec *spec = ice->spec;
  662. int ch, change = 0;
  663. snd_ice1712_save_gpio_status(ice);
  664. for (ch = 0; ch < 2; ch++) {
  665. unsigned int vol = ucontrol->value.integer.value[ch];
  666. if (vol > WM_VOL_MAX)
  667. vol = WM_VOL_MAX;
  668. vol |= spec->master[ch] & WM_VOL_MUTE;
  669. if (vol != spec->master[ch]) {
  670. int dac;
  671. spec->master[ch] = vol;
  672. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  673. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  674. spec->vol[dac + ch],
  675. spec->master[ch]);
  676. change = 1;
  677. }
  678. }
  679. snd_ice1712_restore_gpio_status(ice);
  680. return change;
  681. }
  682. /*
  683. * DAC volume attenuation mixer control
  684. */
  685. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  686. {
  687. int voices = kcontrol->private_value >> 8;
  688. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  689. uinfo->count = voices;
  690. uinfo->value.integer.min = 0; /* mute (-101dB) */
  691. uinfo->value.integer.max = WM_VOL_MAX; /* 0dB */
  692. return 0;
  693. }
  694. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  695. {
  696. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  697. struct aureon_spec *spec = ice->spec;
  698. int i, ofs, voices;
  699. voices = kcontrol->private_value >> 8;
  700. ofs = kcontrol->private_value & 0xff;
  701. for (i = 0; i < voices; i++)
  702. ucontrol->value.integer.value[i] =
  703. spec->vol[ofs+i] & ~WM_VOL_MUTE;
  704. return 0;
  705. }
  706. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  707. {
  708. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  709. struct aureon_spec *spec = ice->spec;
  710. int i, idx, ofs, voices;
  711. int change = 0;
  712. voices = kcontrol->private_value >> 8;
  713. ofs = kcontrol->private_value & 0xff;
  714. snd_ice1712_save_gpio_status(ice);
  715. for (i = 0; i < voices; i++) {
  716. unsigned int vol = ucontrol->value.integer.value[i];
  717. if (vol > WM_VOL_MAX)
  718. vol = WM_VOL_MAX;
  719. vol |= spec->vol[ofs+i] & WM_VOL_MUTE;
  720. if (vol != spec->vol[ofs+i]) {
  721. spec->vol[ofs+i] = vol;
  722. idx = WM_DAC_ATTEN + ofs + i;
  723. wm_set_vol(ice, idx, spec->vol[ofs + i],
  724. spec->master[i]);
  725. change = 1;
  726. }
  727. }
  728. snd_ice1712_restore_gpio_status(ice);
  729. return change;
  730. }
  731. /*
  732. * WM8770 mute control
  733. */
  734. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  735. {
  736. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  737. uinfo->count = kcontrol->private_value >> 8;
  738. uinfo->value.integer.min = 0;
  739. uinfo->value.integer.max = 1;
  740. return 0;
  741. }
  742. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  743. {
  744. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  745. struct aureon_spec *spec = ice->spec;
  746. int voices, ofs, i;
  747. voices = kcontrol->private_value >> 8;
  748. ofs = kcontrol->private_value & 0xFF;
  749. for (i = 0; i < voices; i++)
  750. ucontrol->value.integer.value[i] =
  751. (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  752. return 0;
  753. }
  754. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  755. {
  756. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  757. struct aureon_spec *spec = ice->spec;
  758. int change = 0, voices, ofs, i;
  759. voices = kcontrol->private_value >> 8;
  760. ofs = kcontrol->private_value & 0xFF;
  761. snd_ice1712_save_gpio_status(ice);
  762. for (i = 0; i < voices; i++) {
  763. int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  764. if (ucontrol->value.integer.value[i] != val) {
  765. spec->vol[ofs + i] &= ~WM_VOL_MUTE;
  766. spec->vol[ofs + i] |=
  767. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  768. wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
  769. spec->master[i]);
  770. change = 1;
  771. }
  772. }
  773. snd_ice1712_restore_gpio_status(ice);
  774. return change;
  775. }
  776. /*
  777. * WM8770 master mute control
  778. */
  779. #define wm_master_mute_info snd_ctl_boolean_stereo_info
  780. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  781. {
  782. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  783. struct aureon_spec *spec = ice->spec;
  784. ucontrol->value.integer.value[0] =
  785. (spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
  786. ucontrol->value.integer.value[1] =
  787. (spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
  788. return 0;
  789. }
  790. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  791. {
  792. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  793. struct aureon_spec *spec = ice->spec;
  794. int change = 0, i;
  795. snd_ice1712_save_gpio_status(ice);
  796. for (i = 0; i < 2; i++) {
  797. int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
  798. if (ucontrol->value.integer.value[i] != val) {
  799. int dac;
  800. spec->master[i] &= ~WM_VOL_MUTE;
  801. spec->master[i] |=
  802. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  803. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  804. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  805. spec->vol[dac + i],
  806. spec->master[i]);
  807. change = 1;
  808. }
  809. }
  810. snd_ice1712_restore_gpio_status(ice);
  811. return change;
  812. }
  813. /* digital master volume */
  814. #define PCM_0dB 0xff
  815. #define PCM_RES 128 /* -64dB */
  816. #define PCM_MIN (PCM_0dB - PCM_RES)
  817. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  818. {
  819. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  820. uinfo->count = 1;
  821. uinfo->value.integer.min = 0; /* mute (-64dB) */
  822. uinfo->value.integer.max = PCM_RES; /* 0dB */
  823. return 0;
  824. }
  825. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  826. {
  827. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  828. unsigned short val;
  829. mutex_lock(&ice->gpio_mutex);
  830. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  831. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  832. ucontrol->value.integer.value[0] = val;
  833. mutex_unlock(&ice->gpio_mutex);
  834. return 0;
  835. }
  836. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  837. {
  838. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  839. unsigned short ovol, nvol;
  840. int change = 0;
  841. nvol = ucontrol->value.integer.value[0];
  842. if (nvol > PCM_RES)
  843. return -EINVAL;
  844. snd_ice1712_save_gpio_status(ice);
  845. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  846. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  847. if (ovol != nvol) {
  848. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  849. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  850. change = 1;
  851. }
  852. snd_ice1712_restore_gpio_status(ice);
  853. return change;
  854. }
  855. /*
  856. * ADC mute control
  857. */
  858. #define wm_adc_mute_info snd_ctl_boolean_stereo_info
  859. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  860. {
  861. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  862. unsigned short val;
  863. int i;
  864. mutex_lock(&ice->gpio_mutex);
  865. for (i = 0; i < 2; i++) {
  866. val = wm_get(ice, WM_ADC_GAIN + i);
  867. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  868. }
  869. mutex_unlock(&ice->gpio_mutex);
  870. return 0;
  871. }
  872. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  873. {
  874. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  875. unsigned short new, old;
  876. int i, change = 0;
  877. snd_ice1712_save_gpio_status(ice);
  878. for (i = 0; i < 2; i++) {
  879. old = wm_get(ice, WM_ADC_GAIN + i);
  880. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  881. if (new != old) {
  882. wm_put(ice, WM_ADC_GAIN + i, new);
  883. change = 1;
  884. }
  885. }
  886. snd_ice1712_restore_gpio_status(ice);
  887. return change;
  888. }
  889. /*
  890. * ADC gain mixer control
  891. */
  892. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  893. {
  894. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  895. uinfo->count = 2;
  896. uinfo->value.integer.min = 0; /* -12dB */
  897. uinfo->value.integer.max = 0x1f; /* 19dB */
  898. return 0;
  899. }
  900. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  901. {
  902. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  903. int i, idx;
  904. unsigned short vol;
  905. mutex_lock(&ice->gpio_mutex);
  906. for (i = 0; i < 2; i++) {
  907. idx = WM_ADC_GAIN + i;
  908. vol = wm_get(ice, idx) & 0x1f;
  909. ucontrol->value.integer.value[i] = vol;
  910. }
  911. mutex_unlock(&ice->gpio_mutex);
  912. return 0;
  913. }
  914. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  915. {
  916. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  917. int i, idx;
  918. unsigned short ovol, nvol;
  919. int change = 0;
  920. snd_ice1712_save_gpio_status(ice);
  921. for (i = 0; i < 2; i++) {
  922. idx = WM_ADC_GAIN + i;
  923. nvol = ucontrol->value.integer.value[i] & 0x1f;
  924. ovol = wm_get(ice, idx);
  925. if ((ovol & 0x1f) != nvol) {
  926. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  927. change = 1;
  928. }
  929. }
  930. snd_ice1712_restore_gpio_status(ice);
  931. return change;
  932. }
  933. /*
  934. * ADC input mux mixer control
  935. */
  936. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  937. {
  938. static const char * const texts[] = {
  939. "CD", /* AIN1 */
  940. "Aux", /* AIN2 */
  941. "Line", /* AIN3 */
  942. "Mic", /* AIN4 */
  943. "AC97" /* AIN5 */
  944. };
  945. static const char * const universe_texts[] = {
  946. "Aux1", /* AIN1 */
  947. "CD", /* AIN2 */
  948. "Phono", /* AIN3 */
  949. "Line", /* AIN4 */
  950. "Aux2", /* AIN5 */
  951. "Mic", /* AIN6 */
  952. "Aux3", /* AIN7 */
  953. "AC97" /* AIN8 */
  954. };
  955. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  956. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  957. uinfo->count = 2;
  958. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  959. uinfo->value.enumerated.items = 8;
  960. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  961. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  962. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  963. } else {
  964. uinfo->value.enumerated.items = 5;
  965. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  966. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  967. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  968. }
  969. return 0;
  970. }
  971. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  972. {
  973. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  974. unsigned short val;
  975. mutex_lock(&ice->gpio_mutex);
  976. val = wm_get(ice, WM_ADC_MUX);
  977. ucontrol->value.enumerated.item[0] = val & 7;
  978. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  979. mutex_unlock(&ice->gpio_mutex);
  980. return 0;
  981. }
  982. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  983. {
  984. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  985. unsigned short oval, nval;
  986. int change;
  987. snd_ice1712_save_gpio_status(ice);
  988. oval = wm_get(ice, WM_ADC_MUX);
  989. nval = oval & ~0x77;
  990. nval |= ucontrol->value.enumerated.item[0] & 7;
  991. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  992. change = (oval != nval);
  993. if (change)
  994. wm_put(ice, WM_ADC_MUX, nval);
  995. snd_ice1712_restore_gpio_status(ice);
  996. return change;
  997. }
  998. /*
  999. * CS8415 Input mux
  1000. */
  1001. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1002. {
  1003. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1004. static const char * const aureon_texts[] = {
  1005. "CD", /* RXP0 */
  1006. "Optical" /* RXP1 */
  1007. };
  1008. static const char * const prodigy_texts[] = {
  1009. "CD",
  1010. "Coax"
  1011. };
  1012. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1013. uinfo->count = 1;
  1014. uinfo->value.enumerated.items = 2;
  1015. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1016. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1017. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  1018. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  1019. else
  1020. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  1021. return 0;
  1022. }
  1023. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1024. {
  1025. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1026. struct aureon_spec *spec = ice->spec;
  1027. /* snd_ice1712_save_gpio_status(ice); */
  1028. /* val = aureon_cs8415_get(ice, CS8415_CTRL2); */
  1029. ucontrol->value.enumerated.item[0] = spec->cs8415_mux;
  1030. /* snd_ice1712_restore_gpio_status(ice); */
  1031. return 0;
  1032. }
  1033. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1034. {
  1035. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1036. struct aureon_spec *spec = ice->spec;
  1037. unsigned short oval, nval;
  1038. int change;
  1039. snd_ice1712_save_gpio_status(ice);
  1040. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1041. nval = oval & ~0x07;
  1042. nval |= ucontrol->value.enumerated.item[0] & 7;
  1043. change = (oval != nval);
  1044. if (change)
  1045. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1046. snd_ice1712_restore_gpio_status(ice);
  1047. spec->cs8415_mux = ucontrol->value.enumerated.item[0];
  1048. return change;
  1049. }
  1050. static int aureon_cs8415_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1051. {
  1052. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1053. uinfo->count = 1;
  1054. uinfo->value.integer.min = 0;
  1055. uinfo->value.integer.max = 192000;
  1056. return 0;
  1057. }
  1058. static int aureon_cs8415_rate_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1059. {
  1060. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1061. unsigned char ratio;
  1062. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1063. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1064. return 0;
  1065. }
  1066. /*
  1067. * CS8415A Mute
  1068. */
  1069. #define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
  1070. static int aureon_cs8415_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1071. {
  1072. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1073. snd_ice1712_save_gpio_status(ice);
  1074. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1075. snd_ice1712_restore_gpio_status(ice);
  1076. return 0;
  1077. }
  1078. static int aureon_cs8415_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1079. {
  1080. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1081. unsigned char oval, nval;
  1082. int change;
  1083. snd_ice1712_save_gpio_status(ice);
  1084. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1085. if (ucontrol->value.integer.value[0])
  1086. nval = oval & ~0x20;
  1087. else
  1088. nval = oval | 0x20;
  1089. change = (oval != nval);
  1090. if (change)
  1091. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1092. snd_ice1712_restore_gpio_status(ice);
  1093. return change;
  1094. }
  1095. /*
  1096. * CS8415A Q-Sub info
  1097. */
  1098. static int aureon_cs8415_qsub_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1099. {
  1100. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1101. uinfo->count = 10;
  1102. return 0;
  1103. }
  1104. static int aureon_cs8415_qsub_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1105. {
  1106. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1107. snd_ice1712_save_gpio_status(ice);
  1108. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1109. snd_ice1712_restore_gpio_status(ice);
  1110. return 0;
  1111. }
  1112. static int aureon_cs8415_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1113. {
  1114. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1115. uinfo->count = 1;
  1116. return 0;
  1117. }
  1118. static int aureon_cs8415_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1119. {
  1120. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1121. return 0;
  1122. }
  1123. static int aureon_cs8415_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1124. {
  1125. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1126. snd_ice1712_save_gpio_status(ice);
  1127. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1128. snd_ice1712_restore_gpio_status(ice);
  1129. return 0;
  1130. }
  1131. /*
  1132. * Headphone Amplifier
  1133. */
  1134. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1135. {
  1136. unsigned int tmp, tmp2;
  1137. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1138. if (enable)
  1139. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1140. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1141. tmp |= AUREON_HP_SEL;
  1142. else
  1143. tmp |= PRODIGY_HP_SEL;
  1144. else
  1145. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1146. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1147. tmp &= ~AUREON_HP_SEL;
  1148. else
  1149. tmp &= ~PRODIGY_HP_SEL;
  1150. if (tmp != tmp2) {
  1151. snd_ice1712_gpio_write(ice, tmp);
  1152. return 1;
  1153. }
  1154. return 0;
  1155. }
  1156. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1157. {
  1158. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1159. return (tmp & AUREON_HP_SEL) != 0;
  1160. }
  1161. #define aureon_hpamp_info snd_ctl_boolean_mono_info
  1162. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1163. {
  1164. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1165. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1166. return 0;
  1167. }
  1168. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1169. {
  1170. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1171. return aureon_set_headphone_amp(ice, ucontrol->value.integer.value[0]);
  1172. }
  1173. /*
  1174. * Deemphasis
  1175. */
  1176. #define aureon_deemp_info snd_ctl_boolean_mono_info
  1177. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1178. {
  1179. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1180. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1181. return 0;
  1182. }
  1183. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1184. {
  1185. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1186. int temp, temp2;
  1187. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1188. if (ucontrol->value.integer.value[0])
  1189. temp |= 0xf;
  1190. else
  1191. temp &= ~0xf;
  1192. if (temp != temp2) {
  1193. wm_put(ice, WM_DAC_CTRL2, temp);
  1194. return 1;
  1195. }
  1196. return 0;
  1197. }
  1198. /*
  1199. * ADC Oversampling
  1200. */
  1201. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1202. {
  1203. static const char * const texts[2] = { "128x", "64x" };
  1204. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1205. uinfo->count = 1;
  1206. uinfo->value.enumerated.items = 2;
  1207. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1208. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1209. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1210. return 0;
  1211. }
  1212. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1213. {
  1214. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1215. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1216. return 0;
  1217. }
  1218. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1219. {
  1220. int temp, temp2;
  1221. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1222. temp2 = temp = wm_get(ice, WM_MASTER);
  1223. if (ucontrol->value.enumerated.item[0])
  1224. temp |= 0x8;
  1225. else
  1226. temp &= ~0x8;
  1227. if (temp != temp2) {
  1228. wm_put(ice, WM_MASTER, temp);
  1229. return 1;
  1230. }
  1231. return 0;
  1232. }
  1233. /*
  1234. * mixers
  1235. */
  1236. static struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1237. {
  1238. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1239. .name = "Master Playback Switch",
  1240. .info = wm_master_mute_info,
  1241. .get = wm_master_mute_get,
  1242. .put = wm_master_mute_put
  1243. },
  1244. {
  1245. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1246. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1247. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1248. .name = "Master Playback Volume",
  1249. .info = wm_master_vol_info,
  1250. .get = wm_master_vol_get,
  1251. .put = wm_master_vol_put,
  1252. .tlv = { .p = db_scale_wm_dac }
  1253. },
  1254. {
  1255. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1256. .name = "Front Playback Switch",
  1257. .info = wm_mute_info,
  1258. .get = wm_mute_get,
  1259. .put = wm_mute_put,
  1260. .private_value = (2 << 8) | 0
  1261. },
  1262. {
  1263. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1264. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1265. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1266. .name = "Front Playback Volume",
  1267. .info = wm_vol_info,
  1268. .get = wm_vol_get,
  1269. .put = wm_vol_put,
  1270. .private_value = (2 << 8) | 0,
  1271. .tlv = { .p = db_scale_wm_dac }
  1272. },
  1273. {
  1274. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1275. .name = "Rear Playback Switch",
  1276. .info = wm_mute_info,
  1277. .get = wm_mute_get,
  1278. .put = wm_mute_put,
  1279. .private_value = (2 << 8) | 2
  1280. },
  1281. {
  1282. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1283. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1284. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1285. .name = "Rear Playback Volume",
  1286. .info = wm_vol_info,
  1287. .get = wm_vol_get,
  1288. .put = wm_vol_put,
  1289. .private_value = (2 << 8) | 2,
  1290. .tlv = { .p = db_scale_wm_dac }
  1291. },
  1292. {
  1293. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1294. .name = "Center Playback Switch",
  1295. .info = wm_mute_info,
  1296. .get = wm_mute_get,
  1297. .put = wm_mute_put,
  1298. .private_value = (1 << 8) | 4
  1299. },
  1300. {
  1301. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1302. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1303. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1304. .name = "Center Playback Volume",
  1305. .info = wm_vol_info,
  1306. .get = wm_vol_get,
  1307. .put = wm_vol_put,
  1308. .private_value = (1 << 8) | 4,
  1309. .tlv = { .p = db_scale_wm_dac }
  1310. },
  1311. {
  1312. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1313. .name = "LFE Playback Switch",
  1314. .info = wm_mute_info,
  1315. .get = wm_mute_get,
  1316. .put = wm_mute_put,
  1317. .private_value = (1 << 8) | 5
  1318. },
  1319. {
  1320. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1321. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1322. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1323. .name = "LFE Playback Volume",
  1324. .info = wm_vol_info,
  1325. .get = wm_vol_get,
  1326. .put = wm_vol_put,
  1327. .private_value = (1 << 8) | 5,
  1328. .tlv = { .p = db_scale_wm_dac }
  1329. },
  1330. {
  1331. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1332. .name = "Side Playback Switch",
  1333. .info = wm_mute_info,
  1334. .get = wm_mute_get,
  1335. .put = wm_mute_put,
  1336. .private_value = (2 << 8) | 6
  1337. },
  1338. {
  1339. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1340. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1341. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1342. .name = "Side Playback Volume",
  1343. .info = wm_vol_info,
  1344. .get = wm_vol_get,
  1345. .put = wm_vol_put,
  1346. .private_value = (2 << 8) | 6,
  1347. .tlv = { .p = db_scale_wm_dac }
  1348. }
  1349. };
  1350. static struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1351. {
  1352. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1353. .name = "PCM Playback Switch",
  1354. .info = wm_pcm_mute_info,
  1355. .get = wm_pcm_mute_get,
  1356. .put = wm_pcm_mute_put
  1357. },
  1358. {
  1359. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1360. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1361. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1362. .name = "PCM Playback Volume",
  1363. .info = wm_pcm_vol_info,
  1364. .get = wm_pcm_vol_get,
  1365. .put = wm_pcm_vol_put,
  1366. .tlv = { .p = db_scale_wm_pcm }
  1367. },
  1368. {
  1369. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1370. .name = "Capture Switch",
  1371. .info = wm_adc_mute_info,
  1372. .get = wm_adc_mute_get,
  1373. .put = wm_adc_mute_put,
  1374. },
  1375. {
  1376. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1377. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1378. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1379. .name = "Capture Volume",
  1380. .info = wm_adc_vol_info,
  1381. .get = wm_adc_vol_get,
  1382. .put = wm_adc_vol_put,
  1383. .tlv = { .p = db_scale_wm_adc }
  1384. },
  1385. {
  1386. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1387. .name = "Capture Source",
  1388. .info = wm_adc_mux_info,
  1389. .get = wm_adc_mux_get,
  1390. .put = wm_adc_mux_put,
  1391. .private_value = 5
  1392. },
  1393. {
  1394. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1395. .name = "External Amplifier",
  1396. .info = aureon_hpamp_info,
  1397. .get = aureon_hpamp_get,
  1398. .put = aureon_hpamp_put
  1399. },
  1400. {
  1401. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1402. .name = "DAC Deemphasis Switch",
  1403. .info = aureon_deemp_info,
  1404. .get = aureon_deemp_get,
  1405. .put = aureon_deemp_put
  1406. },
  1407. {
  1408. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1409. .name = "ADC Oversampling",
  1410. .info = aureon_oversampling_info,
  1411. .get = aureon_oversampling_get,
  1412. .put = aureon_oversampling_put
  1413. }
  1414. };
  1415. static struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1416. {
  1417. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1418. .name = "AC97 Playback Switch",
  1419. .info = aureon_ac97_mmute_info,
  1420. .get = aureon_ac97_mmute_get,
  1421. .put = aureon_ac97_mmute_put,
  1422. .private_value = AC97_MASTER
  1423. },
  1424. {
  1425. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1426. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1427. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1428. .name = "AC97 Playback Volume",
  1429. .info = aureon_ac97_vol_info,
  1430. .get = aureon_ac97_vol_get,
  1431. .put = aureon_ac97_vol_put,
  1432. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1433. .tlv = { .p = db_scale_ac97_master }
  1434. },
  1435. {
  1436. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1437. .name = "CD Playback Switch",
  1438. .info = aureon_ac97_mute_info,
  1439. .get = aureon_ac97_mute_get,
  1440. .put = aureon_ac97_mute_put,
  1441. .private_value = AC97_CD
  1442. },
  1443. {
  1444. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1445. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1446. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1447. .name = "CD Playback Volume",
  1448. .info = aureon_ac97_vol_info,
  1449. .get = aureon_ac97_vol_get,
  1450. .put = aureon_ac97_vol_put,
  1451. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1452. .tlv = { .p = db_scale_ac97_gain }
  1453. },
  1454. {
  1455. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1456. .name = "Aux Playback Switch",
  1457. .info = aureon_ac97_mute_info,
  1458. .get = aureon_ac97_mute_get,
  1459. .put = aureon_ac97_mute_put,
  1460. .private_value = AC97_AUX,
  1461. },
  1462. {
  1463. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1464. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1465. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1466. .name = "Aux Playback Volume",
  1467. .info = aureon_ac97_vol_info,
  1468. .get = aureon_ac97_vol_get,
  1469. .put = aureon_ac97_vol_put,
  1470. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1471. .tlv = { .p = db_scale_ac97_gain }
  1472. },
  1473. {
  1474. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1475. .name = "Line Playback Switch",
  1476. .info = aureon_ac97_mute_info,
  1477. .get = aureon_ac97_mute_get,
  1478. .put = aureon_ac97_mute_put,
  1479. .private_value = AC97_LINE
  1480. },
  1481. {
  1482. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1483. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1484. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1485. .name = "Line Playback Volume",
  1486. .info = aureon_ac97_vol_info,
  1487. .get = aureon_ac97_vol_get,
  1488. .put = aureon_ac97_vol_put,
  1489. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1490. .tlv = { .p = db_scale_ac97_gain }
  1491. },
  1492. {
  1493. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1494. .name = "Mic Playback Switch",
  1495. .info = aureon_ac97_mute_info,
  1496. .get = aureon_ac97_mute_get,
  1497. .put = aureon_ac97_mute_put,
  1498. .private_value = AC97_MIC
  1499. },
  1500. {
  1501. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1502. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1503. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1504. .name = "Mic Playback Volume",
  1505. .info = aureon_ac97_vol_info,
  1506. .get = aureon_ac97_vol_get,
  1507. .put = aureon_ac97_vol_put,
  1508. .private_value = AC97_MIC,
  1509. .tlv = { .p = db_scale_ac97_gain }
  1510. },
  1511. {
  1512. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1513. .name = "Mic Boost (+20dB)",
  1514. .info = aureon_ac97_micboost_info,
  1515. .get = aureon_ac97_micboost_get,
  1516. .put = aureon_ac97_micboost_put
  1517. }
  1518. };
  1519. static struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1520. {
  1521. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1522. .name = "AC97 Playback Switch",
  1523. .info = aureon_ac97_mmute_info,
  1524. .get = aureon_ac97_mmute_get,
  1525. .put = aureon_ac97_mmute_put,
  1526. .private_value = AC97_MASTER
  1527. },
  1528. {
  1529. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1530. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1531. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1532. .name = "AC97 Playback Volume",
  1533. .info = aureon_ac97_vol_info,
  1534. .get = aureon_ac97_vol_get,
  1535. .put = aureon_ac97_vol_put,
  1536. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1537. .tlv = { .p = db_scale_ac97_master }
  1538. },
  1539. {
  1540. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1541. .name = "CD Playback Switch",
  1542. .info = aureon_ac97_mute_info,
  1543. .get = aureon_ac97_mute_get,
  1544. .put = aureon_ac97_mute_put,
  1545. .private_value = AC97_AUX
  1546. },
  1547. {
  1548. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1549. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1550. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1551. .name = "CD Playback Volume",
  1552. .info = aureon_ac97_vol_info,
  1553. .get = aureon_ac97_vol_get,
  1554. .put = aureon_ac97_vol_put,
  1555. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1556. .tlv = { .p = db_scale_ac97_gain }
  1557. },
  1558. {
  1559. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1560. .name = "Phono Playback Switch",
  1561. .info = aureon_ac97_mute_info,
  1562. .get = aureon_ac97_mute_get,
  1563. .put = aureon_ac97_mute_put,
  1564. .private_value = AC97_CD
  1565. },
  1566. {
  1567. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1568. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1569. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1570. .name = "Phono Playback Volume",
  1571. .info = aureon_ac97_vol_info,
  1572. .get = aureon_ac97_vol_get,
  1573. .put = aureon_ac97_vol_put,
  1574. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1575. .tlv = { .p = db_scale_ac97_gain }
  1576. },
  1577. {
  1578. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1579. .name = "Line Playback Switch",
  1580. .info = aureon_ac97_mute_info,
  1581. .get = aureon_ac97_mute_get,
  1582. .put = aureon_ac97_mute_put,
  1583. .private_value = AC97_LINE
  1584. },
  1585. {
  1586. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1587. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1588. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1589. .name = "Line Playback Volume",
  1590. .info = aureon_ac97_vol_info,
  1591. .get = aureon_ac97_vol_get,
  1592. .put = aureon_ac97_vol_put,
  1593. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1594. .tlv = { .p = db_scale_ac97_gain }
  1595. },
  1596. {
  1597. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1598. .name = "Mic Playback Switch",
  1599. .info = aureon_ac97_mute_info,
  1600. .get = aureon_ac97_mute_get,
  1601. .put = aureon_ac97_mute_put,
  1602. .private_value = AC97_MIC
  1603. },
  1604. {
  1605. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1606. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1607. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1608. .name = "Mic Playback Volume",
  1609. .info = aureon_ac97_vol_info,
  1610. .get = aureon_ac97_vol_get,
  1611. .put = aureon_ac97_vol_put,
  1612. .private_value = AC97_MIC,
  1613. .tlv = { .p = db_scale_ac97_gain }
  1614. },
  1615. {
  1616. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1617. .name = "Mic Boost (+20dB)",
  1618. .info = aureon_ac97_micboost_info,
  1619. .get = aureon_ac97_micboost_get,
  1620. .put = aureon_ac97_micboost_put
  1621. },
  1622. {
  1623. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1624. .name = "Aux Playback Switch",
  1625. .info = aureon_ac97_mute_info,
  1626. .get = aureon_ac97_mute_get,
  1627. .put = aureon_ac97_mute_put,
  1628. .private_value = AC97_VIDEO,
  1629. },
  1630. {
  1631. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1632. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1633. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1634. .name = "Aux Playback Volume",
  1635. .info = aureon_ac97_vol_info,
  1636. .get = aureon_ac97_vol_get,
  1637. .put = aureon_ac97_vol_put,
  1638. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1639. .tlv = { .p = db_scale_ac97_gain }
  1640. },
  1641. {
  1642. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1643. .name = "Aux Source",
  1644. .info = aureon_universe_inmux_info,
  1645. .get = aureon_universe_inmux_get,
  1646. .put = aureon_universe_inmux_put
  1647. }
  1648. };
  1649. static struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1650. {
  1651. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1652. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, SWITCH),
  1653. .info = aureon_cs8415_mute_info,
  1654. .get = aureon_cs8415_mute_get,
  1655. .put = aureon_cs8415_mute_put
  1656. },
  1657. {
  1658. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1659. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Source",
  1660. .info = aureon_cs8415_mux_info,
  1661. .get = aureon_cs8415_mux_get,
  1662. .put = aureon_cs8415_mux_put,
  1663. },
  1664. {
  1665. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1666. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ", CAPTURE, DEFAULT),
  1667. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1668. .info = aureon_cs8415_qsub_info,
  1669. .get = aureon_cs8415_qsub_get,
  1670. },
  1671. {
  1672. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1673. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  1674. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1675. .info = aureon_cs8415_spdif_info,
  1676. .get = aureon_cs8415_mask_get
  1677. },
  1678. {
  1679. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1680. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  1681. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1682. .info = aureon_cs8415_spdif_info,
  1683. .get = aureon_cs8415_spdif_get
  1684. },
  1685. {
  1686. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1687. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Rate",
  1688. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1689. .info = aureon_cs8415_rate_info,
  1690. .get = aureon_cs8415_rate_get
  1691. }
  1692. };
  1693. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1694. {
  1695. unsigned int i, counts;
  1696. int err;
  1697. counts = ARRAY_SIZE(aureon_dac_controls);
  1698. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1699. counts -= 2; /* no side */
  1700. for (i = 0; i < counts; i++) {
  1701. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1702. if (err < 0)
  1703. return err;
  1704. }
  1705. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1706. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1707. if (err < 0)
  1708. return err;
  1709. }
  1710. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1711. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1712. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1713. if (err < 0)
  1714. return err;
  1715. }
  1716. } else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1717. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1718. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1719. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1720. if (err < 0)
  1721. return err;
  1722. }
  1723. }
  1724. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1725. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1726. unsigned char id;
  1727. snd_ice1712_save_gpio_status(ice);
  1728. id = aureon_cs8415_get(ice, CS8415_ID);
  1729. if (id != 0x41)
  1730. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1731. else if ((id & 0x0F) != 0x01)
  1732. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1733. else {
  1734. for (i = 0; i < ARRAY_SIZE(cs8415_controls); i++) {
  1735. struct snd_kcontrol *kctl;
  1736. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1737. if (err < 0)
  1738. return err;
  1739. if (i > 1)
  1740. kctl->id.device = ice->pcm->device;
  1741. }
  1742. }
  1743. snd_ice1712_restore_gpio_status(ice);
  1744. }
  1745. return 0;
  1746. }
  1747. /*
  1748. * reset the chip
  1749. */
  1750. static int aureon_reset(struct snd_ice1712 *ice)
  1751. {
  1752. static const unsigned short wm_inits_aureon[] = {
  1753. /* These come first to reduce init pop noise */
  1754. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1755. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1756. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1757. 0x18, 0x000, /* All power-up */
  1758. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1759. 0x17, 0x022, /* 256fs, slave mode */
  1760. 0x00, 0, /* DAC1 analog mute */
  1761. 0x01, 0, /* DAC2 analog mute */
  1762. 0x02, 0, /* DAC3 analog mute */
  1763. 0x03, 0, /* DAC4 analog mute */
  1764. 0x04, 0, /* DAC5 analog mute */
  1765. 0x05, 0, /* DAC6 analog mute */
  1766. 0x06, 0, /* DAC7 analog mute */
  1767. 0x07, 0, /* DAC8 analog mute */
  1768. 0x08, 0x100, /* master analog mute */
  1769. 0x09, 0xff, /* DAC1 digital full */
  1770. 0x0a, 0xff, /* DAC2 digital full */
  1771. 0x0b, 0xff, /* DAC3 digital full */
  1772. 0x0c, 0xff, /* DAC4 digital full */
  1773. 0x0d, 0xff, /* DAC5 digital full */
  1774. 0x0e, 0xff, /* DAC6 digital full */
  1775. 0x0f, 0xff, /* DAC7 digital full */
  1776. 0x10, 0xff, /* DAC8 digital full */
  1777. 0x11, 0x1ff, /* master digital full */
  1778. 0x12, 0x000, /* phase normal */
  1779. 0x13, 0x090, /* unmute DAC L/R */
  1780. 0x14, 0x000, /* all unmute */
  1781. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1782. 0x19, 0x000, /* -12dB ADC/L */
  1783. 0x1a, 0x000, /* -12dB ADC/R */
  1784. (unsigned short)-1
  1785. };
  1786. static const unsigned short wm_inits_prodigy[] = {
  1787. /* These come first to reduce init pop noise */
  1788. 0x1b, 0x000, /* ADC Mux */
  1789. 0x1c, 0x009, /* Out Mux1 */
  1790. 0x1d, 0x009, /* Out Mux2 */
  1791. 0x18, 0x000, /* All power-up */
  1792. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1793. 0x17, 0x006, /* 128fs, slave mode */
  1794. 0x00, 0, /* DAC1 analog mute */
  1795. 0x01, 0, /* DAC2 analog mute */
  1796. 0x02, 0, /* DAC3 analog mute */
  1797. 0x03, 0, /* DAC4 analog mute */
  1798. 0x04, 0, /* DAC5 analog mute */
  1799. 0x05, 0, /* DAC6 analog mute */
  1800. 0x06, 0, /* DAC7 analog mute */
  1801. 0x07, 0, /* DAC8 analog mute */
  1802. 0x08, 0x100, /* master analog mute */
  1803. 0x09, 0x7f, /* DAC1 digital full */
  1804. 0x0a, 0x7f, /* DAC2 digital full */
  1805. 0x0b, 0x7f, /* DAC3 digital full */
  1806. 0x0c, 0x7f, /* DAC4 digital full */
  1807. 0x0d, 0x7f, /* DAC5 digital full */
  1808. 0x0e, 0x7f, /* DAC6 digital full */
  1809. 0x0f, 0x7f, /* DAC7 digital full */
  1810. 0x10, 0x7f, /* DAC8 digital full */
  1811. 0x11, 0x1FF, /* master digital full */
  1812. 0x12, 0x000, /* phase normal */
  1813. 0x13, 0x090, /* unmute DAC L/R */
  1814. 0x14, 0x000, /* all unmute */
  1815. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1816. 0x19, 0x000, /* -12dB ADC/L */
  1817. 0x1a, 0x000, /* -12dB ADC/R */
  1818. (unsigned short)-1
  1819. };
  1820. static const unsigned short cs_inits[] = {
  1821. 0x0441, /* RUN */
  1822. 0x0180, /* no mute, OMCK output on RMCK pin */
  1823. 0x0201, /* S/PDIF source on RXP1 */
  1824. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1825. (unsigned short)-1
  1826. };
  1827. unsigned int tmp;
  1828. const unsigned short *p;
  1829. int err;
  1830. struct aureon_spec *spec = ice->spec;
  1831. err = aureon_ac97_init(ice);
  1832. if (err != 0)
  1833. return err;
  1834. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1835. /* reset the wm codec as the SPI mode */
  1836. snd_ice1712_save_gpio_status(ice);
  1837. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1838. tmp = snd_ice1712_gpio_read(ice);
  1839. tmp &= ~AUREON_WM_RESET;
  1840. snd_ice1712_gpio_write(ice, tmp);
  1841. udelay(1);
  1842. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1843. snd_ice1712_gpio_write(ice, tmp);
  1844. udelay(1);
  1845. tmp |= AUREON_WM_RESET;
  1846. snd_ice1712_gpio_write(ice, tmp);
  1847. udelay(1);
  1848. /* initialize WM8770 codec */
  1849. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1850. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1851. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1852. p = wm_inits_prodigy;
  1853. else
  1854. p = wm_inits_aureon;
  1855. for (; *p != (unsigned short)-1; p += 2)
  1856. wm_put(ice, p[0], p[1]);
  1857. /* initialize CS8415A codec */
  1858. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1859. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1860. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1861. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1862. spec->cs8415_mux = 1;
  1863. aureon_set_headphone_amp(ice, 1);
  1864. }
  1865. snd_ice1712_restore_gpio_status(ice);
  1866. /* initialize PCA9554 pin directions & set default input */
  1867. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1868. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1869. return 0;
  1870. }
  1871. /*
  1872. * suspend/resume
  1873. */
  1874. #ifdef CONFIG_PM
  1875. static int aureon_resume(struct snd_ice1712 *ice)
  1876. {
  1877. struct aureon_spec *spec = ice->spec;
  1878. int err, i;
  1879. err = aureon_reset(ice);
  1880. if (err != 0)
  1881. return err;
  1882. /* workaround for poking volume with alsamixer after resume:
  1883. * just set stored volume again */
  1884. for (i = 0; i < ice->num_total_dacs; i++)
  1885. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1886. return 0;
  1887. }
  1888. #endif
  1889. /*
  1890. * initialize the chip
  1891. */
  1892. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1893. {
  1894. struct aureon_spec *spec;
  1895. int i, err;
  1896. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1897. if (!spec)
  1898. return -ENOMEM;
  1899. ice->spec = spec;
  1900. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1901. ice->num_total_dacs = 6;
  1902. ice->num_total_adcs = 2;
  1903. } else {
  1904. /* aureon 7.1 and prodigy 7.1 */
  1905. ice->num_total_dacs = 8;
  1906. ice->num_total_adcs = 2;
  1907. }
  1908. /* to remember the register values of CS8415 */
  1909. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1910. if (!ice->akm)
  1911. return -ENOMEM;
  1912. ice->akm_codecs = 1;
  1913. err = aureon_reset(ice);
  1914. if (err != 0)
  1915. return err;
  1916. spec->master[0] = WM_VOL_MUTE;
  1917. spec->master[1] = WM_VOL_MUTE;
  1918. for (i = 0; i < ice->num_total_dacs; i++) {
  1919. spec->vol[i] = WM_VOL_MUTE;
  1920. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1921. }
  1922. #ifdef CONFIG_PM
  1923. ice->pm_resume = aureon_resume;
  1924. ice->pm_suspend_enabled = 1;
  1925. #endif
  1926. return 0;
  1927. }
  1928. /*
  1929. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1930. * hence the driver needs to sets up it properly.
  1931. */
  1932. static unsigned char aureon51_eeprom[] __devinitdata = {
  1933. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1934. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1935. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1936. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1937. [ICE_EEP2_GPIO_DIR] = 0xff,
  1938. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1939. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1940. [ICE_EEP2_GPIO_MASK] = 0x00,
  1941. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1942. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1943. [ICE_EEP2_GPIO_STATE] = 0x00,
  1944. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1945. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1946. };
  1947. static unsigned char aureon71_eeprom[] __devinitdata = {
  1948. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1949. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1950. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1951. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1952. [ICE_EEP2_GPIO_DIR] = 0xff,
  1953. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1954. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1955. [ICE_EEP2_GPIO_MASK] = 0x00,
  1956. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1957. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1958. [ICE_EEP2_GPIO_STATE] = 0x00,
  1959. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1960. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1961. };
  1962. #define prodigy71_eeprom aureon71_eeprom
  1963. static unsigned char aureon71_universe_eeprom[] __devinitdata = {
  1964. [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, spdif-in/ADC,
  1965. * 4DACs
  1966. */
  1967. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1968. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1969. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1970. [ICE_EEP2_GPIO_DIR] = 0xff,
  1971. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1972. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1973. [ICE_EEP2_GPIO_MASK] = 0x00,
  1974. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1975. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1976. [ICE_EEP2_GPIO_STATE] = 0x00,
  1977. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1978. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1979. };
  1980. static unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1981. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1982. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1983. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1984. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1985. [ICE_EEP2_GPIO_DIR] = 0xff,
  1986. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1987. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1988. [ICE_EEP2_GPIO_MASK] = 0x00,
  1989. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1990. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1991. [ICE_EEP2_GPIO_STATE] = 0x00,
  1992. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1993. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1994. };
  1995. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1996. /* entry point */
  1997. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1998. {
  1999. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  2000. .name = "Terratec Aureon 5.1-Sky",
  2001. .model = "aureon51",
  2002. .chip_init = aureon_init,
  2003. .build_controls = aureon_add_controls,
  2004. .eeprom_size = sizeof(aureon51_eeprom),
  2005. .eeprom_data = aureon51_eeprom,
  2006. .driver = "Aureon51",
  2007. },
  2008. {
  2009. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  2010. .name = "Terratec Aureon 7.1-Space",
  2011. .model = "aureon71",
  2012. .chip_init = aureon_init,
  2013. .build_controls = aureon_add_controls,
  2014. .eeprom_size = sizeof(aureon71_eeprom),
  2015. .eeprom_data = aureon71_eeprom,
  2016. .driver = "Aureon71",
  2017. },
  2018. {
  2019. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  2020. .name = "Terratec Aureon 7.1-Universe",
  2021. .model = "universe",
  2022. .chip_init = aureon_init,
  2023. .build_controls = aureon_add_controls,
  2024. .eeprom_size = sizeof(aureon71_universe_eeprom),
  2025. .eeprom_data = aureon71_universe_eeprom,
  2026. .driver = "Aureon71Univ", /* keep in 15 letters */
  2027. },
  2028. {
  2029. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  2030. .name = "Audiotrak Prodigy 7.1",
  2031. .model = "prodigy71",
  2032. .chip_init = aureon_init,
  2033. .build_controls = aureon_add_controls,
  2034. .eeprom_size = sizeof(prodigy71_eeprom),
  2035. .eeprom_data = prodigy71_eeprom,
  2036. .driver = "Prodigy71", /* should be identical with Aureon71 */
  2037. },
  2038. {
  2039. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  2040. .name = "Audiotrak Prodigy 7.1 LT",
  2041. .model = "prodigy71lt",
  2042. .chip_init = aureon_init,
  2043. .build_controls = aureon_add_controls,
  2044. .eeprom_size = sizeof(prodigy71lt_eeprom),
  2045. .eeprom_data = prodigy71lt_eeprom,
  2046. .driver = "Prodigy71LT",
  2047. },
  2048. {
  2049. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  2050. .name = "Audiotrak Prodigy 7.1 XT",
  2051. .model = "prodigy71xt",
  2052. .chip_init = aureon_init,
  2053. .build_controls = aureon_add_controls,
  2054. .eeprom_size = sizeof(prodigy71xt_eeprom),
  2055. .eeprom_data = prodigy71xt_eeprom,
  2056. .driver = "Prodigy71LT",
  2057. },
  2058. { } /* terminator */
  2059. };