patch_ca0132.c 28 KB

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  1. /*
  2. * HD audio interface patch for Creative CA0132 chip
  3. *
  4. * Copyright (c) 2011, Creative Technology Ltd.
  5. *
  6. * Based on patch_ca0110.c
  7. * Copyright (c) 2008 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This driver is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This driver is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #include <linux/init.h>
  24. #include <linux/delay.h>
  25. #include <linux/slab.h>
  26. #include <linux/pci.h>
  27. #include <linux/mutex.h>
  28. #include <linux/module.h>
  29. #include <sound/core.h>
  30. #include "hda_codec.h"
  31. #include "hda_local.h"
  32. #define WIDGET_CHIP_CTRL 0x15
  33. #define WIDGET_DSP_CTRL 0x16
  34. #define WUH_MEM_CONNID 10
  35. #define DSP_MEM_CONNID 16
  36. enum hda_cmd_vendor_io {
  37. /* for DspIO node */
  38. VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
  39. VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
  40. VENDOR_DSPIO_STATUS = 0xF01,
  41. VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
  42. VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
  43. VENDOR_DSPIO_DSP_INIT = 0x703,
  44. VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
  45. VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
  46. /* for ChipIO node */
  47. VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
  48. VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
  49. VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
  50. VENDOR_CHIPIO_DATA_LOW = 0x300,
  51. VENDOR_CHIPIO_DATA_HIGH = 0x400,
  52. VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
  53. VENDOR_CHIPIO_STATUS = 0xF01,
  54. VENDOR_CHIPIO_HIC_POST_READ = 0x702,
  55. VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
  56. VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
  57. VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
  58. VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
  59. VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
  60. VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
  61. VENDOR_CHIPIO_FLAG_SET = 0x70F,
  62. VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
  63. VENDOR_CHIPIO_PARAMETER_SET = 0x710,
  64. VENDOR_CHIPIO_PARAMETER_GET = 0xF10,
  65. VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
  66. VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
  67. VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
  68. VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
  69. VENDOR_CHIPIO_PARAMETER_EX_ID_GET = 0xF17,
  70. VENDOR_CHIPIO_PARAMETER_EX_ID_SET = 0x717,
  71. VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET = 0xF18,
  72. VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET = 0x718
  73. };
  74. /*
  75. * Control flag IDs
  76. */
  77. enum control_flag_id {
  78. /* Connection manager stream setup is bypassed/enabled */
  79. CONTROL_FLAG_C_MGR = 0,
  80. /* DSP DMA is bypassed/enabled */
  81. CONTROL_FLAG_DMA = 1,
  82. /* 8051 'idle' mode is disabled/enabled */
  83. CONTROL_FLAG_IDLE_ENABLE = 2,
  84. /* Tracker for the SPDIF-in path is bypassed/enabled */
  85. CONTROL_FLAG_TRACKER = 3,
  86. /* DigitalOut to Spdif2Out connection is disabled/enabled */
  87. CONTROL_FLAG_SPDIF2OUT = 4,
  88. /* Digital Microphone is disabled/enabled */
  89. CONTROL_FLAG_DMIC = 5,
  90. /* ADC_B rate is 48 kHz/96 kHz */
  91. CONTROL_FLAG_ADC_B_96KHZ = 6,
  92. /* ADC_C rate is 48 kHz/96 kHz */
  93. CONTROL_FLAG_ADC_C_96KHZ = 7,
  94. /* DAC rate is 48 kHz/96 kHz (affects all DACs) */
  95. CONTROL_FLAG_DAC_96KHZ = 8,
  96. /* DSP rate is 48 kHz/96 kHz */
  97. CONTROL_FLAG_DSP_96KHZ = 9,
  98. /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */
  99. CONTROL_FLAG_SRC_CLOCK_196MHZ = 10,
  100. /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */
  101. CONTROL_FLAG_SRC_RATE_96KHZ = 11,
  102. /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
  103. CONTROL_FLAG_DECODE_LOOP = 12,
  104. /* De-emphasis filter on DAC-1 disabled/enabled */
  105. CONTROL_FLAG_DAC1_DEEMPHASIS = 13,
  106. /* De-emphasis filter on DAC-2 disabled/enabled */
  107. CONTROL_FLAG_DAC2_DEEMPHASIS = 14,
  108. /* De-emphasis filter on DAC-3 disabled/enabled */
  109. CONTROL_FLAG_DAC3_DEEMPHASIS = 15,
  110. /* High-pass filter on ADC_B disabled/enabled */
  111. CONTROL_FLAG_ADC_B_HIGH_PASS = 16,
  112. /* High-pass filter on ADC_C disabled/enabled */
  113. CONTROL_FLAG_ADC_C_HIGH_PASS = 17,
  114. /* Common mode on Port_A disabled/enabled */
  115. CONTROL_FLAG_PORT_A_COMMON_MODE = 18,
  116. /* Common mode on Port_D disabled/enabled */
  117. CONTROL_FLAG_PORT_D_COMMON_MODE = 19,
  118. /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */
  119. CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20,
  120. /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */
  121. CONTROL_FLAG_PORT_D_10K0HM_LOAD = 21,
  122. /* ASI rate is 48kHz/96kHz */
  123. CONTROL_FLAG_ASI_96KHZ = 22,
  124. /* DAC power settings able to control attached ports no/yes */
  125. CONTROL_FLAG_DACS_CONTROL_PORTS = 23,
  126. /* Clock Stop OK reporting is disabled/enabled */
  127. CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24,
  128. /* Number of control flags */
  129. CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1)
  130. };
  131. /*
  132. * Control parameter IDs
  133. */
  134. enum control_parameter_id {
  135. /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
  136. CONTROL_PARAM_SPDIF1_SOURCE = 2,
  137. /* Stream Control */
  138. /* Select stream with the given ID */
  139. CONTROL_PARAM_STREAM_ID = 24,
  140. /* Source connection point for the selected stream */
  141. CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25,
  142. /* Destination connection point for the selected stream */
  143. CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26,
  144. /* Number of audio channels in the selected stream */
  145. CONTROL_PARAM_STREAMS_CHANNELS = 27,
  146. /*Enable control for the selected stream */
  147. CONTROL_PARAM_STREAM_CONTROL = 28,
  148. /* Connection Point Control */
  149. /* Select connection point with the given ID */
  150. CONTROL_PARAM_CONN_POINT_ID = 29,
  151. /* Connection point sample rate */
  152. CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30,
  153. /* Node Control */
  154. /* Select HDA node with the given ID */
  155. CONTROL_PARAM_NODE_ID = 31
  156. };
  157. /*
  158. * Dsp Io Status codes
  159. */
  160. enum hda_vendor_status_dspio {
  161. /* Success */
  162. VENDOR_STATUS_DSPIO_OK = 0x00,
  163. /* Busy, unable to accept new command, the host must retry */
  164. VENDOR_STATUS_DSPIO_BUSY = 0x01,
  165. /* SCP command queue is full */
  166. VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
  167. /* SCP response queue is empty */
  168. VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
  169. };
  170. /*
  171. * Chip Io Status codes
  172. */
  173. enum hda_vendor_status_chipio {
  174. /* Success */
  175. VENDOR_STATUS_CHIPIO_OK = 0x00,
  176. /* Busy, unable to accept new command, the host must retry */
  177. VENDOR_STATUS_CHIPIO_BUSY = 0x01
  178. };
  179. /*
  180. * CA0132 sample rate
  181. */
  182. enum ca0132_sample_rate {
  183. SR_6_000 = 0x00,
  184. SR_8_000 = 0x01,
  185. SR_9_600 = 0x02,
  186. SR_11_025 = 0x03,
  187. SR_16_000 = 0x04,
  188. SR_22_050 = 0x05,
  189. SR_24_000 = 0x06,
  190. SR_32_000 = 0x07,
  191. SR_44_100 = 0x08,
  192. SR_48_000 = 0x09,
  193. SR_88_200 = 0x0A,
  194. SR_96_000 = 0x0B,
  195. SR_144_000 = 0x0C,
  196. SR_176_400 = 0x0D,
  197. SR_192_000 = 0x0E,
  198. SR_384_000 = 0x0F,
  199. SR_COUNT = 0x10,
  200. SR_RATE_UNKNOWN = 0x1F
  201. };
  202. /*
  203. * Scp Helper function
  204. */
  205. enum get_set {
  206. IS_SET = 0,
  207. IS_GET = 1,
  208. };
  209. /*
  210. * Duplicated from ca0110 codec
  211. */
  212. static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac)
  213. {
  214. if (pin) {
  215. snd_hda_codec_write(codec, pin, 0,
  216. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP);
  217. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  218. snd_hda_codec_write(codec, pin, 0,
  219. AC_VERB_SET_AMP_GAIN_MUTE,
  220. AMP_OUT_UNMUTE);
  221. }
  222. if (dac)
  223. snd_hda_codec_write(codec, dac, 0,
  224. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO);
  225. }
  226. static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc)
  227. {
  228. if (pin) {
  229. snd_hda_codec_write(codec, pin, 0,
  230. AC_VERB_SET_PIN_WIDGET_CONTROL,
  231. PIN_VREF80);
  232. if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
  233. snd_hda_codec_write(codec, pin, 0,
  234. AC_VERB_SET_AMP_GAIN_MUTE,
  235. AMP_IN_UNMUTE(0));
  236. }
  237. if (adc)
  238. snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  239. AMP_IN_UNMUTE(0));
  240. }
  241. static char *dirstr[2] = { "Playback", "Capture" };
  242. static int _add_switch(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
  243. int chan, int dir)
  244. {
  245. char namestr[44];
  246. int type = dir ? HDA_INPUT : HDA_OUTPUT;
  247. struct snd_kcontrol_new knew =
  248. HDA_CODEC_MUTE_MONO(namestr, nid, chan, 0, type);
  249. if ((query_amp_caps(codec, nid, type) & AC_AMPCAP_MUTE) == 0) {
  250. snd_printdd("Skipping '%s %s Switch' (no mute on node 0x%x)\n", pfx, dirstr[dir], nid);
  251. return 0;
  252. }
  253. sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]);
  254. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  255. }
  256. static int _add_volume(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
  257. int chan, int dir)
  258. {
  259. char namestr[44];
  260. int type = dir ? HDA_INPUT : HDA_OUTPUT;
  261. struct snd_kcontrol_new knew =
  262. HDA_CODEC_VOLUME_MONO(namestr, nid, chan, 0, type);
  263. if ((query_amp_caps(codec, nid, type) & AC_AMPCAP_NUM_STEPS) == 0) {
  264. snd_printdd("Skipping '%s %s Volume' (no amp on node 0x%x)\n", pfx, dirstr[dir], nid);
  265. return 0;
  266. }
  267. sprintf(namestr, "%s %s Volume", pfx, dirstr[dir]);
  268. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  269. }
  270. #define add_out_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 0)
  271. #define add_out_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 0)
  272. #define add_in_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 1)
  273. #define add_in_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 1)
  274. #define add_mono_switch(codec, nid, pfx, chan) \
  275. _add_switch(codec, nid, pfx, chan, 0)
  276. #define add_mono_volume(codec, nid, pfx, chan) \
  277. _add_volume(codec, nid, pfx, chan, 0)
  278. #define add_in_mono_switch(codec, nid, pfx, chan) \
  279. _add_switch(codec, nid, pfx, chan, 1)
  280. #define add_in_mono_volume(codec, nid, pfx, chan) \
  281. _add_volume(codec, nid, pfx, chan, 1)
  282. /*
  283. * CA0132 specific
  284. */
  285. struct ca0132_spec {
  286. struct auto_pin_cfg autocfg;
  287. struct hda_multi_out multiout;
  288. hda_nid_t out_pins[AUTO_CFG_MAX_OUTS];
  289. hda_nid_t dacs[AUTO_CFG_MAX_OUTS];
  290. hda_nid_t hp_dac;
  291. hda_nid_t input_pins[AUTO_PIN_LAST];
  292. hda_nid_t adcs[AUTO_PIN_LAST];
  293. hda_nid_t dig_out;
  294. hda_nid_t dig_in;
  295. unsigned int num_inputs;
  296. long curr_hp_switch;
  297. long curr_hp_volume[2];
  298. long curr_speaker_switch;
  299. struct mutex chipio_mutex;
  300. const char *input_labels[AUTO_PIN_LAST];
  301. struct hda_pcm pcm_rec[2]; /* PCM information */
  302. };
  303. /* Chip access helper function */
  304. static int chipio_send(struct hda_codec *codec,
  305. unsigned int reg,
  306. unsigned int data)
  307. {
  308. unsigned int res;
  309. int retry = 50;
  310. /* send bits of data specified by reg */
  311. do {
  312. res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
  313. reg, data);
  314. if (res == VENDOR_STATUS_CHIPIO_OK)
  315. return 0;
  316. } while (--retry);
  317. return -EIO;
  318. }
  319. /*
  320. * Write chip address through the vendor widget -- NOT protected by the Mutex!
  321. */
  322. static int chipio_write_address(struct hda_codec *codec,
  323. unsigned int chip_addx)
  324. {
  325. int res;
  326. /* send low 16 bits of the address */
  327. res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
  328. chip_addx & 0xffff);
  329. if (res != -EIO) {
  330. /* send high 16 bits of the address */
  331. res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
  332. chip_addx >> 16);
  333. }
  334. return res;
  335. }
  336. /*
  337. * Write data through the vendor widget -- NOT protected by the Mutex!
  338. */
  339. static int chipio_write_data(struct hda_codec *codec, unsigned int data)
  340. {
  341. int res;
  342. /* send low 16 bits of the data */
  343. res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
  344. if (res != -EIO) {
  345. /* send high 16 bits of the data */
  346. res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
  347. data >> 16);
  348. }
  349. return res;
  350. }
  351. /*
  352. * Read data through the vendor widget -- NOT protected by the Mutex!
  353. */
  354. static int chipio_read_data(struct hda_codec *codec, unsigned int *data)
  355. {
  356. int res;
  357. /* post read */
  358. res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
  359. if (res != -EIO) {
  360. /* read status */
  361. res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
  362. }
  363. if (res != -EIO) {
  364. /* read data */
  365. *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
  366. VENDOR_CHIPIO_HIC_READ_DATA,
  367. 0);
  368. }
  369. return res;
  370. }
  371. /*
  372. * Write given value to the given address through the chip I/O widget.
  373. * protected by the Mutex
  374. */
  375. static int chipio_write(struct hda_codec *codec,
  376. unsigned int chip_addx, const unsigned int data)
  377. {
  378. struct ca0132_spec *spec = codec->spec;
  379. int err;
  380. mutex_lock(&spec->chipio_mutex);
  381. /* write the address, and if successful proceed to write data */
  382. err = chipio_write_address(codec, chip_addx);
  383. if (err < 0)
  384. goto exit;
  385. err = chipio_write_data(codec, data);
  386. if (err < 0)
  387. goto exit;
  388. exit:
  389. mutex_unlock(&spec->chipio_mutex);
  390. return err;
  391. }
  392. /*
  393. * Read the given address through the chip I/O widget
  394. * protected by the Mutex
  395. */
  396. static int chipio_read(struct hda_codec *codec,
  397. unsigned int chip_addx, unsigned int *data)
  398. {
  399. struct ca0132_spec *spec = codec->spec;
  400. int err;
  401. mutex_lock(&spec->chipio_mutex);
  402. /* write the address, and if successful proceed to write data */
  403. err = chipio_write_address(codec, chip_addx);
  404. if (err < 0)
  405. goto exit;
  406. err = chipio_read_data(codec, data);
  407. if (err < 0)
  408. goto exit;
  409. exit:
  410. mutex_unlock(&spec->chipio_mutex);
  411. return err;
  412. }
  413. /*
  414. * PCM stuffs
  415. */
  416. static void ca0132_setup_stream(struct hda_codec *codec, hda_nid_t nid,
  417. u32 stream_tag,
  418. int channel_id, int format)
  419. {
  420. unsigned int oldval, newval;
  421. if (!nid)
  422. return;
  423. snd_printdd("ca0132_setup_stream: "
  424. "NID=0x%x, stream=0x%x, channel=%d, format=0x%x\n",
  425. nid, stream_tag, channel_id, format);
  426. /* update the format-id if changed */
  427. oldval = snd_hda_codec_read(codec, nid, 0,
  428. AC_VERB_GET_STREAM_FORMAT,
  429. 0);
  430. if (oldval != format) {
  431. msleep(20);
  432. snd_hda_codec_write(codec, nid, 0,
  433. AC_VERB_SET_STREAM_FORMAT,
  434. format);
  435. }
  436. oldval = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0);
  437. newval = (stream_tag << 4) | channel_id;
  438. if (oldval != newval) {
  439. snd_hda_codec_write(codec, nid, 0,
  440. AC_VERB_SET_CHANNEL_STREAMID,
  441. newval);
  442. }
  443. }
  444. static void ca0132_cleanup_stream(struct hda_codec *codec, hda_nid_t nid)
  445. {
  446. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_STREAM_FORMAT, 0);
  447. snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  448. }
  449. /*
  450. * PCM callbacks
  451. */
  452. static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  453. struct hda_codec *codec,
  454. unsigned int stream_tag,
  455. unsigned int format,
  456. struct snd_pcm_substream *substream)
  457. {
  458. struct ca0132_spec *spec = codec->spec;
  459. ca0132_setup_stream(codec, spec->dacs[0], stream_tag, 0, format);
  460. return 0;
  461. }
  462. static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  463. struct hda_codec *codec,
  464. struct snd_pcm_substream *substream)
  465. {
  466. struct ca0132_spec *spec = codec->spec;
  467. ca0132_cleanup_stream(codec, spec->dacs[0]);
  468. return 0;
  469. }
  470. /*
  471. * Digital out
  472. */
  473. static int ca0132_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  474. struct hda_codec *codec,
  475. unsigned int stream_tag,
  476. unsigned int format,
  477. struct snd_pcm_substream *substream)
  478. {
  479. struct ca0132_spec *spec = codec->spec;
  480. ca0132_setup_stream(codec, spec->dig_out, stream_tag, 0, format);
  481. return 0;
  482. }
  483. static int ca0132_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  484. struct hda_codec *codec,
  485. struct snd_pcm_substream *substream)
  486. {
  487. struct ca0132_spec *spec = codec->spec;
  488. ca0132_cleanup_stream(codec, spec->dig_out);
  489. return 0;
  490. }
  491. /*
  492. * Analog capture
  493. */
  494. static int ca0132_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
  495. struct hda_codec *codec,
  496. unsigned int stream_tag,
  497. unsigned int format,
  498. struct snd_pcm_substream *substream)
  499. {
  500. struct ca0132_spec *spec = codec->spec;
  501. ca0132_setup_stream(codec, spec->adcs[substream->number],
  502. stream_tag, 0, format);
  503. return 0;
  504. }
  505. static int ca0132_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
  506. struct hda_codec *codec,
  507. struct snd_pcm_substream *substream)
  508. {
  509. struct ca0132_spec *spec = codec->spec;
  510. ca0132_cleanup_stream(codec, spec->adcs[substream->number]);
  511. return 0;
  512. }
  513. /*
  514. * Digital capture
  515. */
  516. static int ca0132_dig_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
  517. struct hda_codec *codec,
  518. unsigned int stream_tag,
  519. unsigned int format,
  520. struct snd_pcm_substream *substream)
  521. {
  522. struct ca0132_spec *spec = codec->spec;
  523. ca0132_setup_stream(codec, spec->dig_in, stream_tag, 0, format);
  524. return 0;
  525. }
  526. static int ca0132_dig_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
  527. struct hda_codec *codec,
  528. struct snd_pcm_substream *substream)
  529. {
  530. struct ca0132_spec *spec = codec->spec;
  531. ca0132_cleanup_stream(codec, spec->dig_in);
  532. return 0;
  533. }
  534. /*
  535. */
  536. static struct hda_pcm_stream ca0132_pcm_analog_playback = {
  537. .substreams = 1,
  538. .channels_min = 2,
  539. .channels_max = 2,
  540. .ops = {
  541. .prepare = ca0132_playback_pcm_prepare,
  542. .cleanup = ca0132_playback_pcm_cleanup
  543. },
  544. };
  545. static struct hda_pcm_stream ca0132_pcm_analog_capture = {
  546. .substreams = 1,
  547. .channels_min = 2,
  548. .channels_max = 2,
  549. .ops = {
  550. .prepare = ca0132_capture_pcm_prepare,
  551. .cleanup = ca0132_capture_pcm_cleanup
  552. },
  553. };
  554. static struct hda_pcm_stream ca0132_pcm_digital_playback = {
  555. .substreams = 1,
  556. .channels_min = 2,
  557. .channels_max = 2,
  558. .ops = {
  559. .prepare = ca0132_dig_playback_pcm_prepare,
  560. .cleanup = ca0132_dig_playback_pcm_cleanup
  561. },
  562. };
  563. static struct hda_pcm_stream ca0132_pcm_digital_capture = {
  564. .substreams = 1,
  565. .channels_min = 2,
  566. .channels_max = 2,
  567. .ops = {
  568. .prepare = ca0132_dig_capture_pcm_prepare,
  569. .cleanup = ca0132_dig_capture_pcm_cleanup
  570. },
  571. };
  572. static int ca0132_build_pcms(struct hda_codec *codec)
  573. {
  574. struct ca0132_spec *spec = codec->spec;
  575. struct hda_pcm *info = spec->pcm_rec;
  576. codec->pcm_info = info;
  577. codec->num_pcms = 0;
  578. info->name = "CA0132 Analog";
  579. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback;
  580. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0];
  581. info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =
  582. spec->multiout.max_channels;
  583. info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
  584. info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_inputs;
  585. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];
  586. codec->num_pcms++;
  587. if (!spec->dig_out && !spec->dig_in)
  588. return 0;
  589. info++;
  590. info->name = "CA0132 Digital";
  591. info->pcm_type = HDA_PCM_TYPE_SPDIF;
  592. if (spec->dig_out) {
  593. info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
  594. ca0132_pcm_digital_playback;
  595. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out;
  596. }
  597. if (spec->dig_in) {
  598. info->stream[SNDRV_PCM_STREAM_CAPTURE] =
  599. ca0132_pcm_digital_capture;
  600. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in;
  601. }
  602. codec->num_pcms++;
  603. return 0;
  604. }
  605. #define REG_CODEC_MUTE 0x18b014
  606. #define REG_CODEC_HP_VOL_L 0x18b070
  607. #define REG_CODEC_HP_VOL_R 0x18b074
  608. static int ca0132_hp_switch_get(struct snd_kcontrol *kcontrol,
  609. struct snd_ctl_elem_value *ucontrol)
  610. {
  611. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  612. struct ca0132_spec *spec = codec->spec;
  613. long *valp = ucontrol->value.integer.value;
  614. *valp = spec->curr_hp_switch;
  615. return 0;
  616. }
  617. static int ca0132_hp_switch_put(struct snd_kcontrol *kcontrol,
  618. struct snd_ctl_elem_value *ucontrol)
  619. {
  620. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  621. struct ca0132_spec *spec = codec->spec;
  622. long *valp = ucontrol->value.integer.value;
  623. unsigned int data;
  624. int err;
  625. /* any change? */
  626. if (spec->curr_hp_switch == *valp)
  627. return 0;
  628. snd_hda_power_up(codec);
  629. err = chipio_read(codec, REG_CODEC_MUTE, &data);
  630. if (err < 0)
  631. goto exit;
  632. /* *valp 0 is mute, 1 is unmute */
  633. data = (data & 0x7f) | (*valp ? 0 : 0x80);
  634. err = chipio_write(codec, REG_CODEC_MUTE, data);
  635. if (err < 0)
  636. goto exit;
  637. spec->curr_hp_switch = *valp;
  638. exit:
  639. snd_hda_power_down(codec);
  640. return err < 0 ? err : 1;
  641. }
  642. static int ca0132_speaker_switch_get(struct snd_kcontrol *kcontrol,
  643. struct snd_ctl_elem_value *ucontrol)
  644. {
  645. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  646. struct ca0132_spec *spec = codec->spec;
  647. long *valp = ucontrol->value.integer.value;
  648. *valp = spec->curr_speaker_switch;
  649. return 0;
  650. }
  651. static int ca0132_speaker_switch_put(struct snd_kcontrol *kcontrol,
  652. struct snd_ctl_elem_value *ucontrol)
  653. {
  654. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  655. struct ca0132_spec *spec = codec->spec;
  656. long *valp = ucontrol->value.integer.value;
  657. unsigned int data;
  658. int err;
  659. /* any change? */
  660. if (spec->curr_speaker_switch == *valp)
  661. return 0;
  662. snd_hda_power_up(codec);
  663. err = chipio_read(codec, REG_CODEC_MUTE, &data);
  664. if (err < 0)
  665. goto exit;
  666. /* *valp 0 is mute, 1 is unmute */
  667. data = (data & 0xef) | (*valp ? 0 : 0x10);
  668. err = chipio_write(codec, REG_CODEC_MUTE, data);
  669. if (err < 0)
  670. goto exit;
  671. spec->curr_speaker_switch = *valp;
  672. exit:
  673. snd_hda_power_down(codec);
  674. return err < 0 ? err : 1;
  675. }
  676. static int ca0132_hp_volume_get(struct snd_kcontrol *kcontrol,
  677. struct snd_ctl_elem_value *ucontrol)
  678. {
  679. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  680. struct ca0132_spec *spec = codec->spec;
  681. long *valp = ucontrol->value.integer.value;
  682. *valp++ = spec->curr_hp_volume[0];
  683. *valp = spec->curr_hp_volume[1];
  684. return 0;
  685. }
  686. static int ca0132_hp_volume_put(struct snd_kcontrol *kcontrol,
  687. struct snd_ctl_elem_value *ucontrol)
  688. {
  689. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  690. struct ca0132_spec *spec = codec->spec;
  691. long *valp = ucontrol->value.integer.value;
  692. long left_vol, right_vol;
  693. unsigned int data;
  694. int val;
  695. int err;
  696. left_vol = *valp++;
  697. right_vol = *valp;
  698. /* any change? */
  699. if ((spec->curr_hp_volume[0] == left_vol) &&
  700. (spec->curr_hp_volume[1] == right_vol))
  701. return 0;
  702. snd_hda_power_up(codec);
  703. err = chipio_read(codec, REG_CODEC_HP_VOL_L, &data);
  704. if (err < 0)
  705. goto exit;
  706. val = 31 - left_vol;
  707. data = (data & 0xe0) | val;
  708. err = chipio_write(codec, REG_CODEC_HP_VOL_L, data);
  709. if (err < 0)
  710. goto exit;
  711. val = 31 - right_vol;
  712. data = (data & 0xe0) | val;
  713. err = chipio_write(codec, REG_CODEC_HP_VOL_R, data);
  714. if (err < 0)
  715. goto exit;
  716. spec->curr_hp_volume[0] = left_vol;
  717. spec->curr_hp_volume[1] = right_vol;
  718. exit:
  719. snd_hda_power_down(codec);
  720. return err < 0 ? err : 1;
  721. }
  722. static int add_hp_switch(struct hda_codec *codec, hda_nid_t nid)
  723. {
  724. struct snd_kcontrol_new knew =
  725. HDA_CODEC_MUTE_MONO("Headphone Playback Switch",
  726. nid, 1, 0, HDA_OUTPUT);
  727. knew.get = ca0132_hp_switch_get;
  728. knew.put = ca0132_hp_switch_put;
  729. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  730. }
  731. static int add_hp_volume(struct hda_codec *codec, hda_nid_t nid)
  732. {
  733. struct snd_kcontrol_new knew =
  734. HDA_CODEC_VOLUME_MONO("Headphone Playback Volume",
  735. nid, 3, 0, HDA_OUTPUT);
  736. knew.get = ca0132_hp_volume_get;
  737. knew.put = ca0132_hp_volume_put;
  738. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  739. }
  740. static int add_speaker_switch(struct hda_codec *codec, hda_nid_t nid)
  741. {
  742. struct snd_kcontrol_new knew =
  743. HDA_CODEC_MUTE_MONO("Speaker Playback Switch",
  744. nid, 1, 0, HDA_OUTPUT);
  745. knew.get = ca0132_speaker_switch_get;
  746. knew.put = ca0132_speaker_switch_put;
  747. return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
  748. }
  749. static void ca0132_fix_hp_caps(struct hda_codec *codec)
  750. {
  751. struct ca0132_spec *spec = codec->spec;
  752. struct auto_pin_cfg *cfg = &spec->autocfg;
  753. unsigned int caps;
  754. /* set mute-capable, 1db step, 32 steps, ofs 6 */
  755. caps = 0x80031f06;
  756. snd_hda_override_amp_caps(codec, cfg->hp_pins[0], HDA_OUTPUT, caps);
  757. }
  758. static int ca0132_build_controls(struct hda_codec *codec)
  759. {
  760. struct ca0132_spec *spec = codec->spec;
  761. struct auto_pin_cfg *cfg = &spec->autocfg;
  762. int i, err;
  763. if (spec->multiout.num_dacs) {
  764. err = add_speaker_switch(codec, spec->out_pins[0]);
  765. if (err < 0)
  766. return err;
  767. }
  768. if (cfg->hp_outs) {
  769. ca0132_fix_hp_caps(codec);
  770. err = add_hp_switch(codec, cfg->hp_pins[0]);
  771. if (err < 0)
  772. return err;
  773. err = add_hp_volume(codec, cfg->hp_pins[0]);
  774. if (err < 0)
  775. return err;
  776. }
  777. for (i = 0; i < spec->num_inputs; i++) {
  778. const char *label = spec->input_labels[i];
  779. err = add_in_switch(codec, spec->adcs[i], label);
  780. if (err < 0)
  781. return err;
  782. err = add_in_volume(codec, spec->adcs[i], label);
  783. if (err < 0)
  784. return err;
  785. if (cfg->inputs[i].type == AUTO_PIN_MIC) {
  786. /* add Mic-Boost */
  787. err = add_in_mono_volume(codec, spec->input_pins[i],
  788. "Mic Boost", 1);
  789. if (err < 0)
  790. return err;
  791. }
  792. }
  793. if (spec->dig_out) {
  794. err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
  795. spec->dig_out);
  796. if (err < 0)
  797. return err;
  798. err = add_out_volume(codec, spec->dig_out, "IEC958");
  799. if (err < 0)
  800. return err;
  801. }
  802. if (spec->dig_in) {
  803. err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
  804. if (err < 0)
  805. return err;
  806. err = add_in_volume(codec, spec->dig_in, "IEC958");
  807. if (err < 0)
  808. return err;
  809. }
  810. return 0;
  811. }
  812. static void ca0132_set_ct_ext(struct hda_codec *codec, int enable)
  813. {
  814. /* Set Creative extension */
  815. snd_printdd("SET CREATIVE EXTENSION\n");
  816. snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
  817. VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE,
  818. enable);
  819. msleep(20);
  820. }
  821. static void ca0132_config(struct hda_codec *codec)
  822. {
  823. struct ca0132_spec *spec = codec->spec;
  824. struct auto_pin_cfg *cfg = &spec->autocfg;
  825. /* line-outs */
  826. cfg->line_outs = 1;
  827. cfg->line_out_pins[0] = 0x0b; /* front */
  828. cfg->line_out_type = AUTO_PIN_LINE_OUT;
  829. spec->dacs[0] = 0x02;
  830. spec->out_pins[0] = 0x0b;
  831. spec->multiout.dac_nids = spec->dacs;
  832. spec->multiout.num_dacs = 1;
  833. spec->multiout.max_channels = 2;
  834. /* headphone */
  835. cfg->hp_outs = 1;
  836. cfg->hp_pins[0] = 0x0f;
  837. spec->hp_dac = 0;
  838. spec->multiout.hp_nid = 0;
  839. /* inputs */
  840. cfg->num_inputs = 2; /* Mic-in and line-in */
  841. cfg->inputs[0].pin = 0x12;
  842. cfg->inputs[0].type = AUTO_PIN_MIC;
  843. cfg->inputs[1].pin = 0x11;
  844. cfg->inputs[1].type = AUTO_PIN_LINE_IN;
  845. /* Mic-in */
  846. spec->input_pins[0] = 0x12;
  847. spec->input_labels[0] = "Mic-In";
  848. spec->adcs[0] = 0x07;
  849. /* Line-In */
  850. spec->input_pins[1] = 0x11;
  851. spec->input_labels[1] = "Line-In";
  852. spec->adcs[1] = 0x08;
  853. spec->num_inputs = 2;
  854. }
  855. static void ca0132_init_chip(struct hda_codec *codec)
  856. {
  857. struct ca0132_spec *spec = codec->spec;
  858. mutex_init(&spec->chipio_mutex);
  859. }
  860. static void ca0132_exit_chip(struct hda_codec *codec)
  861. {
  862. /* put any chip cleanup stuffs here. */
  863. }
  864. static int ca0132_init(struct hda_codec *codec)
  865. {
  866. struct ca0132_spec *spec = codec->spec;
  867. struct auto_pin_cfg *cfg = &spec->autocfg;
  868. int i;
  869. for (i = 0; i < spec->multiout.num_dacs; i++) {
  870. init_output(codec, spec->out_pins[i],
  871. spec->multiout.dac_nids[i]);
  872. }
  873. init_output(codec, cfg->hp_pins[0], spec->hp_dac);
  874. init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
  875. for (i = 0; i < spec->num_inputs; i++)
  876. init_input(codec, spec->input_pins[i], spec->adcs[i]);
  877. init_input(codec, cfg->dig_in_pin, spec->dig_in);
  878. ca0132_set_ct_ext(codec, 1);
  879. return 0;
  880. }
  881. static void ca0132_free(struct hda_codec *codec)
  882. {
  883. ca0132_set_ct_ext(codec, 0);
  884. ca0132_exit_chip(codec);
  885. kfree(codec->spec);
  886. }
  887. static struct hda_codec_ops ca0132_patch_ops = {
  888. .build_controls = ca0132_build_controls,
  889. .build_pcms = ca0132_build_pcms,
  890. .init = ca0132_init,
  891. .free = ca0132_free,
  892. };
  893. static int patch_ca0132(struct hda_codec *codec)
  894. {
  895. struct ca0132_spec *spec;
  896. snd_printdd("patch_ca0132\n");
  897. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  898. if (!spec)
  899. return -ENOMEM;
  900. codec->spec = spec;
  901. ca0132_init_chip(codec);
  902. ca0132_config(codec);
  903. codec->patch_ops = ca0132_patch_ops;
  904. return 0;
  905. }
  906. /*
  907. * patch entries
  908. */
  909. static struct hda_codec_preset snd_hda_preset_ca0132[] = {
  910. { .id = 0x11020011, .name = "CA0132", .patch = patch_ca0132 },
  911. {} /* terminator */
  912. };
  913. MODULE_ALIAS("snd-hda-codec-id:11020011");
  914. MODULE_LICENSE("GPL");
  915. MODULE_DESCRIPTION("Creative CA0132, CA0132 HD-audio codec");
  916. static struct hda_codec_preset_list ca0132_list = {
  917. .preset = snd_hda_preset_ca0132,
  918. .owner = THIS_MODULE,
  919. };
  920. static int __init patch_ca0132_init(void)
  921. {
  922. return snd_hda_add_codec_preset(&ca0132_list);
  923. }
  924. static void __exit patch_ca0132_exit(void)
  925. {
  926. snd_hda_delete_codec_preset(&ca0132_list);
  927. }
  928. module_init(patch_ca0132_init)
  929. module_exit(patch_ca0132_exit)