io.c 16 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  3. * Creative Labs, Inc.
  4. * Routines for control of EMU10K1 chips
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/time.h>
  28. #include <sound/core.h>
  29. #include <sound/emu10k1.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include "p17v.h"
  33. unsigned int snd_emu10k1_ptr_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn)
  34. {
  35. unsigned long flags;
  36. unsigned int regptr, val;
  37. unsigned int mask;
  38. mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
  39. regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
  40. if (reg & 0xff000000) {
  41. unsigned char size, offset;
  42. size = (reg >> 24) & 0x3f;
  43. offset = (reg >> 16) & 0x1f;
  44. mask = ((1 << size) - 1) << offset;
  45. spin_lock_irqsave(&emu->emu_lock, flags);
  46. outl(regptr, emu->port + PTR);
  47. val = inl(emu->port + DATA);
  48. spin_unlock_irqrestore(&emu->emu_lock, flags);
  49. return (val & mask) >> offset;
  50. } else {
  51. spin_lock_irqsave(&emu->emu_lock, flags);
  52. outl(regptr, emu->port + PTR);
  53. val = inl(emu->port + DATA);
  54. spin_unlock_irqrestore(&emu->emu_lock, flags);
  55. return val;
  56. }
  57. }
  58. EXPORT_SYMBOL(snd_emu10k1_ptr_read);
  59. void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data)
  60. {
  61. unsigned int regptr;
  62. unsigned long flags;
  63. unsigned int mask;
  64. if (!emu) {
  65. snd_printk(KERN_ERR "ptr_write: emu is null!\n");
  66. dump_stack();
  67. return;
  68. }
  69. mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
  70. regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
  71. if (reg & 0xff000000) {
  72. unsigned char size, offset;
  73. size = (reg >> 24) & 0x3f;
  74. offset = (reg >> 16) & 0x1f;
  75. mask = ((1 << size) - 1) << offset;
  76. data = (data << offset) & mask;
  77. spin_lock_irqsave(&emu->emu_lock, flags);
  78. outl(regptr, emu->port + PTR);
  79. data |= inl(emu->port + DATA) & ~mask;
  80. outl(data, emu->port + DATA);
  81. spin_unlock_irqrestore(&emu->emu_lock, flags);
  82. } else {
  83. spin_lock_irqsave(&emu->emu_lock, flags);
  84. outl(regptr, emu->port + PTR);
  85. outl(data, emu->port + DATA);
  86. spin_unlock_irqrestore(&emu->emu_lock, flags);
  87. }
  88. }
  89. EXPORT_SYMBOL(snd_emu10k1_ptr_write);
  90. unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu,
  91. unsigned int reg,
  92. unsigned int chn)
  93. {
  94. unsigned long flags;
  95. unsigned int regptr, val;
  96. regptr = (reg << 16) | chn;
  97. spin_lock_irqsave(&emu->emu_lock, flags);
  98. outl(regptr, emu->port + 0x20 + PTR);
  99. val = inl(emu->port + 0x20 + DATA);
  100. spin_unlock_irqrestore(&emu->emu_lock, flags);
  101. return val;
  102. }
  103. void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu,
  104. unsigned int reg,
  105. unsigned int chn,
  106. unsigned int data)
  107. {
  108. unsigned int regptr;
  109. unsigned long flags;
  110. regptr = (reg << 16) | chn;
  111. spin_lock_irqsave(&emu->emu_lock, flags);
  112. outl(regptr, emu->port + 0x20 + PTR);
  113. outl(data, emu->port + 0x20 + DATA);
  114. spin_unlock_irqrestore(&emu->emu_lock, flags);
  115. }
  116. int snd_emu10k1_spi_write(struct snd_emu10k1 * emu,
  117. unsigned int data)
  118. {
  119. unsigned int reset, set;
  120. unsigned int reg, tmp;
  121. int n, result;
  122. int err = 0;
  123. /* This function is not re-entrant, so protect against it. */
  124. spin_lock(&emu->spi_lock);
  125. if (emu->card_capabilities->ca0108_chip)
  126. reg = 0x3c; /* PTR20, reg 0x3c */
  127. else {
  128. /* For other chip types the SPI register
  129. * is currently unknown. */
  130. err = 1;
  131. goto spi_write_exit;
  132. }
  133. if (data > 0xffff) {
  134. /* Only 16bit values allowed */
  135. err = 1;
  136. goto spi_write_exit;
  137. }
  138. tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
  139. reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
  140. set = reset | 0x10000; /* Set xxx1xxxx */
  141. snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
  142. tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* write post */
  143. snd_emu10k1_ptr20_write(emu, reg, 0, set | data);
  144. result = 1;
  145. /* Wait for status bit to return to 0 */
  146. for (n = 0; n < 100; n++) {
  147. udelay(10);
  148. tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
  149. if (!(tmp & 0x10000)) {
  150. result = 0;
  151. break;
  152. }
  153. }
  154. if (result) {
  155. /* Timed out */
  156. err = 1;
  157. goto spi_write_exit;
  158. }
  159. snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
  160. tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* Write post */
  161. err = 0;
  162. spi_write_exit:
  163. spin_unlock(&emu->spi_lock);
  164. return err;
  165. }
  166. /* The ADC does not support i2c read, so only write is implemented */
  167. int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu,
  168. u32 reg,
  169. u32 value)
  170. {
  171. u32 tmp;
  172. int timeout = 0;
  173. int status;
  174. int retry;
  175. int err = 0;
  176. if ((reg > 0x7f) || (value > 0x1ff)) {
  177. snd_printk(KERN_ERR "i2c_write: invalid values.\n");
  178. return -EINVAL;
  179. }
  180. /* This function is not re-entrant, so protect against it. */
  181. spin_lock(&emu->i2c_lock);
  182. tmp = reg << 25 | value << 16;
  183. /* This controls the I2C connected to the WM8775 ADC Codec */
  184. snd_emu10k1_ptr20_write(emu, P17V_I2C_1, 0, tmp);
  185. tmp = snd_emu10k1_ptr20_read(emu, P17V_I2C_1, 0); /* write post */
  186. for (retry = 0; retry < 10; retry++) {
  187. /* Send the data to i2c */
  188. tmp = 0;
  189. tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
  190. snd_emu10k1_ptr20_write(emu, P17V_I2C_ADDR, 0, tmp);
  191. /* Wait till the transaction ends */
  192. while (1) {
  193. mdelay(1);
  194. status = snd_emu10k1_ptr20_read(emu, P17V_I2C_ADDR, 0);
  195. timeout++;
  196. if ((status & I2C_A_ADC_START) == 0)
  197. break;
  198. if (timeout > 1000) {
  199. snd_printk(KERN_WARNING
  200. "emu10k1:I2C:timeout status=0x%x\n",
  201. status);
  202. break;
  203. }
  204. }
  205. //Read back and see if the transaction is successful
  206. if ((status & I2C_A_ADC_ABORT) == 0)
  207. break;
  208. }
  209. if (retry == 10) {
  210. snd_printk(KERN_ERR "Writing to ADC failed!\n");
  211. snd_printk(KERN_ERR "status=0x%x, reg=%d, value=%d\n",
  212. status, reg, value);
  213. /* dump_stack(); */
  214. err = -EINVAL;
  215. }
  216. spin_unlock(&emu->i2c_lock);
  217. return err;
  218. }
  219. int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, u32 reg, u32 value)
  220. {
  221. unsigned long flags;
  222. if (reg > 0x3f)
  223. return 1;
  224. reg += 0x40; /* 0x40 upwards are registers. */
  225. if (value > 0x3f) /* 0 to 0x3f are values */
  226. return 1;
  227. spin_lock_irqsave(&emu->emu_lock, flags);
  228. outl(reg, emu->port + A_IOCFG);
  229. udelay(10);
  230. outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  231. udelay(10);
  232. outl(value, emu->port + A_IOCFG);
  233. udelay(10);
  234. outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  235. spin_unlock_irqrestore(&emu->emu_lock, flags);
  236. return 0;
  237. }
  238. int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, u32 reg, u32 *value)
  239. {
  240. unsigned long flags;
  241. if (reg > 0x3f)
  242. return 1;
  243. reg += 0x40; /* 0x40 upwards are registers. */
  244. spin_lock_irqsave(&emu->emu_lock, flags);
  245. outl(reg, emu->port + A_IOCFG);
  246. udelay(10);
  247. outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
  248. udelay(10);
  249. *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f);
  250. spin_unlock_irqrestore(&emu->emu_lock, flags);
  251. return 0;
  252. }
  253. /* Each Destination has one and only one Source,
  254. * but one Source can feed any number of Destinations simultaneously.
  255. */
  256. int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, u32 dst, u32 src)
  257. {
  258. snd_emu1010_fpga_write(emu, 0x00, ((dst >> 8) & 0x3f) );
  259. snd_emu1010_fpga_write(emu, 0x01, (dst & 0x3f) );
  260. snd_emu1010_fpga_write(emu, 0x02, ((src >> 8) & 0x3f) );
  261. snd_emu1010_fpga_write(emu, 0x03, (src & 0x3f) );
  262. return 0;
  263. }
  264. void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
  265. {
  266. unsigned long flags;
  267. unsigned int enable;
  268. spin_lock_irqsave(&emu->emu_lock, flags);
  269. enable = inl(emu->port + INTE) | intrenb;
  270. outl(enable, emu->port + INTE);
  271. spin_unlock_irqrestore(&emu->emu_lock, flags);
  272. }
  273. void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb)
  274. {
  275. unsigned long flags;
  276. unsigned int enable;
  277. spin_lock_irqsave(&emu->emu_lock, flags);
  278. enable = inl(emu->port + INTE) & ~intrenb;
  279. outl(enable, emu->port + INTE);
  280. spin_unlock_irqrestore(&emu->emu_lock, flags);
  281. }
  282. void snd_emu10k1_voice_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
  283. {
  284. unsigned long flags;
  285. unsigned int val;
  286. spin_lock_irqsave(&emu->emu_lock, flags);
  287. /* voice interrupt */
  288. if (voicenum >= 32) {
  289. outl(CLIEH << 16, emu->port + PTR);
  290. val = inl(emu->port + DATA);
  291. val |= 1 << (voicenum - 32);
  292. } else {
  293. outl(CLIEL << 16, emu->port + PTR);
  294. val = inl(emu->port + DATA);
  295. val |= 1 << voicenum;
  296. }
  297. outl(val, emu->port + DATA);
  298. spin_unlock_irqrestore(&emu->emu_lock, flags);
  299. }
  300. void snd_emu10k1_voice_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
  301. {
  302. unsigned long flags;
  303. unsigned int val;
  304. spin_lock_irqsave(&emu->emu_lock, flags);
  305. /* voice interrupt */
  306. if (voicenum >= 32) {
  307. outl(CLIEH << 16, emu->port + PTR);
  308. val = inl(emu->port + DATA);
  309. val &= ~(1 << (voicenum - 32));
  310. } else {
  311. outl(CLIEL << 16, emu->port + PTR);
  312. val = inl(emu->port + DATA);
  313. val &= ~(1 << voicenum);
  314. }
  315. outl(val, emu->port + DATA);
  316. spin_unlock_irqrestore(&emu->emu_lock, flags);
  317. }
  318. void snd_emu10k1_voice_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
  319. {
  320. unsigned long flags;
  321. spin_lock_irqsave(&emu->emu_lock, flags);
  322. /* voice interrupt */
  323. if (voicenum >= 32) {
  324. outl(CLIPH << 16, emu->port + PTR);
  325. voicenum = 1 << (voicenum - 32);
  326. } else {
  327. outl(CLIPL << 16, emu->port + PTR);
  328. voicenum = 1 << voicenum;
  329. }
  330. outl(voicenum, emu->port + DATA);
  331. spin_unlock_irqrestore(&emu->emu_lock, flags);
  332. }
  333. void snd_emu10k1_voice_half_loop_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
  334. {
  335. unsigned long flags;
  336. unsigned int val;
  337. spin_lock_irqsave(&emu->emu_lock, flags);
  338. /* voice interrupt */
  339. if (voicenum >= 32) {
  340. outl(HLIEH << 16, emu->port + PTR);
  341. val = inl(emu->port + DATA);
  342. val |= 1 << (voicenum - 32);
  343. } else {
  344. outl(HLIEL << 16, emu->port + PTR);
  345. val = inl(emu->port + DATA);
  346. val |= 1 << voicenum;
  347. }
  348. outl(val, emu->port + DATA);
  349. spin_unlock_irqrestore(&emu->emu_lock, flags);
  350. }
  351. void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
  352. {
  353. unsigned long flags;
  354. unsigned int val;
  355. spin_lock_irqsave(&emu->emu_lock, flags);
  356. /* voice interrupt */
  357. if (voicenum >= 32) {
  358. outl(HLIEH << 16, emu->port + PTR);
  359. val = inl(emu->port + DATA);
  360. val &= ~(1 << (voicenum - 32));
  361. } else {
  362. outl(HLIEL << 16, emu->port + PTR);
  363. val = inl(emu->port + DATA);
  364. val &= ~(1 << voicenum);
  365. }
  366. outl(val, emu->port + DATA);
  367. spin_unlock_irqrestore(&emu->emu_lock, flags);
  368. }
  369. void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
  370. {
  371. unsigned long flags;
  372. spin_lock_irqsave(&emu->emu_lock, flags);
  373. /* voice interrupt */
  374. if (voicenum >= 32) {
  375. outl(HLIPH << 16, emu->port + PTR);
  376. voicenum = 1 << (voicenum - 32);
  377. } else {
  378. outl(HLIPL << 16, emu->port + PTR);
  379. voicenum = 1 << voicenum;
  380. }
  381. outl(voicenum, emu->port + DATA);
  382. spin_unlock_irqrestore(&emu->emu_lock, flags);
  383. }
  384. void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
  385. {
  386. unsigned long flags;
  387. unsigned int sol;
  388. spin_lock_irqsave(&emu->emu_lock, flags);
  389. /* voice interrupt */
  390. if (voicenum >= 32) {
  391. outl(SOLEH << 16, emu->port + PTR);
  392. sol = inl(emu->port + DATA);
  393. sol |= 1 << (voicenum - 32);
  394. } else {
  395. outl(SOLEL << 16, emu->port + PTR);
  396. sol = inl(emu->port + DATA);
  397. sol |= 1 << voicenum;
  398. }
  399. outl(sol, emu->port + DATA);
  400. spin_unlock_irqrestore(&emu->emu_lock, flags);
  401. }
  402. void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
  403. {
  404. unsigned long flags;
  405. unsigned int sol;
  406. spin_lock_irqsave(&emu->emu_lock, flags);
  407. /* voice interrupt */
  408. if (voicenum >= 32) {
  409. outl(SOLEH << 16, emu->port + PTR);
  410. sol = inl(emu->port + DATA);
  411. sol &= ~(1 << (voicenum - 32));
  412. } else {
  413. outl(SOLEL << 16, emu->port + PTR);
  414. sol = inl(emu->port + DATA);
  415. sol &= ~(1 << voicenum);
  416. }
  417. outl(sol, emu->port + DATA);
  418. spin_unlock_irqrestore(&emu->emu_lock, flags);
  419. }
  420. void snd_emu10k1_wait(struct snd_emu10k1 *emu, unsigned int wait)
  421. {
  422. volatile unsigned count;
  423. unsigned int newtime = 0, curtime;
  424. curtime = inl(emu->port + WC) >> 6;
  425. while (wait-- > 0) {
  426. count = 0;
  427. while (count++ < 16384) {
  428. newtime = inl(emu->port + WC) >> 6;
  429. if (newtime != curtime)
  430. break;
  431. }
  432. if (count > 16384)
  433. break;
  434. curtime = newtime;
  435. }
  436. }
  437. unsigned short snd_emu10k1_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  438. {
  439. struct snd_emu10k1 *emu = ac97->private_data;
  440. unsigned long flags;
  441. unsigned short val;
  442. spin_lock_irqsave(&emu->emu_lock, flags);
  443. outb(reg, emu->port + AC97ADDRESS);
  444. val = inw(emu->port + AC97DATA);
  445. spin_unlock_irqrestore(&emu->emu_lock, flags);
  446. return val;
  447. }
  448. void snd_emu10k1_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short data)
  449. {
  450. struct snd_emu10k1 *emu = ac97->private_data;
  451. unsigned long flags;
  452. spin_lock_irqsave(&emu->emu_lock, flags);
  453. outb(reg, emu->port + AC97ADDRESS);
  454. outw(data, emu->port + AC97DATA);
  455. spin_unlock_irqrestore(&emu->emu_lock, flags);
  456. }
  457. /*
  458. * convert rate to pitch
  459. */
  460. unsigned int snd_emu10k1_rate_to_pitch(unsigned int rate)
  461. {
  462. static u32 logMagTable[128] = {
  463. 0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
  464. 0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
  465. 0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
  466. 0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
  467. 0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
  468. 0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
  469. 0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
  470. 0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
  471. 0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
  472. 0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
  473. 0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
  474. 0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
  475. 0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
  476. 0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
  477. 0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
  478. 0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
  479. };
  480. static char logSlopeTable[128] = {
  481. 0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
  482. 0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
  483. 0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
  484. 0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
  485. 0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
  486. 0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
  487. 0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
  488. 0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
  489. 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
  490. 0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
  491. 0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
  492. 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
  493. 0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
  494. 0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
  495. 0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
  496. 0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
  497. };
  498. int i;
  499. if (rate == 0)
  500. return 0; /* Bail out if no leading "1" */
  501. rate *= 11185; /* Scale 48000 to 0x20002380 */
  502. for (i = 31; i > 0; i--) {
  503. if (rate & 0x80000000) { /* Detect leading "1" */
  504. return (((unsigned int) (i - 15) << 20) +
  505. logMagTable[0x7f & (rate >> 24)] +
  506. (0x7f & (rate >> 17)) *
  507. logSlopeTable[0x7f & (rate >> 24)]);
  508. }
  509. rate <<= 1;
  510. }
  511. return 0; /* Should never reach this point */
  512. }