emu10k1x.c 48 KB

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  1. /*
  2. * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
  3. * Driver EMU10K1X chips
  4. *
  5. * Parts of this code were adapted from audigyls.c driver which is
  6. * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
  7. *
  8. * BUGS:
  9. * --
  10. *
  11. * TODO:
  12. *
  13. * Chips (SB0200 model):
  14. * - EMU10K1X-DBQ
  15. * - STAC 9708T
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. *
  31. */
  32. #include <linux/init.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pci.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/slab.h>
  37. #include <linux/module.h>
  38. #include <sound/core.h>
  39. #include <sound/initval.h>
  40. #include <sound/pcm.h>
  41. #include <sound/ac97_codec.h>
  42. #include <sound/info.h>
  43. #include <sound/rawmidi.h>
  44. MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
  45. MODULE_DESCRIPTION("EMU10K1X");
  46. MODULE_LICENSE("GPL");
  47. MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
  48. // module parameters (see "Module Parameters")
  49. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  50. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  51. static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  52. module_param_array(index, int, NULL, 0444);
  53. MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
  54. module_param_array(id, charp, NULL, 0444);
  55. MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
  56. module_param_array(enable, bool, NULL, 0444);
  57. MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
  58. // some definitions were borrowed from emu10k1 driver as they seem to be the same
  59. /************************************************************************************************/
  60. /* PCI function 0 registers, address = <val> + PCIBASE0 */
  61. /************************************************************************************************/
  62. #define PTR 0x00 /* Indexed register set pointer register */
  63. /* NOTE: The CHANNELNUM and ADDRESS words can */
  64. /* be modified independently of each other. */
  65. #define DATA 0x04 /* Indexed register set data register */
  66. #define IPR 0x08 /* Global interrupt pending register */
  67. /* Clear pending interrupts by writing a 1 to */
  68. /* the relevant bits and zero to the other bits */
  69. #define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
  70. #define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
  71. #define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  72. #define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  73. #define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  74. #define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  75. #define INTE 0x0c /* Interrupt enable register */
  76. #define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
  77. #define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
  78. #define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  79. #define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  80. #define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  81. #define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  82. #define HCFG 0x14 /* Hardware config register */
  83. #define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
  84. /* NOTE: This should generally never be used. */
  85. #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
  86. /* Should be set to 1 when the EMU10K1 is */
  87. /* completely initialized. */
  88. #define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
  89. #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
  90. #define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
  91. /********************************************************************************************************/
  92. /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
  93. /********************************************************************************************************/
  94. #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
  95. /* One list entry: 4 bytes for DMA address,
  96. * 4 bytes for period_size << 16.
  97. * One list entry is 8 bytes long.
  98. * One list entry for each period in the buffer.
  99. */
  100. #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
  101. #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
  102. #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */
  103. #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
  104. #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
  105. #define PLAYBACK_UNKNOWN1 0x07
  106. #define PLAYBACK_UNKNOWN2 0x08
  107. /* Only one capture channel supported */
  108. #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
  109. #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
  110. #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
  111. #define CAPTURE_UNKNOWN 0x13
  112. /* From 0x20 - 0x3f, last samples played on each channel */
  113. #define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
  114. #define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
  115. #define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
  116. #define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
  117. #define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
  118. #define ROUTING 0x41 /* Setup sound routing ? */
  119. #define ROUTING_FRONT_LEFT 0x00000001
  120. #define ROUTING_FRONT_RIGHT 0x00000002
  121. #define ROUTING_REAR_LEFT 0x00000004
  122. #define ROUTING_REAR_RIGHT 0x00000008
  123. #define ROUTING_CENTER_LFE 0x00010000
  124. #define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
  125. #define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
  126. #define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
  127. #define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
  128. #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
  129. #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
  130. #define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
  131. #define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
  132. #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
  133. #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
  134. #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
  135. #define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
  136. #define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
  137. #define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
  138. #define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
  139. #define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
  140. #define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
  141. #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
  142. #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
  143. #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
  144. #define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
  145. #define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
  146. #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
  147. #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
  148. #define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
  149. #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
  150. #define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
  151. /* This is the MPU port on the card */
  152. #define MUDATA 0x47
  153. #define MUCMD 0x48
  154. #define MUSTAT MUCMD
  155. /* From 0x50 - 0x5f, last samples captured */
  156. /**
  157. * The hardware has 3 channels for playback and 1 for capture.
  158. * - channel 0 is the front channel
  159. * - channel 1 is the rear channel
  160. * - channel 2 is the center/lfe channel
  161. * Volume is controlled by the AC97 for the front and rear channels by
  162. * the PCM Playback Volume, Sigmatel Surround Playback Volume and
  163. * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
  164. * the front/rear channel mixing in the REAR OUT jack. When using the
  165. * 4-Speaker Stereo, both front and rear channels will be mixed in the
  166. * REAR OUT.
  167. * The center/lfe channel has no volume control and cannot be muted during
  168. * playback.
  169. */
  170. struct emu10k1x_voice {
  171. struct emu10k1x *emu;
  172. int number;
  173. int use;
  174. struct emu10k1x_pcm *epcm;
  175. };
  176. struct emu10k1x_pcm {
  177. struct emu10k1x *emu;
  178. struct snd_pcm_substream *substream;
  179. struct emu10k1x_voice *voice;
  180. unsigned short running;
  181. };
  182. struct emu10k1x_midi {
  183. struct emu10k1x *emu;
  184. struct snd_rawmidi *rmidi;
  185. struct snd_rawmidi_substream *substream_input;
  186. struct snd_rawmidi_substream *substream_output;
  187. unsigned int midi_mode;
  188. spinlock_t input_lock;
  189. spinlock_t output_lock;
  190. spinlock_t open_lock;
  191. int tx_enable, rx_enable;
  192. int port;
  193. int ipr_tx, ipr_rx;
  194. void (*interrupt)(struct emu10k1x *emu, unsigned int status);
  195. };
  196. // definition of the chip-specific record
  197. struct emu10k1x {
  198. struct snd_card *card;
  199. struct pci_dev *pci;
  200. unsigned long port;
  201. struct resource *res_port;
  202. int irq;
  203. unsigned char revision; /* chip revision */
  204. unsigned int serial; /* serial number */
  205. unsigned short model; /* subsystem id */
  206. spinlock_t emu_lock;
  207. spinlock_t voice_lock;
  208. struct snd_ac97 *ac97;
  209. struct snd_pcm *pcm;
  210. struct emu10k1x_voice voices[3];
  211. struct emu10k1x_voice capture_voice;
  212. u32 spdif_bits[3]; // SPDIF out setup
  213. struct snd_dma_buffer dma_buffer;
  214. struct emu10k1x_midi midi;
  215. };
  216. /* hardware definition */
  217. static struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
  218. .info = (SNDRV_PCM_INFO_MMAP |
  219. SNDRV_PCM_INFO_INTERLEAVED |
  220. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  221. SNDRV_PCM_INFO_MMAP_VALID),
  222. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  223. .rates = SNDRV_PCM_RATE_48000,
  224. .rate_min = 48000,
  225. .rate_max = 48000,
  226. .channels_min = 2,
  227. .channels_max = 2,
  228. .buffer_bytes_max = (32*1024),
  229. .period_bytes_min = 64,
  230. .period_bytes_max = (16*1024),
  231. .periods_min = 2,
  232. .periods_max = 8,
  233. .fifo_size = 0,
  234. };
  235. static struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
  236. .info = (SNDRV_PCM_INFO_MMAP |
  237. SNDRV_PCM_INFO_INTERLEAVED |
  238. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  239. SNDRV_PCM_INFO_MMAP_VALID),
  240. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  241. .rates = SNDRV_PCM_RATE_48000,
  242. .rate_min = 48000,
  243. .rate_max = 48000,
  244. .channels_min = 2,
  245. .channels_max = 2,
  246. .buffer_bytes_max = (32*1024),
  247. .period_bytes_min = 64,
  248. .period_bytes_max = (16*1024),
  249. .periods_min = 2,
  250. .periods_max = 2,
  251. .fifo_size = 0,
  252. };
  253. static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
  254. unsigned int reg,
  255. unsigned int chn)
  256. {
  257. unsigned long flags;
  258. unsigned int regptr, val;
  259. regptr = (reg << 16) | chn;
  260. spin_lock_irqsave(&emu->emu_lock, flags);
  261. outl(regptr, emu->port + PTR);
  262. val = inl(emu->port + DATA);
  263. spin_unlock_irqrestore(&emu->emu_lock, flags);
  264. return val;
  265. }
  266. static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
  267. unsigned int reg,
  268. unsigned int chn,
  269. unsigned int data)
  270. {
  271. unsigned int regptr;
  272. unsigned long flags;
  273. regptr = (reg << 16) | chn;
  274. spin_lock_irqsave(&emu->emu_lock, flags);
  275. outl(regptr, emu->port + PTR);
  276. outl(data, emu->port + DATA);
  277. spin_unlock_irqrestore(&emu->emu_lock, flags);
  278. }
  279. static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
  280. {
  281. unsigned long flags;
  282. unsigned int intr_enable;
  283. spin_lock_irqsave(&emu->emu_lock, flags);
  284. intr_enable = inl(emu->port + INTE) | intrenb;
  285. outl(intr_enable, emu->port + INTE);
  286. spin_unlock_irqrestore(&emu->emu_lock, flags);
  287. }
  288. static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
  289. {
  290. unsigned long flags;
  291. unsigned int intr_enable;
  292. spin_lock_irqsave(&emu->emu_lock, flags);
  293. intr_enable = inl(emu->port + INTE) & ~intrenb;
  294. outl(intr_enable, emu->port + INTE);
  295. spin_unlock_irqrestore(&emu->emu_lock, flags);
  296. }
  297. static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
  298. {
  299. unsigned long flags;
  300. spin_lock_irqsave(&emu->emu_lock, flags);
  301. outl(value, emu->port + GPIO);
  302. spin_unlock_irqrestore(&emu->emu_lock, flags);
  303. }
  304. static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
  305. {
  306. kfree(runtime->private_data);
  307. }
  308. static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
  309. {
  310. struct emu10k1x_pcm *epcm;
  311. if ((epcm = voice->epcm) == NULL)
  312. return;
  313. if (epcm->substream == NULL)
  314. return;
  315. #if 0
  316. snd_printk(KERN_INFO "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
  317. epcm->substream->ops->pointer(epcm->substream),
  318. snd_pcm_lib_period_bytes(epcm->substream),
  319. snd_pcm_lib_buffer_bytes(epcm->substream));
  320. #endif
  321. snd_pcm_period_elapsed(epcm->substream);
  322. }
  323. /* open callback */
  324. static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
  325. {
  326. struct emu10k1x *chip = snd_pcm_substream_chip(substream);
  327. struct emu10k1x_pcm *epcm;
  328. struct snd_pcm_runtime *runtime = substream->runtime;
  329. int err;
  330. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
  331. return err;
  332. }
  333. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  334. return err;
  335. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  336. if (epcm == NULL)
  337. return -ENOMEM;
  338. epcm->emu = chip;
  339. epcm->substream = substream;
  340. runtime->private_data = epcm;
  341. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  342. runtime->hw = snd_emu10k1x_playback_hw;
  343. return 0;
  344. }
  345. /* close callback */
  346. static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
  347. {
  348. return 0;
  349. }
  350. /* hw_params callback */
  351. static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
  352. struct snd_pcm_hw_params *hw_params)
  353. {
  354. struct snd_pcm_runtime *runtime = substream->runtime;
  355. struct emu10k1x_pcm *epcm = runtime->private_data;
  356. if (! epcm->voice) {
  357. epcm->voice = &epcm->emu->voices[substream->pcm->device];
  358. epcm->voice->use = 1;
  359. epcm->voice->epcm = epcm;
  360. }
  361. return snd_pcm_lib_malloc_pages(substream,
  362. params_buffer_bytes(hw_params));
  363. }
  364. /* hw_free callback */
  365. static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
  366. {
  367. struct snd_pcm_runtime *runtime = substream->runtime;
  368. struct emu10k1x_pcm *epcm;
  369. if (runtime->private_data == NULL)
  370. return 0;
  371. epcm = runtime->private_data;
  372. if (epcm->voice) {
  373. epcm->voice->use = 0;
  374. epcm->voice->epcm = NULL;
  375. epcm->voice = NULL;
  376. }
  377. return snd_pcm_lib_free_pages(substream);
  378. }
  379. /* prepare callback */
  380. static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
  381. {
  382. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  383. struct snd_pcm_runtime *runtime = substream->runtime;
  384. struct emu10k1x_pcm *epcm = runtime->private_data;
  385. int voice = epcm->voice->number;
  386. u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
  387. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  388. int i;
  389. for(i = 0; i < runtime->periods; i++) {
  390. *table_base++=runtime->dma_addr+(i*period_size_bytes);
  391. *table_base++=period_size_bytes<<16;
  392. }
  393. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
  394. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
  395. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
  396. snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
  397. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
  398. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
  399. snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
  400. snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
  401. return 0;
  402. }
  403. /* trigger callback */
  404. static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
  405. int cmd)
  406. {
  407. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  408. struct snd_pcm_runtime *runtime = substream->runtime;
  409. struct emu10k1x_pcm *epcm = runtime->private_data;
  410. int channel = epcm->voice->number;
  411. int result = 0;
  412. // snd_printk(KERN_INFO "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", (int)emu, cmd, (int)substream->ops->pointer(substream));
  413. switch (cmd) {
  414. case SNDRV_PCM_TRIGGER_START:
  415. if(runtime->periods == 2)
  416. snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  417. else
  418. snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
  419. epcm->running = 1;
  420. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
  421. break;
  422. case SNDRV_PCM_TRIGGER_STOP:
  423. epcm->running = 0;
  424. snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  425. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
  426. break;
  427. default:
  428. result = -EINVAL;
  429. break;
  430. }
  431. return result;
  432. }
  433. /* pointer callback */
  434. static snd_pcm_uframes_t
  435. snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
  436. {
  437. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  438. struct snd_pcm_runtime *runtime = substream->runtime;
  439. struct emu10k1x_pcm *epcm = runtime->private_data;
  440. int channel = epcm->voice->number;
  441. snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
  442. if (!epcm->running)
  443. return 0;
  444. ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  445. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  446. ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  447. if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
  448. return 0;
  449. if (ptr3 != ptr4)
  450. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  451. ptr2 = bytes_to_frames(runtime, ptr1);
  452. ptr2 += (ptr4 >> 3) * runtime->period_size;
  453. ptr = ptr2;
  454. if (ptr >= runtime->buffer_size)
  455. ptr -= runtime->buffer_size;
  456. return ptr;
  457. }
  458. /* operators */
  459. static struct snd_pcm_ops snd_emu10k1x_playback_ops = {
  460. .open = snd_emu10k1x_playback_open,
  461. .close = snd_emu10k1x_playback_close,
  462. .ioctl = snd_pcm_lib_ioctl,
  463. .hw_params = snd_emu10k1x_pcm_hw_params,
  464. .hw_free = snd_emu10k1x_pcm_hw_free,
  465. .prepare = snd_emu10k1x_pcm_prepare,
  466. .trigger = snd_emu10k1x_pcm_trigger,
  467. .pointer = snd_emu10k1x_pcm_pointer,
  468. };
  469. /* open_capture callback */
  470. static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
  471. {
  472. struct emu10k1x *chip = snd_pcm_substream_chip(substream);
  473. struct emu10k1x_pcm *epcm;
  474. struct snd_pcm_runtime *runtime = substream->runtime;
  475. int err;
  476. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  477. return err;
  478. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  479. return err;
  480. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  481. if (epcm == NULL)
  482. return -ENOMEM;
  483. epcm->emu = chip;
  484. epcm->substream = substream;
  485. runtime->private_data = epcm;
  486. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  487. runtime->hw = snd_emu10k1x_capture_hw;
  488. return 0;
  489. }
  490. /* close callback */
  491. static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
  492. {
  493. return 0;
  494. }
  495. /* hw_params callback */
  496. static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
  497. struct snd_pcm_hw_params *hw_params)
  498. {
  499. struct snd_pcm_runtime *runtime = substream->runtime;
  500. struct emu10k1x_pcm *epcm = runtime->private_data;
  501. if (! epcm->voice) {
  502. if (epcm->emu->capture_voice.use)
  503. return -EBUSY;
  504. epcm->voice = &epcm->emu->capture_voice;
  505. epcm->voice->epcm = epcm;
  506. epcm->voice->use = 1;
  507. }
  508. return snd_pcm_lib_malloc_pages(substream,
  509. params_buffer_bytes(hw_params));
  510. }
  511. /* hw_free callback */
  512. static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
  513. {
  514. struct snd_pcm_runtime *runtime = substream->runtime;
  515. struct emu10k1x_pcm *epcm;
  516. if (runtime->private_data == NULL)
  517. return 0;
  518. epcm = runtime->private_data;
  519. if (epcm->voice) {
  520. epcm->voice->use = 0;
  521. epcm->voice->epcm = NULL;
  522. epcm->voice = NULL;
  523. }
  524. return snd_pcm_lib_free_pages(substream);
  525. }
  526. /* prepare capture callback */
  527. static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
  528. {
  529. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  530. struct snd_pcm_runtime *runtime = substream->runtime;
  531. snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
  532. snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  533. snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
  534. snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
  535. return 0;
  536. }
  537. /* trigger_capture callback */
  538. static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
  539. int cmd)
  540. {
  541. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  542. struct snd_pcm_runtime *runtime = substream->runtime;
  543. struct emu10k1x_pcm *epcm = runtime->private_data;
  544. int result = 0;
  545. switch (cmd) {
  546. case SNDRV_PCM_TRIGGER_START:
  547. snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
  548. INTE_CAP_0_HALF_LOOP);
  549. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
  550. epcm->running = 1;
  551. break;
  552. case SNDRV_PCM_TRIGGER_STOP:
  553. epcm->running = 0;
  554. snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
  555. INTE_CAP_0_HALF_LOOP);
  556. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
  557. break;
  558. default:
  559. result = -EINVAL;
  560. break;
  561. }
  562. return result;
  563. }
  564. /* pointer_capture callback */
  565. static snd_pcm_uframes_t
  566. snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
  567. {
  568. struct emu10k1x *emu = snd_pcm_substream_chip(substream);
  569. struct snd_pcm_runtime *runtime = substream->runtime;
  570. struct emu10k1x_pcm *epcm = runtime->private_data;
  571. snd_pcm_uframes_t ptr;
  572. if (!epcm->running)
  573. return 0;
  574. ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
  575. if (ptr >= runtime->buffer_size)
  576. ptr -= runtime->buffer_size;
  577. return ptr;
  578. }
  579. static struct snd_pcm_ops snd_emu10k1x_capture_ops = {
  580. .open = snd_emu10k1x_pcm_open_capture,
  581. .close = snd_emu10k1x_pcm_close_capture,
  582. .ioctl = snd_pcm_lib_ioctl,
  583. .hw_params = snd_emu10k1x_pcm_hw_params_capture,
  584. .hw_free = snd_emu10k1x_pcm_hw_free_capture,
  585. .prepare = snd_emu10k1x_pcm_prepare_capture,
  586. .trigger = snd_emu10k1x_pcm_trigger_capture,
  587. .pointer = snd_emu10k1x_pcm_pointer_capture,
  588. };
  589. static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
  590. unsigned short reg)
  591. {
  592. struct emu10k1x *emu = ac97->private_data;
  593. unsigned long flags;
  594. unsigned short val;
  595. spin_lock_irqsave(&emu->emu_lock, flags);
  596. outb(reg, emu->port + AC97ADDRESS);
  597. val = inw(emu->port + AC97DATA);
  598. spin_unlock_irqrestore(&emu->emu_lock, flags);
  599. return val;
  600. }
  601. static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
  602. unsigned short reg, unsigned short val)
  603. {
  604. struct emu10k1x *emu = ac97->private_data;
  605. unsigned long flags;
  606. spin_lock_irqsave(&emu->emu_lock, flags);
  607. outb(reg, emu->port + AC97ADDRESS);
  608. outw(val, emu->port + AC97DATA);
  609. spin_unlock_irqrestore(&emu->emu_lock, flags);
  610. }
  611. static int snd_emu10k1x_ac97(struct emu10k1x *chip)
  612. {
  613. struct snd_ac97_bus *pbus;
  614. struct snd_ac97_template ac97;
  615. int err;
  616. static struct snd_ac97_bus_ops ops = {
  617. .write = snd_emu10k1x_ac97_write,
  618. .read = snd_emu10k1x_ac97_read,
  619. };
  620. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  621. return err;
  622. pbus->no_vra = 1; /* we don't need VRA */
  623. memset(&ac97, 0, sizeof(ac97));
  624. ac97.private_data = chip;
  625. ac97.scaps = AC97_SCAP_NO_SPDIF;
  626. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  627. }
  628. static int snd_emu10k1x_free(struct emu10k1x *chip)
  629. {
  630. snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
  631. // disable interrupts
  632. outl(0, chip->port + INTE);
  633. // disable audio
  634. outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
  635. /* release the irq */
  636. if (chip->irq >= 0)
  637. free_irq(chip->irq, chip);
  638. // release the i/o port
  639. release_and_free_resource(chip->res_port);
  640. // release the DMA
  641. if (chip->dma_buffer.area) {
  642. snd_dma_free_pages(&chip->dma_buffer);
  643. }
  644. pci_disable_device(chip->pci);
  645. // release the data
  646. kfree(chip);
  647. return 0;
  648. }
  649. static int snd_emu10k1x_dev_free(struct snd_device *device)
  650. {
  651. struct emu10k1x *chip = device->device_data;
  652. return snd_emu10k1x_free(chip);
  653. }
  654. static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id)
  655. {
  656. unsigned int status;
  657. struct emu10k1x *chip = dev_id;
  658. struct emu10k1x_voice *pvoice = chip->voices;
  659. int i;
  660. int mask;
  661. status = inl(chip->port + IPR);
  662. if (! status)
  663. return IRQ_NONE;
  664. // capture interrupt
  665. if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
  666. struct emu10k1x_voice *cap_voice = &chip->capture_voice;
  667. if (cap_voice->use)
  668. snd_emu10k1x_pcm_interrupt(chip, cap_voice);
  669. else
  670. snd_emu10k1x_intr_disable(chip,
  671. INTE_CAP_0_LOOP |
  672. INTE_CAP_0_HALF_LOOP);
  673. }
  674. mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
  675. for (i = 0; i < 3; i++) {
  676. if (status & mask) {
  677. if (pvoice->use)
  678. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  679. else
  680. snd_emu10k1x_intr_disable(chip, mask);
  681. }
  682. pvoice++;
  683. mask <<= 1;
  684. }
  685. if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
  686. if (chip->midi.interrupt)
  687. chip->midi.interrupt(chip, status);
  688. else
  689. snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
  690. }
  691. // acknowledge the interrupt if necessary
  692. outl(status, chip->port + IPR);
  693. // snd_printk(KERN_INFO "interrupt %08x\n", status);
  694. return IRQ_HANDLED;
  695. }
  696. static int __devinit snd_emu10k1x_pcm(struct emu10k1x *emu, int device, struct snd_pcm **rpcm)
  697. {
  698. struct snd_pcm *pcm;
  699. int err;
  700. int capture = 0;
  701. if (rpcm)
  702. *rpcm = NULL;
  703. if (device == 0)
  704. capture = 1;
  705. if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
  706. return err;
  707. pcm->private_data = emu;
  708. switch(device) {
  709. case 0:
  710. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  711. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
  712. break;
  713. case 1:
  714. case 2:
  715. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  716. break;
  717. }
  718. pcm->info_flags = 0;
  719. switch(device) {
  720. case 0:
  721. strcpy(pcm->name, "EMU10K1X Front");
  722. break;
  723. case 1:
  724. strcpy(pcm->name, "EMU10K1X Rear");
  725. break;
  726. case 2:
  727. strcpy(pcm->name, "EMU10K1X Center/LFE");
  728. break;
  729. }
  730. emu->pcm = pcm;
  731. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  732. snd_dma_pci_data(emu->pci),
  733. 32*1024, 32*1024);
  734. if (rpcm)
  735. *rpcm = pcm;
  736. return 0;
  737. }
  738. static int __devinit snd_emu10k1x_create(struct snd_card *card,
  739. struct pci_dev *pci,
  740. struct emu10k1x **rchip)
  741. {
  742. struct emu10k1x *chip;
  743. int err;
  744. int ch;
  745. static struct snd_device_ops ops = {
  746. .dev_free = snd_emu10k1x_dev_free,
  747. };
  748. *rchip = NULL;
  749. if ((err = pci_enable_device(pci)) < 0)
  750. return err;
  751. if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
  752. pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
  753. snd_printk(KERN_ERR "error to set 28bit mask DMA\n");
  754. pci_disable_device(pci);
  755. return -ENXIO;
  756. }
  757. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  758. if (chip == NULL) {
  759. pci_disable_device(pci);
  760. return -ENOMEM;
  761. }
  762. chip->card = card;
  763. chip->pci = pci;
  764. chip->irq = -1;
  765. spin_lock_init(&chip->emu_lock);
  766. spin_lock_init(&chip->voice_lock);
  767. chip->port = pci_resource_start(pci, 0);
  768. if ((chip->res_port = request_region(chip->port, 8,
  769. "EMU10K1X")) == NULL) {
  770. snd_printk(KERN_ERR "emu10k1x: cannot allocate the port 0x%lx\n", chip->port);
  771. snd_emu10k1x_free(chip);
  772. return -EBUSY;
  773. }
  774. if (request_irq(pci->irq, snd_emu10k1x_interrupt,
  775. IRQF_SHARED, KBUILD_MODNAME, chip)) {
  776. snd_printk(KERN_ERR "emu10k1x: cannot grab irq %d\n", pci->irq);
  777. snd_emu10k1x_free(chip);
  778. return -EBUSY;
  779. }
  780. chip->irq = pci->irq;
  781. if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  782. 4 * 1024, &chip->dma_buffer) < 0) {
  783. snd_emu10k1x_free(chip);
  784. return -ENOMEM;
  785. }
  786. pci_set_master(pci);
  787. /* read revision & serial */
  788. chip->revision = pci->revision;
  789. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  790. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  791. snd_printk(KERN_INFO "Model %04x Rev %08x Serial %08x\n", chip->model,
  792. chip->revision, chip->serial);
  793. outl(0, chip->port + INTE);
  794. for(ch = 0; ch < 3; ch++) {
  795. chip->voices[ch].emu = chip;
  796. chip->voices[ch].number = ch;
  797. }
  798. /*
  799. * Init to 0x02109204 :
  800. * Clock accuracy = 0 (1000ppm)
  801. * Sample Rate = 2 (48kHz)
  802. * Audio Channel = 1 (Left of 2)
  803. * Source Number = 0 (Unspecified)
  804. * Generation Status = 1 (Original for Cat Code 12)
  805. * Cat Code = 12 (Digital Signal Mixer)
  806. * Mode = 0 (Mode 0)
  807. * Emphasis = 0 (None)
  808. * CP = 1 (Copyright unasserted)
  809. * AN = 0 (Audio data)
  810. * P = 0 (Consumer)
  811. */
  812. snd_emu10k1x_ptr_write(chip, SPCS0, 0,
  813. chip->spdif_bits[0] =
  814. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  815. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  816. SPCS_GENERATIONSTATUS | 0x00001200 |
  817. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  818. snd_emu10k1x_ptr_write(chip, SPCS1, 0,
  819. chip->spdif_bits[1] =
  820. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  821. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  822. SPCS_GENERATIONSTATUS | 0x00001200 |
  823. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  824. snd_emu10k1x_ptr_write(chip, SPCS2, 0,
  825. chip->spdif_bits[2] =
  826. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  827. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  828. SPCS_GENERATIONSTATUS | 0x00001200 |
  829. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  830. snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
  831. snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
  832. snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
  833. outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
  834. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  835. chip, &ops)) < 0) {
  836. snd_emu10k1x_free(chip);
  837. return err;
  838. }
  839. *rchip = chip;
  840. return 0;
  841. }
  842. static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
  843. struct snd_info_buffer *buffer)
  844. {
  845. struct emu10k1x *emu = entry->private_data;
  846. unsigned long value,value1,value2;
  847. unsigned long flags;
  848. int i;
  849. snd_iprintf(buffer, "Registers:\n\n");
  850. for(i = 0; i < 0x20; i+=4) {
  851. spin_lock_irqsave(&emu->emu_lock, flags);
  852. value = inl(emu->port + i);
  853. spin_unlock_irqrestore(&emu->emu_lock, flags);
  854. snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
  855. }
  856. snd_iprintf(buffer, "\nRegisters\n\n");
  857. for(i = 0; i <= 0x48; i++) {
  858. value = snd_emu10k1x_ptr_read(emu, i, 0);
  859. if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
  860. value1 = snd_emu10k1x_ptr_read(emu, i, 1);
  861. value2 = snd_emu10k1x_ptr_read(emu, i, 2);
  862. snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
  863. } else {
  864. snd_iprintf(buffer, "%02X: %08lX\n", i, value);
  865. }
  866. }
  867. }
  868. static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
  869. struct snd_info_buffer *buffer)
  870. {
  871. struct emu10k1x *emu = entry->private_data;
  872. char line[64];
  873. unsigned int reg, channel_id , val;
  874. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  875. if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
  876. continue;
  877. if (reg < 0x49 && val <= 0xffffffff && channel_id <= 2)
  878. snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
  879. }
  880. }
  881. static int __devinit snd_emu10k1x_proc_init(struct emu10k1x * emu)
  882. {
  883. struct snd_info_entry *entry;
  884. if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
  885. snd_info_set_text_ops(entry, emu, snd_emu10k1x_proc_reg_read);
  886. entry->c.text.write = snd_emu10k1x_proc_reg_write;
  887. entry->mode |= S_IWUSR;
  888. entry->private_data = emu;
  889. }
  890. return 0;
  891. }
  892. #define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info
  893. static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
  894. struct snd_ctl_elem_value *ucontrol)
  895. {
  896. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  897. ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
  898. return 0;
  899. }
  900. static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
  901. struct snd_ctl_elem_value *ucontrol)
  902. {
  903. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  904. unsigned int val;
  905. int change = 0;
  906. val = ucontrol->value.integer.value[0] ;
  907. if (val) {
  908. // enable spdif output
  909. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
  910. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
  911. snd_emu10k1x_gpio_write(emu, 0x1000);
  912. } else {
  913. // disable spdif output
  914. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
  915. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
  916. snd_emu10k1x_gpio_write(emu, 0x1080);
  917. }
  918. return change;
  919. }
  920. static struct snd_kcontrol_new snd_emu10k1x_shared_spdif __devinitdata =
  921. {
  922. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  923. .name = "Analog/Digital Output Jack",
  924. .info = snd_emu10k1x_shared_spdif_info,
  925. .get = snd_emu10k1x_shared_spdif_get,
  926. .put = snd_emu10k1x_shared_spdif_put
  927. };
  928. static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  929. {
  930. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  931. uinfo->count = 1;
  932. return 0;
  933. }
  934. static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
  935. struct snd_ctl_elem_value *ucontrol)
  936. {
  937. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  938. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  939. ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
  940. ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
  941. ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
  942. ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
  943. return 0;
  944. }
  945. static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
  946. struct snd_ctl_elem_value *ucontrol)
  947. {
  948. ucontrol->value.iec958.status[0] = 0xff;
  949. ucontrol->value.iec958.status[1] = 0xff;
  950. ucontrol->value.iec958.status[2] = 0xff;
  951. ucontrol->value.iec958.status[3] = 0xff;
  952. return 0;
  953. }
  954. static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
  955. struct snd_ctl_elem_value *ucontrol)
  956. {
  957. struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
  958. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  959. int change;
  960. unsigned int val;
  961. val = (ucontrol->value.iec958.status[0] << 0) |
  962. (ucontrol->value.iec958.status[1] << 8) |
  963. (ucontrol->value.iec958.status[2] << 16) |
  964. (ucontrol->value.iec958.status[3] << 24);
  965. change = val != emu->spdif_bits[idx];
  966. if (change) {
  967. snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
  968. emu->spdif_bits[idx] = val;
  969. }
  970. return change;
  971. }
  972. static struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
  973. {
  974. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  975. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  976. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  977. .count = 3,
  978. .info = snd_emu10k1x_spdif_info,
  979. .get = snd_emu10k1x_spdif_get_mask
  980. };
  981. static struct snd_kcontrol_new snd_emu10k1x_spdif_control =
  982. {
  983. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  984. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  985. .count = 3,
  986. .info = snd_emu10k1x_spdif_info,
  987. .get = snd_emu10k1x_spdif_get,
  988. .put = snd_emu10k1x_spdif_put
  989. };
  990. static int __devinit snd_emu10k1x_mixer(struct emu10k1x *emu)
  991. {
  992. int err;
  993. struct snd_kcontrol *kctl;
  994. struct snd_card *card = emu->card;
  995. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
  996. return -ENOMEM;
  997. if ((err = snd_ctl_add(card, kctl)))
  998. return err;
  999. if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
  1000. return -ENOMEM;
  1001. if ((err = snd_ctl_add(card, kctl)))
  1002. return err;
  1003. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
  1004. return -ENOMEM;
  1005. if ((err = snd_ctl_add(card, kctl)))
  1006. return err;
  1007. return 0;
  1008. }
  1009. #define EMU10K1X_MIDI_MODE_INPUT (1<<0)
  1010. #define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
  1011. static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
  1012. {
  1013. return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
  1014. }
  1015. static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
  1016. {
  1017. snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
  1018. }
  1019. #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
  1020. #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
  1021. #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
  1022. #define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
  1023. #define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
  1024. #define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
  1025. #define MPU401_RESET 0xff
  1026. #define MPU401_ENTER_UART 0x3f
  1027. #define MPU401_ACK 0xfe
  1028. static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
  1029. {
  1030. int timeout = 100000;
  1031. for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
  1032. mpu401_read_data(emu, mpu);
  1033. #ifdef CONFIG_SND_DEBUG
  1034. if (timeout <= 0)
  1035. snd_printk(KERN_ERR "cmd: clear rx timeout (status = 0x%x)\n", mpu401_read_stat(emu, mpu));
  1036. #endif
  1037. }
  1038. /*
  1039. */
  1040. static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
  1041. struct emu10k1x_midi *midi, unsigned int status)
  1042. {
  1043. unsigned char byte;
  1044. if (midi->rmidi == NULL) {
  1045. snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
  1046. return;
  1047. }
  1048. spin_lock(&midi->input_lock);
  1049. if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
  1050. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1051. mpu401_clear_rx(emu, midi);
  1052. } else {
  1053. byte = mpu401_read_data(emu, midi);
  1054. if (midi->substream_input)
  1055. snd_rawmidi_receive(midi->substream_input, &byte, 1);
  1056. }
  1057. }
  1058. spin_unlock(&midi->input_lock);
  1059. spin_lock(&midi->output_lock);
  1060. if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
  1061. if (midi->substream_output &&
  1062. snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
  1063. mpu401_write_data(emu, midi, byte);
  1064. } else {
  1065. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1066. }
  1067. }
  1068. spin_unlock(&midi->output_lock);
  1069. }
  1070. static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
  1071. {
  1072. do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
  1073. }
  1074. static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
  1075. struct emu10k1x_midi *midi, unsigned char cmd, int ack)
  1076. {
  1077. unsigned long flags;
  1078. int timeout, ok;
  1079. spin_lock_irqsave(&midi->input_lock, flags);
  1080. mpu401_write_data(emu, midi, 0x00);
  1081. /* mpu401_clear_rx(emu, midi); */
  1082. mpu401_write_cmd(emu, midi, cmd);
  1083. if (ack) {
  1084. ok = 0;
  1085. timeout = 10000;
  1086. while (!ok && timeout-- > 0) {
  1087. if (mpu401_input_avail(emu, midi)) {
  1088. if (mpu401_read_data(emu, midi) == MPU401_ACK)
  1089. ok = 1;
  1090. }
  1091. }
  1092. if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
  1093. ok = 1;
  1094. } else {
  1095. ok = 1;
  1096. }
  1097. spin_unlock_irqrestore(&midi->input_lock, flags);
  1098. if (!ok) {
  1099. snd_printk(KERN_ERR "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
  1100. cmd, emu->port,
  1101. mpu401_read_stat(emu, midi),
  1102. mpu401_read_data(emu, midi));
  1103. return 1;
  1104. }
  1105. return 0;
  1106. }
  1107. static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
  1108. {
  1109. struct emu10k1x *emu;
  1110. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1111. unsigned long flags;
  1112. emu = midi->emu;
  1113. if (snd_BUG_ON(!emu))
  1114. return -ENXIO;
  1115. spin_lock_irqsave(&midi->open_lock, flags);
  1116. midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
  1117. midi->substream_input = substream;
  1118. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1119. spin_unlock_irqrestore(&midi->open_lock, flags);
  1120. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
  1121. goto error_out;
  1122. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
  1123. goto error_out;
  1124. } else {
  1125. spin_unlock_irqrestore(&midi->open_lock, flags);
  1126. }
  1127. return 0;
  1128. error_out:
  1129. return -EIO;
  1130. }
  1131. static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
  1132. {
  1133. struct emu10k1x *emu;
  1134. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1135. unsigned long flags;
  1136. emu = midi->emu;
  1137. if (snd_BUG_ON(!emu))
  1138. return -ENXIO;
  1139. spin_lock_irqsave(&midi->open_lock, flags);
  1140. midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
  1141. midi->substream_output = substream;
  1142. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1143. spin_unlock_irqrestore(&midi->open_lock, flags);
  1144. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
  1145. goto error_out;
  1146. if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
  1147. goto error_out;
  1148. } else {
  1149. spin_unlock_irqrestore(&midi->open_lock, flags);
  1150. }
  1151. return 0;
  1152. error_out:
  1153. return -EIO;
  1154. }
  1155. static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
  1156. {
  1157. struct emu10k1x *emu;
  1158. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1159. unsigned long flags;
  1160. int err = 0;
  1161. emu = midi->emu;
  1162. if (snd_BUG_ON(!emu))
  1163. return -ENXIO;
  1164. spin_lock_irqsave(&midi->open_lock, flags);
  1165. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1166. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
  1167. midi->substream_input = NULL;
  1168. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1169. spin_unlock_irqrestore(&midi->open_lock, flags);
  1170. err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1171. } else {
  1172. spin_unlock_irqrestore(&midi->open_lock, flags);
  1173. }
  1174. return err;
  1175. }
  1176. static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
  1177. {
  1178. struct emu10k1x *emu;
  1179. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1180. unsigned long flags;
  1181. int err = 0;
  1182. emu = midi->emu;
  1183. if (snd_BUG_ON(!emu))
  1184. return -ENXIO;
  1185. spin_lock_irqsave(&midi->open_lock, flags);
  1186. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1187. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
  1188. midi->substream_output = NULL;
  1189. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1190. spin_unlock_irqrestore(&midi->open_lock, flags);
  1191. err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1192. } else {
  1193. spin_unlock_irqrestore(&midi->open_lock, flags);
  1194. }
  1195. return err;
  1196. }
  1197. static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
  1198. {
  1199. struct emu10k1x *emu;
  1200. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1201. emu = midi->emu;
  1202. if (snd_BUG_ON(!emu))
  1203. return;
  1204. if (up)
  1205. snd_emu10k1x_intr_enable(emu, midi->rx_enable);
  1206. else
  1207. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1208. }
  1209. static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
  1210. {
  1211. struct emu10k1x *emu;
  1212. struct emu10k1x_midi *midi = substream->rmidi->private_data;
  1213. unsigned long flags;
  1214. emu = midi->emu;
  1215. if (snd_BUG_ON(!emu))
  1216. return;
  1217. if (up) {
  1218. int max = 4;
  1219. unsigned char byte;
  1220. /* try to send some amount of bytes here before interrupts */
  1221. spin_lock_irqsave(&midi->output_lock, flags);
  1222. while (max > 0) {
  1223. if (mpu401_output_ready(emu, midi)) {
  1224. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
  1225. snd_rawmidi_transmit(substream, &byte, 1) != 1) {
  1226. /* no more data */
  1227. spin_unlock_irqrestore(&midi->output_lock, flags);
  1228. return;
  1229. }
  1230. mpu401_write_data(emu, midi, byte);
  1231. max--;
  1232. } else {
  1233. break;
  1234. }
  1235. }
  1236. spin_unlock_irqrestore(&midi->output_lock, flags);
  1237. snd_emu10k1x_intr_enable(emu, midi->tx_enable);
  1238. } else {
  1239. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1240. }
  1241. }
  1242. /*
  1243. */
  1244. static struct snd_rawmidi_ops snd_emu10k1x_midi_output =
  1245. {
  1246. .open = snd_emu10k1x_midi_output_open,
  1247. .close = snd_emu10k1x_midi_output_close,
  1248. .trigger = snd_emu10k1x_midi_output_trigger,
  1249. };
  1250. static struct snd_rawmidi_ops snd_emu10k1x_midi_input =
  1251. {
  1252. .open = snd_emu10k1x_midi_input_open,
  1253. .close = snd_emu10k1x_midi_input_close,
  1254. .trigger = snd_emu10k1x_midi_input_trigger,
  1255. };
  1256. static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
  1257. {
  1258. struct emu10k1x_midi *midi = rmidi->private_data;
  1259. midi->interrupt = NULL;
  1260. midi->rmidi = NULL;
  1261. }
  1262. static int __devinit emu10k1x_midi_init(struct emu10k1x *emu,
  1263. struct emu10k1x_midi *midi, int device, char *name)
  1264. {
  1265. struct snd_rawmidi *rmidi;
  1266. int err;
  1267. if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
  1268. return err;
  1269. midi->emu = emu;
  1270. spin_lock_init(&midi->open_lock);
  1271. spin_lock_init(&midi->input_lock);
  1272. spin_lock_init(&midi->output_lock);
  1273. strcpy(rmidi->name, name);
  1274. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
  1275. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
  1276. rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
  1277. SNDRV_RAWMIDI_INFO_INPUT |
  1278. SNDRV_RAWMIDI_INFO_DUPLEX;
  1279. rmidi->private_data = midi;
  1280. rmidi->private_free = snd_emu10k1x_midi_free;
  1281. midi->rmidi = rmidi;
  1282. return 0;
  1283. }
  1284. static int __devinit snd_emu10k1x_midi(struct emu10k1x *emu)
  1285. {
  1286. struct emu10k1x_midi *midi = &emu->midi;
  1287. int err;
  1288. if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
  1289. return err;
  1290. midi->tx_enable = INTE_MIDITXENABLE;
  1291. midi->rx_enable = INTE_MIDIRXENABLE;
  1292. midi->port = MUDATA;
  1293. midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
  1294. midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
  1295. midi->interrupt = snd_emu10k1x_midi_interrupt;
  1296. return 0;
  1297. }
  1298. static int __devinit snd_emu10k1x_probe(struct pci_dev *pci,
  1299. const struct pci_device_id *pci_id)
  1300. {
  1301. static int dev;
  1302. struct snd_card *card;
  1303. struct emu10k1x *chip;
  1304. int err;
  1305. if (dev >= SNDRV_CARDS)
  1306. return -ENODEV;
  1307. if (!enable[dev]) {
  1308. dev++;
  1309. return -ENOENT;
  1310. }
  1311. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  1312. if (err < 0)
  1313. return err;
  1314. if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
  1315. snd_card_free(card);
  1316. return err;
  1317. }
  1318. if ((err = snd_emu10k1x_pcm(chip, 0, NULL)) < 0) {
  1319. snd_card_free(card);
  1320. return err;
  1321. }
  1322. if ((err = snd_emu10k1x_pcm(chip, 1, NULL)) < 0) {
  1323. snd_card_free(card);
  1324. return err;
  1325. }
  1326. if ((err = snd_emu10k1x_pcm(chip, 2, NULL)) < 0) {
  1327. snd_card_free(card);
  1328. return err;
  1329. }
  1330. if ((err = snd_emu10k1x_ac97(chip)) < 0) {
  1331. snd_card_free(card);
  1332. return err;
  1333. }
  1334. if ((err = snd_emu10k1x_mixer(chip)) < 0) {
  1335. snd_card_free(card);
  1336. return err;
  1337. }
  1338. if ((err = snd_emu10k1x_midi(chip)) < 0) {
  1339. snd_card_free(card);
  1340. return err;
  1341. }
  1342. snd_emu10k1x_proc_init(chip);
  1343. strcpy(card->driver, "EMU10K1X");
  1344. strcpy(card->shortname, "Dell Sound Blaster Live!");
  1345. sprintf(card->longname, "%s at 0x%lx irq %i",
  1346. card->shortname, chip->port, chip->irq);
  1347. snd_card_set_dev(card, &pci->dev);
  1348. if ((err = snd_card_register(card)) < 0) {
  1349. snd_card_free(card);
  1350. return err;
  1351. }
  1352. pci_set_drvdata(pci, card);
  1353. dev++;
  1354. return 0;
  1355. }
  1356. static void __devexit snd_emu10k1x_remove(struct pci_dev *pci)
  1357. {
  1358. snd_card_free(pci_get_drvdata(pci));
  1359. pci_set_drvdata(pci, NULL);
  1360. }
  1361. // PCI IDs
  1362. static DEFINE_PCI_DEVICE_TABLE(snd_emu10k1x_ids) = {
  1363. { PCI_VDEVICE(CREATIVE, 0x0006), 0 }, /* Dell OEM version (EMU10K1) */
  1364. { 0, }
  1365. };
  1366. MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
  1367. // pci_driver definition
  1368. static struct pci_driver driver = {
  1369. .name = KBUILD_MODNAME,
  1370. .id_table = snd_emu10k1x_ids,
  1371. .probe = snd_emu10k1x_probe,
  1372. .remove = __devexit_p(snd_emu10k1x_remove),
  1373. };
  1374. // initialization of the module
  1375. static int __init alsa_card_emu10k1x_init(void)
  1376. {
  1377. return pci_register_driver(&driver);
  1378. }
  1379. // clean up the module
  1380. static void __exit alsa_card_emu10k1x_exit(void)
  1381. {
  1382. pci_unregister_driver(&driver);
  1383. }
  1384. module_init(alsa_card_emu10k1x_init)
  1385. module_exit(alsa_card_emu10k1x_exit)