ak4117.c 17 KB

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  1. /*
  2. * Routines for control of the AK4117 via 4-wire serial interface
  3. * IEC958 (S/PDIF) receiver by Asahi Kasei
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/delay.h>
  24. #include <linux/module.h>
  25. #include <sound/core.h>
  26. #include <sound/control.h>
  27. #include <sound/pcm.h>
  28. #include <sound/ak4117.h>
  29. #include <sound/asoundef.h>
  30. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  31. MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
  32. MODULE_LICENSE("GPL");
  33. #define AK4117_ADDR 0x00 /* fixed address */
  34. static void snd_ak4117_timer(unsigned long data);
  35. static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
  36. {
  37. ak4117->write(ak4117->private_data, reg, val);
  38. if (reg < sizeof(ak4117->regmap))
  39. ak4117->regmap[reg] = val;
  40. }
  41. static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
  42. {
  43. return ak4117->read(ak4117->private_data, reg);
  44. }
  45. #if 0
  46. static void reg_dump(struct ak4117 *ak4117)
  47. {
  48. int i;
  49. printk(KERN_DEBUG "AK4117 REG DUMP:\n");
  50. for (i = 0; i < 0x1b; i++)
  51. printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
  52. }
  53. #endif
  54. static void snd_ak4117_free(struct ak4117 *chip)
  55. {
  56. del_timer(&chip->timer);
  57. kfree(chip);
  58. }
  59. static int snd_ak4117_dev_free(struct snd_device *device)
  60. {
  61. struct ak4117 *chip = device->device_data;
  62. snd_ak4117_free(chip);
  63. return 0;
  64. }
  65. int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
  66. const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
  67. {
  68. struct ak4117 *chip;
  69. int err = 0;
  70. unsigned char reg;
  71. static struct snd_device_ops ops = {
  72. .dev_free = snd_ak4117_dev_free,
  73. };
  74. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  75. if (chip == NULL)
  76. return -ENOMEM;
  77. spin_lock_init(&chip->lock);
  78. chip->card = card;
  79. chip->read = read;
  80. chip->write = write;
  81. chip->private_data = private_data;
  82. init_timer(&chip->timer);
  83. chip->timer.data = (unsigned long)chip;
  84. chip->timer.function = snd_ak4117_timer;
  85. for (reg = 0; reg < 5; reg++)
  86. chip->regmap[reg] = pgm[reg];
  87. snd_ak4117_reinit(chip);
  88. chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
  89. chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
  90. chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
  91. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
  92. goto __fail;
  93. if (r_ak4117)
  94. *r_ak4117 = chip;
  95. return 0;
  96. __fail:
  97. snd_ak4117_free(chip);
  98. return err < 0 ? err : -EIO;
  99. }
  100. void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
  101. {
  102. if (reg >= 5)
  103. return;
  104. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  105. }
  106. void snd_ak4117_reinit(struct ak4117 *chip)
  107. {
  108. unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
  109. del_timer(&chip->timer);
  110. chip->init = 1;
  111. /* bring the chip to reset state and powerdown state */
  112. reg_write(chip, AK4117_REG_PWRDN, 0);
  113. udelay(200);
  114. /* release reset, but leave powerdown */
  115. reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
  116. udelay(200);
  117. for (reg = 1; reg < 5; reg++)
  118. reg_write(chip, reg, chip->regmap[reg]);
  119. /* release powerdown, everything is initialized now */
  120. reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
  121. chip->init = 0;
  122. chip->timer.expires = 1 + jiffies;
  123. add_timer(&chip->timer);
  124. }
  125. static unsigned int external_rate(unsigned char rcs1)
  126. {
  127. switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
  128. case AK4117_FS_32000HZ: return 32000;
  129. case AK4117_FS_44100HZ: return 44100;
  130. case AK4117_FS_48000HZ: return 48000;
  131. case AK4117_FS_88200HZ: return 88200;
  132. case AK4117_FS_96000HZ: return 96000;
  133. case AK4117_FS_176400HZ: return 176400;
  134. case AK4117_FS_192000HZ: return 192000;
  135. default: return 0;
  136. }
  137. }
  138. static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
  139. struct snd_ctl_elem_info *uinfo)
  140. {
  141. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  142. uinfo->count = 1;
  143. uinfo->value.integer.min = 0;
  144. uinfo->value.integer.max = LONG_MAX;
  145. return 0;
  146. }
  147. static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
  148. struct snd_ctl_elem_value *ucontrol)
  149. {
  150. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  151. long *ptr;
  152. spin_lock_irq(&chip->lock);
  153. ptr = (long *)(((char *)chip) + kcontrol->private_value);
  154. ucontrol->value.integer.value[0] = *ptr;
  155. *ptr = 0;
  156. spin_unlock_irq(&chip->lock);
  157. return 0;
  158. }
  159. #define snd_ak4117_in_bit_info snd_ctl_boolean_mono_info
  160. static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
  161. struct snd_ctl_elem_value *ucontrol)
  162. {
  163. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  164. unsigned char reg = kcontrol->private_value & 0xff;
  165. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  166. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  167. ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  168. return 0;
  169. }
  170. static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
  171. struct snd_ctl_elem_info *uinfo)
  172. {
  173. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  174. uinfo->count = 1;
  175. uinfo->value.integer.min = 0;
  176. uinfo->value.integer.max = 1;
  177. return 0;
  178. }
  179. static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
  180. struct snd_ctl_elem_value *ucontrol)
  181. {
  182. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  183. ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
  184. return 0;
  185. }
  186. static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
  187. struct snd_ctl_elem_value *ucontrol)
  188. {
  189. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  190. int change;
  191. u8 old_val;
  192. spin_lock_irq(&chip->lock);
  193. old_val = chip->regmap[AK4117_REG_IO];
  194. change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
  195. if (change)
  196. reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
  197. spin_unlock_irq(&chip->lock);
  198. return change;
  199. }
  200. static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
  201. struct snd_ctl_elem_info *uinfo)
  202. {
  203. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  204. uinfo->count = 1;
  205. uinfo->value.integer.min = 0;
  206. uinfo->value.integer.max = 192000;
  207. return 0;
  208. }
  209. static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
  210. struct snd_ctl_elem_value *ucontrol)
  211. {
  212. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  213. ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
  214. return 0;
  215. }
  216. static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  217. {
  218. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  219. uinfo->count = 1;
  220. return 0;
  221. }
  222. static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
  223. struct snd_ctl_elem_value *ucontrol)
  224. {
  225. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  226. unsigned i;
  227. for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
  228. ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
  229. return 0;
  230. }
  231. static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  232. {
  233. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  234. uinfo->count = 1;
  235. return 0;
  236. }
  237. static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
  238. struct snd_ctl_elem_value *ucontrol)
  239. {
  240. memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
  241. return 0;
  242. }
  243. static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  244. {
  245. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  246. uinfo->value.integer.min = 0;
  247. uinfo->value.integer.max = 0xffff;
  248. uinfo->count = 4;
  249. return 0;
  250. }
  251. static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
  252. struct snd_ctl_elem_value *ucontrol)
  253. {
  254. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  255. unsigned short tmp;
  256. ucontrol->value.integer.value[0] = 0xf8f2;
  257. ucontrol->value.integer.value[1] = 0x4e1f;
  258. tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
  259. ucontrol->value.integer.value[2] = tmp;
  260. tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
  261. ucontrol->value.integer.value[3] = tmp;
  262. return 0;
  263. }
  264. static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  265. {
  266. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  267. uinfo->count = AK4117_REG_QSUB_SIZE;
  268. return 0;
  269. }
  270. static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
  271. struct snd_ctl_elem_value *ucontrol)
  272. {
  273. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  274. unsigned i;
  275. for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
  276. ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
  277. return 0;
  278. }
  279. /* Don't forget to change AK4117_CONTROLS define!!! */
  280. static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
  281. {
  282. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  283. .name = "IEC958 Parity Errors",
  284. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  285. .info = snd_ak4117_in_error_info,
  286. .get = snd_ak4117_in_error_get,
  287. .private_value = offsetof(struct ak4117, parity_errors),
  288. },
  289. {
  290. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  291. .name = "IEC958 V-Bit Errors",
  292. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  293. .info = snd_ak4117_in_error_info,
  294. .get = snd_ak4117_in_error_get,
  295. .private_value = offsetof(struct ak4117, v_bit_errors),
  296. },
  297. {
  298. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  299. .name = "IEC958 C-CRC Errors",
  300. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  301. .info = snd_ak4117_in_error_info,
  302. .get = snd_ak4117_in_error_get,
  303. .private_value = offsetof(struct ak4117, ccrc_errors),
  304. },
  305. {
  306. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  307. .name = "IEC958 Q-CRC Errors",
  308. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  309. .info = snd_ak4117_in_error_info,
  310. .get = snd_ak4117_in_error_get,
  311. .private_value = offsetof(struct ak4117, qcrc_errors),
  312. },
  313. {
  314. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  315. .name = "IEC958 External Rate",
  316. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  317. .info = snd_ak4117_rate_info,
  318. .get = snd_ak4117_rate_get,
  319. },
  320. {
  321. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  322. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  323. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  324. .info = snd_ak4117_spdif_mask_info,
  325. .get = snd_ak4117_spdif_mask_get,
  326. },
  327. {
  328. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  329. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  330. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  331. .info = snd_ak4117_spdif_info,
  332. .get = snd_ak4117_spdif_get,
  333. },
  334. {
  335. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  336. .name = "IEC958 Preample Capture Default",
  337. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  338. .info = snd_ak4117_spdif_pinfo,
  339. .get = snd_ak4117_spdif_pget,
  340. },
  341. {
  342. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  343. .name = "IEC958 Q-subcode Capture Default",
  344. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  345. .info = snd_ak4117_spdif_qinfo,
  346. .get = snd_ak4117_spdif_qget,
  347. },
  348. {
  349. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  350. .name = "IEC958 Audio",
  351. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  352. .info = snd_ak4117_in_bit_info,
  353. .get = snd_ak4117_in_bit_get,
  354. .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
  355. },
  356. {
  357. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  358. .name = "IEC958 Non-PCM Bitstream",
  359. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  360. .info = snd_ak4117_in_bit_info,
  361. .get = snd_ak4117_in_bit_get,
  362. .private_value = (5<<8) | AK4117_REG_RCS1,
  363. },
  364. {
  365. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  366. .name = "IEC958 DTS Bitstream",
  367. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  368. .info = snd_ak4117_in_bit_info,
  369. .get = snd_ak4117_in_bit_get,
  370. .private_value = (6<<8) | AK4117_REG_RCS1,
  371. },
  372. {
  373. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  374. .name = "AK4117 Input Select",
  375. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
  376. .info = snd_ak4117_rx_info,
  377. .get = snd_ak4117_rx_get,
  378. .put = snd_ak4117_rx_put,
  379. }
  380. };
  381. int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
  382. {
  383. struct snd_kcontrol *kctl;
  384. unsigned int idx;
  385. int err;
  386. if (snd_BUG_ON(!cap_substream))
  387. return -EINVAL;
  388. ak4117->substream = cap_substream;
  389. for (idx = 0; idx < AK4117_CONTROLS; idx++) {
  390. kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
  391. if (kctl == NULL)
  392. return -ENOMEM;
  393. kctl->id.device = cap_substream->pcm->device;
  394. kctl->id.subdevice = cap_substream->number;
  395. err = snd_ctl_add(ak4117->card, kctl);
  396. if (err < 0)
  397. return err;
  398. ak4117->kctls[idx] = kctl;
  399. }
  400. return 0;
  401. }
  402. int snd_ak4117_external_rate(struct ak4117 *ak4117)
  403. {
  404. unsigned char rcs1;
  405. rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
  406. return external_rate(rcs1);
  407. }
  408. int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
  409. {
  410. struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
  411. unsigned long _flags;
  412. int res = 0;
  413. unsigned char rcs0, rcs1, rcs2;
  414. unsigned char c0, c1;
  415. rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
  416. if (flags & AK4117_CHECK_NO_STAT)
  417. goto __rate;
  418. rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
  419. rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
  420. // printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
  421. spin_lock_irqsave(&ak4117->lock, _flags);
  422. if (rcs0 & AK4117_PAR)
  423. ak4117->parity_errors++;
  424. if (rcs0 & AK4117_V)
  425. ak4117->v_bit_errors++;
  426. if (rcs2 & AK4117_CCRC)
  427. ak4117->ccrc_errors++;
  428. if (rcs2 & AK4117_QCRC)
  429. ak4117->qcrc_errors++;
  430. c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
  431. (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
  432. c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
  433. (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
  434. ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
  435. ak4117->rcs1 = rcs1;
  436. ak4117->rcs2 = rcs2;
  437. spin_unlock_irqrestore(&ak4117->lock, _flags);
  438. if (rcs0 & AK4117_PAR)
  439. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
  440. if (rcs0 & AK4117_V)
  441. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
  442. if (rcs2 & AK4117_CCRC)
  443. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
  444. if (rcs2 & AK4117_QCRC)
  445. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
  446. /* rate change */
  447. if (c1 & 0x0f)
  448. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
  449. if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
  450. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
  451. if (c0 & AK4117_QINT)
  452. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
  453. if (c0 & AK4117_AUDION)
  454. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
  455. if (c1 & AK4117_NPCM)
  456. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
  457. if (c1 & AK4117_DTSCD)
  458. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
  459. if (ak4117->change_callback && (c0 | c1) != 0)
  460. ak4117->change_callback(ak4117, c0, c1);
  461. __rate:
  462. /* compare rate */
  463. res = external_rate(rcs1);
  464. if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
  465. snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
  466. if (snd_pcm_running(ak4117->substream)) {
  467. // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
  468. snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
  469. wake_up(&runtime->sleep);
  470. res = 1;
  471. }
  472. snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
  473. }
  474. return res;
  475. }
  476. static void snd_ak4117_timer(unsigned long data)
  477. {
  478. struct ak4117 *chip = (struct ak4117 *)data;
  479. if (chip->init)
  480. return;
  481. snd_ak4117_check_rate_and_errors(chip, 0);
  482. chip->timer.expires = 1 + jiffies;
  483. add_timer(&chip->timer);
  484. }
  485. EXPORT_SYMBOL(snd_ak4117_create);
  486. EXPORT_SYMBOL(snd_ak4117_reg_write);
  487. EXPORT_SYMBOL(snd_ak4117_reinit);
  488. EXPORT_SYMBOL(snd_ak4117_build);
  489. EXPORT_SYMBOL(snd_ak4117_external_rate);
  490. EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);