ak4114.c 19 KB

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  1. /*
  2. * Routines for control of the AK4114 via I2C and 4-wire serial interface
  3. * IEC958 (S/PDIF) receiver by Asahi Kasei
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/delay.h>
  24. #include <linux/module.h>
  25. #include <sound/core.h>
  26. #include <sound/control.h>
  27. #include <sound/pcm.h>
  28. #include <sound/ak4114.h>
  29. #include <sound/asoundef.h>
  30. #include <sound/info.h>
  31. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  32. MODULE_DESCRIPTION("AK4114 IEC958 (S/PDIF) receiver by Asahi Kasei");
  33. MODULE_LICENSE("GPL");
  34. #define AK4114_ADDR 0x00 /* fixed address */
  35. static void ak4114_stats(struct work_struct *work);
  36. static void ak4114_init_regs(struct ak4114 *chip);
  37. static void reg_write(struct ak4114 *ak4114, unsigned char reg, unsigned char val)
  38. {
  39. ak4114->write(ak4114->private_data, reg, val);
  40. if (reg <= AK4114_REG_INT1_MASK)
  41. ak4114->regmap[reg] = val;
  42. else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
  43. ak4114->txcsb[reg-AK4114_REG_TXCSB0] = val;
  44. }
  45. static inline unsigned char reg_read(struct ak4114 *ak4114, unsigned char reg)
  46. {
  47. return ak4114->read(ak4114->private_data, reg);
  48. }
  49. #if 0
  50. static void reg_dump(struct ak4114 *ak4114)
  51. {
  52. int i;
  53. printk(KERN_DEBUG "AK4114 REG DUMP:\n");
  54. for (i = 0; i < 0x20; i++)
  55. printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4114, i), i < sizeof(ak4114->regmap) ? ak4114->regmap[i] : 0);
  56. }
  57. #endif
  58. static void snd_ak4114_free(struct ak4114 *chip)
  59. {
  60. atomic_inc(&chip->wq_processing); /* don't schedule new work */
  61. cancel_delayed_work_sync(&chip->work);
  62. kfree(chip);
  63. }
  64. static int snd_ak4114_dev_free(struct snd_device *device)
  65. {
  66. struct ak4114 *chip = device->device_data;
  67. snd_ak4114_free(chip);
  68. return 0;
  69. }
  70. int snd_ak4114_create(struct snd_card *card,
  71. ak4114_read_t *read, ak4114_write_t *write,
  72. const unsigned char pgm[7], const unsigned char txcsb[5],
  73. void *private_data, struct ak4114 **r_ak4114)
  74. {
  75. struct ak4114 *chip;
  76. int err = 0;
  77. unsigned char reg;
  78. static struct snd_device_ops ops = {
  79. .dev_free = snd_ak4114_dev_free,
  80. };
  81. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  82. if (chip == NULL)
  83. return -ENOMEM;
  84. spin_lock_init(&chip->lock);
  85. chip->card = card;
  86. chip->read = read;
  87. chip->write = write;
  88. chip->private_data = private_data;
  89. INIT_DELAYED_WORK(&chip->work, ak4114_stats);
  90. atomic_set(&chip->wq_processing, 0);
  91. for (reg = 0; reg < 7; reg++)
  92. chip->regmap[reg] = pgm[reg];
  93. for (reg = 0; reg < 5; reg++)
  94. chip->txcsb[reg] = txcsb[reg];
  95. ak4114_init_regs(chip);
  96. chip->rcs0 = reg_read(chip, AK4114_REG_RCS0) & ~(AK4114_QINT | AK4114_CINT);
  97. chip->rcs1 = reg_read(chip, AK4114_REG_RCS1);
  98. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  99. goto __fail;
  100. if (r_ak4114)
  101. *r_ak4114 = chip;
  102. return 0;
  103. __fail:
  104. snd_ak4114_free(chip);
  105. return err < 0 ? err : -EIO;
  106. }
  107. void snd_ak4114_reg_write(struct ak4114 *chip, unsigned char reg, unsigned char mask, unsigned char val)
  108. {
  109. if (reg <= AK4114_REG_INT1_MASK)
  110. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  111. else if (reg >= AK4114_REG_TXCSB0 && reg <= AK4114_REG_TXCSB4)
  112. reg_write(chip, reg,
  113. (chip->txcsb[reg-AK4114_REG_TXCSB0] & ~mask) | val);
  114. }
  115. static void ak4114_init_regs(struct ak4114 *chip)
  116. {
  117. unsigned char old = chip->regmap[AK4114_REG_PWRDN], reg;
  118. /* bring the chip to reset state and powerdown state */
  119. reg_write(chip, AK4114_REG_PWRDN, old & ~(AK4114_RST|AK4114_PWN));
  120. udelay(200);
  121. /* release reset, but leave powerdown */
  122. reg_write(chip, AK4114_REG_PWRDN, (old | AK4114_RST) & ~AK4114_PWN);
  123. udelay(200);
  124. for (reg = 1; reg < 7; reg++)
  125. reg_write(chip, reg, chip->regmap[reg]);
  126. for (reg = 0; reg < 5; reg++)
  127. reg_write(chip, reg + AK4114_REG_TXCSB0, chip->txcsb[reg]);
  128. /* release powerdown, everything is initialized now */
  129. reg_write(chip, AK4114_REG_PWRDN, old | AK4114_RST | AK4114_PWN);
  130. }
  131. void snd_ak4114_reinit(struct ak4114 *chip)
  132. {
  133. if (atomic_inc_return(&chip->wq_processing) == 1)
  134. cancel_delayed_work_sync(&chip->work);
  135. ak4114_init_regs(chip);
  136. /* bring up statistics / event queing */
  137. if (atomic_dec_and_test(&chip->wq_processing))
  138. schedule_delayed_work(&chip->work, HZ / 10);
  139. }
  140. static unsigned int external_rate(unsigned char rcs1)
  141. {
  142. switch (rcs1 & (AK4114_FS0|AK4114_FS1|AK4114_FS2|AK4114_FS3)) {
  143. case AK4114_FS_32000HZ: return 32000;
  144. case AK4114_FS_44100HZ: return 44100;
  145. case AK4114_FS_48000HZ: return 48000;
  146. case AK4114_FS_88200HZ: return 88200;
  147. case AK4114_FS_96000HZ: return 96000;
  148. case AK4114_FS_176400HZ: return 176400;
  149. case AK4114_FS_192000HZ: return 192000;
  150. default: return 0;
  151. }
  152. }
  153. static int snd_ak4114_in_error_info(struct snd_kcontrol *kcontrol,
  154. struct snd_ctl_elem_info *uinfo)
  155. {
  156. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  157. uinfo->count = 1;
  158. uinfo->value.integer.min = 0;
  159. uinfo->value.integer.max = LONG_MAX;
  160. return 0;
  161. }
  162. static int snd_ak4114_in_error_get(struct snd_kcontrol *kcontrol,
  163. struct snd_ctl_elem_value *ucontrol)
  164. {
  165. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  166. long *ptr;
  167. spin_lock_irq(&chip->lock);
  168. ptr = (long *)(((char *)chip) + kcontrol->private_value);
  169. ucontrol->value.integer.value[0] = *ptr;
  170. *ptr = 0;
  171. spin_unlock_irq(&chip->lock);
  172. return 0;
  173. }
  174. #define snd_ak4114_in_bit_info snd_ctl_boolean_mono_info
  175. static int snd_ak4114_in_bit_get(struct snd_kcontrol *kcontrol,
  176. struct snd_ctl_elem_value *ucontrol)
  177. {
  178. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  179. unsigned char reg = kcontrol->private_value & 0xff;
  180. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  181. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  182. ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  183. return 0;
  184. }
  185. static int snd_ak4114_rate_info(struct snd_kcontrol *kcontrol,
  186. struct snd_ctl_elem_info *uinfo)
  187. {
  188. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  189. uinfo->count = 1;
  190. uinfo->value.integer.min = 0;
  191. uinfo->value.integer.max = 192000;
  192. return 0;
  193. }
  194. static int snd_ak4114_rate_get(struct snd_kcontrol *kcontrol,
  195. struct snd_ctl_elem_value *ucontrol)
  196. {
  197. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  198. ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4114_REG_RCS1));
  199. return 0;
  200. }
  201. static int snd_ak4114_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  202. {
  203. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  204. uinfo->count = 1;
  205. return 0;
  206. }
  207. static int snd_ak4114_spdif_get(struct snd_kcontrol *kcontrol,
  208. struct snd_ctl_elem_value *ucontrol)
  209. {
  210. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  211. unsigned i;
  212. for (i = 0; i < AK4114_REG_RXCSB_SIZE; i++)
  213. ucontrol->value.iec958.status[i] = reg_read(chip, AK4114_REG_RXCSB0 + i);
  214. return 0;
  215. }
  216. static int snd_ak4114_spdif_playback_get(struct snd_kcontrol *kcontrol,
  217. struct snd_ctl_elem_value *ucontrol)
  218. {
  219. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  220. unsigned i;
  221. for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
  222. ucontrol->value.iec958.status[i] = chip->txcsb[i];
  223. return 0;
  224. }
  225. static int snd_ak4114_spdif_playback_put(struct snd_kcontrol *kcontrol,
  226. struct snd_ctl_elem_value *ucontrol)
  227. {
  228. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  229. unsigned i;
  230. for (i = 0; i < AK4114_REG_TXCSB_SIZE; i++)
  231. reg_write(chip, AK4114_REG_TXCSB0 + i, ucontrol->value.iec958.status[i]);
  232. return 0;
  233. }
  234. static int snd_ak4114_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  235. {
  236. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  237. uinfo->count = 1;
  238. return 0;
  239. }
  240. static int snd_ak4114_spdif_mask_get(struct snd_kcontrol *kcontrol,
  241. struct snd_ctl_elem_value *ucontrol)
  242. {
  243. memset(ucontrol->value.iec958.status, 0xff, AK4114_REG_RXCSB_SIZE);
  244. return 0;
  245. }
  246. static int snd_ak4114_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  247. {
  248. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  249. uinfo->value.integer.min = 0;
  250. uinfo->value.integer.max = 0xffff;
  251. uinfo->count = 4;
  252. return 0;
  253. }
  254. static int snd_ak4114_spdif_pget(struct snd_kcontrol *kcontrol,
  255. struct snd_ctl_elem_value *ucontrol)
  256. {
  257. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  258. unsigned short tmp;
  259. ucontrol->value.integer.value[0] = 0xf8f2;
  260. ucontrol->value.integer.value[1] = 0x4e1f;
  261. tmp = reg_read(chip, AK4114_REG_Pc0) | (reg_read(chip, AK4114_REG_Pc1) << 8);
  262. ucontrol->value.integer.value[2] = tmp;
  263. tmp = reg_read(chip, AK4114_REG_Pd0) | (reg_read(chip, AK4114_REG_Pd1) << 8);
  264. ucontrol->value.integer.value[3] = tmp;
  265. return 0;
  266. }
  267. static int snd_ak4114_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  268. {
  269. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  270. uinfo->count = AK4114_REG_QSUB_SIZE;
  271. return 0;
  272. }
  273. static int snd_ak4114_spdif_qget(struct snd_kcontrol *kcontrol,
  274. struct snd_ctl_elem_value *ucontrol)
  275. {
  276. struct ak4114 *chip = snd_kcontrol_chip(kcontrol);
  277. unsigned i;
  278. for (i = 0; i < AK4114_REG_QSUB_SIZE; i++)
  279. ucontrol->value.bytes.data[i] = reg_read(chip, AK4114_REG_QSUB_ADDR + i);
  280. return 0;
  281. }
  282. /* Don't forget to change AK4114_CONTROLS define!!! */
  283. static struct snd_kcontrol_new snd_ak4114_iec958_controls[] = {
  284. {
  285. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  286. .name = "IEC958 Parity Errors",
  287. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  288. .info = snd_ak4114_in_error_info,
  289. .get = snd_ak4114_in_error_get,
  290. .private_value = offsetof(struct ak4114, parity_errors),
  291. },
  292. {
  293. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  294. .name = "IEC958 V-Bit Errors",
  295. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  296. .info = snd_ak4114_in_error_info,
  297. .get = snd_ak4114_in_error_get,
  298. .private_value = offsetof(struct ak4114, v_bit_errors),
  299. },
  300. {
  301. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  302. .name = "IEC958 C-CRC Errors",
  303. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  304. .info = snd_ak4114_in_error_info,
  305. .get = snd_ak4114_in_error_get,
  306. .private_value = offsetof(struct ak4114, ccrc_errors),
  307. },
  308. {
  309. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  310. .name = "IEC958 Q-CRC Errors",
  311. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  312. .info = snd_ak4114_in_error_info,
  313. .get = snd_ak4114_in_error_get,
  314. .private_value = offsetof(struct ak4114, qcrc_errors),
  315. },
  316. {
  317. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  318. .name = "IEC958 External Rate",
  319. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  320. .info = snd_ak4114_rate_info,
  321. .get = snd_ak4114_rate_get,
  322. },
  323. {
  324. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  325. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  326. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  327. .info = snd_ak4114_spdif_mask_info,
  328. .get = snd_ak4114_spdif_mask_get,
  329. },
  330. {
  331. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  332. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  333. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  334. .info = snd_ak4114_spdif_info,
  335. .get = snd_ak4114_spdif_playback_get,
  336. .put = snd_ak4114_spdif_playback_put,
  337. },
  338. {
  339. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  340. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  341. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  342. .info = snd_ak4114_spdif_mask_info,
  343. .get = snd_ak4114_spdif_mask_get,
  344. },
  345. {
  346. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  347. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  348. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  349. .info = snd_ak4114_spdif_info,
  350. .get = snd_ak4114_spdif_get,
  351. },
  352. {
  353. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  354. .name = "IEC958 Preample Capture Default",
  355. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  356. .info = snd_ak4114_spdif_pinfo,
  357. .get = snd_ak4114_spdif_pget,
  358. },
  359. {
  360. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  361. .name = "IEC958 Q-subcode Capture Default",
  362. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  363. .info = snd_ak4114_spdif_qinfo,
  364. .get = snd_ak4114_spdif_qget,
  365. },
  366. {
  367. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  368. .name = "IEC958 Audio",
  369. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  370. .info = snd_ak4114_in_bit_info,
  371. .get = snd_ak4114_in_bit_get,
  372. .private_value = (1<<31) | (1<<8) | AK4114_REG_RCS0,
  373. },
  374. {
  375. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  376. .name = "IEC958 Non-PCM Bitstream",
  377. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  378. .info = snd_ak4114_in_bit_info,
  379. .get = snd_ak4114_in_bit_get,
  380. .private_value = (6<<8) | AK4114_REG_RCS0,
  381. },
  382. {
  383. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  384. .name = "IEC958 DTS Bitstream",
  385. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  386. .info = snd_ak4114_in_bit_info,
  387. .get = snd_ak4114_in_bit_get,
  388. .private_value = (3<<8) | AK4114_REG_RCS0,
  389. },
  390. {
  391. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  392. .name = "IEC958 PPL Lock Status",
  393. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  394. .info = snd_ak4114_in_bit_info,
  395. .get = snd_ak4114_in_bit_get,
  396. .private_value = (1<<31) | (4<<8) | AK4114_REG_RCS0,
  397. }
  398. };
  399. static void snd_ak4114_proc_regs_read(struct snd_info_entry *entry,
  400. struct snd_info_buffer *buffer)
  401. {
  402. struct ak4114 *ak4114 = entry->private_data;
  403. int reg, val;
  404. /* all ak4114 registers 0x00 - 0x1f */
  405. for (reg = 0; reg < 0x20; reg++) {
  406. val = reg_read(ak4114, reg);
  407. snd_iprintf(buffer, "0x%02x = 0x%02x\n", reg, val);
  408. }
  409. }
  410. static void snd_ak4114_proc_init(struct ak4114 *ak4114)
  411. {
  412. struct snd_info_entry *entry;
  413. if (!snd_card_proc_new(ak4114->card, "ak4114", &entry))
  414. snd_info_set_text_ops(entry, ak4114, snd_ak4114_proc_regs_read);
  415. }
  416. int snd_ak4114_build(struct ak4114 *ak4114,
  417. struct snd_pcm_substream *ply_substream,
  418. struct snd_pcm_substream *cap_substream)
  419. {
  420. struct snd_kcontrol *kctl;
  421. unsigned int idx;
  422. int err;
  423. if (snd_BUG_ON(!cap_substream))
  424. return -EINVAL;
  425. ak4114->playback_substream = ply_substream;
  426. ak4114->capture_substream = cap_substream;
  427. for (idx = 0; idx < AK4114_CONTROLS; idx++) {
  428. kctl = snd_ctl_new1(&snd_ak4114_iec958_controls[idx], ak4114);
  429. if (kctl == NULL)
  430. return -ENOMEM;
  431. if (strstr(kctl->id.name, "Playback")) {
  432. if (ply_substream == NULL) {
  433. snd_ctl_free_one(kctl);
  434. ak4114->kctls[idx] = NULL;
  435. continue;
  436. }
  437. kctl->id.device = ply_substream->pcm->device;
  438. kctl->id.subdevice = ply_substream->number;
  439. } else {
  440. kctl->id.device = cap_substream->pcm->device;
  441. kctl->id.subdevice = cap_substream->number;
  442. }
  443. err = snd_ctl_add(ak4114->card, kctl);
  444. if (err < 0)
  445. return err;
  446. ak4114->kctls[idx] = kctl;
  447. }
  448. snd_ak4114_proc_init(ak4114);
  449. /* trigger workq */
  450. schedule_delayed_work(&ak4114->work, HZ / 10);
  451. return 0;
  452. }
  453. /* notify kcontrols if any parameters are changed */
  454. static void ak4114_notify(struct ak4114 *ak4114,
  455. unsigned char rcs0, unsigned char rcs1,
  456. unsigned char c0, unsigned char c1)
  457. {
  458. if (!ak4114->kctls[0])
  459. return;
  460. if (rcs0 & AK4114_PAR)
  461. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  462. &ak4114->kctls[0]->id);
  463. if (rcs0 & AK4114_V)
  464. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  465. &ak4114->kctls[1]->id);
  466. if (rcs1 & AK4114_CCRC)
  467. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  468. &ak4114->kctls[2]->id);
  469. if (rcs1 & AK4114_QCRC)
  470. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  471. &ak4114->kctls[3]->id);
  472. /* rate change */
  473. if (c1 & 0xf0)
  474. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  475. &ak4114->kctls[4]->id);
  476. if ((c0 & AK4114_PEM) | (c0 & AK4114_CINT))
  477. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  478. &ak4114->kctls[9]->id);
  479. if (c0 & AK4114_QINT)
  480. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  481. &ak4114->kctls[10]->id);
  482. if (c0 & AK4114_AUDION)
  483. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  484. &ak4114->kctls[11]->id);
  485. if (c0 & AK4114_AUTO)
  486. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  487. &ak4114->kctls[12]->id);
  488. if (c0 & AK4114_DTSCD)
  489. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  490. &ak4114->kctls[13]->id);
  491. if (c0 & AK4114_UNLCK)
  492. snd_ctl_notify(ak4114->card, SNDRV_CTL_EVENT_MASK_VALUE,
  493. &ak4114->kctls[14]->id);
  494. }
  495. int snd_ak4114_external_rate(struct ak4114 *ak4114)
  496. {
  497. unsigned char rcs1;
  498. rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
  499. return external_rate(rcs1);
  500. }
  501. int snd_ak4114_check_rate_and_errors(struct ak4114 *ak4114, unsigned int flags)
  502. {
  503. struct snd_pcm_runtime *runtime = ak4114->capture_substream ? ak4114->capture_substream->runtime : NULL;
  504. unsigned long _flags;
  505. int res = 0;
  506. unsigned char rcs0, rcs1;
  507. unsigned char c0, c1;
  508. rcs1 = reg_read(ak4114, AK4114_REG_RCS1);
  509. if (flags & AK4114_CHECK_NO_STAT)
  510. goto __rate;
  511. rcs0 = reg_read(ak4114, AK4114_REG_RCS0);
  512. spin_lock_irqsave(&ak4114->lock, _flags);
  513. if (rcs0 & AK4114_PAR)
  514. ak4114->parity_errors++;
  515. if (rcs1 & AK4114_V)
  516. ak4114->v_bit_errors++;
  517. if (rcs1 & AK4114_CCRC)
  518. ak4114->ccrc_errors++;
  519. if (rcs1 & AK4114_QCRC)
  520. ak4114->qcrc_errors++;
  521. c0 = (ak4114->rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK)) ^
  522. (rcs0 & (AK4114_QINT | AK4114_CINT | AK4114_PEM | AK4114_AUDION | AK4114_AUTO | AK4114_UNLCK));
  523. c1 = (ak4114->rcs1 & 0xf0) ^ (rcs1 & 0xf0);
  524. ak4114->rcs0 = rcs0 & ~(AK4114_QINT | AK4114_CINT);
  525. ak4114->rcs1 = rcs1;
  526. spin_unlock_irqrestore(&ak4114->lock, _flags);
  527. ak4114_notify(ak4114, rcs0, rcs1, c0, c1);
  528. if (ak4114->change_callback && (c0 | c1) != 0)
  529. ak4114->change_callback(ak4114, c0, c1);
  530. __rate:
  531. /* compare rate */
  532. res = external_rate(rcs1);
  533. if (!(flags & AK4114_CHECK_NO_RATE) && runtime && runtime->rate != res) {
  534. snd_pcm_stream_lock_irqsave(ak4114->capture_substream, _flags);
  535. if (snd_pcm_running(ak4114->capture_substream)) {
  536. // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
  537. snd_pcm_stop(ak4114->capture_substream, SNDRV_PCM_STATE_DRAINING);
  538. res = 1;
  539. }
  540. snd_pcm_stream_unlock_irqrestore(ak4114->capture_substream, _flags);
  541. }
  542. return res;
  543. }
  544. static void ak4114_stats(struct work_struct *work)
  545. {
  546. struct ak4114 *chip = container_of(work, struct ak4114, work.work);
  547. if (atomic_inc_return(&chip->wq_processing) == 1)
  548. snd_ak4114_check_rate_and_errors(chip, chip->check_flags);
  549. if (atomic_dec_and_test(&chip->wq_processing))
  550. schedule_delayed_work(&chip->work, HZ / 10);
  551. }
  552. EXPORT_SYMBOL(snd_ak4114_create);
  553. EXPORT_SYMBOL(snd_ak4114_reg_write);
  554. EXPORT_SYMBOL(snd_ak4114_reinit);
  555. EXPORT_SYMBOL(snd_ak4114_build);
  556. EXPORT_SYMBOL(snd_ak4114_external_rate);
  557. EXPORT_SYMBOL(snd_ak4114_check_rate_and_errors);