qdio_setup.c 14 KB

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  1. /*
  2. * driver/s390/cio/qdio_setup.c
  3. *
  4. * qdio queue initialization
  5. *
  6. * Copyright (C) IBM Corp. 2008
  7. * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <linux/export.h>
  12. #include <asm/qdio.h>
  13. #include "cio.h"
  14. #include "css.h"
  15. #include "device.h"
  16. #include "ioasm.h"
  17. #include "chsc.h"
  18. #include "qdio.h"
  19. #include "qdio_debug.h"
  20. static struct kmem_cache *qdio_q_cache;
  21. static struct kmem_cache *qdio_aob_cache;
  22. struct qaob *qdio_allocate_aob(void)
  23. {
  24. return kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
  25. }
  26. EXPORT_SYMBOL_GPL(qdio_allocate_aob);
  27. void qdio_release_aob(struct qaob *aob)
  28. {
  29. kmem_cache_free(qdio_aob_cache, aob);
  30. }
  31. EXPORT_SYMBOL_GPL(qdio_release_aob);
  32. /*
  33. * qebsm is only available under 64bit but the adapter sets the feature
  34. * flag anyway, so we manually override it.
  35. */
  36. static inline int qebsm_possible(void)
  37. {
  38. #ifdef CONFIG_64BIT
  39. return css_general_characteristics.qebsm;
  40. #endif
  41. return 0;
  42. }
  43. /*
  44. * qib_param_field: pointer to 128 bytes or NULL, if no param field
  45. * nr_input_qs: pointer to nr_queues*128 words of data or NULL
  46. */
  47. static void set_impl_params(struct qdio_irq *irq_ptr,
  48. unsigned int qib_param_field_format,
  49. unsigned char *qib_param_field,
  50. unsigned long *input_slib_elements,
  51. unsigned long *output_slib_elements)
  52. {
  53. struct qdio_q *q;
  54. int i, j;
  55. if (!irq_ptr)
  56. return;
  57. irq_ptr->qib.pfmt = qib_param_field_format;
  58. if (qib_param_field)
  59. memcpy(irq_ptr->qib.parm, qib_param_field,
  60. QDIO_MAX_BUFFERS_PER_Q);
  61. if (!input_slib_elements)
  62. goto output;
  63. for_each_input_queue(irq_ptr, q, i) {
  64. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  65. q->slib->slibe[j].parms =
  66. input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
  67. }
  68. output:
  69. if (!output_slib_elements)
  70. return;
  71. for_each_output_queue(irq_ptr, q, i) {
  72. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  73. q->slib->slibe[j].parms =
  74. output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
  75. }
  76. }
  77. static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
  78. {
  79. struct qdio_q *q;
  80. int i;
  81. for (i = 0; i < nr_queues; i++) {
  82. q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
  83. if (!q)
  84. return -ENOMEM;
  85. q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
  86. if (!q->slib) {
  87. kmem_cache_free(qdio_q_cache, q);
  88. return -ENOMEM;
  89. }
  90. irq_ptr_qs[i] = q;
  91. }
  92. return 0;
  93. }
  94. int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
  95. {
  96. int rc;
  97. rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
  98. if (rc)
  99. return rc;
  100. rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
  101. return rc;
  102. }
  103. static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
  104. qdio_handler_t *handler, int i)
  105. {
  106. struct slib *slib = q->slib;
  107. /* queue must be cleared for qdio_establish */
  108. memset(q, 0, sizeof(*q));
  109. memset(slib, 0, PAGE_SIZE);
  110. q->slib = slib;
  111. q->irq_ptr = irq_ptr;
  112. q->mask = 1 << (31 - i);
  113. q->nr = i;
  114. q->handler = handler;
  115. }
  116. static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
  117. void **sbals_array, int i)
  118. {
  119. struct qdio_q *prev;
  120. int j;
  121. DBF_HEX(&q, sizeof(void *));
  122. q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);
  123. /* fill in sbal */
  124. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
  125. q->sbal[j] = *sbals_array++;
  126. BUG_ON((unsigned long)q->sbal[j] & 0xff);
  127. }
  128. /* fill in slib */
  129. if (i > 0) {
  130. prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
  131. : irq_ptr->output_qs[i - 1];
  132. prev->slib->nsliba = (unsigned long)q->slib;
  133. }
  134. q->slib->sla = (unsigned long)q->sl;
  135. q->slib->slsba = (unsigned long)&q->slsb.val[0];
  136. /* fill in sl */
  137. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  138. q->sl->element[j].sbal = (unsigned long)q->sbal[j];
  139. }
  140. static void setup_queues(struct qdio_irq *irq_ptr,
  141. struct qdio_initialize *qdio_init)
  142. {
  143. struct qdio_q *q;
  144. void **input_sbal_array = qdio_init->input_sbal_addr_array;
  145. void **output_sbal_array = qdio_init->output_sbal_addr_array;
  146. struct qdio_outbuf_state *output_sbal_state_array =
  147. qdio_init->output_sbal_state_array;
  148. int i;
  149. for_each_input_queue(irq_ptr, q, i) {
  150. DBF_EVENT("inq:%1d", i);
  151. setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
  152. q->is_input_q = 1;
  153. q->u.in.queue_start_poll = qdio_init->queue_start_poll_array ?
  154. qdio_init->queue_start_poll_array[i] : NULL;
  155. setup_storage_lists(q, irq_ptr, input_sbal_array, i);
  156. input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
  157. if (is_thinint_irq(irq_ptr)) {
  158. tasklet_init(&q->tasklet, tiqdio_inbound_processing,
  159. (unsigned long) q);
  160. } else {
  161. tasklet_init(&q->tasklet, qdio_inbound_processing,
  162. (unsigned long) q);
  163. }
  164. }
  165. for_each_output_queue(irq_ptr, q, i) {
  166. DBF_EVENT("outq:%1d", i);
  167. setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
  168. q->u.out.sbal_state = output_sbal_state_array;
  169. output_sbal_state_array += QDIO_MAX_BUFFERS_PER_Q;
  170. q->is_input_q = 0;
  171. q->u.out.scan_threshold = qdio_init->scan_threshold;
  172. setup_storage_lists(q, irq_ptr, output_sbal_array, i);
  173. output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
  174. tasklet_init(&q->tasklet, qdio_outbound_processing,
  175. (unsigned long) q);
  176. setup_timer(&q->u.out.timer, (void(*)(unsigned long))
  177. &qdio_outbound_timer, (unsigned long)q);
  178. }
  179. }
  180. static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
  181. {
  182. if (qdioac & AC1_SIGA_INPUT_NEEDED)
  183. irq_ptr->siga_flag.input = 1;
  184. if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
  185. irq_ptr->siga_flag.output = 1;
  186. if (qdioac & AC1_SIGA_SYNC_NEEDED)
  187. irq_ptr->siga_flag.sync = 1;
  188. if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_THININT))
  189. irq_ptr->siga_flag.sync_after_ai = 1;
  190. if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI))
  191. irq_ptr->siga_flag.sync_out_after_pci = 1;
  192. }
  193. static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
  194. unsigned char qdioac, unsigned long token)
  195. {
  196. if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
  197. goto no_qebsm;
  198. if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
  199. (!(qdioac & AC1_SC_QEBSM_ENABLED)))
  200. goto no_qebsm;
  201. irq_ptr->sch_token = token;
  202. DBF_EVENT("V=V:1");
  203. DBF_EVENT("%8lx", irq_ptr->sch_token);
  204. return;
  205. no_qebsm:
  206. irq_ptr->sch_token = 0;
  207. irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
  208. DBF_EVENT("noV=V");
  209. }
  210. /*
  211. * If there is a qdio_irq we use the chsc_page and store the information
  212. * in the qdio_irq, otherwise we copy it to the specified structure.
  213. */
  214. int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
  215. struct subchannel_id *schid,
  216. struct qdio_ssqd_desc *data)
  217. {
  218. struct chsc_ssqd_area *ssqd;
  219. int rc;
  220. DBF_EVENT("getssqd:%4x", schid->sch_no);
  221. if (irq_ptr != NULL)
  222. ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
  223. else
  224. ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
  225. memset(ssqd, 0, PAGE_SIZE);
  226. ssqd->request = (struct chsc_header) {
  227. .length = 0x0010,
  228. .code = 0x0024,
  229. };
  230. ssqd->first_sch = schid->sch_no;
  231. ssqd->last_sch = schid->sch_no;
  232. ssqd->ssid = schid->ssid;
  233. if (chsc(ssqd))
  234. return -EIO;
  235. rc = chsc_error_from_response(ssqd->response.code);
  236. if (rc)
  237. return rc;
  238. if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
  239. !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
  240. (ssqd->qdio_ssqd.sch != schid->sch_no))
  241. return -EINVAL;
  242. if (irq_ptr != NULL)
  243. memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
  244. sizeof(struct qdio_ssqd_desc));
  245. else {
  246. memcpy(data, &ssqd->qdio_ssqd,
  247. sizeof(struct qdio_ssqd_desc));
  248. free_page((unsigned long)ssqd);
  249. }
  250. return 0;
  251. }
  252. void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
  253. {
  254. unsigned char qdioac;
  255. int rc;
  256. rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
  257. if (rc) {
  258. DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
  259. DBF_ERROR("rc:%x", rc);
  260. /* all flags set, worst case */
  261. qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
  262. AC1_SIGA_SYNC_NEEDED;
  263. } else
  264. qdioac = irq_ptr->ssqd_desc.qdioac1;
  265. check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
  266. process_ac_flags(irq_ptr, qdioac);
  267. DBF_EVENT("ac 1:%2x 2:%4x", qdioac, irq_ptr->ssqd_desc.qdioac2);
  268. DBF_EVENT("3:%4x qib:%4x", irq_ptr->ssqd_desc.qdioac3, irq_ptr->qib.ac);
  269. }
  270. void qdio_release_memory(struct qdio_irq *irq_ptr)
  271. {
  272. struct qdio_q *q;
  273. int i;
  274. /*
  275. * Must check queue array manually since irq_ptr->nr_input_queues /
  276. * irq_ptr->nr_input_queues may not yet be set.
  277. */
  278. for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
  279. q = irq_ptr->input_qs[i];
  280. if (q) {
  281. free_page((unsigned long) q->slib);
  282. kmem_cache_free(qdio_q_cache, q);
  283. }
  284. }
  285. for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
  286. q = irq_ptr->output_qs[i];
  287. if (q) {
  288. if (q->u.out.use_cq) {
  289. int n;
  290. for (n = 0; n < QDIO_MAX_BUFFERS_PER_Q; ++n) {
  291. struct qaob *aob = q->u.out.aobs[n];
  292. if (aob) {
  293. qdio_release_aob(aob);
  294. q->u.out.aobs[n] = NULL;
  295. }
  296. }
  297. qdio_disable_async_operation(&q->u.out);
  298. }
  299. free_page((unsigned long) q->slib);
  300. kmem_cache_free(qdio_q_cache, q);
  301. }
  302. }
  303. free_page((unsigned long) irq_ptr->qdr);
  304. free_page(irq_ptr->chsc_page);
  305. free_page((unsigned long) irq_ptr);
  306. }
  307. static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
  308. struct qdio_q **irq_ptr_qs,
  309. int i, int nr)
  310. {
  311. irq_ptr->qdr->qdf0[i + nr].sliba =
  312. (unsigned long)irq_ptr_qs[i]->slib;
  313. irq_ptr->qdr->qdf0[i + nr].sla =
  314. (unsigned long)irq_ptr_qs[i]->sl;
  315. irq_ptr->qdr->qdf0[i + nr].slsba =
  316. (unsigned long)&irq_ptr_qs[i]->slsb.val[0];
  317. irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4;
  318. irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4;
  319. irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4;
  320. irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4;
  321. }
  322. static void setup_qdr(struct qdio_irq *irq_ptr,
  323. struct qdio_initialize *qdio_init)
  324. {
  325. int i;
  326. irq_ptr->qdr->qfmt = qdio_init->q_format;
  327. irq_ptr->qdr->ac = qdio_init->qdr_ac;
  328. irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
  329. irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
  330. irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
  331. irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
  332. irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
  333. irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;
  334. for (i = 0; i < qdio_init->no_input_qs; i++)
  335. __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);
  336. for (i = 0; i < qdio_init->no_output_qs; i++)
  337. __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
  338. qdio_init->no_input_qs);
  339. }
  340. static void setup_qib(struct qdio_irq *irq_ptr,
  341. struct qdio_initialize *init_data)
  342. {
  343. if (qebsm_possible())
  344. irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
  345. irq_ptr->qib.rflags |= init_data->qib_rflags;
  346. irq_ptr->qib.qfmt = init_data->q_format;
  347. if (init_data->no_input_qs)
  348. irq_ptr->qib.isliba =
  349. (unsigned long)(irq_ptr->input_qs[0]->slib);
  350. if (init_data->no_output_qs)
  351. irq_ptr->qib.osliba =
  352. (unsigned long)(irq_ptr->output_qs[0]->slib);
  353. memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
  354. }
  355. int qdio_setup_irq(struct qdio_initialize *init_data)
  356. {
  357. struct ciw *ciw;
  358. struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
  359. int rc;
  360. memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
  361. memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag));
  362. memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
  363. memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
  364. memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));
  365. irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL;
  366. irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0;
  367. /* wipes qib.ac, required by ar7063 */
  368. memset(irq_ptr->qdr, 0, sizeof(struct qdr));
  369. irq_ptr->int_parm = init_data->int_parm;
  370. irq_ptr->nr_input_qs = init_data->no_input_qs;
  371. irq_ptr->nr_output_qs = init_data->no_output_qs;
  372. irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
  373. irq_ptr->cdev = init_data->cdev;
  374. setup_queues(irq_ptr, init_data);
  375. setup_qib(irq_ptr, init_data);
  376. qdio_setup_thinint(irq_ptr);
  377. set_impl_params(irq_ptr, init_data->qib_param_field_format,
  378. init_data->qib_param_field,
  379. init_data->input_slib_elements,
  380. init_data->output_slib_elements);
  381. /* fill input and output descriptors */
  382. setup_qdr(irq_ptr, init_data);
  383. /* qdr, qib, sls, slsbs, slibs, sbales are filled now */
  384. /* get qdio commands */
  385. ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
  386. if (!ciw) {
  387. DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
  388. rc = -EINVAL;
  389. goto out_err;
  390. }
  391. irq_ptr->equeue = *ciw;
  392. ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
  393. if (!ciw) {
  394. DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
  395. rc = -EINVAL;
  396. goto out_err;
  397. }
  398. irq_ptr->aqueue = *ciw;
  399. /* set new interrupt handler */
  400. irq_ptr->orig_handler = init_data->cdev->handler;
  401. init_data->cdev->handler = qdio_int_handler;
  402. return 0;
  403. out_err:
  404. qdio_release_memory(irq_ptr);
  405. return rc;
  406. }
  407. void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
  408. struct ccw_device *cdev)
  409. {
  410. char s[80];
  411. snprintf(s, 80, "qdio: %s %s on SC %x using "
  412. "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s\n",
  413. dev_name(&cdev->dev),
  414. (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
  415. ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
  416. irq_ptr->schid.sch_no,
  417. is_thinint_irq(irq_ptr),
  418. (irq_ptr->sch_token) ? 1 : 0,
  419. (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
  420. css_general_characteristics.aif_tdd,
  421. (irq_ptr->siga_flag.input) ? "R" : " ",
  422. (irq_ptr->siga_flag.output) ? "W" : " ",
  423. (irq_ptr->siga_flag.sync) ? "S" : " ",
  424. (irq_ptr->siga_flag.sync_after_ai) ? "A" : " ",
  425. (irq_ptr->siga_flag.sync_out_after_pci) ? "P" : " ");
  426. printk(KERN_INFO "%s", s);
  427. }
  428. int qdio_enable_async_operation(struct qdio_output_q *outq)
  429. {
  430. outq->aobs = kzalloc(sizeof(struct qaob *) * QDIO_MAX_BUFFERS_PER_Q,
  431. GFP_ATOMIC);
  432. if (!outq->aobs) {
  433. outq->use_cq = 0;
  434. return -ENOMEM;
  435. }
  436. outq->use_cq = 1;
  437. return 0;
  438. }
  439. void qdio_disable_async_operation(struct qdio_output_q *q)
  440. {
  441. kfree(q->aobs);
  442. q->aobs = NULL;
  443. q->use_cq = 0;
  444. }
  445. int __init qdio_setup_init(void)
  446. {
  447. int rc;
  448. qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
  449. 256, 0, NULL);
  450. if (!qdio_q_cache)
  451. return -ENOMEM;
  452. qdio_aob_cache = kmem_cache_create("qdio_aob",
  453. sizeof(struct qaob),
  454. sizeof(struct qaob),
  455. 0,
  456. NULL);
  457. if (!qdio_aob_cache) {
  458. rc = -ENOMEM;
  459. goto free_qdio_q_cache;
  460. }
  461. /* Check for OSA/FCP thin interrupts (bit 67). */
  462. DBF_EVENT("thinint:%1d",
  463. (css_general_characteristics.aif_osa) ? 1 : 0);
  464. /* Check for QEBSM support in general (bit 58). */
  465. DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
  466. rc = 0;
  467. out:
  468. return rc;
  469. free_qdio_q_cache:
  470. kmem_cache_destroy(qdio_q_cache);
  471. goto out;
  472. }
  473. void qdio_setup_exit(void)
  474. {
  475. kmem_cache_destroy(qdio_aob_cache);
  476. kmem_cache_destroy(qdio_q_cache);
  477. }