qdio_main.c 45 KB

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  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <linux/gfp.h>
  17. #include <linux/io.h>
  18. #include <linux/atomic.h>
  19. #include <asm/debug.h>
  20. #include <asm/qdio.h>
  21. #include <asm/ipl.h>
  22. #include "cio.h"
  23. #include "css.h"
  24. #include "device.h"
  25. #include "qdio.h"
  26. #include "qdio_debug.h"
  27. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  28. "Jan Glauber <jang@linux.vnet.ibm.com>");
  29. MODULE_DESCRIPTION("QDIO base support");
  30. MODULE_LICENSE("GPL");
  31. static inline int do_siga_sync(unsigned long schid,
  32. unsigned int out_mask, unsigned int in_mask,
  33. unsigned int fc)
  34. {
  35. register unsigned long __fc asm ("0") = fc;
  36. register unsigned long __schid asm ("1") = schid;
  37. register unsigned long out asm ("2") = out_mask;
  38. register unsigned long in asm ("3") = in_mask;
  39. int cc;
  40. asm volatile(
  41. " siga 0\n"
  42. " ipm %0\n"
  43. " srl %0,28\n"
  44. : "=d" (cc)
  45. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  46. return cc;
  47. }
  48. static inline int do_siga_input(unsigned long schid, unsigned int mask,
  49. unsigned int fc)
  50. {
  51. register unsigned long __fc asm ("0") = fc;
  52. register unsigned long __schid asm ("1") = schid;
  53. register unsigned long __mask asm ("2") = mask;
  54. int cc;
  55. asm volatile(
  56. " siga 0\n"
  57. " ipm %0\n"
  58. " srl %0,28\n"
  59. : "=d" (cc)
  60. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  61. return cc;
  62. }
  63. /**
  64. * do_siga_output - perform SIGA-w/wt function
  65. * @schid: subchannel id or in case of QEBSM the subchannel token
  66. * @mask: which output queues to process
  67. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  68. * @fc: function code to perform
  69. *
  70. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  71. * Note: For IQDC unicast queues only the highest priority queue is processed.
  72. */
  73. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  74. unsigned int *bb, unsigned int fc,
  75. unsigned long aob)
  76. {
  77. register unsigned long __fc asm("0") = fc;
  78. register unsigned long __schid asm("1") = schid;
  79. register unsigned long __mask asm("2") = mask;
  80. register unsigned long __aob asm("3") = aob;
  81. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  82. asm volatile(
  83. " siga 0\n"
  84. "0: ipm %0\n"
  85. " srl %0,28\n"
  86. "1:\n"
  87. EX_TABLE(0b, 1b)
  88. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask),
  89. "+d" (__aob)
  90. : : "cc", "memory");
  91. *bb = ((unsigned int) __fc) >> 31;
  92. return cc;
  93. }
  94. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  95. {
  96. /* all done or next buffer state different */
  97. if (ccq == 0 || ccq == 32)
  98. return 0;
  99. /* no buffer processed */
  100. if (ccq == 97)
  101. return 1;
  102. /* not all buffers processed */
  103. if (ccq == 96)
  104. return 2;
  105. /* notify devices immediately */
  106. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  107. return -EIO;
  108. }
  109. /**
  110. * qdio_do_eqbs - extract buffer states for QEBSM
  111. * @q: queue to manipulate
  112. * @state: state of the extracted buffers
  113. * @start: buffer number to start at
  114. * @count: count of buffers to examine
  115. * @auto_ack: automatically acknowledge buffers
  116. *
  117. * Returns the number of successfully extracted equal buffer states.
  118. * Stops processing if a state is different from the last buffers state.
  119. */
  120. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  121. int start, int count, int auto_ack)
  122. {
  123. int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
  124. unsigned int ccq = 0;
  125. BUG_ON(!q->irq_ptr->sch_token);
  126. qperf_inc(q, eqbs);
  127. if (!q->is_input_q)
  128. nr += q->irq_ptr->nr_input_qs;
  129. again:
  130. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  131. auto_ack);
  132. rc = qdio_check_ccq(q, ccq);
  133. if (!rc)
  134. return count - tmp_count;
  135. if (rc == 1) {
  136. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  137. goto again;
  138. }
  139. if (rc == 2) {
  140. BUG_ON(tmp_count == count);
  141. qperf_inc(q, eqbs_partial);
  142. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
  143. tmp_count);
  144. /*
  145. * Retry once, if that fails bail out and process the
  146. * extracted buffers before trying again.
  147. */
  148. if (!retried++)
  149. goto again;
  150. else
  151. return count - tmp_count;
  152. }
  153. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  154. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  155. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  156. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  157. return 0;
  158. }
  159. /**
  160. * qdio_do_sqbs - set buffer states for QEBSM
  161. * @q: queue to manipulate
  162. * @state: new state of the buffers
  163. * @start: first buffer number to change
  164. * @count: how many buffers to change
  165. *
  166. * Returns the number of successfully changed buffers.
  167. * Does retrying until the specified count of buffer states is set or an
  168. * error occurs.
  169. */
  170. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  171. int count)
  172. {
  173. unsigned int ccq = 0;
  174. int tmp_count = count, tmp_start = start;
  175. int nr = q->nr;
  176. int rc;
  177. if (!count)
  178. return 0;
  179. BUG_ON(!q->irq_ptr->sch_token);
  180. qperf_inc(q, sqbs);
  181. if (!q->is_input_q)
  182. nr += q->irq_ptr->nr_input_qs;
  183. again:
  184. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  185. rc = qdio_check_ccq(q, ccq);
  186. if (!rc) {
  187. WARN_ON(tmp_count);
  188. return count - tmp_count;
  189. }
  190. if (rc == 1 || rc == 2) {
  191. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  192. qperf_inc(q, sqbs_partial);
  193. goto again;
  194. }
  195. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  196. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  197. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  198. q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
  199. return 0;
  200. }
  201. /* returns number of examined buffers and their common state in *state */
  202. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  203. unsigned char *state, unsigned int count,
  204. int auto_ack, int merge_pending)
  205. {
  206. unsigned char __state = 0;
  207. int i;
  208. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  209. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  210. if (is_qebsm(q))
  211. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  212. for (i = 0; i < count; i++) {
  213. if (!__state) {
  214. __state = q->slsb.val[bufnr];
  215. if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
  216. __state = SLSB_P_OUTPUT_EMPTY;
  217. } else if (merge_pending) {
  218. if ((q->slsb.val[bufnr] & __state) != __state)
  219. break;
  220. } else if (q->slsb.val[bufnr] != __state)
  221. break;
  222. bufnr = next_buf(bufnr);
  223. }
  224. *state = __state;
  225. return i;
  226. }
  227. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  228. unsigned char *state, int auto_ack)
  229. {
  230. return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
  231. }
  232. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  233. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  234. unsigned char state, int count)
  235. {
  236. int i;
  237. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  238. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  239. if (is_qebsm(q))
  240. return qdio_do_sqbs(q, state, bufnr, count);
  241. for (i = 0; i < count; i++) {
  242. xchg(&q->slsb.val[bufnr], state);
  243. bufnr = next_buf(bufnr);
  244. }
  245. return count;
  246. }
  247. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  248. unsigned char state)
  249. {
  250. return set_buf_states(q, bufnr, state, 1);
  251. }
  252. /* set slsb states to initial state */
  253. static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  254. {
  255. struct qdio_q *q;
  256. int i;
  257. for_each_input_queue(irq_ptr, q, i)
  258. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  259. QDIO_MAX_BUFFERS_PER_Q);
  260. for_each_output_queue(irq_ptr, q, i)
  261. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  262. QDIO_MAX_BUFFERS_PER_Q);
  263. }
  264. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  265. unsigned int input)
  266. {
  267. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  268. unsigned int fc = QDIO_SIGA_SYNC;
  269. int cc;
  270. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  271. qperf_inc(q, siga_sync);
  272. if (is_qebsm(q)) {
  273. schid = q->irq_ptr->sch_token;
  274. fc |= QDIO_SIGA_QEBSM_FLAG;
  275. }
  276. cc = do_siga_sync(schid, output, input, fc);
  277. if (unlikely(cc))
  278. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  279. return cc;
  280. }
  281. static inline int qdio_siga_sync_q(struct qdio_q *q)
  282. {
  283. if (q->is_input_q)
  284. return qdio_siga_sync(q, 0, q->mask);
  285. else
  286. return qdio_siga_sync(q, q->mask, 0);
  287. }
  288. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
  289. unsigned long aob)
  290. {
  291. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  292. unsigned int fc = QDIO_SIGA_WRITE;
  293. u64 start_time = 0;
  294. int retries = 0, cc;
  295. unsigned long laob = 0;
  296. if (q->u.out.use_cq && aob != 0) {
  297. fc = QDIO_SIGA_WRITEQ;
  298. laob = aob;
  299. }
  300. if (is_qebsm(q)) {
  301. schid = q->irq_ptr->sch_token;
  302. fc |= QDIO_SIGA_QEBSM_FLAG;
  303. }
  304. again:
  305. WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) ||
  306. (aob && fc != QDIO_SIGA_WRITEQ));
  307. cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
  308. /* hipersocket busy condition */
  309. if (unlikely(*busy_bit)) {
  310. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  311. retries++;
  312. if (!start_time) {
  313. start_time = get_clock();
  314. goto again;
  315. }
  316. if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  317. goto again;
  318. }
  319. if (retries) {
  320. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
  321. "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
  322. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
  323. }
  324. return cc;
  325. }
  326. static inline int qdio_siga_input(struct qdio_q *q)
  327. {
  328. unsigned long schid = *((u32 *) &q->irq_ptr->schid);
  329. unsigned int fc = QDIO_SIGA_READ;
  330. int cc;
  331. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  332. qperf_inc(q, siga_read);
  333. if (is_qebsm(q)) {
  334. schid = q->irq_ptr->sch_token;
  335. fc |= QDIO_SIGA_QEBSM_FLAG;
  336. }
  337. cc = do_siga_input(schid, q->mask, fc);
  338. if (unlikely(cc))
  339. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  340. return cc;
  341. }
  342. #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
  343. #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
  344. static inline void qdio_sync_queues(struct qdio_q *q)
  345. {
  346. /* PCI capable outbound queues will also be scanned so sync them too */
  347. if (pci_out_supported(q))
  348. qdio_siga_sync_all(q);
  349. else
  350. qdio_siga_sync_q(q);
  351. }
  352. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  353. unsigned char *state)
  354. {
  355. if (need_siga_sync(q))
  356. qdio_siga_sync_q(q);
  357. return get_buf_states(q, bufnr, state, 1, 0, 0);
  358. }
  359. static inline void qdio_stop_polling(struct qdio_q *q)
  360. {
  361. if (!q->u.in.polling)
  362. return;
  363. q->u.in.polling = 0;
  364. qperf_inc(q, stop_polling);
  365. /* show the card that we are not polling anymore */
  366. if (is_qebsm(q)) {
  367. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  368. q->u.in.ack_count);
  369. q->u.in.ack_count = 0;
  370. } else
  371. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  372. }
  373. static inline void account_sbals(struct qdio_q *q, int count)
  374. {
  375. int pos = 0;
  376. q->q_stats.nr_sbal_total += count;
  377. if (count == QDIO_MAX_BUFFERS_MASK) {
  378. q->q_stats.nr_sbals[7]++;
  379. return;
  380. }
  381. while (count >>= 1)
  382. pos++;
  383. q->q_stats.nr_sbals[pos]++;
  384. }
  385. static void process_buffer_error(struct qdio_q *q, int count)
  386. {
  387. unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
  388. SLSB_P_OUTPUT_NOT_INIT;
  389. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  390. /* special handling for no target buffer empty */
  391. if ((!q->is_input_q &&
  392. (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
  393. qperf_inc(q, target_full);
  394. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
  395. q->first_to_check);
  396. goto set;
  397. }
  398. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  399. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  400. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  401. DBF_ERROR("F14:%2x F15:%2x",
  402. q->sbal[q->first_to_check]->element[14].sflags,
  403. q->sbal[q->first_to_check]->element[15].sflags);
  404. set:
  405. /*
  406. * Interrupts may be avoided as long as the error is present
  407. * so change the buffer state immediately to avoid starvation.
  408. */
  409. set_buf_states(q, q->first_to_check, state, count);
  410. }
  411. static inline void inbound_primed(struct qdio_q *q, int count)
  412. {
  413. int new;
  414. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count);
  415. /* for QEBSM the ACK was already set by EQBS */
  416. if (is_qebsm(q)) {
  417. if (!q->u.in.polling) {
  418. q->u.in.polling = 1;
  419. q->u.in.ack_count = count;
  420. q->u.in.ack_start = q->first_to_check;
  421. return;
  422. }
  423. /* delete the previous ACK's */
  424. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  425. q->u.in.ack_count);
  426. q->u.in.ack_count = count;
  427. q->u.in.ack_start = q->first_to_check;
  428. return;
  429. }
  430. /*
  431. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  432. * or by the next inbound run.
  433. */
  434. new = add_buf(q->first_to_check, count - 1);
  435. if (q->u.in.polling) {
  436. /* reset the previous ACK but first set the new one */
  437. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  438. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  439. } else {
  440. q->u.in.polling = 1;
  441. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  442. }
  443. q->u.in.ack_start = new;
  444. count--;
  445. if (!count)
  446. return;
  447. /* need to change ALL buffers to get more interrupts */
  448. set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
  449. }
  450. static int get_inbound_buffer_frontier(struct qdio_q *q)
  451. {
  452. int count, stop;
  453. unsigned char state = 0;
  454. q->timestamp = get_clock_fast();
  455. /*
  456. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  457. * would return 0.
  458. */
  459. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  460. stop = add_buf(q->first_to_check, count);
  461. if (q->first_to_check == stop)
  462. goto out;
  463. /*
  464. * No siga sync here, as a PCI or we after a thin interrupt
  465. * already sync'ed the queues.
  466. */
  467. count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
  468. if (!count)
  469. goto out;
  470. switch (state) {
  471. case SLSB_P_INPUT_PRIMED:
  472. inbound_primed(q, count);
  473. q->first_to_check = add_buf(q->first_to_check, count);
  474. if (atomic_sub(count, &q->nr_buf_used) == 0)
  475. qperf_inc(q, inbound_queue_full);
  476. if (q->irq_ptr->perf_stat_enabled)
  477. account_sbals(q, count);
  478. break;
  479. case SLSB_P_INPUT_ERROR:
  480. process_buffer_error(q, count);
  481. q->first_to_check = add_buf(q->first_to_check, count);
  482. atomic_sub(count, &q->nr_buf_used);
  483. if (q->irq_ptr->perf_stat_enabled)
  484. account_sbals_error(q, count);
  485. break;
  486. case SLSB_CU_INPUT_EMPTY:
  487. case SLSB_P_INPUT_NOT_INIT:
  488. case SLSB_P_INPUT_ACK:
  489. if (q->irq_ptr->perf_stat_enabled)
  490. q->q_stats.nr_sbal_nop++;
  491. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  492. break;
  493. default:
  494. BUG();
  495. }
  496. out:
  497. return q->first_to_check;
  498. }
  499. static int qdio_inbound_q_moved(struct qdio_q *q)
  500. {
  501. int bufnr;
  502. bufnr = get_inbound_buffer_frontier(q);
  503. if ((bufnr != q->last_move) || q->qdio_error) {
  504. q->last_move = bufnr;
  505. if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
  506. q->u.in.timestamp = get_clock();
  507. return 1;
  508. } else
  509. return 0;
  510. }
  511. static inline int qdio_inbound_q_done(struct qdio_q *q)
  512. {
  513. unsigned char state = 0;
  514. if (!atomic_read(&q->nr_buf_used))
  515. return 1;
  516. if (need_siga_sync(q))
  517. qdio_siga_sync_q(q);
  518. get_buf_state(q, q->first_to_check, &state, 0);
  519. if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
  520. /* more work coming */
  521. return 0;
  522. if (is_thinint_irq(q->irq_ptr))
  523. return 1;
  524. /* don't poll under z/VM */
  525. if (MACHINE_IS_VM)
  526. return 1;
  527. /*
  528. * At this point we know, that inbound first_to_check
  529. * has (probably) not moved (see qdio_inbound_processing).
  530. */
  531. if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  532. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
  533. q->first_to_check);
  534. return 1;
  535. } else
  536. return 0;
  537. }
  538. static inline int contains_aobs(struct qdio_q *q)
  539. {
  540. return !q->is_input_q && q->u.out.use_cq;
  541. }
  542. static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q,
  543. int i, struct qaob *aob)
  544. {
  545. int tmp;
  546. DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i,
  547. (unsigned long) virt_to_phys(aob));
  548. DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx",
  549. (unsigned long) aob->res0[0]);
  550. DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx",
  551. (unsigned long) aob->res0[1]);
  552. DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx",
  553. (unsigned long) aob->res0[2]);
  554. DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx",
  555. (unsigned long) aob->res0[3]);
  556. DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx",
  557. (unsigned long) aob->res0[4]);
  558. DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx",
  559. (unsigned long) aob->res0[5]);
  560. DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1);
  561. DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2);
  562. DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3);
  563. DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc);
  564. DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags);
  565. DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs);
  566. DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count);
  567. for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) {
  568. DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp,
  569. (unsigned long) aob->sba[tmp]);
  570. DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp,
  571. (unsigned long) q->sbal[i]->element[tmp].addr);
  572. DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]);
  573. DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp,
  574. q->sbal[i]->element[tmp].length);
  575. }
  576. DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0);
  577. for (tmp = 0; tmp < 2; ++tmp) {
  578. DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp,
  579. (unsigned long) aob->res4[tmp]);
  580. }
  581. DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1);
  582. DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2);
  583. }
  584. static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
  585. {
  586. unsigned char state = 0;
  587. int j, b = start;
  588. if (!contains_aobs(q))
  589. return;
  590. for (j = 0; j < count; ++j) {
  591. get_buf_state(q, b, &state, 0);
  592. if (state == SLSB_P_OUTPUT_PENDING) {
  593. struct qaob *aob = q->u.out.aobs[b];
  594. if (aob == NULL)
  595. continue;
  596. BUG_ON(q->u.out.sbal_state == NULL);
  597. q->u.out.sbal_state[b].flags |=
  598. QDIO_OUTBUF_STATE_FLAG_PENDING;
  599. q->u.out.aobs[b] = NULL;
  600. } else if (state == SLSB_P_OUTPUT_EMPTY) {
  601. BUG_ON(q->u.out.sbal_state == NULL);
  602. q->u.out.sbal_state[b].aob = NULL;
  603. }
  604. b = next_buf(b);
  605. }
  606. }
  607. static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
  608. int bufnr)
  609. {
  610. unsigned long phys_aob = 0;
  611. if (!q->use_cq)
  612. goto out;
  613. if (!q->aobs[bufnr]) {
  614. struct qaob *aob = qdio_allocate_aob();
  615. q->aobs[bufnr] = aob;
  616. }
  617. if (q->aobs[bufnr]) {
  618. BUG_ON(q->sbal_state == NULL);
  619. q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
  620. q->sbal_state[bufnr].aob = q->aobs[bufnr];
  621. q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
  622. phys_aob = virt_to_phys(q->aobs[bufnr]);
  623. BUG_ON(phys_aob & 0xFF);
  624. }
  625. out:
  626. return phys_aob;
  627. }
  628. static void qdio_kick_handler(struct qdio_q *q)
  629. {
  630. int start = q->first_to_kick;
  631. int end = q->first_to_check;
  632. int count;
  633. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  634. return;
  635. count = sub_buf(end, start);
  636. if (q->is_input_q) {
  637. qperf_inc(q, inbound_handler);
  638. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
  639. } else {
  640. qperf_inc(q, outbound_handler);
  641. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
  642. start, count);
  643. }
  644. qdio_handle_aobs(q, start, count);
  645. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  646. q->irq_ptr->int_parm);
  647. /* for the next time */
  648. q->first_to_kick = end;
  649. q->qdio_error = 0;
  650. }
  651. static void __qdio_inbound_processing(struct qdio_q *q)
  652. {
  653. qperf_inc(q, tasklet_inbound);
  654. if (!qdio_inbound_q_moved(q))
  655. return;
  656. qdio_kick_handler(q);
  657. if (!qdio_inbound_q_done(q)) {
  658. /* means poll time is not yet over */
  659. qperf_inc(q, tasklet_inbound_resched);
  660. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  661. tasklet_schedule(&q->tasklet);
  662. return;
  663. }
  664. }
  665. qdio_stop_polling(q);
  666. /*
  667. * We need to check again to not lose initiative after
  668. * resetting the ACK state.
  669. */
  670. if (!qdio_inbound_q_done(q)) {
  671. qperf_inc(q, tasklet_inbound_resched2);
  672. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  673. tasklet_schedule(&q->tasklet);
  674. }
  675. }
  676. void qdio_inbound_processing(unsigned long data)
  677. {
  678. struct qdio_q *q = (struct qdio_q *)data;
  679. __qdio_inbound_processing(q);
  680. }
  681. static int get_outbound_buffer_frontier(struct qdio_q *q)
  682. {
  683. int count, stop;
  684. unsigned char state = 0;
  685. q->timestamp = get_clock_fast();
  686. if (need_siga_sync(q))
  687. if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
  688. !pci_out_supported(q)) ||
  689. (queue_type(q) == QDIO_IQDIO_QFMT &&
  690. multicast_outbound(q)))
  691. qdio_siga_sync_q(q);
  692. /*
  693. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  694. * would return 0.
  695. */
  696. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  697. stop = add_buf(q->first_to_check, count);
  698. if (q->first_to_check == stop)
  699. goto out;
  700. count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
  701. if (!count)
  702. goto out;
  703. switch (state) {
  704. case SLSB_P_OUTPUT_PENDING:
  705. BUG();
  706. case SLSB_P_OUTPUT_EMPTY:
  707. /* the adapter got it */
  708. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
  709. "out empty:%1d %02x", q->nr, count);
  710. atomic_sub(count, &q->nr_buf_used);
  711. q->first_to_check = add_buf(q->first_to_check, count);
  712. if (q->irq_ptr->perf_stat_enabled)
  713. account_sbals(q, count);
  714. break;
  715. case SLSB_P_OUTPUT_ERROR:
  716. process_buffer_error(q, count);
  717. q->first_to_check = add_buf(q->first_to_check, count);
  718. atomic_sub(count, &q->nr_buf_used);
  719. if (q->irq_ptr->perf_stat_enabled)
  720. account_sbals_error(q, count);
  721. break;
  722. case SLSB_CU_OUTPUT_PRIMED:
  723. /* the adapter has not fetched the output yet */
  724. if (q->irq_ptr->perf_stat_enabled)
  725. q->q_stats.nr_sbal_nop++;
  726. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
  727. q->nr);
  728. break;
  729. case SLSB_P_OUTPUT_NOT_INIT:
  730. case SLSB_P_OUTPUT_HALTED:
  731. break;
  732. default:
  733. BUG();
  734. }
  735. out:
  736. return q->first_to_check;
  737. }
  738. /* all buffers processed? */
  739. static inline int qdio_outbound_q_done(struct qdio_q *q)
  740. {
  741. return atomic_read(&q->nr_buf_used) == 0;
  742. }
  743. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  744. {
  745. int bufnr;
  746. bufnr = get_outbound_buffer_frontier(q);
  747. if ((bufnr != q->last_move) || q->qdio_error) {
  748. q->last_move = bufnr;
  749. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  750. return 1;
  751. } else
  752. return 0;
  753. }
  754. static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
  755. {
  756. int retries = 0, cc;
  757. unsigned int busy_bit;
  758. if (!need_siga_out(q))
  759. return 0;
  760. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  761. retry:
  762. qperf_inc(q, siga_write);
  763. cc = qdio_siga_output(q, &busy_bit, aob);
  764. switch (cc) {
  765. case 0:
  766. break;
  767. case 2:
  768. if (busy_bit) {
  769. while (++retries < QDIO_BUSY_BIT_RETRIES) {
  770. mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
  771. goto retry;
  772. }
  773. DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
  774. cc |= QDIO_ERROR_SIGA_BUSY;
  775. } else
  776. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  777. break;
  778. case 1:
  779. case 3:
  780. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  781. break;
  782. }
  783. if (retries) {
  784. DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
  785. DBF_ERROR("count:%u", retries);
  786. }
  787. return cc;
  788. }
  789. static void __qdio_outbound_processing(struct qdio_q *q)
  790. {
  791. qperf_inc(q, tasklet_outbound);
  792. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  793. if (qdio_outbound_q_moved(q))
  794. qdio_kick_handler(q);
  795. if (queue_type(q) == QDIO_ZFCP_QFMT)
  796. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  797. goto sched;
  798. if (q->u.out.pci_out_enabled)
  799. return;
  800. /*
  801. * Now we know that queue type is either qeth without pci enabled
  802. * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
  803. * is noticed and outbound_handler is called after some time.
  804. */
  805. if (qdio_outbound_q_done(q))
  806. del_timer(&q->u.out.timer);
  807. else
  808. if (!timer_pending(&q->u.out.timer))
  809. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  810. return;
  811. sched:
  812. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  813. return;
  814. tasklet_schedule(&q->tasklet);
  815. }
  816. /* outbound tasklet */
  817. void qdio_outbound_processing(unsigned long data)
  818. {
  819. struct qdio_q *q = (struct qdio_q *)data;
  820. __qdio_outbound_processing(q);
  821. }
  822. void qdio_outbound_timer(unsigned long data)
  823. {
  824. struct qdio_q *q = (struct qdio_q *)data;
  825. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  826. return;
  827. tasklet_schedule(&q->tasklet);
  828. }
  829. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  830. {
  831. struct qdio_q *out;
  832. int i;
  833. if (!pci_out_supported(q))
  834. return;
  835. for_each_output_queue(q->irq_ptr, out, i)
  836. if (!qdio_outbound_q_done(out))
  837. tasklet_schedule(&out->tasklet);
  838. }
  839. static void __tiqdio_inbound_processing(struct qdio_q *q)
  840. {
  841. qperf_inc(q, tasklet_inbound);
  842. if (need_siga_sync(q) && need_siga_sync_after_ai(q))
  843. qdio_sync_queues(q);
  844. /*
  845. * The interrupt could be caused by a PCI request. Check the
  846. * PCI capable outbound queues.
  847. */
  848. qdio_check_outbound_after_thinint(q);
  849. if (!qdio_inbound_q_moved(q))
  850. return;
  851. qdio_kick_handler(q);
  852. if (!qdio_inbound_q_done(q)) {
  853. qperf_inc(q, tasklet_inbound_resched);
  854. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) {
  855. tasklet_schedule(&q->tasklet);
  856. return;
  857. }
  858. }
  859. qdio_stop_polling(q);
  860. /*
  861. * We need to check again to not lose initiative after
  862. * resetting the ACK state.
  863. */
  864. if (!qdio_inbound_q_done(q)) {
  865. qperf_inc(q, tasklet_inbound_resched2);
  866. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  867. tasklet_schedule(&q->tasklet);
  868. }
  869. }
  870. void tiqdio_inbound_processing(unsigned long data)
  871. {
  872. struct qdio_q *q = (struct qdio_q *)data;
  873. __tiqdio_inbound_processing(q);
  874. }
  875. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  876. enum qdio_irq_states state)
  877. {
  878. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  879. irq_ptr->state = state;
  880. mb();
  881. }
  882. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  883. {
  884. if (irb->esw.esw0.erw.cons) {
  885. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  886. DBF_ERROR_HEX(irb, 64);
  887. DBF_ERROR_HEX(irb->ecw, 64);
  888. }
  889. }
  890. /* PCI interrupt handler */
  891. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  892. {
  893. int i;
  894. struct qdio_q *q;
  895. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  896. return;
  897. for_each_input_queue(irq_ptr, q, i) {
  898. if (q->u.in.queue_start_poll) {
  899. /* skip if polling is enabled or already in work */
  900. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  901. &q->u.in.queue_irq_state)) {
  902. qperf_inc(q, int_discarded);
  903. continue;
  904. }
  905. q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
  906. q->irq_ptr->int_parm);
  907. } else {
  908. tasklet_schedule(&q->tasklet);
  909. }
  910. }
  911. if (!pci_out_supported(q))
  912. return;
  913. for_each_output_queue(irq_ptr, q, i) {
  914. if (qdio_outbound_q_done(q))
  915. continue;
  916. if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
  917. qdio_siga_sync_q(q);
  918. tasklet_schedule(&q->tasklet);
  919. }
  920. }
  921. static void qdio_handle_activate_check(struct ccw_device *cdev,
  922. unsigned long intparm, int cstat, int dstat)
  923. {
  924. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  925. struct qdio_q *q;
  926. int count;
  927. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  928. DBF_ERROR("intp :%lx", intparm);
  929. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  930. if (irq_ptr->nr_input_qs) {
  931. q = irq_ptr->input_qs[0];
  932. } else if (irq_ptr->nr_output_qs) {
  933. q = irq_ptr->output_qs[0];
  934. } else {
  935. dump_stack();
  936. goto no_handler;
  937. }
  938. count = sub_buf(q->first_to_check, q->first_to_kick);
  939. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  940. q->nr, q->first_to_kick, count, irq_ptr->int_parm);
  941. no_handler:
  942. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  943. /*
  944. * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
  945. * Therefore we call the LGR detection function here.
  946. */
  947. lgr_info_log();
  948. }
  949. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  950. int dstat)
  951. {
  952. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  953. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  954. if (cstat)
  955. goto error;
  956. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  957. goto error;
  958. if (!(dstat & DEV_STAT_DEV_END))
  959. goto error;
  960. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  961. return;
  962. error:
  963. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  964. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  965. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  966. }
  967. /* qdio interrupt handler */
  968. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  969. struct irb *irb)
  970. {
  971. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  972. int cstat, dstat;
  973. if (!intparm || !irq_ptr) {
  974. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  975. return;
  976. }
  977. if (irq_ptr->perf_stat_enabled)
  978. irq_ptr->perf_stat.qdio_int++;
  979. if (IS_ERR(irb)) {
  980. switch (PTR_ERR(irb)) {
  981. case -EIO:
  982. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  983. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  984. wake_up(&cdev->private->wait_q);
  985. return;
  986. default:
  987. WARN_ON(1);
  988. return;
  989. }
  990. }
  991. qdio_irq_check_sense(irq_ptr, irb);
  992. cstat = irb->scsw.cmd.cstat;
  993. dstat = irb->scsw.cmd.dstat;
  994. switch (irq_ptr->state) {
  995. case QDIO_IRQ_STATE_INACTIVE:
  996. qdio_establish_handle_irq(cdev, cstat, dstat);
  997. break;
  998. case QDIO_IRQ_STATE_CLEANUP:
  999. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1000. break;
  1001. case QDIO_IRQ_STATE_ESTABLISHED:
  1002. case QDIO_IRQ_STATE_ACTIVE:
  1003. if (cstat & SCHN_STAT_PCI) {
  1004. qdio_int_handler_pci(irq_ptr);
  1005. return;
  1006. }
  1007. if (cstat || dstat)
  1008. qdio_handle_activate_check(cdev, intparm, cstat,
  1009. dstat);
  1010. break;
  1011. case QDIO_IRQ_STATE_STOPPED:
  1012. break;
  1013. default:
  1014. WARN_ON(1);
  1015. }
  1016. wake_up(&cdev->private->wait_q);
  1017. }
  1018. /**
  1019. * qdio_get_ssqd_desc - get qdio subchannel description
  1020. * @cdev: ccw device to get description for
  1021. * @data: where to store the ssqd
  1022. *
  1023. * Returns 0 or an error code. The results of the chsc are stored in the
  1024. * specified structure.
  1025. */
  1026. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  1027. struct qdio_ssqd_desc *data)
  1028. {
  1029. if (!cdev || !cdev->private)
  1030. return -EINVAL;
  1031. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  1032. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  1033. }
  1034. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  1035. static void qdio_shutdown_queues(struct ccw_device *cdev)
  1036. {
  1037. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1038. struct qdio_q *q;
  1039. int i;
  1040. for_each_input_queue(irq_ptr, q, i)
  1041. tasklet_kill(&q->tasklet);
  1042. for_each_output_queue(irq_ptr, q, i) {
  1043. del_timer(&q->u.out.timer);
  1044. tasklet_kill(&q->tasklet);
  1045. }
  1046. }
  1047. /**
  1048. * qdio_shutdown - shut down a qdio subchannel
  1049. * @cdev: associated ccw device
  1050. * @how: use halt or clear to shutdown
  1051. */
  1052. int qdio_shutdown(struct ccw_device *cdev, int how)
  1053. {
  1054. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1055. int rc;
  1056. unsigned long flags;
  1057. if (!irq_ptr)
  1058. return -ENODEV;
  1059. BUG_ON(irqs_disabled());
  1060. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  1061. mutex_lock(&irq_ptr->setup_mutex);
  1062. /*
  1063. * Subchannel was already shot down. We cannot prevent being called
  1064. * twice since cio may trigger a shutdown asynchronously.
  1065. */
  1066. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1067. mutex_unlock(&irq_ptr->setup_mutex);
  1068. return 0;
  1069. }
  1070. /*
  1071. * Indicate that the device is going down. Scheduling the queue
  1072. * tasklets is forbidden from here on.
  1073. */
  1074. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  1075. tiqdio_remove_input_queues(irq_ptr);
  1076. qdio_shutdown_queues(cdev);
  1077. qdio_shutdown_debug_entries(irq_ptr, cdev);
  1078. /* cleanup subchannel */
  1079. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1080. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  1081. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  1082. else
  1083. /* default behaviour is halt */
  1084. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  1085. if (rc) {
  1086. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  1087. DBF_ERROR("rc:%4d", rc);
  1088. goto no_cleanup;
  1089. }
  1090. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  1091. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1092. wait_event_interruptible_timeout(cdev->private->wait_q,
  1093. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  1094. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  1095. 10 * HZ);
  1096. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  1097. no_cleanup:
  1098. qdio_shutdown_thinint(irq_ptr);
  1099. /* restore interrupt handler */
  1100. if ((void *)cdev->handler == (void *)qdio_int_handler)
  1101. cdev->handler = irq_ptr->orig_handler;
  1102. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  1103. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1104. mutex_unlock(&irq_ptr->setup_mutex);
  1105. if (rc)
  1106. return rc;
  1107. return 0;
  1108. }
  1109. EXPORT_SYMBOL_GPL(qdio_shutdown);
  1110. /**
  1111. * qdio_free - free data structures for a qdio subchannel
  1112. * @cdev: associated ccw device
  1113. */
  1114. int qdio_free(struct ccw_device *cdev)
  1115. {
  1116. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1117. if (!irq_ptr)
  1118. return -ENODEV;
  1119. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  1120. mutex_lock(&irq_ptr->setup_mutex);
  1121. if (irq_ptr->debug_area != NULL) {
  1122. debug_unregister(irq_ptr->debug_area);
  1123. irq_ptr->debug_area = NULL;
  1124. }
  1125. cdev->private->qdio_data = NULL;
  1126. mutex_unlock(&irq_ptr->setup_mutex);
  1127. qdio_release_memory(irq_ptr);
  1128. return 0;
  1129. }
  1130. EXPORT_SYMBOL_GPL(qdio_free);
  1131. /**
  1132. * qdio_allocate - allocate qdio queues and associated data
  1133. * @init_data: initialization data
  1134. */
  1135. int qdio_allocate(struct qdio_initialize *init_data)
  1136. {
  1137. struct qdio_irq *irq_ptr;
  1138. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  1139. if ((init_data->no_input_qs && !init_data->input_handler) ||
  1140. (init_data->no_output_qs && !init_data->output_handler))
  1141. return -EINVAL;
  1142. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  1143. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  1144. return -EINVAL;
  1145. if ((!init_data->input_sbal_addr_array) ||
  1146. (!init_data->output_sbal_addr_array))
  1147. return -EINVAL;
  1148. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  1149. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1150. if (!irq_ptr)
  1151. goto out_err;
  1152. mutex_init(&irq_ptr->setup_mutex);
  1153. qdio_allocate_dbf(init_data, irq_ptr);
  1154. /*
  1155. * Allocate a page for the chsc calls in qdio_establish.
  1156. * Must be pre-allocated since a zfcp recovery will call
  1157. * qdio_establish. In case of low memory and swap on a zfcp disk
  1158. * we may not be able to allocate memory otherwise.
  1159. */
  1160. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1161. if (!irq_ptr->chsc_page)
  1162. goto out_rel;
  1163. /* qdr is used in ccw1.cda which is u32 */
  1164. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1165. if (!irq_ptr->qdr)
  1166. goto out_rel;
  1167. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1168. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1169. init_data->no_output_qs))
  1170. goto out_rel;
  1171. init_data->cdev->private->qdio_data = irq_ptr;
  1172. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1173. return 0;
  1174. out_rel:
  1175. qdio_release_memory(irq_ptr);
  1176. out_err:
  1177. return -ENOMEM;
  1178. }
  1179. EXPORT_SYMBOL_GPL(qdio_allocate);
  1180. static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
  1181. {
  1182. struct qdio_q *q = irq_ptr->input_qs[0];
  1183. int i, use_cq = 0;
  1184. if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
  1185. use_cq = 1;
  1186. for_each_output_queue(irq_ptr, q, i) {
  1187. if (use_cq) {
  1188. if (qdio_enable_async_operation(&q->u.out) < 0) {
  1189. use_cq = 0;
  1190. continue;
  1191. }
  1192. } else
  1193. qdio_disable_async_operation(&q->u.out);
  1194. }
  1195. DBF_EVENT("use_cq:%d", use_cq);
  1196. }
  1197. /**
  1198. * qdio_establish - establish queues on a qdio subchannel
  1199. * @init_data: initialization data
  1200. */
  1201. int qdio_establish(struct qdio_initialize *init_data)
  1202. {
  1203. struct qdio_irq *irq_ptr;
  1204. struct ccw_device *cdev = init_data->cdev;
  1205. unsigned long saveflags;
  1206. int rc;
  1207. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1208. irq_ptr = cdev->private->qdio_data;
  1209. if (!irq_ptr)
  1210. return -ENODEV;
  1211. if (cdev->private->state != DEV_STATE_ONLINE)
  1212. return -EINVAL;
  1213. mutex_lock(&irq_ptr->setup_mutex);
  1214. qdio_setup_irq(init_data);
  1215. rc = qdio_establish_thinint(irq_ptr);
  1216. if (rc) {
  1217. mutex_unlock(&irq_ptr->setup_mutex);
  1218. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1219. return rc;
  1220. }
  1221. /* establish q */
  1222. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1223. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1224. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1225. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1226. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1227. ccw_device_set_options_mask(cdev, 0);
  1228. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1229. if (rc) {
  1230. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1231. DBF_ERROR("rc:%4x", rc);
  1232. }
  1233. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1234. if (rc) {
  1235. mutex_unlock(&irq_ptr->setup_mutex);
  1236. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1237. return rc;
  1238. }
  1239. wait_event_interruptible_timeout(cdev->private->wait_q,
  1240. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1241. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1242. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1243. mutex_unlock(&irq_ptr->setup_mutex);
  1244. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1245. return -EIO;
  1246. }
  1247. qdio_setup_ssqd_info(irq_ptr);
  1248. qdio_detect_hsicq(irq_ptr);
  1249. /* qebsm is now setup if available, initialize buffer states */
  1250. qdio_init_buf_states(irq_ptr);
  1251. mutex_unlock(&irq_ptr->setup_mutex);
  1252. qdio_print_subchannel_info(irq_ptr, cdev);
  1253. qdio_setup_debug_entries(irq_ptr, cdev);
  1254. return 0;
  1255. }
  1256. EXPORT_SYMBOL_GPL(qdio_establish);
  1257. /**
  1258. * qdio_activate - activate queues on a qdio subchannel
  1259. * @cdev: associated cdev
  1260. */
  1261. int qdio_activate(struct ccw_device *cdev)
  1262. {
  1263. struct qdio_irq *irq_ptr;
  1264. int rc;
  1265. unsigned long saveflags;
  1266. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1267. irq_ptr = cdev->private->qdio_data;
  1268. if (!irq_ptr)
  1269. return -ENODEV;
  1270. if (cdev->private->state != DEV_STATE_ONLINE)
  1271. return -EINVAL;
  1272. mutex_lock(&irq_ptr->setup_mutex);
  1273. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1274. rc = -EBUSY;
  1275. goto out;
  1276. }
  1277. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1278. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1279. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1280. irq_ptr->ccw.cda = 0;
  1281. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1282. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1283. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1284. 0, DOIO_DENY_PREFETCH);
  1285. if (rc) {
  1286. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1287. DBF_ERROR("rc:%4x", rc);
  1288. }
  1289. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1290. if (rc)
  1291. goto out;
  1292. if (is_thinint_irq(irq_ptr))
  1293. tiqdio_add_input_queues(irq_ptr);
  1294. /* wait for subchannel to become active */
  1295. msleep(5);
  1296. switch (irq_ptr->state) {
  1297. case QDIO_IRQ_STATE_STOPPED:
  1298. case QDIO_IRQ_STATE_ERR:
  1299. rc = -EIO;
  1300. break;
  1301. default:
  1302. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1303. rc = 0;
  1304. }
  1305. out:
  1306. mutex_unlock(&irq_ptr->setup_mutex);
  1307. return rc;
  1308. }
  1309. EXPORT_SYMBOL_GPL(qdio_activate);
  1310. static inline int buf_in_between(int bufnr, int start, int count)
  1311. {
  1312. int end = add_buf(start, count);
  1313. if (end > start) {
  1314. if (bufnr >= start && bufnr < end)
  1315. return 1;
  1316. else
  1317. return 0;
  1318. }
  1319. /* wrap-around case */
  1320. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1321. (bufnr < end))
  1322. return 1;
  1323. else
  1324. return 0;
  1325. }
  1326. /**
  1327. * handle_inbound - reset processed input buffers
  1328. * @q: queue containing the buffers
  1329. * @callflags: flags
  1330. * @bufnr: first buffer to process
  1331. * @count: how many buffers are emptied
  1332. */
  1333. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1334. int bufnr, int count)
  1335. {
  1336. int used, diff;
  1337. qperf_inc(q, inbound_call);
  1338. if (!q->u.in.polling)
  1339. goto set;
  1340. /* protect against stop polling setting an ACK for an emptied slsb */
  1341. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1342. /* overwriting everything, just delete polling status */
  1343. q->u.in.polling = 0;
  1344. q->u.in.ack_count = 0;
  1345. goto set;
  1346. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1347. if (is_qebsm(q)) {
  1348. /* partial overwrite, just update ack_start */
  1349. diff = add_buf(bufnr, count);
  1350. diff = sub_buf(diff, q->u.in.ack_start);
  1351. q->u.in.ack_count -= diff;
  1352. if (q->u.in.ack_count <= 0) {
  1353. q->u.in.polling = 0;
  1354. q->u.in.ack_count = 0;
  1355. goto set;
  1356. }
  1357. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1358. }
  1359. else
  1360. /* the only ACK will be deleted, so stop polling */
  1361. q->u.in.polling = 0;
  1362. }
  1363. set:
  1364. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1365. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1366. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1367. if (need_siga_in(q))
  1368. return qdio_siga_input(q);
  1369. return 0;
  1370. }
  1371. /**
  1372. * handle_outbound - process filled outbound buffers
  1373. * @q: queue containing the buffers
  1374. * @callflags: flags
  1375. * @bufnr: first buffer to process
  1376. * @count: how many buffers are filled
  1377. */
  1378. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1379. int bufnr, int count)
  1380. {
  1381. unsigned char state = 0;
  1382. int used, rc = 0;
  1383. qperf_inc(q, outbound_call);
  1384. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1385. used = atomic_add_return(count, &q->nr_buf_used);
  1386. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1387. if (used == QDIO_MAX_BUFFERS_PER_Q)
  1388. qperf_inc(q, outbound_queue_full);
  1389. if (callflags & QDIO_FLAG_PCI_OUT) {
  1390. q->u.out.pci_out_enabled = 1;
  1391. qperf_inc(q, pci_request_int);
  1392. } else
  1393. q->u.out.pci_out_enabled = 0;
  1394. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1395. unsigned long phys_aob = 0;
  1396. /* One SIGA-W per buffer required for unicast HSI */
  1397. WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
  1398. phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
  1399. rc = qdio_kick_outbound_q(q, phys_aob);
  1400. } else if (need_siga_sync(q)) {
  1401. rc = qdio_siga_sync_q(q);
  1402. } else {
  1403. /* try to fast requeue buffers */
  1404. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1405. if (state != SLSB_CU_OUTPUT_PRIMED)
  1406. rc = qdio_kick_outbound_q(q, 0);
  1407. else
  1408. qperf_inc(q, fast_requeue);
  1409. }
  1410. /* in case of SIGA errors we must process the error immediately */
  1411. if (used >= q->u.out.scan_threshold || rc)
  1412. tasklet_schedule(&q->tasklet);
  1413. else
  1414. /* free the SBALs in case of no further traffic */
  1415. if (!timer_pending(&q->u.out.timer))
  1416. mod_timer(&q->u.out.timer, jiffies + HZ);
  1417. return rc;
  1418. }
  1419. /**
  1420. * do_QDIO - process input or output buffers
  1421. * @cdev: associated ccw_device for the qdio subchannel
  1422. * @callflags: input or output and special flags from the program
  1423. * @q_nr: queue number
  1424. * @bufnr: buffer number
  1425. * @count: how many buffers to process
  1426. */
  1427. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1428. int q_nr, unsigned int bufnr, unsigned int count)
  1429. {
  1430. struct qdio_irq *irq_ptr;
  1431. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1432. return -EINVAL;
  1433. irq_ptr = cdev->private->qdio_data;
  1434. if (!irq_ptr)
  1435. return -ENODEV;
  1436. DBF_DEV_EVENT(DBF_INFO, irq_ptr,
  1437. "do%02x b:%02x c:%02x", callflags, bufnr, count);
  1438. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1439. return -EBUSY;
  1440. if (!count)
  1441. return 0;
  1442. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1443. return handle_inbound(irq_ptr->input_qs[q_nr],
  1444. callflags, bufnr, count);
  1445. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1446. return handle_outbound(irq_ptr->output_qs[q_nr],
  1447. callflags, bufnr, count);
  1448. return -EINVAL;
  1449. }
  1450. EXPORT_SYMBOL_GPL(do_QDIO);
  1451. /**
  1452. * qdio_start_irq - process input buffers
  1453. * @cdev: associated ccw_device for the qdio subchannel
  1454. * @nr: input queue number
  1455. *
  1456. * Return codes
  1457. * 0 - success
  1458. * 1 - irqs not started since new data is available
  1459. */
  1460. int qdio_start_irq(struct ccw_device *cdev, int nr)
  1461. {
  1462. struct qdio_q *q;
  1463. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1464. if (!irq_ptr)
  1465. return -ENODEV;
  1466. q = irq_ptr->input_qs[nr];
  1467. WARN_ON(queue_irqs_enabled(q));
  1468. clear_nonshared_ind(irq_ptr);
  1469. qdio_stop_polling(q);
  1470. clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
  1471. /*
  1472. * We need to check again to not lose initiative after
  1473. * resetting the ACK state.
  1474. */
  1475. if (test_nonshared_ind(irq_ptr))
  1476. goto rescan;
  1477. if (!qdio_inbound_q_done(q))
  1478. goto rescan;
  1479. return 0;
  1480. rescan:
  1481. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1482. &q->u.in.queue_irq_state))
  1483. return 0;
  1484. else
  1485. return 1;
  1486. }
  1487. EXPORT_SYMBOL(qdio_start_irq);
  1488. /**
  1489. * qdio_get_next_buffers - process input buffers
  1490. * @cdev: associated ccw_device for the qdio subchannel
  1491. * @nr: input queue number
  1492. * @bufnr: first filled buffer number
  1493. * @error: buffers are in error state
  1494. *
  1495. * Return codes
  1496. * < 0 - error
  1497. * = 0 - no new buffers found
  1498. * > 0 - number of processed buffers
  1499. */
  1500. int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
  1501. int *error)
  1502. {
  1503. struct qdio_q *q;
  1504. int start, end;
  1505. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1506. if (!irq_ptr)
  1507. return -ENODEV;
  1508. q = irq_ptr->input_qs[nr];
  1509. WARN_ON(queue_irqs_enabled(q));
  1510. /*
  1511. * Cannot rely on automatic sync after interrupt since queues may
  1512. * also be examined without interrupt.
  1513. */
  1514. if (need_siga_sync(q))
  1515. qdio_sync_queues(q);
  1516. /* check the PCI capable outbound queues. */
  1517. qdio_check_outbound_after_thinint(q);
  1518. if (!qdio_inbound_q_moved(q))
  1519. return 0;
  1520. /* Note: upper-layer MUST stop processing immediately here ... */
  1521. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  1522. return -EIO;
  1523. start = q->first_to_kick;
  1524. end = q->first_to_check;
  1525. *bufnr = start;
  1526. *error = q->qdio_error;
  1527. /* for the next time */
  1528. q->first_to_kick = end;
  1529. q->qdio_error = 0;
  1530. return sub_buf(end, start);
  1531. }
  1532. EXPORT_SYMBOL(qdio_get_next_buffers);
  1533. /**
  1534. * qdio_stop_irq - disable interrupt processing for the device
  1535. * @cdev: associated ccw_device for the qdio subchannel
  1536. * @nr: input queue number
  1537. *
  1538. * Return codes
  1539. * 0 - interrupts were already disabled
  1540. * 1 - interrupts successfully disabled
  1541. */
  1542. int qdio_stop_irq(struct ccw_device *cdev, int nr)
  1543. {
  1544. struct qdio_q *q;
  1545. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  1546. if (!irq_ptr)
  1547. return -ENODEV;
  1548. q = irq_ptr->input_qs[nr];
  1549. if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
  1550. &q->u.in.queue_irq_state))
  1551. return 0;
  1552. else
  1553. return 1;
  1554. }
  1555. EXPORT_SYMBOL(qdio_stop_irq);
  1556. static int __init init_QDIO(void)
  1557. {
  1558. int rc;
  1559. rc = qdio_debug_init();
  1560. if (rc)
  1561. return rc;
  1562. rc = qdio_setup_init();
  1563. if (rc)
  1564. goto out_debug;
  1565. rc = tiqdio_allocate_memory();
  1566. if (rc)
  1567. goto out_cache;
  1568. rc = tiqdio_register_thinints();
  1569. if (rc)
  1570. goto out_ti;
  1571. return 0;
  1572. out_ti:
  1573. tiqdio_free_memory();
  1574. out_cache:
  1575. qdio_setup_exit();
  1576. out_debug:
  1577. qdio_debug_exit();
  1578. return rc;
  1579. }
  1580. static void __exit exit_QDIO(void)
  1581. {
  1582. tiqdio_unregister_thinints();
  1583. tiqdio_free_memory();
  1584. qdio_setup_exit();
  1585. qdio_debug_exit();
  1586. }
  1587. module_init(init_QDIO);
  1588. module_exit(exit_QDIO);