pm8921-charger.c 126 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #define pr_fmt(fmt) "%s: " fmt, __func__
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/errno.h>
  18. #include <linux/mfd/pm8xxx/pm8921-charger.h>
  19. #include <linux/mfd/pm8xxx/pm8921-bms.h>
  20. #include <linux/mfd/pm8xxx/pm8xxx-adc.h>
  21. #include <linux/mfd/pm8xxx/ccadc.h>
  22. #include <linux/mfd/pm8xxx/core.h>
  23. #include <linux/regulator/consumer.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/delay.h>
  26. #include <linux/bitops.h>
  27. #include <linux/workqueue.h>
  28. #include <linux/debugfs.h>
  29. #include <linux/slab.h>
  30. #include <linux/mfd/pm8xxx/batt-alarm.h>
  31. #include <linux/ratelimit.h>
  32. #include <linux/wakelock.h>
  33. #include <mach/msm_xo.h>
  34. #include <mach/msm_hsusb.h>
  35. #define CHG_BUCK_CLOCK_CTRL 0x14
  36. #define CHG_BUCK_CLOCK_CTRL_8038 0xD
  37. #define PBL_ACCESS1 0x04
  38. #define PBL_ACCESS2 0x05
  39. #define SYS_CONFIG_1 0x06
  40. #define SYS_CONFIG_2 0x07
  41. #define CHG_CNTRL 0x204
  42. #define CHG_IBAT_MAX 0x205
  43. #define CHG_TEST 0x206
  44. #define CHG_BUCK_CTRL_TEST1 0x207
  45. #define CHG_BUCK_CTRL_TEST2 0x208
  46. #define CHG_BUCK_CTRL_TEST3 0x209
  47. #define COMPARATOR_OVERRIDE 0x20A
  48. #define PSI_TXRX_SAMPLE_DATA_0 0x20B
  49. #define PSI_TXRX_SAMPLE_DATA_1 0x20C
  50. #define PSI_TXRX_SAMPLE_DATA_2 0x20D
  51. #define PSI_TXRX_SAMPLE_DATA_3 0x20E
  52. #define PSI_CONFIG_STATUS 0x20F
  53. #define CHG_IBAT_SAFE 0x210
  54. #define CHG_ITRICKLE 0x211
  55. #define CHG_CNTRL_2 0x212
  56. #define CHG_VBAT_DET 0x213
  57. #define CHG_VTRICKLE 0x214
  58. #define CHG_ITERM 0x215
  59. #define CHG_CNTRL_3 0x216
  60. #define CHG_VIN_MIN 0x217
  61. #define CHG_TWDOG 0x218
  62. #define CHG_TTRKL_MAX 0x219
  63. #define CHG_TEMP_THRESH 0x21A
  64. #define CHG_TCHG_MAX 0x21B
  65. #define USB_OVP_CONTROL 0x21C
  66. #define DC_OVP_CONTROL 0x21D
  67. #define USB_OVP_TEST 0x21E
  68. #define DC_OVP_TEST 0x21F
  69. #define CHG_VDD_MAX 0x220
  70. #define CHG_VDD_SAFE 0x221
  71. #define CHG_VBAT_BOOT_THRESH 0x222
  72. #define USB_OVP_TRIM 0x355
  73. #define BUCK_CONTROL_TRIM1 0x356
  74. #define BUCK_CONTROL_TRIM2 0x357
  75. #define BUCK_CONTROL_TRIM3 0x358
  76. #define BUCK_CONTROL_TRIM4 0x359
  77. #define CHG_DEFAULTS_TRIM 0x35A
  78. #define CHG_ITRIM 0x35B
  79. #define CHG_TTRIM 0x35C
  80. #define CHG_COMP_OVR 0x20A
  81. #define IUSB_FINE_RES 0x2B6
  82. #define OVP_USB_UVD 0x2B7
  83. #define PM8921_USB_TRIM_SEL 0x339
  84. /* check EOC every 10 seconds */
  85. #define EOC_CHECK_PERIOD_MS 10000
  86. /* check for USB unplug every 200 msecs */
  87. #define UNPLUG_CHECK_WAIT_PERIOD_MS 200
  88. #define UNPLUG_CHECK_RAMP_MS 25
  89. #define USB_TRIM_ENTRIES 16
  90. enum chg_fsm_state {
  91. FSM_STATE_OFF_0 = 0,
  92. FSM_STATE_BATFETDET_START_12 = 12,
  93. FSM_STATE_BATFETDET_END_16 = 16,
  94. FSM_STATE_ON_CHG_HIGHI_1 = 1,
  95. FSM_STATE_ATC_2A = 2,
  96. FSM_STATE_ATC_2B = 18,
  97. FSM_STATE_ON_BAT_3 = 3,
  98. FSM_STATE_ATC_FAIL_4 = 4 ,
  99. FSM_STATE_DELAY_5 = 5,
  100. FSM_STATE_ON_CHG_AND_BAT_6 = 6,
  101. FSM_STATE_FAST_CHG_7 = 7,
  102. FSM_STATE_TRKL_CHG_8 = 8,
  103. FSM_STATE_CHG_FAIL_9 = 9,
  104. FSM_STATE_EOC_10 = 10,
  105. FSM_STATE_ON_CHG_VREGOK_11 = 11,
  106. FSM_STATE_ATC_PAUSE_13 = 13,
  107. FSM_STATE_FAST_CHG_PAUSE_14 = 14,
  108. FSM_STATE_TRKL_CHG_PAUSE_15 = 15,
  109. FSM_STATE_START_BOOT = 20,
  110. FSM_STATE_FLCB_VREGOK = 21,
  111. FSM_STATE_FLCB = 22,
  112. };
  113. struct fsm_state_to_batt_status {
  114. enum chg_fsm_state fsm_state;
  115. int batt_state;
  116. };
  117. static struct fsm_state_to_batt_status map[] = {
  118. {FSM_STATE_OFF_0, POWER_SUPPLY_STATUS_UNKNOWN},
  119. {FSM_STATE_BATFETDET_START_12, POWER_SUPPLY_STATUS_UNKNOWN},
  120. {FSM_STATE_BATFETDET_END_16, POWER_SUPPLY_STATUS_UNKNOWN},
  121. /*
  122. * for CHG_HIGHI_1 report NOT_CHARGING if battery missing,
  123. * too hot/cold, charger too hot
  124. */
  125. {FSM_STATE_ON_CHG_HIGHI_1, POWER_SUPPLY_STATUS_FULL},
  126. {FSM_STATE_ATC_2A, POWER_SUPPLY_STATUS_CHARGING},
  127. {FSM_STATE_ATC_2B, POWER_SUPPLY_STATUS_CHARGING},
  128. {FSM_STATE_ON_BAT_3, POWER_SUPPLY_STATUS_DISCHARGING},
  129. {FSM_STATE_ATC_FAIL_4, POWER_SUPPLY_STATUS_DISCHARGING},
  130. {FSM_STATE_DELAY_5, POWER_SUPPLY_STATUS_UNKNOWN },
  131. {FSM_STATE_ON_CHG_AND_BAT_6, POWER_SUPPLY_STATUS_CHARGING},
  132. {FSM_STATE_FAST_CHG_7, POWER_SUPPLY_STATUS_CHARGING},
  133. {FSM_STATE_TRKL_CHG_8, POWER_SUPPLY_STATUS_CHARGING},
  134. {FSM_STATE_CHG_FAIL_9, POWER_SUPPLY_STATUS_DISCHARGING},
  135. {FSM_STATE_EOC_10, POWER_SUPPLY_STATUS_FULL},
  136. {FSM_STATE_ON_CHG_VREGOK_11, POWER_SUPPLY_STATUS_NOT_CHARGING},
  137. {FSM_STATE_ATC_PAUSE_13, POWER_SUPPLY_STATUS_NOT_CHARGING},
  138. {FSM_STATE_FAST_CHG_PAUSE_14, POWER_SUPPLY_STATUS_NOT_CHARGING},
  139. {FSM_STATE_TRKL_CHG_PAUSE_15, POWER_SUPPLY_STATUS_NOT_CHARGING},
  140. {FSM_STATE_START_BOOT, POWER_SUPPLY_STATUS_NOT_CHARGING},
  141. {FSM_STATE_FLCB_VREGOK, POWER_SUPPLY_STATUS_NOT_CHARGING},
  142. {FSM_STATE_FLCB, POWER_SUPPLY_STATUS_NOT_CHARGING},
  143. };
  144. enum chg_regulation_loop {
  145. VDD_LOOP = BIT(3),
  146. BAT_CURRENT_LOOP = BIT(2),
  147. INPUT_CURRENT_LOOP = BIT(1),
  148. INPUT_VOLTAGE_LOOP = BIT(0),
  149. CHG_ALL_LOOPS = VDD_LOOP | BAT_CURRENT_LOOP
  150. | INPUT_CURRENT_LOOP | INPUT_VOLTAGE_LOOP,
  151. };
  152. enum pmic_chg_interrupts {
  153. USBIN_VALID_IRQ = 0,
  154. USBIN_OV_IRQ,
  155. BATT_INSERTED_IRQ,
  156. VBATDET_LOW_IRQ,
  157. USBIN_UV_IRQ,
  158. VBAT_OV_IRQ,
  159. CHGWDOG_IRQ,
  160. VCP_IRQ,
  161. ATCDONE_IRQ,
  162. ATCFAIL_IRQ,
  163. CHGDONE_IRQ,
  164. CHGFAIL_IRQ,
  165. CHGSTATE_IRQ,
  166. LOOP_CHANGE_IRQ,
  167. FASTCHG_IRQ,
  168. TRKLCHG_IRQ,
  169. BATT_REMOVED_IRQ,
  170. BATTTEMP_HOT_IRQ,
  171. CHGHOT_IRQ,
  172. BATTTEMP_COLD_IRQ,
  173. CHG_GONE_IRQ,
  174. BAT_TEMP_OK_IRQ,
  175. COARSE_DET_LOW_IRQ,
  176. VDD_LOOP_IRQ,
  177. VREG_OV_IRQ,
  178. VBATDET_IRQ,
  179. BATFET_IRQ,
  180. PSI_IRQ,
  181. DCIN_VALID_IRQ,
  182. DCIN_OV_IRQ,
  183. DCIN_UV_IRQ,
  184. PM_CHG_MAX_INTS,
  185. };
  186. struct bms_notify {
  187. int is_battery_full;
  188. int is_charging;
  189. struct work_struct work;
  190. };
  191. /**
  192. * struct pm8921_chg_chip -device information
  193. * @dev: device pointer to access the parent
  194. * @usb_present: present status of usb
  195. * @dc_present: present status of dc
  196. * @usb_charger_current: usb current to charge the battery with used when
  197. * the usb path is enabled or charging is resumed
  198. * @update_time: how frequently the userland needs to be updated
  199. * @max_voltage_mv: the max volts the batt should be charged up to
  200. * @min_voltage_mv: the min battery voltage before turning the FETon
  201. * @uvd_voltage_mv: (PM8917 only) the falling UVD threshold voltage
  202. * @alarm_low_mv: the battery alarm voltage low
  203. * @alarm_high_mv: the battery alarm voltage high
  204. * @cool_temp_dc: the cool temp threshold in deciCelcius
  205. * @warm_temp_dc: the warm temp threshold in deciCelcius
  206. * @hysteresis_temp_dc: the hysteresis between temp thresholds in
  207. * deciCelcius
  208. * @resume_voltage_delta: the voltage delta from vdd max at which the
  209. * battery should resume charging
  210. * @term_current: The charging based term current
  211. *
  212. */
  213. struct pm8921_chg_chip {
  214. struct device *dev;
  215. unsigned int usb_present;
  216. unsigned int dc_present;
  217. unsigned int usb_charger_current;
  218. unsigned int max_bat_chg_current;
  219. unsigned int pmic_chg_irq[PM_CHG_MAX_INTS];
  220. unsigned int ttrkl_time;
  221. unsigned int update_time;
  222. unsigned int max_voltage_mv;
  223. unsigned int min_voltage_mv;
  224. unsigned int uvd_voltage_mv;
  225. unsigned int safe_current_ma;
  226. unsigned int alarm_low_mv;
  227. unsigned int alarm_high_mv;
  228. int cool_temp_dc;
  229. int warm_temp_dc;
  230. int hysteresis_temp_dc;
  231. unsigned int temp_check_period;
  232. unsigned int cool_bat_chg_current;
  233. unsigned int warm_bat_chg_current;
  234. unsigned int cool_bat_voltage;
  235. unsigned int warm_bat_voltage;
  236. unsigned int is_bat_cool;
  237. unsigned int is_bat_warm;
  238. unsigned int resume_voltage_delta;
  239. int resume_charge_percent;
  240. unsigned int term_current;
  241. unsigned int vbat_channel;
  242. unsigned int batt_temp_channel;
  243. unsigned int batt_id_channel;
  244. struct power_supply usb_psy;
  245. struct power_supply dc_psy;
  246. struct power_supply *ext_psy;
  247. struct power_supply batt_psy;
  248. struct dentry *dent;
  249. struct bms_notify bms_notify;
  250. int *usb_trim_table;
  251. bool ext_charging;
  252. bool ext_charge_done;
  253. bool iusb_fine_res;
  254. DECLARE_BITMAP(enabled_irqs, PM_CHG_MAX_INTS);
  255. struct work_struct battery_id_valid_work;
  256. int64_t batt_id_min;
  257. int64_t batt_id_max;
  258. int trkl_voltage;
  259. int weak_voltage;
  260. int trkl_current;
  261. int weak_current;
  262. int vin_min;
  263. unsigned int *thermal_mitigation;
  264. int thermal_levels;
  265. struct delayed_work update_heartbeat_work;
  266. struct delayed_work eoc_work;
  267. struct delayed_work unplug_check_work;
  268. struct delayed_work vin_collapse_check_work;
  269. struct delayed_work btc_override_work;
  270. struct wake_lock eoc_wake_lock;
  271. enum pm8921_chg_cold_thr cold_thr;
  272. enum pm8921_chg_hot_thr hot_thr;
  273. int rconn_mohm;
  274. enum pm8921_chg_led_src_config led_src_config;
  275. bool host_mode;
  276. bool has_dc_supply;
  277. u8 active_path;
  278. int recent_reported_soc;
  279. int battery_less_hardware;
  280. int ibatmax_max_adj_ma;
  281. int btc_override;
  282. int btc_override_cold_decidegc;
  283. int btc_override_hot_decidegc;
  284. int btc_delay_ms;
  285. bool btc_panic_if_cant_stop_chg;
  286. int stop_chg_upon_expiry;
  287. bool disable_aicl;
  288. int usb_type;
  289. bool disable_chg_rmvl_wrkarnd;
  290. struct msm_xo_voter *voter;
  291. };
  292. /* user space parameter to limit usb current */
  293. static unsigned int usb_max_current;
  294. /*
  295. * usb_target_ma is used for wall charger
  296. * adaptive input current limiting only. Use
  297. * pm_iusbmax_get() to get current maximum usb current setting.
  298. */
  299. static int usb_target_ma;
  300. static int charging_disabled;
  301. static int thermal_mitigation;
  302. static struct pm8921_chg_chip *the_chip;
  303. static void check_temp_thresholds(struct pm8921_chg_chip *chip);
  304. #define LPM_ENABLE_BIT BIT(2)
  305. static int pm8921_chg_set_lpm(struct pm8921_chg_chip *chip, int enable)
  306. {
  307. int rc;
  308. u8 reg;
  309. rc = pm8xxx_readb(chip->dev->parent, CHG_CNTRL, &reg);
  310. if (rc) {
  311. pr_err("pm8xxx_readb failed: addr=%03X, rc=%d\n",
  312. CHG_CNTRL, rc);
  313. return rc;
  314. }
  315. reg &= ~LPM_ENABLE_BIT;
  316. reg |= (enable ? LPM_ENABLE_BIT : 0);
  317. rc = pm8xxx_writeb(chip->dev->parent, CHG_CNTRL, reg);
  318. if (rc) {
  319. pr_err("pm_chg_write failed: addr=%03X, rc=%d\n",
  320. CHG_CNTRL, rc);
  321. return rc;
  322. }
  323. return rc;
  324. }
  325. static int pm_chg_write(struct pm8921_chg_chip *chip, u16 addr, u8 reg)
  326. {
  327. int rc;
  328. rc = pm8xxx_writeb(chip->dev->parent, addr, reg);
  329. if (rc)
  330. pr_err("failed: addr=%03X, rc=%d\n", addr, rc);
  331. return rc;
  332. }
  333. static int pm_chg_masked_write(struct pm8921_chg_chip *chip, u16 addr,
  334. u8 mask, u8 val)
  335. {
  336. int rc;
  337. u8 reg;
  338. rc = pm8xxx_readb(chip->dev->parent, addr, &reg);
  339. if (rc) {
  340. pr_err("pm8xxx_readb failed: addr=%03X, rc=%d\n", addr, rc);
  341. return rc;
  342. }
  343. reg &= ~mask;
  344. reg |= val & mask;
  345. rc = pm_chg_write(chip, addr, reg);
  346. if (rc) {
  347. pr_err("pm_chg_write failed: addr=%03X, rc=%d\n", addr, rc);
  348. return rc;
  349. }
  350. return 0;
  351. }
  352. static int pm_chg_get_rt_status(struct pm8921_chg_chip *chip, int irq_id)
  353. {
  354. return pm8xxx_read_irq_stat(chip->dev->parent,
  355. chip->pmic_chg_irq[irq_id]);
  356. }
  357. /* Treat OverVoltage/UnderVoltage as source missing */
  358. static int is_usb_chg_plugged_in(struct pm8921_chg_chip *chip)
  359. {
  360. return pm_chg_get_rt_status(chip, USBIN_VALID_IRQ);
  361. }
  362. /* Treat OverVoltage/UnderVoltage as source missing */
  363. static int is_dc_chg_plugged_in(struct pm8921_chg_chip *chip)
  364. {
  365. return pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
  366. }
  367. static int is_batfet_closed(struct pm8921_chg_chip *chip)
  368. {
  369. return pm_chg_get_rt_status(chip, BATFET_IRQ);
  370. }
  371. #define CAPTURE_FSM_STATE_CMD 0xC2
  372. #define READ_BANK_7 0x70
  373. #define READ_BANK_4 0x40
  374. static int pm_chg_get_fsm_state(struct pm8921_chg_chip *chip)
  375. {
  376. u8 temp;
  377. int err = 0, ret = 0;
  378. temp = CAPTURE_FSM_STATE_CMD;
  379. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  380. if (err) {
  381. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  382. goto err_out;
  383. }
  384. temp = READ_BANK_7;
  385. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  386. if (err) {
  387. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  388. goto err_out;
  389. }
  390. err = pm8xxx_readb(chip->dev->parent, CHG_TEST, &temp);
  391. if (err) {
  392. pr_err("pm8xxx_readb fail: addr=%03X, rc=%d\n", CHG_TEST, err);
  393. goto err_out;
  394. }
  395. /* get the lower 4 bits */
  396. ret = temp & 0xF;
  397. temp = READ_BANK_4;
  398. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  399. if (err) {
  400. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  401. goto err_out;
  402. }
  403. err = pm8xxx_readb(chip->dev->parent, CHG_TEST, &temp);
  404. if (err) {
  405. pr_err("pm8xxx_readb fail: addr=%03X, rc=%d\n", CHG_TEST, err);
  406. goto err_out;
  407. }
  408. /* get the upper 1 bit */
  409. ret |= (temp & 0x1) << 4;
  410. err_out:
  411. if (err)
  412. return err;
  413. return ret;
  414. }
  415. #define READ_BANK_6 0x60
  416. static int pm_chg_get_regulation_loop(struct pm8921_chg_chip *chip)
  417. {
  418. u8 temp, data;
  419. int err = 0;
  420. temp = READ_BANK_6;
  421. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  422. if (err) {
  423. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  424. goto err_out;
  425. }
  426. err = pm8xxx_readb(chip->dev->parent, CHG_TEST, &data);
  427. if (err) {
  428. pr_err("pm8xxx_readb fail: addr=%03X, rc=%d\n", CHG_TEST, err);
  429. goto err_out;
  430. }
  431. err_out:
  432. if (err)
  433. return err;
  434. /* return the lower 4 bits */
  435. return data & CHG_ALL_LOOPS;
  436. }
  437. #define CHG_USB_SUSPEND_BIT BIT(2)
  438. static int pm_chg_usb_suspend_enable(struct pm8921_chg_chip *chip, int enable)
  439. {
  440. return pm_chg_masked_write(chip, CHG_CNTRL_3, CHG_USB_SUSPEND_BIT,
  441. enable ? CHG_USB_SUSPEND_BIT : 0);
  442. }
  443. #define CHG_EN_BIT BIT(7)
  444. static int pm_chg_auto_enable(struct pm8921_chg_chip *chip, int enable)
  445. {
  446. return pm_chg_masked_write(chip, CHG_CNTRL_3, CHG_EN_BIT,
  447. enable ? CHG_EN_BIT : 0);
  448. }
  449. #define CHG_FAILED_CLEAR BIT(0)
  450. #define ATC_FAILED_CLEAR BIT(1)
  451. static int pm_chg_failed_clear(struct pm8921_chg_chip *chip, int clear)
  452. {
  453. int rc;
  454. rc = pm_chg_masked_write(chip, CHG_CNTRL_3, ATC_FAILED_CLEAR,
  455. clear ? ATC_FAILED_CLEAR : 0);
  456. rc |= pm_chg_masked_write(chip, CHG_CNTRL_3, CHG_FAILED_CLEAR,
  457. clear ? CHG_FAILED_CLEAR : 0);
  458. return rc;
  459. }
  460. #define CHG_CHARGE_DIS_BIT BIT(1)
  461. static int pm_chg_charge_dis(struct pm8921_chg_chip *chip, int disable)
  462. {
  463. return pm_chg_masked_write(chip, CHG_CNTRL, CHG_CHARGE_DIS_BIT,
  464. disable ? CHG_CHARGE_DIS_BIT : 0);
  465. }
  466. static int pm_is_chg_charge_dis(struct pm8921_chg_chip *chip)
  467. {
  468. u8 temp;
  469. pm8xxx_readb(chip->dev->parent, CHG_CNTRL, &temp);
  470. return temp & CHG_CHARGE_DIS_BIT;
  471. }
  472. #define PM8921_CHG_V_MIN_MV 3240
  473. #define PM8921_CHG_V_STEP_MV 20
  474. #define PM8921_CHG_V_STEP_10MV_OFFSET_BIT BIT(7)
  475. #define PM8921_CHG_VDDMAX_MAX 4500
  476. #define PM8921_CHG_VDDMAX_MIN 3400
  477. #define PM8921_CHG_V_MASK 0x7F
  478. static int __pm_chg_vddmax_set(struct pm8921_chg_chip *chip, int voltage)
  479. {
  480. int remainder;
  481. u8 temp = 0;
  482. if (voltage < PM8921_CHG_VDDMAX_MIN
  483. || voltage > PM8921_CHG_VDDMAX_MAX) {
  484. pr_err("bad mV=%d asked to set\n", voltage);
  485. return -EINVAL;
  486. }
  487. temp = (voltage - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
  488. remainder = voltage % 20;
  489. if (remainder >= 10) {
  490. temp |= PM8921_CHG_V_STEP_10MV_OFFSET_BIT;
  491. }
  492. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  493. return pm_chg_write(chip, CHG_VDD_MAX, temp);
  494. }
  495. static int pm_chg_vddmax_get(struct pm8921_chg_chip *chip, int *voltage)
  496. {
  497. u8 temp;
  498. int rc;
  499. rc = pm8xxx_readb(chip->dev->parent, CHG_VDD_MAX, &temp);
  500. if (rc) {
  501. pr_err("rc = %d while reading vdd max\n", rc);
  502. *voltage = 0;
  503. return rc;
  504. }
  505. *voltage = (int)(temp & PM8921_CHG_V_MASK) * PM8921_CHG_V_STEP_MV
  506. + PM8921_CHG_V_MIN_MV;
  507. if (temp & PM8921_CHG_V_STEP_10MV_OFFSET_BIT)
  508. *voltage = *voltage + 10;
  509. return 0;
  510. }
  511. static int pm_chg_vddmax_set(struct pm8921_chg_chip *chip, int voltage)
  512. {
  513. int current_mv, ret, steps, i;
  514. bool increase;
  515. ret = 0;
  516. if (voltage < PM8921_CHG_VDDMAX_MIN
  517. || voltage > PM8921_CHG_VDDMAX_MAX) {
  518. pr_err("bad mV=%d asked to set\n", voltage);
  519. return -EINVAL;
  520. }
  521. ret = pm_chg_vddmax_get(chip, &current_mv);
  522. if (ret) {
  523. pr_err("Failed to read vddmax rc=%d\n", ret);
  524. return -EINVAL;
  525. }
  526. if (current_mv == voltage)
  527. return 0;
  528. /* Only change in increments when USB is present */
  529. if (is_usb_chg_plugged_in(chip)) {
  530. if (current_mv < voltage) {
  531. steps = (voltage - current_mv) / PM8921_CHG_V_STEP_MV;
  532. increase = true;
  533. } else {
  534. steps = (current_mv - voltage) / PM8921_CHG_V_STEP_MV;
  535. increase = false;
  536. }
  537. for (i = 0; i < steps; i++) {
  538. if (increase)
  539. current_mv += PM8921_CHG_V_STEP_MV;
  540. else
  541. current_mv -= PM8921_CHG_V_STEP_MV;
  542. ret |= __pm_chg_vddmax_set(chip, current_mv);
  543. }
  544. }
  545. ret |= __pm_chg_vddmax_set(chip, voltage);
  546. return ret;
  547. }
  548. #define PM8921_CHG_VDDSAFE_MIN 3400
  549. #define PM8921_CHG_VDDSAFE_MAX 4500
  550. static int pm_chg_vddsafe_set(struct pm8921_chg_chip *chip, int voltage)
  551. {
  552. u8 temp;
  553. if (voltage < PM8921_CHG_VDDSAFE_MIN
  554. || voltage > PM8921_CHG_VDDSAFE_MAX) {
  555. pr_err("bad mV=%d asked to set\n", voltage);
  556. return -EINVAL;
  557. }
  558. temp = (voltage - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
  559. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  560. return pm_chg_masked_write(chip, CHG_VDD_SAFE, PM8921_CHG_V_MASK, temp);
  561. }
  562. #define PM8921_CHG_VBATDET_MIN 3240
  563. #define PM8921_CHG_VBATDET_MAX 5780
  564. static int pm_chg_vbatdet_set(struct pm8921_chg_chip *chip, int voltage)
  565. {
  566. u8 temp;
  567. if (voltage < PM8921_CHG_VBATDET_MIN
  568. || voltage > PM8921_CHG_VBATDET_MAX) {
  569. pr_err("bad mV=%d asked to set\n", voltage);
  570. return -EINVAL;
  571. }
  572. temp = (voltage - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
  573. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  574. return pm_chg_masked_write(chip, CHG_VBAT_DET, PM8921_CHG_V_MASK, temp);
  575. }
  576. #define PM8921_CHG_VINMIN_MIN_MV 3800
  577. #define PM8921_CHG_VINMIN_STEP_MV 100
  578. #define PM8921_CHG_VINMIN_USABLE_MAX 6500
  579. #define PM8921_CHG_VINMIN_USABLE_MIN 4300
  580. #define PM8921_CHG_VINMIN_MASK 0x1F
  581. static int pm_chg_vinmin_set(struct pm8921_chg_chip *chip, int voltage)
  582. {
  583. u8 temp;
  584. if (voltage < PM8921_CHG_VINMIN_USABLE_MIN
  585. || voltage > PM8921_CHG_VINMIN_USABLE_MAX) {
  586. pr_err("bad mV=%d asked to set\n", voltage);
  587. return -EINVAL;
  588. }
  589. temp = (voltage - PM8921_CHG_VINMIN_MIN_MV) / PM8921_CHG_VINMIN_STEP_MV;
  590. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  591. return pm_chg_masked_write(chip, CHG_VIN_MIN, PM8921_CHG_VINMIN_MASK,
  592. temp);
  593. }
  594. static int pm_chg_vinmin_get(struct pm8921_chg_chip *chip)
  595. {
  596. u8 temp;
  597. int rc, voltage_mv;
  598. rc = pm8xxx_readb(chip->dev->parent, CHG_VIN_MIN, &temp);
  599. temp &= PM8921_CHG_VINMIN_MASK;
  600. voltage_mv = PM8921_CHG_VINMIN_MIN_MV +
  601. (int)temp * PM8921_CHG_VINMIN_STEP_MV;
  602. return voltage_mv;
  603. }
  604. #define PM8917_USB_UVD_MIN_MV 3850
  605. #define PM8917_USB_UVD_MAX_MV 4350
  606. #define PM8917_USB_UVD_STEP_MV 100
  607. #define PM8917_USB_UVD_MASK 0x7
  608. static int pm_chg_uvd_threshold_set(struct pm8921_chg_chip *chip, int thresh_mv)
  609. {
  610. u8 temp;
  611. if (thresh_mv < PM8917_USB_UVD_MIN_MV
  612. || thresh_mv > PM8917_USB_UVD_MAX_MV) {
  613. pr_err("bad mV=%d asked to set\n", thresh_mv);
  614. return -EINVAL;
  615. }
  616. temp = (thresh_mv - PM8917_USB_UVD_MIN_MV) / PM8917_USB_UVD_STEP_MV;
  617. return pm_chg_masked_write(chip, OVP_USB_UVD,
  618. PM8917_USB_UVD_MASK, temp);
  619. }
  620. #define PM8921_CHG_IBATMAX_MIN 325
  621. #define PM8921_CHG_IBATMAX_MAX 3025
  622. #define PM8921_CHG_I_MIN_MA 225
  623. #define PM8921_CHG_I_STEP_MA 50
  624. #define PM8921_CHG_I_MASK 0x3F
  625. static int pm_chg_ibatmax_get(struct pm8921_chg_chip *chip, int *ibat_ma)
  626. {
  627. u8 temp;
  628. int rc;
  629. rc = pm8xxx_readb(chip->dev->parent, CHG_IBAT_MAX, &temp);
  630. if (rc) {
  631. pr_err("rc = %d while reading ibat max\n", rc);
  632. *ibat_ma = 0;
  633. return rc;
  634. }
  635. *ibat_ma = (int)(temp & PM8921_CHG_I_MASK) * PM8921_CHG_I_STEP_MA
  636. + PM8921_CHG_I_MIN_MA;
  637. return 0;
  638. }
  639. static int pm_chg_ibatmax_set(struct pm8921_chg_chip *chip, int chg_current)
  640. {
  641. u8 temp;
  642. if (chg_current < PM8921_CHG_IBATMAX_MIN
  643. || chg_current > PM8921_CHG_IBATMAX_MAX) {
  644. pr_err("bad mA=%d asked to set\n", chg_current);
  645. return -EINVAL;
  646. }
  647. temp = (chg_current - PM8921_CHG_I_MIN_MA) / PM8921_CHG_I_STEP_MA;
  648. return pm_chg_masked_write(chip, CHG_IBAT_MAX, PM8921_CHG_I_MASK, temp);
  649. }
  650. #define PM8921_CHG_IBATSAFE_MIN 225
  651. #define PM8921_CHG_IBATSAFE_MAX 3375
  652. static int pm_chg_ibatsafe_set(struct pm8921_chg_chip *chip, int chg_current)
  653. {
  654. u8 temp;
  655. if (chg_current < PM8921_CHG_IBATSAFE_MIN
  656. || chg_current > PM8921_CHG_IBATSAFE_MAX) {
  657. pr_err("bad mA=%d asked to set\n", chg_current);
  658. return -EINVAL;
  659. }
  660. temp = (chg_current - PM8921_CHG_I_MIN_MA) / PM8921_CHG_I_STEP_MA;
  661. return pm_chg_masked_write(chip, CHG_IBAT_SAFE,
  662. PM8921_CHG_I_MASK, temp);
  663. }
  664. #define PM8921_CHG_ITERM_MIN_MA 50
  665. #define PM8921_CHG_ITERM_MAX_MA 200
  666. #define PM8921_CHG_ITERM_STEP_MA 10
  667. #define PM8921_CHG_ITERM_MASK 0xF
  668. static int pm_chg_iterm_set(struct pm8921_chg_chip *chip, int chg_current)
  669. {
  670. u8 temp;
  671. if (chg_current < PM8921_CHG_ITERM_MIN_MA
  672. || chg_current > PM8921_CHG_ITERM_MAX_MA) {
  673. pr_err("bad mA=%d asked to set\n", chg_current);
  674. return -EINVAL;
  675. }
  676. temp = (chg_current - PM8921_CHG_ITERM_MIN_MA)
  677. / PM8921_CHG_ITERM_STEP_MA;
  678. return pm_chg_masked_write(chip, CHG_ITERM, PM8921_CHG_ITERM_MASK,
  679. temp);
  680. }
  681. static int pm_chg_iterm_get(struct pm8921_chg_chip *chip, int *chg_current)
  682. {
  683. u8 temp;
  684. int rc;
  685. rc = pm8xxx_readb(chip->dev->parent, CHG_ITERM, &temp);
  686. if (rc) {
  687. pr_err("err=%d reading CHG_ITEM\n", rc);
  688. *chg_current = 0;
  689. return rc;
  690. }
  691. temp &= PM8921_CHG_ITERM_MASK;
  692. *chg_current = (int)temp * PM8921_CHG_ITERM_STEP_MA
  693. + PM8921_CHG_ITERM_MIN_MA;
  694. return 0;
  695. }
  696. struct usb_ma_limit_entry {
  697. int usb_ma;
  698. u8 value;
  699. };
  700. /* USB Trim tables */
  701. static int usb_trim_pm8921_table_1[USB_TRIM_ENTRIES] = {
  702. 0x0,
  703. 0x0,
  704. -0x5,
  705. 0x0,
  706. -0x7,
  707. 0x0,
  708. -0x9,
  709. -0xA,
  710. 0x0,
  711. 0x0,
  712. -0xE,
  713. 0x0,
  714. -0xF,
  715. 0x0,
  716. -0x10,
  717. 0x0
  718. };
  719. static int usb_trim_pm8921_table_2[USB_TRIM_ENTRIES] = {
  720. 0x0,
  721. 0x0,
  722. -0x2,
  723. 0x0,
  724. -0x4,
  725. 0x0,
  726. -0x4,
  727. -0x5,
  728. 0x0,
  729. 0x0,
  730. -0x6,
  731. 0x0,
  732. -0x6,
  733. 0x0,
  734. -0x6,
  735. 0x0
  736. };
  737. static int usb_trim_8038_table[USB_TRIM_ENTRIES] = {
  738. 0x0,
  739. 0x0,
  740. -0x9,
  741. 0x0,
  742. -0xD,
  743. 0x0,
  744. -0x10,
  745. -0x11,
  746. 0x0,
  747. 0x0,
  748. -0x25,
  749. 0x0,
  750. -0x28,
  751. 0x0,
  752. -0x32,
  753. 0x0
  754. };
  755. static int usb_trim_8917_table[USB_TRIM_ENTRIES] = {
  756. 0x0,
  757. 0x0,
  758. 0xA,
  759. 0xC,
  760. 0x10,
  761. 0x10,
  762. 0x13,
  763. 0x14,
  764. 0x13,
  765. 0x3,
  766. 0x1A,
  767. 0x1D,
  768. 0x1D,
  769. 0x21,
  770. 0x24,
  771. 0x26
  772. };
  773. /* Maximum USB setting table */
  774. static struct usb_ma_limit_entry usb_ma_table[] = {
  775. {100, 0x0},
  776. {200, 0x1},
  777. {500, 0x2},
  778. {600, 0x3},
  779. {700, 0x4},
  780. {800, 0x5},
  781. {850, 0x6},
  782. {900, 0x8},
  783. {950, 0x7},
  784. {1000, 0x9},
  785. {1100, 0xA},
  786. {1200, 0xB},
  787. {1300, 0xC},
  788. {1400, 0xD},
  789. {1500, 0xE},
  790. {1600, 0xF},
  791. };
  792. #define REG_SBI_CONFIG 0x04F
  793. #define PAGE3_ENABLE_MASK 0x6
  794. #define USB_OVP_TRIM_MASK 0x3F
  795. #define USB_OVP_TRIM_PM8917_MASK 0x7F
  796. #define USB_OVP_TRIM_MIN 0x00
  797. #define REG_USB_OVP_TRIM_ORIG_LSB 0x10A
  798. #define REG_USB_OVP_TRIM_ORIG_MSB 0x09C
  799. #define REG_USB_OVP_TRIM_PM8917 0x2B5
  800. #define REG_USB_OVP_TRIM_PM8917_BIT BIT(0)
  801. #define USB_TRIM_MAX_DATA_PM8917 0x3F
  802. #define USB_TRIM_POLARITY_PM8917_BIT BIT(6)
  803. static int pm_chg_usb_trim(struct pm8921_chg_chip *chip, int index)
  804. {
  805. u8 temp, sbi_config, msb, lsb, mask;
  806. s8 trim;
  807. int rc = 0;
  808. static u8 usb_trim_reg_orig = 0xFF;
  809. /* No trim data for PM8921 */
  810. if (!chip->usb_trim_table)
  811. return 0;
  812. if (usb_trim_reg_orig == 0xFF) {
  813. rc = pm8xxx_readb(chip->dev->parent,
  814. REG_USB_OVP_TRIM_ORIG_MSB, &msb);
  815. if (rc) {
  816. pr_err("error = %d reading sbi config reg\n", rc);
  817. return rc;
  818. }
  819. rc = pm8xxx_readb(chip->dev->parent,
  820. REG_USB_OVP_TRIM_ORIG_LSB, &lsb);
  821. if (rc) {
  822. pr_err("error = %d reading sbi config reg\n", rc);
  823. return rc;
  824. }
  825. msb = msb >> 5;
  826. lsb = lsb >> 5;
  827. usb_trim_reg_orig = msb << 3 | lsb;
  828. if (pm8xxx_get_version(chip->dev->parent)
  829. == PM8XXX_VERSION_8917) {
  830. rc = pm8xxx_readb(chip->dev->parent,
  831. REG_USB_OVP_TRIM_PM8917, &msb);
  832. if (rc) {
  833. pr_err("error = %d reading config reg\n", rc);
  834. return rc;
  835. }
  836. msb = msb & REG_USB_OVP_TRIM_PM8917_BIT;
  837. usb_trim_reg_orig |= msb << 6;
  838. }
  839. }
  840. /* use the original trim value */
  841. trim = usb_trim_reg_orig;
  842. trim += chip->usb_trim_table[index];
  843. if (trim < 0)
  844. trim = 0;
  845. pr_debug("trim_orig %d write 0x%x index=%d value 0x%x to USB_OVP_TRIM\n",
  846. usb_trim_reg_orig, trim, index, chip->usb_trim_table[index]);
  847. rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, &sbi_config);
  848. if (rc) {
  849. pr_err("error = %d reading sbi config reg\n", rc);
  850. return rc;
  851. }
  852. temp = sbi_config | PAGE3_ENABLE_MASK;
  853. rc = pm_chg_write(chip, REG_SBI_CONFIG, temp);
  854. if (rc) {
  855. pr_err("error = %d writing sbi config reg\n", rc);
  856. return rc;
  857. }
  858. mask = USB_OVP_TRIM_MASK;
  859. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917)
  860. mask = USB_OVP_TRIM_PM8917_MASK;
  861. rc = pm_chg_masked_write(chip, USB_OVP_TRIM, mask, trim);
  862. if (rc) {
  863. pr_err("error = %d writing USB_OVP_TRIM\n", rc);
  864. return rc;
  865. }
  866. rc = pm_chg_write(chip, REG_SBI_CONFIG, sbi_config);
  867. if (rc) {
  868. pr_err("error = %d writing sbi config reg\n", rc);
  869. return rc;
  870. }
  871. return rc;
  872. }
  873. #define PM8921_CHG_IUSB_MASK 0x1C
  874. #define PM8921_CHG_IUSB_SHIFT 2
  875. #define PM8921_CHG_IUSB_MAX 7
  876. #define PM8921_CHG_IUSB_MIN 0
  877. #define PM8917_IUSB_FINE_RES BIT(0)
  878. static int pm_chg_iusbmax_set(struct pm8921_chg_chip *chip, int index)
  879. {
  880. u8 temp, fineres, reg_val;
  881. int rc;
  882. reg_val = usb_ma_table[index].value >> 1;
  883. fineres = PM8917_IUSB_FINE_RES & usb_ma_table[index].value;
  884. if (reg_val < PM8921_CHG_IUSB_MIN || reg_val > PM8921_CHG_IUSB_MAX) {
  885. pr_err("bad mA=%d asked to set\n", reg_val);
  886. return -EINVAL;
  887. }
  888. temp = reg_val << PM8921_CHG_IUSB_SHIFT;
  889. /* IUSB_FINE_RES */
  890. if (chip->iusb_fine_res) {
  891. /* Clear IUSB_FINE_RES bit to avoid overshoot */
  892. rc = pm_chg_masked_write(chip, IUSB_FINE_RES,
  893. PM8917_IUSB_FINE_RES, 0);
  894. rc |= pm_chg_masked_write(chip, PBL_ACCESS2,
  895. PM8921_CHG_IUSB_MASK, temp);
  896. if (rc) {
  897. pr_err("Failed to write PBL_ACCESS2 rc=%d\n", rc);
  898. return rc;
  899. }
  900. if (fineres) {
  901. rc = pm_chg_masked_write(chip, IUSB_FINE_RES,
  902. PM8917_IUSB_FINE_RES, fineres);
  903. if (rc) {
  904. pr_err("Failed to write ISUB_FINE_RES rc=%d\n",
  905. rc);
  906. return rc;
  907. }
  908. }
  909. } else {
  910. rc = pm_chg_masked_write(chip, PBL_ACCESS2,
  911. PM8921_CHG_IUSB_MASK, temp);
  912. if (rc) {
  913. pr_err("Failed to write PBL_ACCESS2 rc=%d\n", rc);
  914. return rc;
  915. }
  916. }
  917. rc = pm_chg_usb_trim(chip, index);
  918. if (rc)
  919. pr_err("unable to set usb trim rc = %d\n", rc);
  920. return rc;
  921. }
  922. static int pm_chg_iusbmax_get(struct pm8921_chg_chip *chip, int *mA)
  923. {
  924. u8 temp, fineres;
  925. int rc, i;
  926. fineres = 0;
  927. *mA = 0;
  928. rc = pm8xxx_readb(chip->dev->parent, PBL_ACCESS2, &temp);
  929. if (rc) {
  930. pr_err("err=%d reading PBL_ACCESS2\n", rc);
  931. return rc;
  932. }
  933. if (chip->iusb_fine_res) {
  934. rc = pm8xxx_readb(chip->dev->parent, IUSB_FINE_RES, &fineres);
  935. if (rc) {
  936. pr_err("err=%d reading IUSB_FINE_RES\n", rc);
  937. return rc;
  938. }
  939. }
  940. temp &= PM8921_CHG_IUSB_MASK;
  941. temp = temp >> PM8921_CHG_IUSB_SHIFT;
  942. temp = (temp << 1) | (fineres & PM8917_IUSB_FINE_RES);
  943. for (i = ARRAY_SIZE(usb_ma_table) - 1; i >= 0; i--) {
  944. if (usb_ma_table[i].value == temp)
  945. break;
  946. }
  947. if (i < 0) {
  948. pr_err("can't find %d in usb_ma_table. Use min.\n", temp);
  949. i = 0;
  950. }
  951. *mA = usb_ma_table[i].usb_ma;
  952. return rc;
  953. }
  954. #define PM8921_CHG_WD_MASK 0x1F
  955. static int pm_chg_disable_wd(struct pm8921_chg_chip *chip)
  956. {
  957. /* writing 0 to the wd timer disables it */
  958. return pm_chg_masked_write(chip, CHG_TWDOG, PM8921_CHG_WD_MASK, 0);
  959. }
  960. #define PM8921_CHG_TCHG_MASK 0x7F
  961. #define PM8921_CHG_TCHG_MIN 4
  962. #define PM8921_CHG_TCHG_MAX 512
  963. #define PM8921_CHG_TCHG_STEP 4
  964. static int pm_chg_tchg_max_set(struct pm8921_chg_chip *chip, int minutes)
  965. {
  966. u8 temp;
  967. if (minutes < PM8921_CHG_TCHG_MIN || minutes > PM8921_CHG_TCHG_MAX) {
  968. pr_err("bad max minutes =%d asked to set\n", minutes);
  969. return -EINVAL;
  970. }
  971. temp = (minutes - 1)/PM8921_CHG_TCHG_STEP;
  972. return pm_chg_masked_write(chip, CHG_TCHG_MAX, PM8921_CHG_TCHG_MASK,
  973. temp);
  974. }
  975. #define PM8921_CHG_TTRKL_MASK 0x3F
  976. #define PM8921_CHG_TTRKL_MIN 1
  977. #define PM8921_CHG_TTRKL_MAX 64
  978. static int pm_chg_ttrkl_max_set(struct pm8921_chg_chip *chip, int minutes)
  979. {
  980. u8 temp;
  981. if (minutes < PM8921_CHG_TTRKL_MIN || minutes > PM8921_CHG_TTRKL_MAX) {
  982. pr_err("bad max minutes =%d asked to set\n", minutes);
  983. return -EINVAL;
  984. }
  985. temp = minutes - 1;
  986. return pm_chg_masked_write(chip, CHG_TTRKL_MAX, PM8921_CHG_TTRKL_MASK,
  987. temp);
  988. }
  989. #define PM8921_CHG_VTRKL_MIN_MV 2050
  990. #define PM8921_CHG_VTRKL_MAX_MV 2800
  991. #define PM8921_CHG_VTRKL_STEP_MV 50
  992. #define PM8921_CHG_VTRKL_SHIFT 4
  993. #define PM8921_CHG_VTRKL_MASK 0xF0
  994. static int pm_chg_vtrkl_low_set(struct pm8921_chg_chip *chip, int millivolts)
  995. {
  996. u8 temp;
  997. if (millivolts < PM8921_CHG_VTRKL_MIN_MV
  998. || millivolts > PM8921_CHG_VTRKL_MAX_MV) {
  999. pr_err("bad voltage = %dmV asked to set\n", millivolts);
  1000. return -EINVAL;
  1001. }
  1002. temp = (millivolts - PM8921_CHG_VTRKL_MIN_MV)/PM8921_CHG_VTRKL_STEP_MV;
  1003. temp = temp << PM8921_CHG_VTRKL_SHIFT;
  1004. return pm_chg_masked_write(chip, CHG_VTRICKLE, PM8921_CHG_VTRKL_MASK,
  1005. temp);
  1006. }
  1007. #define PM8921_CHG_VWEAK_MIN_MV 2100
  1008. #define PM8921_CHG_VWEAK_MAX_MV 3600
  1009. #define PM8921_CHG_VWEAK_STEP_MV 100
  1010. #define PM8921_CHG_VWEAK_MASK 0x0F
  1011. static int pm_chg_vweak_set(struct pm8921_chg_chip *chip, int millivolts)
  1012. {
  1013. u8 temp;
  1014. if (millivolts < PM8921_CHG_VWEAK_MIN_MV
  1015. || millivolts > PM8921_CHG_VWEAK_MAX_MV) {
  1016. pr_err("bad voltage = %dmV asked to set\n", millivolts);
  1017. return -EINVAL;
  1018. }
  1019. temp = (millivolts - PM8921_CHG_VWEAK_MIN_MV)/PM8921_CHG_VWEAK_STEP_MV;
  1020. return pm_chg_masked_write(chip, CHG_VTRICKLE, PM8921_CHG_VWEAK_MASK,
  1021. temp);
  1022. }
  1023. #define PM8921_CHG_ITRKL_MIN_MA 50
  1024. #define PM8921_CHG_ITRKL_MAX_MA 200
  1025. #define PM8921_CHG_ITRKL_MASK 0x0F
  1026. #define PM8921_CHG_ITRKL_STEP_MA 10
  1027. static int pm_chg_itrkl_set(struct pm8921_chg_chip *chip, int milliamps)
  1028. {
  1029. u8 temp;
  1030. if (milliamps < PM8921_CHG_ITRKL_MIN_MA
  1031. || milliamps > PM8921_CHG_ITRKL_MAX_MA) {
  1032. pr_err("bad current = %dmA asked to set\n", milliamps);
  1033. return -EINVAL;
  1034. }
  1035. temp = (milliamps - PM8921_CHG_ITRKL_MIN_MA)/PM8921_CHG_ITRKL_STEP_MA;
  1036. return pm_chg_masked_write(chip, CHG_ITRICKLE, PM8921_CHG_ITRKL_MASK,
  1037. temp);
  1038. }
  1039. #define PM8921_CHG_IWEAK_MIN_MA 325
  1040. #define PM8921_CHG_IWEAK_MAX_MA 525
  1041. #define PM8921_CHG_IWEAK_SHIFT 7
  1042. #define PM8921_CHG_IWEAK_MASK 0x80
  1043. static int pm_chg_iweak_set(struct pm8921_chg_chip *chip, int milliamps)
  1044. {
  1045. u8 temp;
  1046. if (milliamps < PM8921_CHG_IWEAK_MIN_MA
  1047. || milliamps > PM8921_CHG_IWEAK_MAX_MA) {
  1048. pr_err("bad current = %dmA asked to set\n", milliamps);
  1049. return -EINVAL;
  1050. }
  1051. if (milliamps < PM8921_CHG_IWEAK_MAX_MA)
  1052. temp = 0;
  1053. else
  1054. temp = 1;
  1055. temp = temp << PM8921_CHG_IWEAK_SHIFT;
  1056. return pm_chg_masked_write(chip, CHG_ITRICKLE, PM8921_CHG_IWEAK_MASK,
  1057. temp);
  1058. }
  1059. #define PM8921_CHG_BATT_TEMP_THR_COLD BIT(1)
  1060. #define PM8921_CHG_BATT_TEMP_THR_COLD_SHIFT 1
  1061. static int pm_chg_batt_cold_temp_config(struct pm8921_chg_chip *chip,
  1062. enum pm8921_chg_cold_thr cold_thr)
  1063. {
  1064. u8 temp;
  1065. temp = cold_thr << PM8921_CHG_BATT_TEMP_THR_COLD_SHIFT;
  1066. temp = temp & PM8921_CHG_BATT_TEMP_THR_COLD;
  1067. return pm_chg_masked_write(chip, CHG_CNTRL_2,
  1068. PM8921_CHG_BATT_TEMP_THR_COLD,
  1069. temp);
  1070. }
  1071. #define PM8921_CHG_BATT_TEMP_THR_HOT BIT(0)
  1072. #define PM8921_CHG_BATT_TEMP_THR_HOT_SHIFT 0
  1073. static int pm_chg_batt_hot_temp_config(struct pm8921_chg_chip *chip,
  1074. enum pm8921_chg_hot_thr hot_thr)
  1075. {
  1076. u8 temp;
  1077. temp = hot_thr << PM8921_CHG_BATT_TEMP_THR_HOT_SHIFT;
  1078. temp = temp & PM8921_CHG_BATT_TEMP_THR_HOT;
  1079. return pm_chg_masked_write(chip, CHG_CNTRL_2,
  1080. PM8921_CHG_BATT_TEMP_THR_HOT,
  1081. temp);
  1082. }
  1083. #define PM8921_CHG_LED_SRC_CONFIG_SHIFT 4
  1084. #define PM8921_CHG_LED_SRC_CONFIG_MASK 0x30
  1085. static int pm_chg_led_src_config(struct pm8921_chg_chip *chip,
  1086. enum pm8921_chg_led_src_config led_src_config)
  1087. {
  1088. u8 temp;
  1089. if (led_src_config < LED_SRC_GND ||
  1090. led_src_config > LED_SRC_BYPASS)
  1091. return -EINVAL;
  1092. if (led_src_config == LED_SRC_BYPASS)
  1093. return 0;
  1094. temp = led_src_config << PM8921_CHG_LED_SRC_CONFIG_SHIFT;
  1095. return pm_chg_masked_write(chip, CHG_CNTRL_3,
  1096. PM8921_CHG_LED_SRC_CONFIG_MASK, temp);
  1097. }
  1098. static int64_t read_battery_id(struct pm8921_chg_chip *chip)
  1099. {
  1100. int rc;
  1101. struct pm8xxx_adc_chan_result result;
  1102. rc = pm8xxx_adc_read(chip->batt_id_channel, &result);
  1103. if (rc) {
  1104. pr_err("error reading batt id channel = %d, rc = %d\n",
  1105. chip->vbat_channel, rc);
  1106. return rc;
  1107. }
  1108. pr_debug("batt_id phy = %lld meas = 0x%llx\n", result.physical,
  1109. result.measurement);
  1110. return result.physical;
  1111. }
  1112. static int is_battery_valid(struct pm8921_chg_chip *chip)
  1113. {
  1114. int64_t rc;
  1115. if (chip->batt_id_min == 0 && chip->batt_id_max == 0)
  1116. return 1;
  1117. rc = read_battery_id(chip);
  1118. if (rc < 0) {
  1119. pr_err("error reading batt id channel = %d, rc = %lld\n",
  1120. chip->vbat_channel, rc);
  1121. /* assume battery id is valid when adc error happens */
  1122. return 1;
  1123. }
  1124. if (rc < chip->batt_id_min || rc > chip->batt_id_max) {
  1125. pr_err("batt_id phy =%lld is not valid\n", rc);
  1126. return 0;
  1127. }
  1128. return 1;
  1129. }
  1130. static void check_battery_valid(struct pm8921_chg_chip *chip)
  1131. {
  1132. if (is_battery_valid(chip) == 0) {
  1133. pr_err("batt_id not valid, disbling charging\n");
  1134. pm_chg_auto_enable(chip, 0);
  1135. } else {
  1136. pm_chg_auto_enable(chip, !charging_disabled);
  1137. }
  1138. }
  1139. static void battery_id_valid(struct work_struct *work)
  1140. {
  1141. struct pm8921_chg_chip *chip = container_of(work,
  1142. struct pm8921_chg_chip, battery_id_valid_work);
  1143. check_battery_valid(chip);
  1144. }
  1145. static void pm8921_chg_enable_irq(struct pm8921_chg_chip *chip, int interrupt)
  1146. {
  1147. if (!__test_and_set_bit(interrupt, chip->enabled_irqs)) {
  1148. dev_dbg(chip->dev, "%d\n", chip->pmic_chg_irq[interrupt]);
  1149. enable_irq(chip->pmic_chg_irq[interrupt]);
  1150. }
  1151. }
  1152. static void pm8921_chg_disable_irq(struct pm8921_chg_chip *chip, int interrupt)
  1153. {
  1154. if (__test_and_clear_bit(interrupt, chip->enabled_irqs)) {
  1155. dev_dbg(chip->dev, "%d\n", chip->pmic_chg_irq[interrupt]);
  1156. disable_irq_nosync(chip->pmic_chg_irq[interrupt]);
  1157. }
  1158. }
  1159. static int pm8921_chg_is_enabled(struct pm8921_chg_chip *chip, int interrupt)
  1160. {
  1161. return test_bit(interrupt, chip->enabled_irqs);
  1162. }
  1163. static bool is_ext_charging(struct pm8921_chg_chip *chip)
  1164. {
  1165. union power_supply_propval ret = {0,};
  1166. if (!chip->ext_psy)
  1167. return false;
  1168. if (chip->ext_psy->get_property(chip->ext_psy,
  1169. POWER_SUPPLY_PROP_CHARGE_TYPE, &ret))
  1170. return false;
  1171. if (ret.intval > POWER_SUPPLY_CHARGE_TYPE_NONE)
  1172. return ret.intval;
  1173. return false;
  1174. }
  1175. static bool is_ext_trickle_charging(struct pm8921_chg_chip *chip)
  1176. {
  1177. union power_supply_propval ret = {0,};
  1178. if (!chip->ext_psy)
  1179. return false;
  1180. if (chip->ext_psy->get_property(chip->ext_psy,
  1181. POWER_SUPPLY_PROP_CHARGE_TYPE, &ret))
  1182. return false;
  1183. if (ret.intval == POWER_SUPPLY_CHARGE_TYPE_TRICKLE)
  1184. return true;
  1185. return false;
  1186. }
  1187. static int is_battery_charging(int fsm_state)
  1188. {
  1189. if (is_ext_charging(the_chip))
  1190. return 1;
  1191. switch (fsm_state) {
  1192. case FSM_STATE_ATC_2A:
  1193. case FSM_STATE_ATC_2B:
  1194. case FSM_STATE_ON_CHG_AND_BAT_6:
  1195. case FSM_STATE_FAST_CHG_7:
  1196. case FSM_STATE_TRKL_CHG_8:
  1197. return 1;
  1198. }
  1199. return 0;
  1200. }
  1201. static void bms_notify(struct work_struct *work)
  1202. {
  1203. struct bms_notify *n = container_of(work, struct bms_notify, work);
  1204. if (n->is_charging) {
  1205. pm8921_bms_charging_began();
  1206. } else {
  1207. pm8921_bms_charging_end(n->is_battery_full);
  1208. n->is_battery_full = 0;
  1209. }
  1210. }
  1211. static void bms_notify_check(struct pm8921_chg_chip *chip)
  1212. {
  1213. int fsm_state, new_is_charging;
  1214. fsm_state = pm_chg_get_fsm_state(chip);
  1215. new_is_charging = is_battery_charging(fsm_state);
  1216. if (chip->bms_notify.is_charging ^ new_is_charging) {
  1217. chip->bms_notify.is_charging = new_is_charging;
  1218. schedule_work(&(chip->bms_notify.work));
  1219. }
  1220. }
  1221. static enum power_supply_property pm_power_props_usb[] = {
  1222. POWER_SUPPLY_PROP_PRESENT,
  1223. POWER_SUPPLY_PROP_ONLINE,
  1224. POWER_SUPPLY_PROP_CURRENT_MAX,
  1225. POWER_SUPPLY_PROP_SCOPE,
  1226. POWER_SUPPLY_PROP_HEALTH,
  1227. };
  1228. static enum power_supply_property pm_power_props_mains[] = {
  1229. POWER_SUPPLY_PROP_PRESENT,
  1230. POWER_SUPPLY_PROP_ONLINE,
  1231. };
  1232. static char *pm_power_supplied_to[] = {
  1233. "battery",
  1234. };
  1235. #define USB_WALL_THRESHOLD_MA 500
  1236. static int pm_power_get_property_mains(struct power_supply *psy,
  1237. enum power_supply_property psp,
  1238. union power_supply_propval *val)
  1239. {
  1240. int type;
  1241. /* Check if called before init */
  1242. if (!the_chip)
  1243. return -EINVAL;
  1244. switch (psp) {
  1245. case POWER_SUPPLY_PROP_PRESENT:
  1246. case POWER_SUPPLY_PROP_ONLINE:
  1247. val->intval = 0;
  1248. if (the_chip->has_dc_supply) {
  1249. val->intval = 1;
  1250. return 0;
  1251. }
  1252. if (the_chip->dc_present) {
  1253. val->intval = 1;
  1254. return 0;
  1255. }
  1256. type = the_chip->usb_type;
  1257. if (type == POWER_SUPPLY_TYPE_USB_DCP ||
  1258. type == POWER_SUPPLY_TYPE_USB_ACA ||
  1259. type == POWER_SUPPLY_TYPE_USB_CDP)
  1260. val->intval = is_usb_chg_plugged_in(the_chip);
  1261. break;
  1262. default:
  1263. return -EINVAL;
  1264. }
  1265. return 0;
  1266. }
  1267. static int disable_aicl(int disable)
  1268. {
  1269. if (disable != POWER_SUPPLY_HEALTH_UNKNOWN
  1270. && disable != POWER_SUPPLY_HEALTH_GOOD) {
  1271. pr_err("called with invalid param :%d\n", disable);
  1272. return -EINVAL;
  1273. }
  1274. if (!the_chip) {
  1275. pr_err("%s called before init\n", __func__);
  1276. return -EINVAL;
  1277. }
  1278. pr_debug("Disable AICL = %d\n", disable);
  1279. the_chip->disable_aicl = disable;
  1280. return 0;
  1281. }
  1282. static int switch_usb_to_charge_mode(struct pm8921_chg_chip *chip)
  1283. {
  1284. int rc;
  1285. if (!chip->host_mode)
  1286. return 0;
  1287. /* enable usbin valid comparator and remove force usb ovp fet off */
  1288. rc = pm_chg_write(chip, USB_OVP_TEST, 0xB2);
  1289. if (rc < 0) {
  1290. pr_err("Failed to write 0xB2 to USB_OVP_TEST rc = %d\n", rc);
  1291. return rc;
  1292. }
  1293. chip->host_mode = 0;
  1294. return 0;
  1295. }
  1296. static int switch_usb_to_host_mode(struct pm8921_chg_chip *chip)
  1297. {
  1298. int rc;
  1299. if (chip->host_mode)
  1300. return 0;
  1301. /* disable usbin valid comparator and force usb ovp fet off */
  1302. rc = pm_chg_write(chip, USB_OVP_TEST, 0xB3);
  1303. if (rc < 0) {
  1304. pr_err("Failed to write 0xB3 to USB_OVP_TEST rc = %d\n", rc);
  1305. return rc;
  1306. }
  1307. chip->host_mode = 1;
  1308. return 0;
  1309. }
  1310. static int pm_power_set_property_usb(struct power_supply *psy,
  1311. enum power_supply_property psp,
  1312. const union power_supply_propval *val)
  1313. {
  1314. /* Check if called before init */
  1315. if (!the_chip)
  1316. return -EINVAL;
  1317. switch (psp) {
  1318. case POWER_SUPPLY_PROP_SCOPE:
  1319. if (val->intval == POWER_SUPPLY_SCOPE_SYSTEM)
  1320. return switch_usb_to_host_mode(the_chip);
  1321. if (val->intval == POWER_SUPPLY_SCOPE_DEVICE)
  1322. return switch_usb_to_charge_mode(the_chip);
  1323. else
  1324. return -EINVAL;
  1325. break;
  1326. case POWER_SUPPLY_PROP_TYPE:
  1327. return pm8921_set_usb_power_supply_type(val->intval);
  1328. case POWER_SUPPLY_PROP_HEALTH:
  1329. /* UNKNOWN(0) means enable aicl, GOOD(1) means disable aicl */
  1330. return disable_aicl(val->intval);
  1331. default:
  1332. return -EINVAL;
  1333. }
  1334. return 0;
  1335. }
  1336. static int usb_property_is_writeable(struct power_supply *psy,
  1337. enum power_supply_property psp)
  1338. {
  1339. switch (psp) {
  1340. case POWER_SUPPLY_PROP_HEALTH:
  1341. return 1;
  1342. default:
  1343. break;
  1344. }
  1345. return 0;
  1346. }
  1347. static int pm_power_get_property_usb(struct power_supply *psy,
  1348. enum power_supply_property psp,
  1349. union power_supply_propval *val)
  1350. {
  1351. int current_max;
  1352. /* Check if called before init */
  1353. if (!the_chip)
  1354. return -EINVAL;
  1355. switch (psp) {
  1356. case POWER_SUPPLY_PROP_CURRENT_MAX:
  1357. if (pm_is_chg_charge_dis(the_chip)) {
  1358. val->intval = 0;
  1359. } else {
  1360. pm_chg_iusbmax_get(the_chip, &current_max);
  1361. val->intval = current_max;
  1362. }
  1363. break;
  1364. case POWER_SUPPLY_PROP_PRESENT:
  1365. case POWER_SUPPLY_PROP_ONLINE:
  1366. val->intval = 0;
  1367. if (the_chip->usb_type == POWER_SUPPLY_TYPE_USB)
  1368. val->intval = is_usb_chg_plugged_in(the_chip);
  1369. break;
  1370. case POWER_SUPPLY_PROP_SCOPE:
  1371. if (the_chip->host_mode)
  1372. val->intval = POWER_SUPPLY_SCOPE_SYSTEM;
  1373. else
  1374. val->intval = POWER_SUPPLY_SCOPE_DEVICE;
  1375. break;
  1376. case POWER_SUPPLY_PROP_HEALTH:
  1377. /* UNKNOWN(0) means enable aicl, GOOD(1) means disable aicl */
  1378. val->intval = the_chip->disable_aicl;
  1379. break;
  1380. default:
  1381. return -EINVAL;
  1382. }
  1383. return 0;
  1384. }
  1385. static enum power_supply_property msm_batt_power_props[] = {
  1386. POWER_SUPPLY_PROP_STATUS,
  1387. POWER_SUPPLY_PROP_CHARGE_TYPE,
  1388. POWER_SUPPLY_PROP_HEALTH,
  1389. POWER_SUPPLY_PROP_PRESENT,
  1390. POWER_SUPPLY_PROP_TECHNOLOGY,
  1391. POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
  1392. POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  1393. POWER_SUPPLY_PROP_VOLTAGE_NOW,
  1394. POWER_SUPPLY_PROP_CAPACITY,
  1395. POWER_SUPPLY_PROP_CURRENT_MAX,
  1396. POWER_SUPPLY_PROP_CURRENT_NOW,
  1397. POWER_SUPPLY_PROP_TEMP,
  1398. POWER_SUPPLY_PROP_CHARGE_FULL,
  1399. POWER_SUPPLY_PROP_CHARGE_NOW,
  1400. };
  1401. static int get_prop_battery_uvolts(struct pm8921_chg_chip *chip)
  1402. {
  1403. int rc;
  1404. struct pm8xxx_adc_chan_result result;
  1405. rc = pm8xxx_adc_read(chip->vbat_channel, &result);
  1406. if (rc) {
  1407. pr_err("error reading adc channel = %d, rc = %d\n",
  1408. chip->vbat_channel, rc);
  1409. return rc;
  1410. }
  1411. pr_debug("mvolts phy = %lld meas = 0x%llx\n", result.physical,
  1412. result.measurement);
  1413. return (int)result.physical;
  1414. }
  1415. static int voltage_based_capacity(struct pm8921_chg_chip *chip)
  1416. {
  1417. int current_voltage_uv = get_prop_battery_uvolts(chip);
  1418. int current_voltage_mv = current_voltage_uv / 1000;
  1419. unsigned int low_voltage = chip->min_voltage_mv;
  1420. unsigned int high_voltage = chip->max_voltage_mv;
  1421. if (current_voltage_uv < 0) {
  1422. pr_err("Error reading current voltage\n");
  1423. return -EIO;
  1424. }
  1425. if (current_voltage_mv <= low_voltage)
  1426. return 0;
  1427. else if (current_voltage_mv >= high_voltage)
  1428. return 100;
  1429. else
  1430. return (current_voltage_mv - low_voltage) * 100
  1431. / (high_voltage - low_voltage);
  1432. }
  1433. static int get_prop_batt_present(struct pm8921_chg_chip *chip)
  1434. {
  1435. return pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
  1436. }
  1437. static int get_prop_batt_status(struct pm8921_chg_chip *chip)
  1438. {
  1439. int batt_state = POWER_SUPPLY_STATUS_DISCHARGING;
  1440. int fsm_state = pm_chg_get_fsm_state(chip);
  1441. int i;
  1442. if (chip->ext_psy) {
  1443. if (chip->ext_charge_done)
  1444. return POWER_SUPPLY_STATUS_FULL;
  1445. if (chip->ext_charging)
  1446. return POWER_SUPPLY_STATUS_CHARGING;
  1447. }
  1448. for (i = 0; i < ARRAY_SIZE(map); i++)
  1449. if (map[i].fsm_state == fsm_state)
  1450. batt_state = map[i].batt_state;
  1451. if (fsm_state == FSM_STATE_ON_CHG_HIGHI_1) {
  1452. if (!pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ)
  1453. || !pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ)
  1454. || pm_chg_get_rt_status(chip, CHGHOT_IRQ)
  1455. || pm_chg_get_rt_status(chip, VBATDET_LOW_IRQ))
  1456. batt_state = POWER_SUPPLY_STATUS_NOT_CHARGING;
  1457. }
  1458. return batt_state;
  1459. }
  1460. static int get_prop_batt_capacity(struct pm8921_chg_chip *chip)
  1461. {
  1462. int percent_soc;
  1463. if (chip->battery_less_hardware)
  1464. return 100;
  1465. if (!get_prop_batt_present(chip))
  1466. percent_soc = voltage_based_capacity(chip);
  1467. else
  1468. percent_soc = pm8921_bms_get_percent_charge();
  1469. if (percent_soc == -ENXIO)
  1470. percent_soc = voltage_based_capacity(chip);
  1471. if (percent_soc < 0) {
  1472. pr_err("Unable to read battery voltage\n");
  1473. goto fail_voltage;
  1474. }
  1475. if (percent_soc <= 10)
  1476. pr_warn_ratelimited("low battery charge = %d%%\n",
  1477. percent_soc);
  1478. if (percent_soc <= chip->resume_charge_percent
  1479. && get_prop_batt_status(chip) == POWER_SUPPLY_STATUS_FULL) {
  1480. pr_debug("soc fell below %d. charging enabled.\n",
  1481. chip->resume_charge_percent);
  1482. if (chip->is_bat_warm)
  1483. pr_warn_ratelimited("battery is warm = %d, do not resume charging at %d%%.\n",
  1484. chip->is_bat_warm,
  1485. chip->resume_charge_percent);
  1486. else if (chip->is_bat_cool)
  1487. pr_warn_ratelimited("battery is cool = %d, do not resume charging at %d%%.\n",
  1488. chip->is_bat_cool,
  1489. chip->resume_charge_percent);
  1490. else
  1491. pm_chg_vbatdet_set(the_chip, PM8921_CHG_VBATDET_MAX);
  1492. }
  1493. fail_voltage:
  1494. chip->recent_reported_soc = percent_soc;
  1495. return percent_soc;
  1496. }
  1497. static int get_prop_batt_current_max(struct pm8921_chg_chip *chip, int *curr)
  1498. {
  1499. *curr = 0;
  1500. *curr = pm8921_bms_get_current_max();
  1501. if (*curr == -EINVAL)
  1502. return -EINVAL;
  1503. return 0;
  1504. }
  1505. static int get_prop_batt_current(struct pm8921_chg_chip *chip, int *curr)
  1506. {
  1507. int rc;
  1508. *curr = 0;
  1509. rc = pm8921_bms_get_battery_current(curr);
  1510. if (rc == -ENXIO) {
  1511. rc = pm8xxx_ccadc_get_battery_current(curr);
  1512. }
  1513. if (rc)
  1514. pr_err("unable to get batt current rc = %d\n", rc);
  1515. return rc;
  1516. }
  1517. static int get_prop_batt_fcc(struct pm8921_chg_chip *chip)
  1518. {
  1519. int rc;
  1520. rc = pm8921_bms_get_fcc();
  1521. if (rc < 0)
  1522. pr_err("unable to get batt fcc rc = %d\n", rc);
  1523. return rc;
  1524. }
  1525. static int get_prop_batt_charge_now(struct pm8921_chg_chip *chip, int *cc_uah)
  1526. {
  1527. int rc;
  1528. *cc_uah = 0;
  1529. rc = pm8921_bms_cc_uah(cc_uah);
  1530. if (rc)
  1531. pr_err("unable to get batt fcc rc = %d\n", rc);
  1532. return rc;
  1533. }
  1534. static int get_prop_batt_health(struct pm8921_chg_chip *chip)
  1535. {
  1536. int temp;
  1537. temp = pm_chg_get_rt_status(chip, BATTTEMP_HOT_IRQ);
  1538. if (temp)
  1539. return POWER_SUPPLY_HEALTH_OVERHEAT;
  1540. temp = pm_chg_get_rt_status(chip, BATTTEMP_COLD_IRQ);
  1541. if (temp)
  1542. return POWER_SUPPLY_HEALTH_COLD;
  1543. return POWER_SUPPLY_HEALTH_GOOD;
  1544. }
  1545. static int get_prop_charge_type(struct pm8921_chg_chip *chip)
  1546. {
  1547. int temp;
  1548. if (!get_prop_batt_present(chip))
  1549. return POWER_SUPPLY_CHARGE_TYPE_NONE;
  1550. if (is_ext_trickle_charging(chip))
  1551. return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
  1552. if (is_ext_charging(chip))
  1553. return POWER_SUPPLY_CHARGE_TYPE_FAST;
  1554. temp = pm_chg_get_rt_status(chip, TRKLCHG_IRQ);
  1555. if (temp)
  1556. return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
  1557. temp = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  1558. if (temp)
  1559. return POWER_SUPPLY_CHARGE_TYPE_FAST;
  1560. return POWER_SUPPLY_CHARGE_TYPE_NONE;
  1561. }
  1562. #define MAX_TOLERABLE_BATT_TEMP_DDC 680
  1563. static int get_prop_batt_temp(struct pm8921_chg_chip *chip, int *temp)
  1564. {
  1565. int rc;
  1566. struct pm8xxx_adc_chan_result result;
  1567. if (chip->battery_less_hardware) {
  1568. *temp = 300;
  1569. return 0;
  1570. }
  1571. rc = pm8xxx_adc_read(chip->batt_temp_channel, &result);
  1572. if (rc) {
  1573. pr_err("error reading adc channel = %d, rc = %d\n",
  1574. chip->vbat_channel, rc);
  1575. return rc;
  1576. }
  1577. pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical,
  1578. result.measurement);
  1579. if (result.physical > MAX_TOLERABLE_BATT_TEMP_DDC)
  1580. pr_err("BATT_TEMP= %d > 68degC, device will be shutdown\n",
  1581. (int) result.physical);
  1582. *temp = (int)result.physical;
  1583. return rc;
  1584. }
  1585. static int pm_batt_power_get_property(struct power_supply *psy,
  1586. enum power_supply_property psp,
  1587. union power_supply_propval *val)
  1588. {
  1589. int rc = 0;
  1590. int value;
  1591. struct pm8921_chg_chip *chip = container_of(psy, struct pm8921_chg_chip,
  1592. batt_psy);
  1593. switch (psp) {
  1594. case POWER_SUPPLY_PROP_STATUS:
  1595. val->intval = get_prop_batt_status(chip);
  1596. break;
  1597. case POWER_SUPPLY_PROP_CHARGE_TYPE:
  1598. val->intval = get_prop_charge_type(chip);
  1599. break;
  1600. case POWER_SUPPLY_PROP_HEALTH:
  1601. val->intval = get_prop_batt_health(chip);
  1602. break;
  1603. case POWER_SUPPLY_PROP_PRESENT:
  1604. rc = get_prop_batt_present(chip);
  1605. if (rc >= 0) {
  1606. val->intval = rc;
  1607. rc = 0;
  1608. }
  1609. break;
  1610. case POWER_SUPPLY_PROP_TECHNOLOGY:
  1611. val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
  1612. break;
  1613. case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
  1614. val->intval = chip->max_voltage_mv * 1000;
  1615. break;
  1616. case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
  1617. val->intval = chip->min_voltage_mv * 1000;
  1618. break;
  1619. case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  1620. rc = get_prop_battery_uvolts(chip);
  1621. if (rc >= 0) {
  1622. val->intval = rc;
  1623. rc = 0;
  1624. }
  1625. break;
  1626. case POWER_SUPPLY_PROP_CAPACITY:
  1627. rc = get_prop_batt_capacity(chip);
  1628. if (rc >= 0) {
  1629. val->intval = rc;
  1630. rc = 0;
  1631. }
  1632. break;
  1633. case POWER_SUPPLY_PROP_CURRENT_NOW:
  1634. rc = get_prop_batt_current(chip, &value);
  1635. if (!rc)
  1636. val->intval = value;
  1637. break;
  1638. case POWER_SUPPLY_PROP_CURRENT_MAX:
  1639. rc = get_prop_batt_current_max(chip, &value);
  1640. if (!rc)
  1641. val->intval = value;
  1642. break;
  1643. case POWER_SUPPLY_PROP_TEMP:
  1644. rc = get_prop_batt_temp(chip, &value);
  1645. if (!rc)
  1646. val->intval = value;
  1647. break;
  1648. case POWER_SUPPLY_PROP_CHARGE_FULL:
  1649. rc = get_prop_batt_fcc(chip);
  1650. if (rc >= 0) {
  1651. val->intval = rc;
  1652. rc = 0;
  1653. }
  1654. break;
  1655. case POWER_SUPPLY_PROP_CHARGE_NOW:
  1656. rc = get_prop_batt_charge_now(chip, &value);
  1657. if (!rc) {
  1658. val->intval = value;
  1659. rc = 0;
  1660. }
  1661. break;
  1662. default:
  1663. rc = -EINVAL;
  1664. }
  1665. return rc;
  1666. }
  1667. static void (*notify_vbus_state_func_ptr)(int);
  1668. static int usb_chg_current;
  1669. int pm8921_charger_register_vbus_sn(void (*callback)(int))
  1670. {
  1671. pr_debug("%p\n", callback);
  1672. notify_vbus_state_func_ptr = callback;
  1673. return 0;
  1674. }
  1675. EXPORT_SYMBOL_GPL(pm8921_charger_register_vbus_sn);
  1676. /* this is passed to the hsusb via platform_data msm_otg_pdata */
  1677. void pm8921_charger_unregister_vbus_sn(void (*callback)(int))
  1678. {
  1679. pr_debug("%p\n", callback);
  1680. notify_vbus_state_func_ptr = NULL;
  1681. }
  1682. EXPORT_SYMBOL_GPL(pm8921_charger_unregister_vbus_sn);
  1683. static void notify_usb_of_the_plugin_event(int plugin)
  1684. {
  1685. plugin = !!plugin;
  1686. if (notify_vbus_state_func_ptr) {
  1687. pr_debug("notifying plugin\n");
  1688. (*notify_vbus_state_func_ptr) (plugin);
  1689. } else {
  1690. pr_debug("unable to notify plugin\n");
  1691. }
  1692. }
  1693. static void __pm8921_charger_vbus_draw(unsigned int mA)
  1694. {
  1695. int i, rc;
  1696. if (!the_chip) {
  1697. pr_err("called before init\n");
  1698. return;
  1699. }
  1700. if (usb_max_current && mA > usb_max_current) {
  1701. pr_debug("restricting usb current to %d instead of %d\n",
  1702. usb_max_current, mA);
  1703. mA = usb_max_current;
  1704. }
  1705. if (mA <= 2) {
  1706. usb_chg_current = 0;
  1707. rc = pm_chg_iusbmax_set(the_chip, 0);
  1708. if (rc) {
  1709. pr_err("unable to set iusb to %d rc = %d\n", 0, rc);
  1710. }
  1711. rc = pm_chg_usb_suspend_enable(the_chip, 1);
  1712. if (rc)
  1713. pr_err("fail to set suspend bit rc=%d\n", rc);
  1714. } else {
  1715. rc = pm_chg_usb_suspend_enable(the_chip, 0);
  1716. if (rc)
  1717. pr_err("fail to reset suspend bit rc=%d\n", rc);
  1718. for (i = ARRAY_SIZE(usb_ma_table) - 1; i >= 0; i--) {
  1719. if (usb_ma_table[i].usb_ma <= mA)
  1720. break;
  1721. }
  1722. if (i < 0) {
  1723. pr_err("can't find %dmA in usb_ma_table. Use min.\n",
  1724. mA);
  1725. i = 0;
  1726. }
  1727. /* Check if IUSB_FINE_RES is available */
  1728. while ((usb_ma_table[i].value & PM8917_IUSB_FINE_RES)
  1729. && !the_chip->iusb_fine_res)
  1730. i--;
  1731. if (i < 0)
  1732. i = 0;
  1733. rc = pm_chg_iusbmax_set(the_chip, i);
  1734. if (rc)
  1735. pr_err("unable to set iusb to %d rc = %d\n", i, rc);
  1736. }
  1737. }
  1738. /* USB calls these to tell us how much max usb current the system can draw */
  1739. void pm8921_charger_vbus_draw(unsigned int mA)
  1740. {
  1741. int set_usb_now_ma;
  1742. pr_debug("Enter charge=%d\n", mA);
  1743. /*
  1744. * Reject VBUS requests if USB connection is the only available
  1745. * power source. This makes sure that if booting without
  1746. * battery the iusb_max value is not decreased avoiding potential
  1747. * brown_outs.
  1748. *
  1749. * This would also apply when the battery has been
  1750. * removed from the running system.
  1751. */
  1752. if (mA == 0 && the_chip && !get_prop_batt_present(the_chip)
  1753. && !is_dc_chg_plugged_in(the_chip)) {
  1754. if (!the_chip->has_dc_supply) {
  1755. pr_err("rejected: no other power source mA = %d\n", mA);
  1756. return;
  1757. }
  1758. }
  1759. if (usb_max_current && mA > usb_max_current) {
  1760. pr_warn("restricting usb current to %d instead of %d\n",
  1761. usb_max_current, mA);
  1762. mA = usb_max_current;
  1763. }
  1764. if (usb_target_ma == 0 && mA > USB_WALL_THRESHOLD_MA)
  1765. usb_target_ma = mA;
  1766. if (usb_target_ma)
  1767. usb_target_ma = mA;
  1768. if (mA > USB_WALL_THRESHOLD_MA)
  1769. set_usb_now_ma = USB_WALL_THRESHOLD_MA;
  1770. else
  1771. set_usb_now_ma = mA;
  1772. if (the_chip && the_chip->disable_aicl)
  1773. set_usb_now_ma = mA;
  1774. if (the_chip)
  1775. __pm8921_charger_vbus_draw(set_usb_now_ma);
  1776. else
  1777. /*
  1778. * called before pmic initialized,
  1779. * save this value and use it at probe
  1780. */
  1781. usb_chg_current = set_usb_now_ma;
  1782. }
  1783. EXPORT_SYMBOL_GPL(pm8921_charger_vbus_draw);
  1784. int pm8921_is_usb_chg_plugged_in(void)
  1785. {
  1786. if (!the_chip) {
  1787. pr_err("called before init\n");
  1788. return -EINVAL;
  1789. }
  1790. return is_usb_chg_plugged_in(the_chip);
  1791. }
  1792. EXPORT_SYMBOL(pm8921_is_usb_chg_plugged_in);
  1793. int pm8921_is_dc_chg_plugged_in(void)
  1794. {
  1795. if (!the_chip) {
  1796. pr_err("called before init\n");
  1797. return -EINVAL;
  1798. }
  1799. return is_dc_chg_plugged_in(the_chip);
  1800. }
  1801. EXPORT_SYMBOL(pm8921_is_dc_chg_plugged_in);
  1802. int pm8921_is_battery_present(void)
  1803. {
  1804. if (!the_chip) {
  1805. pr_err("called before init\n");
  1806. return -EINVAL;
  1807. }
  1808. return get_prop_batt_present(the_chip);
  1809. }
  1810. EXPORT_SYMBOL(pm8921_is_battery_present);
  1811. int pm8921_is_batfet_closed(void)
  1812. {
  1813. if (!the_chip) {
  1814. pr_err("called before init\n");
  1815. return -EINVAL;
  1816. }
  1817. return is_batfet_closed(the_chip);
  1818. }
  1819. EXPORT_SYMBOL(pm8921_is_batfet_closed);
  1820. /*
  1821. * Disabling the charge current limit causes current
  1822. * current limits to have no monitoring. An adequate charger
  1823. * capable of supplying high current while sustaining VIN_MIN
  1824. * is required if the limiting is disabled.
  1825. */
  1826. int pm8921_disable_input_current_limit(bool disable)
  1827. {
  1828. if (!the_chip) {
  1829. pr_err("called before init\n");
  1830. return -EINVAL;
  1831. }
  1832. if (disable) {
  1833. pr_warn("Disabling input current limit!\n");
  1834. return pm_chg_write(the_chip, CHG_BUCK_CTRL_TEST3, 0xF2);
  1835. }
  1836. return 0;
  1837. }
  1838. EXPORT_SYMBOL(pm8921_disable_input_current_limit);
  1839. int pm8917_set_under_voltage_detection_threshold(int mv)
  1840. {
  1841. if (!the_chip) {
  1842. pr_err("called before init\n");
  1843. return -EINVAL;
  1844. }
  1845. return pm_chg_uvd_threshold_set(the_chip, mv);
  1846. }
  1847. EXPORT_SYMBOL(pm8917_set_under_voltage_detection_threshold);
  1848. int pm8921_set_max_battery_charge_current(int ma)
  1849. {
  1850. if (!the_chip) {
  1851. pr_err("called before init\n");
  1852. return -EINVAL;
  1853. }
  1854. return pm_chg_ibatmax_set(the_chip, ma);
  1855. }
  1856. EXPORT_SYMBOL(pm8921_set_max_battery_charge_current);
  1857. int pm8921_disable_source_current(bool disable)
  1858. {
  1859. if (!the_chip) {
  1860. pr_err("called before init\n");
  1861. return -EINVAL;
  1862. }
  1863. if (disable)
  1864. pr_warn("current drawn from chg=0, battery provides current\n");
  1865. pm_chg_usb_suspend_enable(the_chip, disable);
  1866. return pm_chg_charge_dis(the_chip, disable);
  1867. }
  1868. EXPORT_SYMBOL(pm8921_disable_source_current);
  1869. int pm8921_regulate_input_voltage(int voltage)
  1870. {
  1871. int rc;
  1872. if (!the_chip) {
  1873. pr_err("called before init\n");
  1874. return -EINVAL;
  1875. }
  1876. rc = pm_chg_vinmin_set(the_chip, voltage);
  1877. if (rc == 0)
  1878. the_chip->vin_min = voltage;
  1879. return rc;
  1880. }
  1881. #define USB_OV_THRESHOLD_MASK 0x60
  1882. #define USB_OV_THRESHOLD_SHIFT 5
  1883. int pm8921_usb_ovp_set_threshold(enum pm8921_usb_ov_threshold ov)
  1884. {
  1885. u8 temp;
  1886. if (!the_chip) {
  1887. pr_err("called before init\n");
  1888. return -EINVAL;
  1889. }
  1890. if (ov > PM_USB_OV_7V) {
  1891. pr_err("limiting to over voltage threshold to 7volts\n");
  1892. ov = PM_USB_OV_7V;
  1893. }
  1894. temp = USB_OV_THRESHOLD_MASK & (ov << USB_OV_THRESHOLD_SHIFT);
  1895. return pm_chg_masked_write(the_chip, USB_OVP_CONTROL,
  1896. USB_OV_THRESHOLD_MASK, temp);
  1897. }
  1898. EXPORT_SYMBOL(pm8921_usb_ovp_set_threshold);
  1899. #define USB_DEBOUNCE_TIME_MASK 0x06
  1900. #define USB_DEBOUNCE_TIME_SHIFT 1
  1901. int pm8921_usb_ovp_set_hystersis(enum pm8921_usb_debounce_time ms)
  1902. {
  1903. u8 temp;
  1904. if (!the_chip) {
  1905. pr_err("called before init\n");
  1906. return -EINVAL;
  1907. }
  1908. if (ms > PM_USB_DEBOUNCE_80P5MS) {
  1909. pr_err("limiting debounce to 80.5ms\n");
  1910. ms = PM_USB_DEBOUNCE_80P5MS;
  1911. }
  1912. temp = USB_DEBOUNCE_TIME_MASK & (ms << USB_DEBOUNCE_TIME_SHIFT);
  1913. return pm_chg_masked_write(the_chip, USB_OVP_CONTROL,
  1914. USB_DEBOUNCE_TIME_MASK, temp);
  1915. }
  1916. EXPORT_SYMBOL(pm8921_usb_ovp_set_hystersis);
  1917. #define USB_OVP_DISABLE_MASK 0x80
  1918. int pm8921_usb_ovp_disable(int disable)
  1919. {
  1920. u8 temp = 0;
  1921. if (!the_chip) {
  1922. pr_err("called before init\n");
  1923. return -EINVAL;
  1924. }
  1925. if (disable)
  1926. temp = USB_OVP_DISABLE_MASK;
  1927. return pm_chg_masked_write(the_chip, USB_OVP_CONTROL,
  1928. USB_OVP_DISABLE_MASK, temp);
  1929. }
  1930. bool pm8921_is_battery_charging(int *source)
  1931. {
  1932. int fsm_state, is_charging, dc_present, usb_present;
  1933. if (!the_chip) {
  1934. pr_err("called before init\n");
  1935. return -EINVAL;
  1936. }
  1937. fsm_state = pm_chg_get_fsm_state(the_chip);
  1938. is_charging = is_battery_charging(fsm_state);
  1939. if (is_charging == 0) {
  1940. *source = PM8921_CHG_SRC_NONE;
  1941. return is_charging;
  1942. }
  1943. if (source == NULL)
  1944. return is_charging;
  1945. /* the battery is charging, the source is requested, find it */
  1946. dc_present = is_dc_chg_plugged_in(the_chip);
  1947. usb_present = is_usb_chg_plugged_in(the_chip);
  1948. if (dc_present && !usb_present)
  1949. *source = PM8921_CHG_SRC_DC;
  1950. if (usb_present && !dc_present)
  1951. *source = PM8921_CHG_SRC_USB;
  1952. if (usb_present && dc_present)
  1953. /*
  1954. * The system always chooses dc for charging since it has
  1955. * higher priority.
  1956. */
  1957. *source = PM8921_CHG_SRC_DC;
  1958. return is_charging;
  1959. }
  1960. EXPORT_SYMBOL(pm8921_is_battery_charging);
  1961. int pm8921_set_usb_power_supply_type(enum power_supply_type type)
  1962. {
  1963. if (!the_chip) {
  1964. pr_err("called before init\n");
  1965. return -EINVAL;
  1966. }
  1967. if (type < POWER_SUPPLY_TYPE_USB && type > POWER_SUPPLY_TYPE_BATTERY)
  1968. return -EINVAL;
  1969. the_chip->usb_type = type;
  1970. power_supply_changed(&the_chip->usb_psy);
  1971. power_supply_changed(&the_chip->dc_psy);
  1972. return 0;
  1973. }
  1974. EXPORT_SYMBOL_GPL(pm8921_set_usb_power_supply_type);
  1975. int pm8921_batt_temperature(void)
  1976. {
  1977. int temp = 0, rc = 0;
  1978. if (!the_chip) {
  1979. pr_err("called before init\n");
  1980. return -EINVAL;
  1981. }
  1982. rc = get_prop_batt_temp(the_chip, &temp);
  1983. if (rc) {
  1984. pr_err("Unable to read temperature");
  1985. return rc;
  1986. }
  1987. return temp;
  1988. }
  1989. static void handle_usb_insertion_removal(struct pm8921_chg_chip *chip)
  1990. {
  1991. int usb_present;
  1992. pm_chg_failed_clear(chip, 1);
  1993. usb_present = is_usb_chg_plugged_in(chip);
  1994. if (chip->usb_present ^ usb_present) {
  1995. notify_usb_of_the_plugin_event(usb_present);
  1996. chip->usb_present = usb_present;
  1997. power_supply_changed(&chip->usb_psy);
  1998. power_supply_changed(&chip->batt_psy);
  1999. pm8921_bms_calibrate_hkadc();
  2000. }
  2001. if (usb_present) {
  2002. schedule_delayed_work(&chip->unplug_check_work,
  2003. msecs_to_jiffies(UNPLUG_CHECK_RAMP_MS));
  2004. pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
  2005. } else {
  2006. /* USB unplugged reset target current */
  2007. usb_target_ma = 0;
  2008. pm8921_chg_disable_irq(chip, CHG_GONE_IRQ);
  2009. }
  2010. bms_notify_check(chip);
  2011. }
  2012. static void handle_stop_ext_chg(struct pm8921_chg_chip *chip)
  2013. {
  2014. if (!chip->ext_psy) {
  2015. pr_debug("external charger not registered.\n");
  2016. return;
  2017. }
  2018. if (!chip->ext_charging) {
  2019. pr_debug("already not charging.\n");
  2020. return;
  2021. }
  2022. power_supply_set_charge_type(chip->ext_psy,
  2023. POWER_SUPPLY_CHARGE_TYPE_NONE);
  2024. pm8921_disable_source_current(false); /* release BATFET */
  2025. power_supply_changed(&chip->dc_psy);
  2026. chip->ext_charging = false;
  2027. chip->ext_charge_done = false;
  2028. bms_notify_check(chip);
  2029. /* Update battery charging LEDs and user space battery info */
  2030. power_supply_changed(&chip->batt_psy);
  2031. }
  2032. static void handle_start_ext_chg(struct pm8921_chg_chip *chip)
  2033. {
  2034. int dc_present;
  2035. int batt_present;
  2036. int batt_temp_ok;
  2037. unsigned long delay =
  2038. round_jiffies_relative(msecs_to_jiffies(EOC_CHECK_PERIOD_MS));
  2039. if (!chip->ext_psy) {
  2040. pr_debug("external charger not registered.\n");
  2041. return;
  2042. }
  2043. if (chip->ext_charging) {
  2044. pr_debug("already charging.\n");
  2045. return;
  2046. }
  2047. dc_present = is_dc_chg_plugged_in(chip);
  2048. batt_present = pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
  2049. batt_temp_ok = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
  2050. if (!dc_present) {
  2051. pr_warn("%s. dc not present.\n", __func__);
  2052. return;
  2053. }
  2054. if (!batt_present) {
  2055. pr_warn("%s. battery not present.\n", __func__);
  2056. return;
  2057. }
  2058. if (!batt_temp_ok) {
  2059. pr_warn("%s. battery temperature not ok.\n", __func__);
  2060. return;
  2061. }
  2062. /* Force BATFET=ON */
  2063. pm8921_disable_source_current(true);
  2064. schedule_delayed_work(&chip->unplug_check_work,
  2065. msecs_to_jiffies(UNPLUG_CHECK_RAMP_MS));
  2066. power_supply_set_online(chip->ext_psy, dc_present);
  2067. power_supply_set_charge_type(chip->ext_psy,
  2068. POWER_SUPPLY_CHARGE_TYPE_FAST);
  2069. chip->ext_charging = true;
  2070. chip->ext_charge_done = false;
  2071. bms_notify_check(chip);
  2072. /*
  2073. * since we wont get a fastchg irq from external charger
  2074. * use eoc worker to detect end of charging
  2075. */
  2076. schedule_delayed_work(&chip->eoc_work, delay);
  2077. wake_lock(&chip->eoc_wake_lock);
  2078. if (chip->btc_override)
  2079. schedule_delayed_work(&chip->btc_override_work,
  2080. round_jiffies_relative(msecs_to_jiffies
  2081. (chip->btc_delay_ms)));
  2082. /* Update battery charging LEDs and user space battery info */
  2083. power_supply_changed(&chip->batt_psy);
  2084. }
  2085. static void turn_off_ovp_fet(struct pm8921_chg_chip *chip, u16 ovptestreg)
  2086. {
  2087. u8 temp;
  2088. int rc;
  2089. rc = pm_chg_write(chip, ovptestreg, 0x30);
  2090. if (rc) {
  2091. pr_err("Failed to write 0x30 to ovptestreg rc = %d\n", rc);
  2092. return;
  2093. }
  2094. rc = pm8xxx_readb(chip->dev->parent, ovptestreg, &temp);
  2095. if (rc) {
  2096. pr_err("Failed to read from ovptestreg rc = %d\n", rc);
  2097. return;
  2098. }
  2099. /* set ovp fet disable bit and the write bit */
  2100. temp |= 0x81;
  2101. rc = pm_chg_write(chip, ovptestreg, temp);
  2102. if (rc) {
  2103. pr_err("Failed to write 0x%x ovptestreg rc=%d\n", temp, rc);
  2104. return;
  2105. }
  2106. }
  2107. static void turn_on_ovp_fet(struct pm8921_chg_chip *chip, u16 ovptestreg)
  2108. {
  2109. u8 temp;
  2110. int rc;
  2111. rc = pm_chg_write(chip, ovptestreg, 0x30);
  2112. if (rc) {
  2113. pr_err("Failed to write 0x30 to OVP_TEST rc = %d\n", rc);
  2114. return;
  2115. }
  2116. rc = pm8xxx_readb(chip->dev->parent, ovptestreg, &temp);
  2117. if (rc) {
  2118. pr_err("Failed to read from OVP_TEST rc = %d\n", rc);
  2119. return;
  2120. }
  2121. /* unset ovp fet disable bit and set the write bit */
  2122. temp &= 0xFE;
  2123. temp |= 0x80;
  2124. rc = pm_chg_write(chip, ovptestreg, temp);
  2125. if (rc) {
  2126. pr_err("Failed to write 0x%x to OVP_TEST rc = %d\n",
  2127. temp, rc);
  2128. return;
  2129. }
  2130. }
  2131. static int param_open_ovp_counter = 10;
  2132. module_param(param_open_ovp_counter, int, 0644);
  2133. #define USB_ACTIVE_BIT BIT(5)
  2134. #define DC_ACTIVE_BIT BIT(6)
  2135. static int is_active_chg_plugged_in(struct pm8921_chg_chip *chip,
  2136. u8 active_chg_mask)
  2137. {
  2138. if (active_chg_mask & USB_ACTIVE_BIT)
  2139. return pm_chg_get_rt_status(chip, USBIN_VALID_IRQ);
  2140. else if (active_chg_mask & DC_ACTIVE_BIT)
  2141. return pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
  2142. else
  2143. return 0;
  2144. }
  2145. #define WRITE_BANK_4 0xC0
  2146. #define OVP_DEBOUNCE_TIME 0x06
  2147. static void unplug_ovp_fet_open(struct pm8921_chg_chip *chip)
  2148. {
  2149. int chg_gone = 0, active_chg_plugged_in = 0;
  2150. int count = 0;
  2151. u8 active_mask = 0;
  2152. u16 ovpreg, ovptestreg;
  2153. if (is_usb_chg_plugged_in(chip) &&
  2154. (chip->active_path & USB_ACTIVE_BIT)) {
  2155. ovpreg = USB_OVP_CONTROL;
  2156. ovptestreg = USB_OVP_TEST;
  2157. active_mask = USB_ACTIVE_BIT;
  2158. } else if (is_dc_chg_plugged_in(chip) &&
  2159. (chip->active_path & DC_ACTIVE_BIT)) {
  2160. ovpreg = DC_OVP_CONTROL;
  2161. ovptestreg = DC_OVP_TEST;
  2162. active_mask = DC_ACTIVE_BIT;
  2163. } else {
  2164. return;
  2165. }
  2166. while (count++ < param_open_ovp_counter) {
  2167. pm_chg_masked_write(chip, ovpreg, OVP_DEBOUNCE_TIME, 0x0);
  2168. usleep(10);
  2169. active_chg_plugged_in
  2170. = is_active_chg_plugged_in(chip, active_mask);
  2171. chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
  2172. pr_debug("OVP FET count = %d chg_gone=%d, active_valid = %d\n",
  2173. count, chg_gone, active_chg_plugged_in);
  2174. /* note usb_chg_plugged_in=0 => chg_gone=1 */
  2175. if (chg_gone == 1 && active_chg_plugged_in == 1) {
  2176. pr_debug("since chg_gone = 1 dis ovp_fet for 20msec\n");
  2177. turn_off_ovp_fet(chip, ovptestreg);
  2178. msleep(20);
  2179. turn_on_ovp_fet(chip, ovptestreg);
  2180. } else {
  2181. break;
  2182. }
  2183. }
  2184. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917)
  2185. pm_chg_masked_write(chip, ovpreg, OVP_DEBOUNCE_TIME, 0x6);
  2186. else
  2187. pm_chg_masked_write(chip, ovpreg, OVP_DEBOUNCE_TIME, 0x2);
  2188. pr_debug("Exit count=%d chg_gone=%d, active_valid=%d\n",
  2189. count, chg_gone, active_chg_plugged_in);
  2190. return;
  2191. }
  2192. static int find_usb_ma_value(int value)
  2193. {
  2194. int i;
  2195. for (i = ARRAY_SIZE(usb_ma_table) - 1; i >= 0; i--) {
  2196. if (value >= usb_ma_table[i].usb_ma)
  2197. break;
  2198. }
  2199. return i;
  2200. }
  2201. static void decrease_usb_ma_value(int *value)
  2202. {
  2203. int i;
  2204. if (value) {
  2205. i = find_usb_ma_value(*value);
  2206. if (i > 0)
  2207. i--;
  2208. while (!the_chip->iusb_fine_res && i > 0
  2209. && (usb_ma_table[i].value & PM8917_IUSB_FINE_RES))
  2210. i--;
  2211. if (i < 0) {
  2212. pr_err("can't find %dmA in usb_ma_table. Use min.\n",
  2213. *value);
  2214. i = 0;
  2215. }
  2216. *value = usb_ma_table[i].usb_ma;
  2217. }
  2218. }
  2219. static void increase_usb_ma_value(int *value)
  2220. {
  2221. int i;
  2222. if (value) {
  2223. i = find_usb_ma_value(*value);
  2224. if (i < (ARRAY_SIZE(usb_ma_table) - 1))
  2225. i++;
  2226. /* Get next correct entry if IUSB_FINE_RES is not available */
  2227. while (!the_chip->iusb_fine_res
  2228. && (usb_ma_table[i].value & PM8917_IUSB_FINE_RES)
  2229. && i < (ARRAY_SIZE(usb_ma_table) - 1))
  2230. i++;
  2231. *value = usb_ma_table[i].usb_ma;
  2232. }
  2233. }
  2234. static void vin_collapse_check_worker(struct work_struct *work)
  2235. {
  2236. struct delayed_work *dwork = to_delayed_work(work);
  2237. struct pm8921_chg_chip *chip = container_of(dwork,
  2238. struct pm8921_chg_chip, vin_collapse_check_work);
  2239. /*
  2240. * AICL only for wall-chargers. If the charger appears to be plugged
  2241. * back in now, the corresponding unplug must have been because of we
  2242. * were trying to draw more current than the charger can support. In
  2243. * such a case reset usb current to 500mA and decrease the target.
  2244. * The AICL algorithm will step up the current from 500mA to target
  2245. */
  2246. if (is_usb_chg_plugged_in(chip)
  2247. && usb_target_ma > USB_WALL_THRESHOLD_MA
  2248. && !chip->disable_aicl) {
  2249. /* decrease usb_target_ma */
  2250. decrease_usb_ma_value(&usb_target_ma);
  2251. /* reset here, increase in unplug_check_worker */
  2252. __pm8921_charger_vbus_draw(USB_WALL_THRESHOLD_MA);
  2253. pr_debug("usb_now=%d, usb_target = %d\n",
  2254. USB_WALL_THRESHOLD_MA, usb_target_ma);
  2255. if (!delayed_work_pending(&chip->unplug_check_work))
  2256. schedule_delayed_work(&chip->unplug_check_work,
  2257. msecs_to_jiffies
  2258. (UNPLUG_CHECK_WAIT_PERIOD_MS));
  2259. } else {
  2260. handle_usb_insertion_removal(chip);
  2261. }
  2262. }
  2263. #define VIN_MIN_COLLAPSE_CHECK_MS 50
  2264. static irqreturn_t usbin_valid_irq_handler(int irq, void *data)
  2265. {
  2266. if (usb_target_ma)
  2267. schedule_delayed_work(&the_chip->vin_collapse_check_work,
  2268. msecs_to_jiffies(VIN_MIN_COLLAPSE_CHECK_MS));
  2269. else
  2270. handle_usb_insertion_removal(data);
  2271. return IRQ_HANDLED;
  2272. }
  2273. static irqreturn_t batt_inserted_irq_handler(int irq, void *data)
  2274. {
  2275. struct pm8921_chg_chip *chip = data;
  2276. int status;
  2277. status = pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
  2278. schedule_work(&chip->battery_id_valid_work);
  2279. handle_start_ext_chg(chip);
  2280. pr_debug("battery present=%d", status);
  2281. power_supply_changed(&chip->batt_psy);
  2282. return IRQ_HANDLED;
  2283. }
  2284. /*
  2285. * this interrupt used to restart charging a battery.
  2286. *
  2287. * Note: When DC-inserted the VBAT can't go low.
  2288. * VPH_PWR is provided by the ext-charger.
  2289. * After End-Of-Charging from DC, charging can be resumed only
  2290. * if DC is removed and then inserted after the battery was in use.
  2291. * Therefore the handle_start_ext_chg() is not called.
  2292. */
  2293. static irqreturn_t vbatdet_low_irq_handler(int irq, void *data)
  2294. {
  2295. struct pm8921_chg_chip *chip = data;
  2296. int high_transition;
  2297. high_transition = pm_chg_get_rt_status(chip, VBATDET_LOW_IRQ);
  2298. if (high_transition) {
  2299. /* enable auto charging */
  2300. pm_chg_auto_enable(chip, !charging_disabled);
  2301. pr_info("batt fell below resume voltage %s\n",
  2302. charging_disabled ? "" : "charger enabled");
  2303. }
  2304. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2305. power_supply_changed(&chip->batt_psy);
  2306. power_supply_changed(&chip->usb_psy);
  2307. power_supply_changed(&chip->dc_psy);
  2308. return IRQ_HANDLED;
  2309. }
  2310. static irqreturn_t chgwdog_irq_handler(int irq, void *data)
  2311. {
  2312. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2313. return IRQ_HANDLED;
  2314. }
  2315. static irqreturn_t vcp_irq_handler(int irq, void *data)
  2316. {
  2317. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2318. return IRQ_HANDLED;
  2319. }
  2320. static irqreturn_t atcdone_irq_handler(int irq, void *data)
  2321. {
  2322. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2323. return IRQ_HANDLED;
  2324. }
  2325. static irqreturn_t atcfail_irq_handler(int irq, void *data)
  2326. {
  2327. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2328. return IRQ_HANDLED;
  2329. }
  2330. static irqreturn_t chgdone_irq_handler(int irq, void *data)
  2331. {
  2332. struct pm8921_chg_chip *chip = data;
  2333. pr_debug("state_changed_to=%d\n", pm_chg_get_fsm_state(data));
  2334. handle_stop_ext_chg(chip);
  2335. power_supply_changed(&chip->batt_psy);
  2336. power_supply_changed(&chip->usb_psy);
  2337. power_supply_changed(&chip->dc_psy);
  2338. bms_notify_check(chip);
  2339. return IRQ_HANDLED;
  2340. }
  2341. static irqreturn_t chgfail_irq_handler(int irq, void *data)
  2342. {
  2343. struct pm8921_chg_chip *chip = data;
  2344. int ret;
  2345. if (!chip->stop_chg_upon_expiry) {
  2346. ret = pm_chg_failed_clear(chip, 1);
  2347. if (ret)
  2348. pr_err("Failed to write CHG_FAILED_CLEAR bit\n");
  2349. }
  2350. pr_err("batt_present = %d, batt_temp_ok = %d, state_changed_to=%d\n",
  2351. get_prop_batt_present(chip),
  2352. pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ),
  2353. pm_chg_get_fsm_state(data));
  2354. power_supply_changed(&chip->batt_psy);
  2355. power_supply_changed(&chip->usb_psy);
  2356. power_supply_changed(&chip->dc_psy);
  2357. return IRQ_HANDLED;
  2358. }
  2359. static irqreturn_t chgstate_irq_handler(int irq, void *data)
  2360. {
  2361. struct pm8921_chg_chip *chip = data;
  2362. pr_debug("state_changed_to=%d\n", pm_chg_get_fsm_state(data));
  2363. power_supply_changed(&chip->batt_psy);
  2364. power_supply_changed(&chip->usb_psy);
  2365. power_supply_changed(&chip->dc_psy);
  2366. bms_notify_check(chip);
  2367. return IRQ_HANDLED;
  2368. }
  2369. enum {
  2370. PON_TIME_25NS = 0x04,
  2371. PON_TIME_50NS = 0x08,
  2372. PON_TIME_100NS = 0x0C,
  2373. };
  2374. static void set_min_pon_time(struct pm8921_chg_chip *chip, int pon_time_ns)
  2375. {
  2376. u8 temp;
  2377. int rc;
  2378. rc = pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0x40);
  2379. if (rc) {
  2380. pr_err("Failed to write 0x70 to CTRL_TEST3 rc = %d\n", rc);
  2381. return;
  2382. }
  2383. rc = pm8xxx_readb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, &temp);
  2384. if (rc) {
  2385. pr_err("Failed to read CTRL_TEST3 rc = %d\n", rc);
  2386. return;
  2387. }
  2388. /* clear the min pon time select bit */
  2389. temp &= 0xF3;
  2390. /* set the pon time */
  2391. temp |= (u8)pon_time_ns;
  2392. /* write enable bank 4 */
  2393. temp |= 0x80;
  2394. rc = pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, temp);
  2395. if (rc) {
  2396. pr_err("Failed to write 0x%x to CTRL_TEST3 rc=%d\n", temp, rc);
  2397. return;
  2398. }
  2399. }
  2400. static void attempt_reverse_boost_fix(struct pm8921_chg_chip *chip)
  2401. {
  2402. pr_debug("Start\n");
  2403. set_min_pon_time(chip, PON_TIME_100NS);
  2404. pm_chg_vinmin_set(chip, chip->vin_min + 200);
  2405. msleep(250);
  2406. pm_chg_vinmin_set(chip, chip->vin_min);
  2407. set_min_pon_time(chip, PON_TIME_25NS);
  2408. pr_debug("End\n");
  2409. }
  2410. #define VIN_ACTIVE_BIT BIT(0)
  2411. #define UNPLUG_WRKARND_RESTORE_WAIT_PERIOD_US 200
  2412. #define VIN_MIN_INCREASE_MV 100
  2413. static void unplug_check_worker(struct work_struct *work)
  2414. {
  2415. struct delayed_work *dwork = to_delayed_work(work);
  2416. struct pm8921_chg_chip *chip = container_of(dwork,
  2417. struct pm8921_chg_chip, unplug_check_work);
  2418. u8 reg_loop = 0, active_path;
  2419. int rc, ibat, active_chg_plugged_in, usb_ma;
  2420. int chg_gone = 0;
  2421. bool ramp = false;
  2422. rc = pm8xxx_readb(chip->dev->parent, PBL_ACCESS1, &active_path);
  2423. if (rc) {
  2424. pr_err("Failed to read PBL_ACCESS1 rc=%d\n", rc);
  2425. return;
  2426. }
  2427. chip->active_path = active_path;
  2428. active_chg_plugged_in = is_active_chg_plugged_in(chip, active_path);
  2429. pr_debug("active_path = 0x%x, active_chg_plugged_in = %d\n",
  2430. active_path, active_chg_plugged_in);
  2431. if (active_path & USB_ACTIVE_BIT) {
  2432. pr_debug("USB charger active\n");
  2433. pm_chg_iusbmax_get(chip, &usb_ma);
  2434. if (usb_ma <= 100) {
  2435. pr_debug(
  2436. "Unenumerated or suspended usb_ma = %d skip\n",
  2437. usb_ma);
  2438. goto check_again_later;
  2439. }
  2440. } else if (active_path & DC_ACTIVE_BIT) {
  2441. pr_debug("DC charger active\n");
  2442. } else {
  2443. /* No charger active */
  2444. if (!(is_usb_chg_plugged_in(chip)
  2445. && !(is_dc_chg_plugged_in(chip)))) {
  2446. get_prop_batt_current(chip, &ibat);
  2447. pr_debug(
  2448. "Stop: chg removed reg_loop = %d, fsm = %d ibat = %d\n",
  2449. pm_chg_get_regulation_loop(chip),
  2450. pm_chg_get_fsm_state(chip), ibat);
  2451. return;
  2452. } else {
  2453. goto check_again_later;
  2454. }
  2455. }
  2456. /* AICL only for usb wall charger */
  2457. if ((active_path & USB_ACTIVE_BIT) && usb_target_ma > 0 &&
  2458. !chip->disable_aicl) {
  2459. reg_loop = pm_chg_get_regulation_loop(chip);
  2460. pr_debug("reg_loop=0x%x usb_ma = %d\n", reg_loop, usb_ma);
  2461. if ((reg_loop & VIN_ACTIVE_BIT) &&
  2462. (usb_ma > USB_WALL_THRESHOLD_MA)
  2463. && !charging_disabled) {
  2464. decrease_usb_ma_value(&usb_ma);
  2465. usb_target_ma = usb_ma;
  2466. /* end AICL here */
  2467. __pm8921_charger_vbus_draw(usb_ma);
  2468. pr_debug("usb_now=%d, usb_target = %d\n",
  2469. usb_ma, usb_target_ma);
  2470. }
  2471. }
  2472. reg_loop = pm_chg_get_regulation_loop(chip);
  2473. pr_debug("reg_loop=0x%x usb_ma = %d\n", reg_loop, usb_ma);
  2474. rc = get_prop_batt_current(chip, &ibat);
  2475. if ((reg_loop & VIN_ACTIVE_BIT) && !chip->disable_chg_rmvl_wrkarnd) {
  2476. if (ibat > 0 && !rc) {
  2477. pr_debug("revboost ibat = %d fsm = %d loop = 0x%x\n",
  2478. ibat, pm_chg_get_fsm_state(chip), reg_loop);
  2479. attempt_reverse_boost_fix(chip);
  2480. /* after reverse boost fix check if the active
  2481. * charger was detected as removed */
  2482. active_chg_plugged_in
  2483. = is_active_chg_plugged_in(chip,
  2484. active_path);
  2485. pr_debug("revboost post: active_chg_plugged_in = %d\n",
  2486. active_chg_plugged_in);
  2487. }
  2488. }
  2489. active_chg_plugged_in = is_active_chg_plugged_in(chip, active_path);
  2490. pr_debug("active_path = 0x%x, active_chg = %d\n",
  2491. active_path, active_chg_plugged_in);
  2492. chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
  2493. if (chg_gone == 1 && active_chg_plugged_in == 1 &&
  2494. !chip->disable_chg_rmvl_wrkarnd) {
  2495. pr_debug("chg_gone=%d, active_chg_plugged_in = %d\n",
  2496. chg_gone, active_chg_plugged_in);
  2497. unplug_ovp_fet_open(chip);
  2498. }
  2499. /* AICL only for usb wall charger */
  2500. if (!(reg_loop & VIN_ACTIVE_BIT) && (active_path & USB_ACTIVE_BIT)
  2501. && usb_target_ma > 0
  2502. && !charging_disabled
  2503. && !chip->disable_aicl) {
  2504. /* only increase iusb_max if vin loop not active */
  2505. if (usb_ma < usb_target_ma) {
  2506. increase_usb_ma_value(&usb_ma);
  2507. if (usb_ma > usb_target_ma)
  2508. usb_ma = usb_target_ma;
  2509. __pm8921_charger_vbus_draw(usb_ma);
  2510. pr_debug("usb_now=%d, usb_target = %d\n",
  2511. usb_ma, usb_target_ma);
  2512. ramp = true;
  2513. } else {
  2514. usb_target_ma = usb_ma;
  2515. }
  2516. }
  2517. check_again_later:
  2518. pr_debug("ramp: %d\n", ramp);
  2519. /* schedule to check again later */
  2520. if (ramp)
  2521. schedule_delayed_work(&chip->unplug_check_work,
  2522. msecs_to_jiffies(UNPLUG_CHECK_RAMP_MS));
  2523. else
  2524. schedule_delayed_work(&chip->unplug_check_work,
  2525. msecs_to_jiffies(UNPLUG_CHECK_WAIT_PERIOD_MS));
  2526. }
  2527. static irqreturn_t loop_change_irq_handler(int irq, void *data)
  2528. {
  2529. struct pm8921_chg_chip *chip = data;
  2530. pr_debug("fsm_state=%d reg_loop=0x%x\n",
  2531. pm_chg_get_fsm_state(data),
  2532. pm_chg_get_regulation_loop(data));
  2533. schedule_work(&chip->unplug_check_work.work);
  2534. return IRQ_HANDLED;
  2535. }
  2536. struct ibatmax_max_adj_entry {
  2537. int ibat_max_ma;
  2538. int max_adj_ma;
  2539. };
  2540. static struct ibatmax_max_adj_entry ibatmax_adj_table[] = {
  2541. {975, 300},
  2542. {1475, 150},
  2543. {1975, 200},
  2544. {2475, 250},
  2545. };
  2546. static int find_ibat_max_adj_ma(int ibat_target_ma)
  2547. {
  2548. int i = 0;
  2549. for (i = ARRAY_SIZE(ibatmax_adj_table); i > 0; i--) {
  2550. if (ibat_target_ma >= ibatmax_adj_table[i - 1].ibat_max_ma)
  2551. break;
  2552. }
  2553. if (i > 0)
  2554. i--;
  2555. return ibatmax_adj_table[i].max_adj_ma;
  2556. }
  2557. static irqreturn_t fastchg_irq_handler(int irq, void *data)
  2558. {
  2559. struct pm8921_chg_chip *chip = data;
  2560. int high_transition;
  2561. high_transition = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  2562. if (high_transition && !delayed_work_pending(&chip->eoc_work)) {
  2563. wake_lock(&chip->eoc_wake_lock);
  2564. schedule_delayed_work(&chip->eoc_work,
  2565. round_jiffies_relative(msecs_to_jiffies
  2566. (EOC_CHECK_PERIOD_MS)));
  2567. }
  2568. if (high_transition
  2569. && chip->btc_override
  2570. && !delayed_work_pending(&chip->btc_override_work)) {
  2571. schedule_delayed_work(&chip->btc_override_work,
  2572. round_jiffies_relative(msecs_to_jiffies
  2573. (chip->btc_delay_ms)));
  2574. }
  2575. power_supply_changed(&chip->batt_psy);
  2576. bms_notify_check(chip);
  2577. return IRQ_HANDLED;
  2578. }
  2579. static irqreturn_t trklchg_irq_handler(int irq, void *data)
  2580. {
  2581. struct pm8921_chg_chip *chip = data;
  2582. power_supply_changed(&chip->batt_psy);
  2583. return IRQ_HANDLED;
  2584. }
  2585. static irqreturn_t batt_removed_irq_handler(int irq, void *data)
  2586. {
  2587. struct pm8921_chg_chip *chip = data;
  2588. int status;
  2589. status = pm_chg_get_rt_status(chip, BATT_REMOVED_IRQ);
  2590. pr_debug("battery present=%d state=%d", !status,
  2591. pm_chg_get_fsm_state(data));
  2592. handle_stop_ext_chg(chip);
  2593. power_supply_changed(&chip->batt_psy);
  2594. return IRQ_HANDLED;
  2595. }
  2596. static irqreturn_t batttemp_hot_irq_handler(int irq, void *data)
  2597. {
  2598. struct pm8921_chg_chip *chip = data;
  2599. handle_stop_ext_chg(chip);
  2600. power_supply_changed(&chip->batt_psy);
  2601. return IRQ_HANDLED;
  2602. }
  2603. static irqreturn_t chghot_irq_handler(int irq, void *data)
  2604. {
  2605. struct pm8921_chg_chip *chip = data;
  2606. pr_debug("Chg hot fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2607. power_supply_changed(&chip->batt_psy);
  2608. power_supply_changed(&chip->usb_psy);
  2609. handle_stop_ext_chg(chip);
  2610. return IRQ_HANDLED;
  2611. }
  2612. static irqreturn_t batttemp_cold_irq_handler(int irq, void *data)
  2613. {
  2614. struct pm8921_chg_chip *chip = data;
  2615. pr_debug("Batt cold fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2616. handle_stop_ext_chg(chip);
  2617. power_supply_changed(&chip->batt_psy);
  2618. power_supply_changed(&chip->usb_psy);
  2619. return IRQ_HANDLED;
  2620. }
  2621. static irqreturn_t chg_gone_irq_handler(int irq, void *data)
  2622. {
  2623. struct pm8921_chg_chip *chip = data;
  2624. int chg_gone, usb_chg_plugged_in;
  2625. usb_chg_plugged_in = is_usb_chg_plugged_in(chip);
  2626. chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
  2627. pr_debug("chg_gone=%d, usb_valid = %d\n", chg_gone, usb_chg_plugged_in);
  2628. pr_debug("Chg gone fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2629. power_supply_changed(&chip->batt_psy);
  2630. power_supply_changed(&chip->usb_psy);
  2631. return IRQ_HANDLED;
  2632. }
  2633. /*
  2634. *
  2635. * bat_temp_ok_irq_handler - is edge triggered, hence it will
  2636. * fire for two cases:
  2637. *
  2638. * If the interrupt line switches to high temperature is okay
  2639. * and thus charging begins.
  2640. * If bat_temp_ok is low this means the temperature is now
  2641. * too hot or cold, so charging is stopped.
  2642. *
  2643. */
  2644. static irqreturn_t bat_temp_ok_irq_handler(int irq, void *data)
  2645. {
  2646. int bat_temp_ok;
  2647. struct pm8921_chg_chip *chip = data;
  2648. bat_temp_ok = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
  2649. pr_debug("batt_temp_ok = %d fsm_state%d\n",
  2650. bat_temp_ok, pm_chg_get_fsm_state(data));
  2651. if (bat_temp_ok)
  2652. handle_start_ext_chg(chip);
  2653. else
  2654. handle_stop_ext_chg(chip);
  2655. power_supply_changed(&chip->batt_psy);
  2656. power_supply_changed(&chip->usb_psy);
  2657. bms_notify_check(chip);
  2658. return IRQ_HANDLED;
  2659. }
  2660. static irqreturn_t coarse_det_low_irq_handler(int irq, void *data)
  2661. {
  2662. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2663. return IRQ_HANDLED;
  2664. }
  2665. static irqreturn_t vdd_loop_irq_handler(int irq, void *data)
  2666. {
  2667. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2668. return IRQ_HANDLED;
  2669. }
  2670. static irqreturn_t vreg_ov_irq_handler(int irq, void *data)
  2671. {
  2672. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2673. return IRQ_HANDLED;
  2674. }
  2675. static irqreturn_t vbatdet_irq_handler(int irq, void *data)
  2676. {
  2677. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2678. return IRQ_HANDLED;
  2679. }
  2680. static irqreturn_t batfet_irq_handler(int irq, void *data)
  2681. {
  2682. struct pm8921_chg_chip *chip = data;
  2683. pr_debug("vreg ov\n");
  2684. power_supply_changed(&chip->batt_psy);
  2685. return IRQ_HANDLED;
  2686. }
  2687. static irqreturn_t dcin_valid_irq_handler(int irq, void *data)
  2688. {
  2689. struct pm8921_chg_chip *chip = data;
  2690. int dc_present;
  2691. pm_chg_failed_clear(chip, 1);
  2692. dc_present = pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
  2693. if (chip->dc_present ^ dc_present)
  2694. pm8921_bms_calibrate_hkadc();
  2695. if (dc_present)
  2696. pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
  2697. else
  2698. pm8921_chg_disable_irq(chip, CHG_GONE_IRQ);
  2699. chip->dc_present = dc_present;
  2700. if (chip->ext_psy) {
  2701. if (dc_present)
  2702. handle_start_ext_chg(chip);
  2703. else
  2704. handle_stop_ext_chg(chip);
  2705. } else {
  2706. if (dc_present)
  2707. schedule_delayed_work(&chip->unplug_check_work,
  2708. msecs_to_jiffies(UNPLUG_CHECK_WAIT_PERIOD_MS));
  2709. power_supply_changed(&chip->dc_psy);
  2710. }
  2711. power_supply_changed(&chip->batt_psy);
  2712. return IRQ_HANDLED;
  2713. }
  2714. static irqreturn_t dcin_ov_irq_handler(int irq, void *data)
  2715. {
  2716. struct pm8921_chg_chip *chip = data;
  2717. handle_stop_ext_chg(chip);
  2718. return IRQ_HANDLED;
  2719. }
  2720. static irqreturn_t dcin_uv_irq_handler(int irq, void *data)
  2721. {
  2722. struct pm8921_chg_chip *chip = data;
  2723. handle_stop_ext_chg(chip);
  2724. return IRQ_HANDLED;
  2725. }
  2726. static int __pm_batt_external_power_changed_work(struct device *dev, void *data)
  2727. {
  2728. struct power_supply *psy = &the_chip->batt_psy;
  2729. struct power_supply *epsy = dev_get_drvdata(dev);
  2730. int i, dcin_irq;
  2731. /* Only search for external supply if none is registered */
  2732. if (!the_chip->ext_psy) {
  2733. dcin_irq = the_chip->pmic_chg_irq[DCIN_VALID_IRQ];
  2734. for (i = 0; i < epsy->num_supplicants; i++) {
  2735. if (!strncmp(epsy->supplied_to[i], psy->name, 7)) {
  2736. if (!strncmp(epsy->name, "dc", 2)) {
  2737. the_chip->ext_psy = epsy;
  2738. dcin_valid_irq_handler(dcin_irq,
  2739. the_chip);
  2740. }
  2741. }
  2742. }
  2743. }
  2744. return 0;
  2745. }
  2746. static void pm_batt_external_power_changed(struct power_supply *psy)
  2747. {
  2748. if (!the_chip)
  2749. return;
  2750. /* Only look for an external supply if it hasn't been registered */
  2751. if (!the_chip->ext_psy)
  2752. class_for_each_device(power_supply_class, NULL, psy,
  2753. __pm_batt_external_power_changed_work);
  2754. }
  2755. /**
  2756. * update_heartbeat - internal function to update userspace
  2757. * per update_time minutes
  2758. *
  2759. */
  2760. #define LOW_SOC_HEARTBEAT_MS 20000
  2761. static void update_heartbeat(struct work_struct *work)
  2762. {
  2763. struct delayed_work *dwork = to_delayed_work(work);
  2764. struct pm8921_chg_chip *chip = container_of(dwork,
  2765. struct pm8921_chg_chip, update_heartbeat_work);
  2766. bool chg_present = chip->usb_present || chip->dc_present;
  2767. /* for battery health when charger is not connected */
  2768. if (chip->btc_override && !chg_present)
  2769. schedule_delayed_work(&chip->btc_override_work,
  2770. round_jiffies_relative(msecs_to_jiffies
  2771. (chip->btc_delay_ms)));
  2772. /*
  2773. * check temp thresholds when charger is present and
  2774. * and battery is FULL. The temperature here can impact
  2775. * the charging restart conditions.
  2776. */
  2777. if (chip->btc_override && chg_present &&
  2778. !wake_lock_active(&chip->eoc_wake_lock))
  2779. check_temp_thresholds(chip);
  2780. power_supply_changed(&chip->batt_psy);
  2781. if (chip->recent_reported_soc <= 20)
  2782. schedule_delayed_work(&chip->update_heartbeat_work,
  2783. round_jiffies_relative(msecs_to_jiffies
  2784. (LOW_SOC_HEARTBEAT_MS)));
  2785. else
  2786. schedule_delayed_work(&chip->update_heartbeat_work,
  2787. round_jiffies_relative(msecs_to_jiffies
  2788. (chip->update_time)));
  2789. }
  2790. #define VDD_LOOP_ACTIVE_BIT BIT(3)
  2791. #define VDD_MAX_INCREASE_MV 400
  2792. static int vdd_max_increase_mv = VDD_MAX_INCREASE_MV;
  2793. module_param(vdd_max_increase_mv, int, 0644);
  2794. static int ichg_threshold_ua = -400000;
  2795. module_param(ichg_threshold_ua, int, 0644);
  2796. #define MIN_DELTA_MV_TO_INCREASE_VDD_MAX 13
  2797. #define PM8921_CHG_VDDMAX_RES_MV 10
  2798. static void adjust_vdd_max_for_fastchg(struct pm8921_chg_chip *chip,
  2799. int vbat_batt_terminal_uv)
  2800. {
  2801. int adj_vdd_max_mv, programmed_vdd_max;
  2802. int vbat_batt_terminal_mv;
  2803. int reg_loop;
  2804. int delta_mv = 0;
  2805. if (chip->rconn_mohm == 0) {
  2806. pr_debug("Exiting as rconn_mohm is 0\n");
  2807. return;
  2808. }
  2809. /* adjust vdd_max only in normal temperature zone */
  2810. if (chip->is_bat_cool || chip->is_bat_warm) {
  2811. pr_debug("Exiting is_bat_cool = %d is_batt_warm = %d\n",
  2812. chip->is_bat_cool, chip->is_bat_warm);
  2813. return;
  2814. }
  2815. reg_loop = pm_chg_get_regulation_loop(chip);
  2816. if (!(reg_loop & VDD_LOOP_ACTIVE_BIT)) {
  2817. pr_debug("Exiting Vdd loop is not active reg loop=0x%x\n",
  2818. reg_loop);
  2819. return;
  2820. }
  2821. vbat_batt_terminal_mv = vbat_batt_terminal_uv/1000;
  2822. pm_chg_vddmax_get(the_chip, &programmed_vdd_max);
  2823. delta_mv = chip->max_voltage_mv - vbat_batt_terminal_mv;
  2824. if (delta_mv > 0) /* meaning we want to increase the vddmax */ {
  2825. if (delta_mv < MIN_DELTA_MV_TO_INCREASE_VDD_MAX) {
  2826. pr_debug("vterm = %d is not low enough to inc vdd\n",
  2827. vbat_batt_terminal_mv);
  2828. return;
  2829. }
  2830. }
  2831. adj_vdd_max_mv = programmed_vdd_max + delta_mv;
  2832. pr_debug("vdd_max needs to be changed by %d mv from %d to %d\n",
  2833. delta_mv,
  2834. programmed_vdd_max,
  2835. adj_vdd_max_mv);
  2836. if (adj_vdd_max_mv < chip->max_voltage_mv) {
  2837. pr_debug("adj vdd_max lower than default max voltage\n");
  2838. return;
  2839. }
  2840. adj_vdd_max_mv = (adj_vdd_max_mv / PM8921_CHG_VDDMAX_RES_MV)
  2841. * PM8921_CHG_VDDMAX_RES_MV;
  2842. if (adj_vdd_max_mv > (chip->max_voltage_mv + vdd_max_increase_mv))
  2843. adj_vdd_max_mv = chip->max_voltage_mv + vdd_max_increase_mv;
  2844. pr_debug("adjusting vdd_max_mv to %d to make "
  2845. "vbat_batt_termial_uv = %d to %d\n",
  2846. adj_vdd_max_mv, vbat_batt_terminal_uv, chip->max_voltage_mv);
  2847. pm_chg_vddmax_set(chip, adj_vdd_max_mv);
  2848. }
  2849. static void set_appropriate_vbatdet(struct pm8921_chg_chip *chip)
  2850. {
  2851. if (chip->is_bat_cool)
  2852. pm_chg_vbatdet_set(the_chip,
  2853. the_chip->cool_bat_voltage
  2854. - the_chip->resume_voltage_delta);
  2855. else if (chip->is_bat_warm)
  2856. pm_chg_vbatdet_set(the_chip,
  2857. the_chip->warm_bat_voltage
  2858. - the_chip->resume_voltage_delta);
  2859. else
  2860. pm_chg_vbatdet_set(the_chip,
  2861. the_chip->max_voltage_mv
  2862. - the_chip->resume_voltage_delta);
  2863. }
  2864. static void set_appropriate_battery_current(struct pm8921_chg_chip *chip)
  2865. {
  2866. unsigned int chg_current = chip->max_bat_chg_current;
  2867. if (chip->is_bat_cool)
  2868. chg_current = min(chg_current, chip->cool_bat_chg_current);
  2869. if (chip->is_bat_warm)
  2870. chg_current = min(chg_current, chip->warm_bat_chg_current);
  2871. if (thermal_mitigation != 0 && chip->thermal_mitigation)
  2872. chg_current = min(chg_current,
  2873. chip->thermal_mitigation[thermal_mitigation]);
  2874. pm_chg_ibatmax_set(the_chip, chg_current);
  2875. }
  2876. #define TEMP_HYSTERISIS_DECIDEGC 20
  2877. static void battery_cool(bool enter)
  2878. {
  2879. pr_debug("enter = %d\n", enter);
  2880. if (enter == the_chip->is_bat_cool)
  2881. return;
  2882. the_chip->is_bat_cool = enter;
  2883. if (enter)
  2884. pm_chg_vddmax_set(the_chip, the_chip->cool_bat_voltage);
  2885. else
  2886. pm_chg_vddmax_set(the_chip, the_chip->max_voltage_mv);
  2887. set_appropriate_battery_current(the_chip);
  2888. set_appropriate_vbatdet(the_chip);
  2889. }
  2890. static void battery_warm(bool enter)
  2891. {
  2892. pr_debug("enter = %d\n", enter);
  2893. if (enter == the_chip->is_bat_warm)
  2894. return;
  2895. the_chip->is_bat_warm = enter;
  2896. if (enter)
  2897. pm_chg_vddmax_set(the_chip, the_chip->warm_bat_voltage);
  2898. else
  2899. pm_chg_vddmax_set(the_chip, the_chip->max_voltage_mv);
  2900. set_appropriate_battery_current(the_chip);
  2901. set_appropriate_vbatdet(the_chip);
  2902. }
  2903. static void check_temp_thresholds(struct pm8921_chg_chip *chip)
  2904. {
  2905. int temp = 0, rc;
  2906. rc = get_prop_batt_temp(chip, &temp);
  2907. pr_debug("temp = %d, warm_thr_temp = %d, cool_thr_temp = %d\n",
  2908. temp, chip->warm_temp_dc,
  2909. chip->cool_temp_dc);
  2910. if (chip->warm_temp_dc != INT_MIN) {
  2911. if (chip->is_bat_warm
  2912. && temp < chip->warm_temp_dc - chip->hysteresis_temp_dc)
  2913. battery_warm(false);
  2914. else if (!chip->is_bat_warm && temp >= chip->warm_temp_dc)
  2915. battery_warm(true);
  2916. }
  2917. if (chip->cool_temp_dc != INT_MIN) {
  2918. if (chip->is_bat_cool
  2919. && temp > chip->cool_temp_dc + chip->hysteresis_temp_dc)
  2920. battery_cool(false);
  2921. else if (!chip->is_bat_cool && temp <= chip->cool_temp_dc)
  2922. battery_cool(true);
  2923. }
  2924. }
  2925. enum {
  2926. CHG_IN_PROGRESS,
  2927. CHG_NOT_IN_PROGRESS,
  2928. CHG_FINISHED,
  2929. };
  2930. #define VBAT_TOLERANCE_MV 70
  2931. #define CHG_DISABLE_MSLEEP 100
  2932. static int is_charging_finished(struct pm8921_chg_chip *chip,
  2933. int vbat_batt_terminal_uv, int ichg_meas_ma)
  2934. {
  2935. int vbat_programmed, iterm_programmed, vbat_intended;
  2936. int regulation_loop, fast_chg, vcp;
  2937. int rc;
  2938. static int last_vbat_programmed = -EINVAL;
  2939. if (!is_ext_charging(chip)) {
  2940. /* return if the battery is not being fastcharged */
  2941. fast_chg = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  2942. pr_debug("fast_chg = %d\n", fast_chg);
  2943. if (fast_chg == 0)
  2944. return CHG_NOT_IN_PROGRESS;
  2945. vcp = pm_chg_get_rt_status(chip, VCP_IRQ);
  2946. pr_debug("vcp = %d\n", vcp);
  2947. if (vcp == 1)
  2948. return CHG_IN_PROGRESS;
  2949. /* reset count if battery is hot/cold */
  2950. rc = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
  2951. pr_debug("batt_temp_ok = %d\n", rc);
  2952. if (rc == 0)
  2953. return CHG_IN_PROGRESS;
  2954. rc = pm_chg_vddmax_get(chip, &vbat_programmed);
  2955. if (rc) {
  2956. pr_err("couldnt read vddmax rc = %d\n", rc);
  2957. return CHG_IN_PROGRESS;
  2958. }
  2959. pr_debug("vddmax = %d vbat_batt_terminal_uv=%d\n",
  2960. vbat_programmed, vbat_batt_terminal_uv);
  2961. if (last_vbat_programmed == -EINVAL)
  2962. last_vbat_programmed = vbat_programmed;
  2963. if (last_vbat_programmed != vbat_programmed) {
  2964. /* vddmax changed, reset and check again */
  2965. pr_debug("vddmax = %d last_vdd_max=%d\n",
  2966. vbat_programmed, last_vbat_programmed);
  2967. last_vbat_programmed = vbat_programmed;
  2968. return CHG_IN_PROGRESS;
  2969. }
  2970. if (chip->is_bat_cool)
  2971. vbat_intended = chip->cool_bat_voltage;
  2972. else if (chip->is_bat_warm)
  2973. vbat_intended = chip->warm_bat_voltage;
  2974. else
  2975. vbat_intended = chip->max_voltage_mv;
  2976. if (vbat_batt_terminal_uv / 1000
  2977. < vbat_intended - MIN_DELTA_MV_TO_INCREASE_VDD_MAX) {
  2978. pr_debug("terminal_uv:%d < vbat_intended:%d-hyst:%d\n",
  2979. vbat_batt_terminal_uv,
  2980. vbat_intended,
  2981. vbat_intended);
  2982. return CHG_IN_PROGRESS;
  2983. }
  2984. regulation_loop = pm_chg_get_regulation_loop(chip);
  2985. if (regulation_loop < 0) {
  2986. pr_err("couldnt read the regulation loop err=%d\n",
  2987. regulation_loop);
  2988. return CHG_IN_PROGRESS;
  2989. }
  2990. pr_debug("regulation_loop=%d\n", regulation_loop);
  2991. if (regulation_loop != 0 && regulation_loop != VDD_LOOP)
  2992. return CHG_IN_PROGRESS;
  2993. } /* !is_ext_charging */
  2994. /* reset count if battery chg current is more than iterm */
  2995. rc = pm_chg_iterm_get(chip, &iterm_programmed);
  2996. if (rc) {
  2997. pr_err("couldnt read iterm rc = %d\n", rc);
  2998. return CHG_IN_PROGRESS;
  2999. }
  3000. pr_debug("iterm_programmed = %d ichg_meas_ma=%d\n",
  3001. iterm_programmed, ichg_meas_ma);
  3002. /*
  3003. * ichg_meas_ma < 0 means battery is drawing current
  3004. * ichg_meas_ma > 0 means battery is providing current
  3005. */
  3006. if (ichg_meas_ma > 0)
  3007. return CHG_IN_PROGRESS;
  3008. if (ichg_meas_ma * -1 > iterm_programmed)
  3009. return CHG_IN_PROGRESS;
  3010. return CHG_FINISHED;
  3011. }
  3012. #define COMP_OVERRIDE_HOT_BANK 6
  3013. #define COMP_OVERRIDE_COLD_BANK 7
  3014. #define COMP_OVERRIDE_BIT BIT(1)
  3015. static int pm_chg_override_cold(struct pm8921_chg_chip *chip, int flag)
  3016. {
  3017. u8 val;
  3018. int rc = 0;
  3019. val = 0x80 | COMP_OVERRIDE_COLD_BANK << 2 | COMP_OVERRIDE_BIT;
  3020. if (flag)
  3021. val |= 0x01;
  3022. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3023. if (rc < 0)
  3024. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3025. pr_debug("btc cold = %d val = 0x%x\n", flag, val);
  3026. return rc;
  3027. }
  3028. static int pm_chg_override_hot(struct pm8921_chg_chip *chip, int flag)
  3029. {
  3030. u8 val;
  3031. int rc = 0;
  3032. val = 0x80 | COMP_OVERRIDE_HOT_BANK << 2 | COMP_OVERRIDE_BIT;
  3033. if (flag)
  3034. val |= 0x01;
  3035. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3036. if (rc < 0)
  3037. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3038. pr_debug("btc hot = %d val = 0x%x\n", flag, val);
  3039. return rc;
  3040. }
  3041. static void __devinit pm8921_chg_btc_override_init(struct pm8921_chg_chip *chip)
  3042. {
  3043. int rc = 0;
  3044. u8 reg;
  3045. u8 val;
  3046. val = COMP_OVERRIDE_HOT_BANK << 2;
  3047. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3048. if (rc < 0) {
  3049. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3050. goto cold_init;
  3051. }
  3052. rc = pm8xxx_readb(chip->dev->parent, COMPARATOR_OVERRIDE, &reg);
  3053. if (rc < 0) {
  3054. pr_err("Could not read bank %d of override rc = %d\n",
  3055. COMP_OVERRIDE_HOT_BANK, rc);
  3056. goto cold_init;
  3057. }
  3058. if ((reg & COMP_OVERRIDE_BIT) != COMP_OVERRIDE_BIT) {
  3059. /* for now override it as not hot */
  3060. rc = pm_chg_override_hot(chip, 0);
  3061. if (rc < 0)
  3062. pr_err("Could not override hot rc = %d\n", rc);
  3063. }
  3064. cold_init:
  3065. val = COMP_OVERRIDE_COLD_BANK << 2;
  3066. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3067. if (rc < 0) {
  3068. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3069. return;
  3070. }
  3071. rc = pm8xxx_readb(chip->dev->parent, COMPARATOR_OVERRIDE, &reg);
  3072. if (rc < 0) {
  3073. pr_err("Could not read bank %d of override rc = %d\n",
  3074. COMP_OVERRIDE_COLD_BANK, rc);
  3075. return;
  3076. }
  3077. if ((reg & COMP_OVERRIDE_BIT) != COMP_OVERRIDE_BIT) {
  3078. /* for now override it as not cold */
  3079. rc = pm_chg_override_cold(chip, 0);
  3080. if (rc < 0)
  3081. pr_err("Could not override cold rc = %d\n", rc);
  3082. }
  3083. }
  3084. static void btc_override_worker(struct work_struct *work)
  3085. {
  3086. int decidegc;
  3087. int temp;
  3088. int rc = 0;
  3089. struct delayed_work *dwork = to_delayed_work(work);
  3090. struct pm8921_chg_chip *chip = container_of(dwork,
  3091. struct pm8921_chg_chip, btc_override_work);
  3092. if (!chip->btc_override) {
  3093. pr_err("called when not enabled\n");
  3094. return;
  3095. }
  3096. rc = get_prop_batt_temp(chip, &decidegc);
  3097. if (rc) {
  3098. pr_info("Failed to read temperature\n");
  3099. goto fail_btc_temp;
  3100. }
  3101. pr_debug("temp=%d\n", decidegc);
  3102. temp = pm_chg_get_rt_status(chip, BATTTEMP_HOT_IRQ);
  3103. if (temp) {
  3104. if (decidegc < chip->btc_override_hot_decidegc -
  3105. chip->hysteresis_temp_dc)
  3106. /* stop forcing batt hot */
  3107. rc = pm_chg_override_hot(chip, 0);
  3108. if (rc)
  3109. pr_err("Couldnt write 0 to hot comp\n");
  3110. } else {
  3111. if (decidegc >= chip->btc_override_hot_decidegc)
  3112. /* start forcing batt hot */
  3113. rc = pm_chg_override_hot(chip, 1);
  3114. if (rc && chip->btc_panic_if_cant_stop_chg)
  3115. panic("Couldnt override comps to stop chg\n");
  3116. }
  3117. temp = pm_chg_get_rt_status(chip, BATTTEMP_COLD_IRQ);
  3118. if (temp) {
  3119. if (decidegc > chip->btc_override_cold_decidegc +
  3120. chip->hysteresis_temp_dc)
  3121. /* stop forcing batt cold */
  3122. rc = pm_chg_override_cold(chip, 0);
  3123. if (rc)
  3124. pr_err("Couldnt write 0 to cold comp\n");
  3125. } else {
  3126. if (decidegc <= chip->btc_override_cold_decidegc)
  3127. /* start forcing batt cold */
  3128. rc = pm_chg_override_cold(chip, 1);
  3129. if (rc && chip->btc_panic_if_cant_stop_chg)
  3130. panic("Couldnt override comps to stop chg\n");
  3131. }
  3132. if ((is_dc_chg_plugged_in(the_chip) || is_usb_chg_plugged_in(the_chip))
  3133. && get_prop_batt_status(chip) != POWER_SUPPLY_STATUS_FULL) {
  3134. schedule_delayed_work(&chip->btc_override_work,
  3135. round_jiffies_relative(msecs_to_jiffies
  3136. (chip->btc_delay_ms)));
  3137. return;
  3138. }
  3139. fail_btc_temp:
  3140. rc = pm_chg_override_hot(chip, 0);
  3141. if (rc)
  3142. pr_err("Couldnt write 0 to hot comp\n");
  3143. rc = pm_chg_override_cold(chip, 0);
  3144. if (rc)
  3145. pr_err("Couldnt write 0 to cold comp\n");
  3146. }
  3147. /**
  3148. * eoc_worker - internal function to check if battery EOC
  3149. * has happened
  3150. *
  3151. * If all conditions favouring, if the charge current is
  3152. * less than the term current for three consecutive times
  3153. * an EOC has happened.
  3154. * The wakelock is released if there is no need to reshedule
  3155. * - this happens when the battery is removed or EOC has
  3156. * happened
  3157. */
  3158. #define CONSECUTIVE_COUNT 3
  3159. static void eoc_worker(struct work_struct *work)
  3160. {
  3161. struct delayed_work *dwork = to_delayed_work(work);
  3162. struct pm8921_chg_chip *chip = container_of(dwork,
  3163. struct pm8921_chg_chip, eoc_work);
  3164. static int count;
  3165. int end;
  3166. int vbat_meas_uv, vbat_meas_mv;
  3167. int ichg_meas_ua, ichg_meas_ma;
  3168. int vbat_batt_terminal_uv;
  3169. pm8921_bms_get_simultaneous_battery_voltage_and_current(
  3170. &ichg_meas_ua, &vbat_meas_uv);
  3171. vbat_meas_mv = vbat_meas_uv / 1000;
  3172. /* rconn_mohm is in milliOhms */
  3173. ichg_meas_ma = ichg_meas_ua / 1000;
  3174. vbat_batt_terminal_uv = vbat_meas_uv
  3175. + ichg_meas_ma
  3176. * the_chip->rconn_mohm;
  3177. end = is_charging_finished(chip, vbat_batt_terminal_uv, ichg_meas_ma);
  3178. if (end == CHG_NOT_IN_PROGRESS && (!chip->btc_override ||
  3179. !(chip->usb_present || chip->dc_present))) {
  3180. count = 0;
  3181. goto eoc_worker_stop;
  3182. }
  3183. if (end == CHG_FINISHED) {
  3184. count++;
  3185. } else {
  3186. count = 0;
  3187. }
  3188. if (count == CONSECUTIVE_COUNT) {
  3189. count = 0;
  3190. pr_info("End of Charging\n");
  3191. pm_chg_auto_enable(chip, 0);
  3192. if (is_ext_charging(chip))
  3193. chip->ext_charge_done = true;
  3194. if (chip->is_bat_warm || chip->is_bat_cool)
  3195. chip->bms_notify.is_battery_full = 0;
  3196. else
  3197. chip->bms_notify.is_battery_full = 1;
  3198. /* declare end of charging by invoking chgdone interrupt */
  3199. chgdone_irq_handler(chip->pmic_chg_irq[CHGDONE_IRQ], chip);
  3200. } else {
  3201. check_temp_thresholds(chip);
  3202. if (end != CHG_NOT_IN_PROGRESS)
  3203. adjust_vdd_max_for_fastchg(chip, vbat_batt_terminal_uv);
  3204. pr_debug("EOC count = %d\n", count);
  3205. schedule_delayed_work(&chip->eoc_work,
  3206. round_jiffies_relative(msecs_to_jiffies
  3207. (EOC_CHECK_PERIOD_MS)));
  3208. return;
  3209. }
  3210. eoc_worker_stop:
  3211. /* set the vbatdet back, in case it was changed to trigger charging */
  3212. set_appropriate_vbatdet(chip);
  3213. wake_unlock(&chip->eoc_wake_lock);
  3214. }
  3215. /**
  3216. * set_disable_status_param -
  3217. *
  3218. * Internal function to disable battery charging and also disable drawing
  3219. * any current from the source. The device is forced to run on a battery
  3220. * after this.
  3221. */
  3222. static int set_disable_status_param(const char *val, struct kernel_param *kp)
  3223. {
  3224. int ret;
  3225. struct pm8921_chg_chip *chip = the_chip;
  3226. ret = param_set_int(val, kp);
  3227. if (ret) {
  3228. pr_err("error setting value %d\n", ret);
  3229. return ret;
  3230. }
  3231. pr_info("factory set disable param to %d\n", charging_disabled);
  3232. if (chip) {
  3233. pm_chg_auto_enable(chip, !charging_disabled);
  3234. pm_chg_charge_dis(chip, charging_disabled);
  3235. }
  3236. return 0;
  3237. }
  3238. module_param_call(disabled, set_disable_status_param, param_get_uint,
  3239. &charging_disabled, 0644);
  3240. static int rconn_mohm;
  3241. static int set_rconn_mohm(const char *val, struct kernel_param *kp)
  3242. {
  3243. int ret;
  3244. struct pm8921_chg_chip *chip = the_chip;
  3245. ret = param_set_int(val, kp);
  3246. if (ret) {
  3247. pr_err("error setting value %d\n", ret);
  3248. return ret;
  3249. }
  3250. if (chip)
  3251. chip->rconn_mohm = rconn_mohm;
  3252. return 0;
  3253. }
  3254. module_param_call(rconn_mohm, set_rconn_mohm, param_get_uint,
  3255. &rconn_mohm, 0644);
  3256. /**
  3257. * set_thermal_mitigation_level -
  3258. *
  3259. * Internal function to control battery charging current to reduce
  3260. * temperature
  3261. */
  3262. static int set_therm_mitigation_level(const char *val, struct kernel_param *kp)
  3263. {
  3264. int ret;
  3265. struct pm8921_chg_chip *chip = the_chip;
  3266. ret = param_set_int(val, kp);
  3267. if (ret) {
  3268. pr_err("error setting value %d\n", ret);
  3269. return ret;
  3270. }
  3271. if (!chip) {
  3272. pr_err("called before init\n");
  3273. return -EINVAL;
  3274. }
  3275. if (!chip->thermal_mitigation) {
  3276. pr_err("no thermal mitigation\n");
  3277. return -EINVAL;
  3278. }
  3279. if (thermal_mitigation < 0
  3280. || thermal_mitigation >= chip->thermal_levels) {
  3281. pr_err("out of bound level selected\n");
  3282. return -EINVAL;
  3283. }
  3284. set_appropriate_battery_current(chip);
  3285. return ret;
  3286. }
  3287. module_param_call(thermal_mitigation, set_therm_mitigation_level,
  3288. param_get_uint,
  3289. &thermal_mitigation, 0644);
  3290. static int set_usb_max_current(const char *val, struct kernel_param *kp)
  3291. {
  3292. int ret, mA;
  3293. struct pm8921_chg_chip *chip = the_chip;
  3294. ret = param_set_int(val, kp);
  3295. if (ret) {
  3296. pr_err("error setting value %d\n", ret);
  3297. return ret;
  3298. }
  3299. if (chip) {
  3300. pr_warn("setting current max to %d\n", usb_max_current);
  3301. pm_chg_iusbmax_get(chip, &mA);
  3302. if (mA > usb_max_current)
  3303. pm8921_charger_vbus_draw(usb_max_current);
  3304. return 0;
  3305. }
  3306. return -EINVAL;
  3307. }
  3308. module_param_call(usb_max_current, set_usb_max_current,
  3309. param_get_uint, &usb_max_current, 0644);
  3310. static void free_irqs(struct pm8921_chg_chip *chip)
  3311. {
  3312. int i;
  3313. for (i = 0; i < PM_CHG_MAX_INTS; i++)
  3314. if (chip->pmic_chg_irq[i]) {
  3315. free_irq(chip->pmic_chg_irq[i], chip);
  3316. chip->pmic_chg_irq[i] = 0;
  3317. }
  3318. }
  3319. #define PM8921_USB_TRIM_SEL_BIT BIT(6)
  3320. /* determines the initial present states */
  3321. static void __devinit determine_initial_state(struct pm8921_chg_chip *chip)
  3322. {
  3323. int fsm_state;
  3324. int is_fast_chg;
  3325. int rc = 0;
  3326. u8 trim_sel_reg = 0, regsbi;
  3327. chip->dc_present = !!is_dc_chg_plugged_in(chip);
  3328. chip->usb_present = !!is_usb_chg_plugged_in(chip);
  3329. notify_usb_of_the_plugin_event(chip->usb_present);
  3330. if (chip->usb_present || chip->dc_present) {
  3331. schedule_delayed_work(&chip->unplug_check_work,
  3332. msecs_to_jiffies(UNPLUG_CHECK_WAIT_PERIOD_MS));
  3333. pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
  3334. if (chip->btc_override)
  3335. schedule_delayed_work(&chip->btc_override_work,
  3336. round_jiffies_relative(msecs_to_jiffies
  3337. (chip->btc_delay_ms)));
  3338. }
  3339. pm8921_chg_enable_irq(chip, DCIN_VALID_IRQ);
  3340. pm8921_chg_enable_irq(chip, USBIN_VALID_IRQ);
  3341. pm8921_chg_enable_irq(chip, BATT_REMOVED_IRQ);
  3342. pm8921_chg_enable_irq(chip, BATT_INSERTED_IRQ);
  3343. pm8921_chg_enable_irq(chip, DCIN_OV_IRQ);
  3344. pm8921_chg_enable_irq(chip, DCIN_UV_IRQ);
  3345. pm8921_chg_enable_irq(chip, CHGFAIL_IRQ);
  3346. pm8921_chg_enable_irq(chip, FASTCHG_IRQ);
  3347. pm8921_chg_enable_irq(chip, VBATDET_LOW_IRQ);
  3348. pm8921_chg_enable_irq(chip, BAT_TEMP_OK_IRQ);
  3349. if (get_prop_batt_present(the_chip) || is_dc_chg_plugged_in(the_chip))
  3350. if (usb_chg_current)
  3351. /*
  3352. * Reissue a vbus draw call only if a battery
  3353. * or DC is present. We don't want to brown out the
  3354. * device if usb is its only source
  3355. */
  3356. __pm8921_charger_vbus_draw(usb_chg_current);
  3357. usb_chg_current = 0;
  3358. /*
  3359. * The bootloader could have started charging, a fastchg interrupt
  3360. * might not happen. Check the real time status and if it is fast
  3361. * charging invoke the handler so that the eoc worker could be
  3362. * started
  3363. */
  3364. is_fast_chg = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  3365. if (is_fast_chg)
  3366. fastchg_irq_handler(chip->pmic_chg_irq[FASTCHG_IRQ], chip);
  3367. fsm_state = pm_chg_get_fsm_state(chip);
  3368. if (is_battery_charging(fsm_state)) {
  3369. chip->bms_notify.is_charging = 1;
  3370. pm8921_bms_charging_began();
  3371. }
  3372. check_battery_valid(chip);
  3373. pr_debug("usb = %d, dc = %d batt = %d state=%d\n",
  3374. chip->usb_present,
  3375. chip->dc_present,
  3376. get_prop_batt_present(chip),
  3377. fsm_state);
  3378. /* Determine which USB trim column to use */
  3379. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917) {
  3380. chip->usb_trim_table = usb_trim_8917_table;
  3381. } else if (pm8xxx_get_version(chip->dev->parent) ==
  3382. PM8XXX_VERSION_8038) {
  3383. chip->usb_trim_table = usb_trim_8038_table;
  3384. } else if (pm8xxx_get_version(chip->dev->parent) ==
  3385. PM8XXX_VERSION_8921) {
  3386. rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, &regsbi);
  3387. rc |= pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, 0x5E);
  3388. rc |= pm8xxx_readb(chip->dev->parent, PM8921_USB_TRIM_SEL,
  3389. &trim_sel_reg);
  3390. rc |= pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, regsbi);
  3391. if (rc)
  3392. pr_err("Failed to read trim sel register rc=%d\n", rc);
  3393. if (trim_sel_reg & PM8921_USB_TRIM_SEL_BIT)
  3394. chip->usb_trim_table = usb_trim_pm8921_table_1;
  3395. else
  3396. chip->usb_trim_table = usb_trim_pm8921_table_2;
  3397. }
  3398. }
  3399. struct pm_chg_irq_init_data {
  3400. unsigned int irq_id;
  3401. char *name;
  3402. unsigned long flags;
  3403. irqreturn_t (*handler)(int, void *);
  3404. };
  3405. #define CHG_IRQ(_id, _flags, _handler) \
  3406. { \
  3407. .irq_id = _id, \
  3408. .name = #_id, \
  3409. .flags = _flags, \
  3410. .handler = _handler, \
  3411. }
  3412. struct pm_chg_irq_init_data chg_irq_data[] = {
  3413. CHG_IRQ(USBIN_VALID_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3414. usbin_valid_irq_handler),
  3415. CHG_IRQ(BATT_INSERTED_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3416. batt_inserted_irq_handler),
  3417. CHG_IRQ(VBATDET_LOW_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3418. vbatdet_low_irq_handler),
  3419. CHG_IRQ(CHGWDOG_IRQ, IRQF_TRIGGER_RISING, chgwdog_irq_handler),
  3420. CHG_IRQ(VCP_IRQ, IRQF_TRIGGER_RISING, vcp_irq_handler),
  3421. CHG_IRQ(ATCDONE_IRQ, IRQF_TRIGGER_RISING, atcdone_irq_handler),
  3422. CHG_IRQ(ATCFAIL_IRQ, IRQF_TRIGGER_RISING, atcfail_irq_handler),
  3423. CHG_IRQ(CHGDONE_IRQ, IRQF_TRIGGER_RISING, chgdone_irq_handler),
  3424. CHG_IRQ(CHGFAIL_IRQ, IRQF_TRIGGER_RISING, chgfail_irq_handler),
  3425. CHG_IRQ(CHGSTATE_IRQ, IRQF_TRIGGER_RISING, chgstate_irq_handler),
  3426. CHG_IRQ(LOOP_CHANGE_IRQ, IRQF_TRIGGER_RISING, loop_change_irq_handler),
  3427. CHG_IRQ(FASTCHG_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3428. fastchg_irq_handler),
  3429. CHG_IRQ(TRKLCHG_IRQ, IRQF_TRIGGER_RISING, trklchg_irq_handler),
  3430. CHG_IRQ(BATT_REMOVED_IRQ, IRQF_TRIGGER_RISING,
  3431. batt_removed_irq_handler),
  3432. CHG_IRQ(BATTTEMP_HOT_IRQ, IRQF_TRIGGER_RISING,
  3433. batttemp_hot_irq_handler),
  3434. CHG_IRQ(CHGHOT_IRQ, IRQF_TRIGGER_RISING, chghot_irq_handler),
  3435. CHG_IRQ(BATTTEMP_COLD_IRQ, IRQF_TRIGGER_RISING,
  3436. batttemp_cold_irq_handler),
  3437. CHG_IRQ(CHG_GONE_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3438. chg_gone_irq_handler),
  3439. CHG_IRQ(BAT_TEMP_OK_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3440. bat_temp_ok_irq_handler),
  3441. CHG_IRQ(COARSE_DET_LOW_IRQ, IRQF_TRIGGER_RISING,
  3442. coarse_det_low_irq_handler),
  3443. CHG_IRQ(VDD_LOOP_IRQ, IRQF_TRIGGER_RISING, vdd_loop_irq_handler),
  3444. CHG_IRQ(VREG_OV_IRQ, IRQF_TRIGGER_RISING, vreg_ov_irq_handler),
  3445. CHG_IRQ(VBATDET_IRQ, IRQF_TRIGGER_RISING, vbatdet_irq_handler),
  3446. CHG_IRQ(BATFET_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3447. batfet_irq_handler),
  3448. CHG_IRQ(DCIN_VALID_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3449. dcin_valid_irq_handler),
  3450. CHG_IRQ(DCIN_OV_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3451. dcin_ov_irq_handler),
  3452. CHG_IRQ(DCIN_UV_IRQ, IRQF_TRIGGER_RISING, dcin_uv_irq_handler),
  3453. };
  3454. static int __devinit request_irqs(struct pm8921_chg_chip *chip,
  3455. struct platform_device *pdev)
  3456. {
  3457. struct resource *res;
  3458. int ret, i;
  3459. ret = 0;
  3460. bitmap_fill(chip->enabled_irqs, PM_CHG_MAX_INTS);
  3461. for (i = 0; i < ARRAY_SIZE(chg_irq_data); i++) {
  3462. res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
  3463. chg_irq_data[i].name);
  3464. if (res == NULL) {
  3465. pr_err("couldn't find %s\n", chg_irq_data[i].name);
  3466. goto err_out;
  3467. }
  3468. chip->pmic_chg_irq[chg_irq_data[i].irq_id] = res->start;
  3469. ret = request_irq(res->start, chg_irq_data[i].handler,
  3470. chg_irq_data[i].flags,
  3471. chg_irq_data[i].name, chip);
  3472. if (ret < 0) {
  3473. pr_err("couldn't request %d (%s) %d\n", res->start,
  3474. chg_irq_data[i].name, ret);
  3475. chip->pmic_chg_irq[chg_irq_data[i].irq_id] = 0;
  3476. goto err_out;
  3477. }
  3478. pm8921_chg_disable_irq(chip, chg_irq_data[i].irq_id);
  3479. }
  3480. return 0;
  3481. err_out:
  3482. free_irqs(chip);
  3483. return -EINVAL;
  3484. }
  3485. static void pm8921_chg_force_19p2mhz_clk(struct pm8921_chg_chip *chip)
  3486. {
  3487. int err;
  3488. u8 temp;
  3489. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_ON);
  3490. temp = 0xD1;
  3491. err = pm_chg_write(chip, CHG_TEST, temp);
  3492. if (err) {
  3493. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3494. return;
  3495. }
  3496. temp = 0xD3;
  3497. err = pm_chg_write(chip, CHG_TEST, temp);
  3498. if (err) {
  3499. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3500. return;
  3501. }
  3502. temp = 0xD1;
  3503. err = pm_chg_write(chip, CHG_TEST, temp);
  3504. if (err) {
  3505. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3506. return;
  3507. }
  3508. temp = 0xD5;
  3509. err = pm_chg_write(chip, CHG_TEST, temp);
  3510. if (err) {
  3511. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3512. return;
  3513. }
  3514. udelay(183);
  3515. temp = 0xD1;
  3516. err = pm_chg_write(chip, CHG_TEST, temp);
  3517. if (err) {
  3518. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3519. return;
  3520. }
  3521. temp = 0xD0;
  3522. err = pm_chg_write(chip, CHG_TEST, temp);
  3523. if (err) {
  3524. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3525. return;
  3526. }
  3527. udelay(32);
  3528. temp = 0xD1;
  3529. err = pm_chg_write(chip, CHG_TEST, temp);
  3530. if (err) {
  3531. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3532. return;
  3533. }
  3534. temp = 0xD3;
  3535. err = pm_chg_write(chip, CHG_TEST, temp);
  3536. if (err) {
  3537. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3538. return;
  3539. }
  3540. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_OFF);
  3541. }
  3542. static void pm8921_chg_set_hw_clk_switching(struct pm8921_chg_chip *chip)
  3543. {
  3544. int err;
  3545. u8 temp;
  3546. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_ON);
  3547. temp = 0xD1;
  3548. err = pm_chg_write(chip, CHG_TEST, temp);
  3549. if (err) {
  3550. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3551. return;
  3552. }
  3553. temp = 0xD0;
  3554. err = pm_chg_write(chip, CHG_TEST, temp);
  3555. if (err) {
  3556. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3557. return;
  3558. }
  3559. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_OFF);
  3560. }
  3561. #define VREF_BATT_THERM_FORCE_ON BIT(7)
  3562. static void detect_battery_removal(struct pm8921_chg_chip *chip)
  3563. {
  3564. u8 temp;
  3565. pm8xxx_readb(chip->dev->parent, CHG_CNTRL, &temp);
  3566. pr_debug("upon restart CHG_CNTRL = 0x%x\n", temp);
  3567. if (!(temp & VREF_BATT_THERM_FORCE_ON))
  3568. /*
  3569. * batt therm force on bit is battery backed and is default 0
  3570. * The charger sets this bit at init time. If this bit is found
  3571. * 0 that means the battery was removed. Tell the bms about it
  3572. */
  3573. pm8921_bms_invalidate_shutdown_soc();
  3574. }
  3575. #define ENUM_TIMER_STOP_BIT BIT(1)
  3576. #define BOOT_DONE_BIT BIT(6)
  3577. #define CHG_BATFET_ON_BIT BIT(3)
  3578. #define CHG_VCP_EN BIT(0)
  3579. #define CHG_BAT_TEMP_DIS_BIT BIT(2)
  3580. #define SAFE_CURRENT_MA 1500
  3581. #define PM_SUB_REV 0x001
  3582. #define MIN_CHARGE_CURRENT_MA 350
  3583. #define DEFAULT_SAFETY_MINUTES 500
  3584. static int __devinit pm8921_chg_hw_init(struct pm8921_chg_chip *chip)
  3585. {
  3586. u8 subrev;
  3587. int rc, vdd_safe, fcc_uah, safety_time = DEFAULT_SAFETY_MINUTES;
  3588. /* forcing 19p2mhz before accessing any charger registers */
  3589. pm8921_chg_force_19p2mhz_clk(chip);
  3590. detect_battery_removal(chip);
  3591. rc = pm_chg_masked_write(chip, SYS_CONFIG_2,
  3592. BOOT_DONE_BIT, BOOT_DONE_BIT);
  3593. if (rc) {
  3594. pr_err("Failed to set BOOT_DONE_BIT rc=%d\n", rc);
  3595. return rc;
  3596. }
  3597. vdd_safe = chip->max_voltage_mv + VDD_MAX_INCREASE_MV;
  3598. if (vdd_safe > PM8921_CHG_VDDSAFE_MAX)
  3599. vdd_safe = PM8921_CHG_VDDSAFE_MAX;
  3600. rc = pm_chg_vddsafe_set(chip, vdd_safe);
  3601. if (rc) {
  3602. pr_err("Failed to set safe voltage to %d rc=%d\n",
  3603. chip->max_voltage_mv, rc);
  3604. return rc;
  3605. }
  3606. rc = pm_chg_vbatdet_set(chip,
  3607. chip->max_voltage_mv
  3608. - chip->resume_voltage_delta);
  3609. if (rc) {
  3610. pr_err("Failed to set vbatdet comprator voltage to %d rc=%d\n",
  3611. chip->max_voltage_mv - chip->resume_voltage_delta, rc);
  3612. return rc;
  3613. }
  3614. rc = pm_chg_vddmax_set(chip, chip->max_voltage_mv);
  3615. if (rc) {
  3616. pr_err("Failed to set max voltage to %d rc=%d\n",
  3617. chip->max_voltage_mv, rc);
  3618. return rc;
  3619. }
  3620. if (chip->safe_current_ma == 0)
  3621. chip->safe_current_ma = SAFE_CURRENT_MA;
  3622. rc = pm_chg_ibatsafe_set(chip, chip->safe_current_ma);
  3623. if (rc) {
  3624. pr_err("Failed to set max voltage to %d rc=%d\n",
  3625. SAFE_CURRENT_MA, rc);
  3626. return rc;
  3627. }
  3628. rc = pm_chg_ibatmax_set(chip, chip->max_bat_chg_current);
  3629. if (rc) {
  3630. pr_err("Failed to set max current to 400 rc=%d\n", rc);
  3631. return rc;
  3632. }
  3633. rc = pm_chg_iterm_set(chip, chip->term_current);
  3634. if (rc) {
  3635. pr_err("Failed to set term current to %d rc=%d\n",
  3636. chip->term_current, rc);
  3637. return rc;
  3638. }
  3639. /* Disable the ENUM TIMER */
  3640. rc = pm_chg_masked_write(chip, PBL_ACCESS2, ENUM_TIMER_STOP_BIT,
  3641. ENUM_TIMER_STOP_BIT);
  3642. if (rc) {
  3643. pr_err("Failed to set enum timer stop rc=%d\n", rc);
  3644. return rc;
  3645. }
  3646. fcc_uah = pm8921_bms_get_fcc();
  3647. if (fcc_uah > 0) {
  3648. safety_time = div_s64((s64)fcc_uah * 60,
  3649. 1000 * MIN_CHARGE_CURRENT_MA);
  3650. /* add 20 minutes of buffer time */
  3651. safety_time += 20;
  3652. /* make sure we do not exceed the maximum programmable time */
  3653. if (safety_time > PM8921_CHG_TCHG_MAX)
  3654. safety_time = PM8921_CHG_TCHG_MAX;
  3655. }
  3656. rc = pm_chg_tchg_max_set(chip, safety_time);
  3657. if (rc) {
  3658. pr_err("Failed to set max time to %d minutes rc=%d\n",
  3659. safety_time, rc);
  3660. return rc;
  3661. }
  3662. if (chip->ttrkl_time != 0) {
  3663. rc = pm_chg_ttrkl_max_set(chip, chip->ttrkl_time);
  3664. if (rc) {
  3665. pr_err("Failed to set trkl time to %d minutes rc=%d\n",
  3666. chip->ttrkl_time, rc);
  3667. return rc;
  3668. }
  3669. }
  3670. if (chip->vin_min != 0) {
  3671. rc = pm_chg_vinmin_set(chip, chip->vin_min);
  3672. if (rc) {
  3673. pr_err("Failed to set vin min to %d mV rc=%d\n",
  3674. chip->vin_min, rc);
  3675. return rc;
  3676. }
  3677. } else {
  3678. chip->vin_min = pm_chg_vinmin_get(chip);
  3679. }
  3680. rc = pm_chg_disable_wd(chip);
  3681. if (rc) {
  3682. pr_err("Failed to disable wd rc=%d\n", rc);
  3683. return rc;
  3684. }
  3685. rc = pm_chg_masked_write(chip, CHG_CNTRL_2,
  3686. CHG_BAT_TEMP_DIS_BIT, 0);
  3687. if (rc) {
  3688. pr_err("Failed to enable temp control chg rc=%d\n", rc);
  3689. return rc;
  3690. }
  3691. /* switch to a 3.2Mhz for the buck */
  3692. if (pm8xxx_get_revision(chip->dev->parent) >= PM8XXX_REVISION_8038_1p0)
  3693. rc = pm_chg_write(chip,
  3694. CHG_BUCK_CLOCK_CTRL_8038, 0x15);
  3695. else
  3696. rc = pm_chg_write(chip,
  3697. CHG_BUCK_CLOCK_CTRL, 0x15);
  3698. if (rc) {
  3699. pr_err("Failed to switch buck clk rc=%d\n", rc);
  3700. return rc;
  3701. }
  3702. if (chip->trkl_voltage != 0) {
  3703. rc = pm_chg_vtrkl_low_set(chip, chip->trkl_voltage);
  3704. if (rc) {
  3705. pr_err("Failed to set trkl voltage to %dmv rc=%d\n",
  3706. chip->trkl_voltage, rc);
  3707. return rc;
  3708. }
  3709. }
  3710. if (chip->weak_voltage != 0) {
  3711. rc = pm_chg_vweak_set(chip, chip->weak_voltage);
  3712. if (rc) {
  3713. pr_err("Failed to set weak voltage to %dmv rc=%d\n",
  3714. chip->weak_voltage, rc);
  3715. return rc;
  3716. }
  3717. }
  3718. if (chip->trkl_current != 0) {
  3719. rc = pm_chg_itrkl_set(chip, chip->trkl_current);
  3720. if (rc) {
  3721. pr_err("Failed to set trkl current to %dmA rc=%d\n",
  3722. chip->trkl_voltage, rc);
  3723. return rc;
  3724. }
  3725. }
  3726. if (chip->weak_current != 0) {
  3727. rc = pm_chg_iweak_set(chip, chip->weak_current);
  3728. if (rc) {
  3729. pr_err("Failed to set weak current to %dmA rc=%d\n",
  3730. chip->weak_current, rc);
  3731. return rc;
  3732. }
  3733. }
  3734. rc = pm_chg_batt_cold_temp_config(chip, chip->cold_thr);
  3735. if (rc) {
  3736. pr_err("Failed to set cold config %d rc=%d\n",
  3737. chip->cold_thr, rc);
  3738. }
  3739. rc = pm_chg_batt_hot_temp_config(chip, chip->hot_thr);
  3740. if (rc) {
  3741. pr_err("Failed to set hot config %d rc=%d\n",
  3742. chip->hot_thr, rc);
  3743. }
  3744. rc = pm_chg_led_src_config(chip, chip->led_src_config);
  3745. if (rc) {
  3746. pr_err("Failed to set charger LED src config %d rc=%d\n",
  3747. chip->led_src_config, rc);
  3748. }
  3749. /* Workarounds for die 3.0 */
  3750. if (pm8xxx_get_revision(chip->dev->parent) == PM8XXX_REVISION_8921_3p0
  3751. && pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8921) {
  3752. rc = pm8xxx_readb(chip->dev->parent, PM_SUB_REV, &subrev);
  3753. if (rc) {
  3754. pr_err("read failed: addr=%03X, rc=%d\n",
  3755. PM_SUB_REV, rc);
  3756. return rc;
  3757. }
  3758. /* Check if die 3.0.1 is present */
  3759. if (subrev & 0x1)
  3760. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0xA4);
  3761. else
  3762. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0xAC);
  3763. }
  3764. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917) {
  3765. /* Set PM8917 USB_OVP debounce time to 15 ms */
  3766. rc = pm_chg_masked_write(chip, USB_OVP_CONTROL,
  3767. OVP_DEBOUNCE_TIME, 0x6);
  3768. if (rc) {
  3769. pr_err("Failed to set USB OVP db rc=%d\n", rc);
  3770. return rc;
  3771. }
  3772. /* Enable isub_fine resolution AICL for PM8917 */
  3773. chip->iusb_fine_res = true;
  3774. if (chip->uvd_voltage_mv) {
  3775. rc = pm_chg_uvd_threshold_set(chip,
  3776. chip->uvd_voltage_mv);
  3777. if (rc) {
  3778. pr_err("Failed to set UVD threshold %drc=%d\n",
  3779. chip->uvd_voltage_mv, rc);
  3780. return rc;
  3781. }
  3782. }
  3783. }
  3784. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0xD9);
  3785. /* Disable EOC FSM processing */
  3786. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0x91);
  3787. rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON,
  3788. VREF_BATT_THERM_FORCE_ON);
  3789. if (rc)
  3790. pr_err("Failed to Force Vref therm rc=%d\n", rc);
  3791. rc = pm_chg_charge_dis(chip, charging_disabled);
  3792. if (rc) {
  3793. pr_err("Failed to disable CHG_CHARGE_DIS bit rc=%d\n", rc);
  3794. return rc;
  3795. }
  3796. rc = pm_chg_auto_enable(chip, !charging_disabled);
  3797. if (rc) {
  3798. pr_err("Failed to enable charging rc=%d\n", rc);
  3799. return rc;
  3800. }
  3801. return 0;
  3802. }
  3803. static int get_rt_status(void *data, u64 * val)
  3804. {
  3805. int i = (int)data;
  3806. int ret;
  3807. /* global irq number is passed in via data */
  3808. ret = pm_chg_get_rt_status(the_chip, i);
  3809. *val = ret;
  3810. return 0;
  3811. }
  3812. DEFINE_SIMPLE_ATTRIBUTE(rt_fops, get_rt_status, NULL, "%llu\n");
  3813. static int get_fsm_status(void *data, u64 * val)
  3814. {
  3815. u8 temp;
  3816. temp = pm_chg_get_fsm_state(the_chip);
  3817. *val = temp;
  3818. return 0;
  3819. }
  3820. DEFINE_SIMPLE_ATTRIBUTE(fsm_fops, get_fsm_status, NULL, "%llu\n");
  3821. static int get_reg_loop(void *data, u64 * val)
  3822. {
  3823. u8 temp;
  3824. if (!the_chip) {
  3825. pr_err("%s called before init\n", __func__);
  3826. return -EINVAL;
  3827. }
  3828. temp = pm_chg_get_regulation_loop(the_chip);
  3829. *val = temp;
  3830. return 0;
  3831. }
  3832. DEFINE_SIMPLE_ATTRIBUTE(reg_loop_fops, get_reg_loop, NULL, "0x%02llx\n");
  3833. static int get_reg(void *data, u64 * val)
  3834. {
  3835. int addr = (int)data;
  3836. int ret;
  3837. u8 temp;
  3838. ret = pm8xxx_readb(the_chip->dev->parent, addr, &temp);
  3839. if (ret) {
  3840. pr_err("pm8xxx_readb to %x value =%d errored = %d\n",
  3841. addr, temp, ret);
  3842. return -EAGAIN;
  3843. }
  3844. *val = temp;
  3845. return 0;
  3846. }
  3847. static int set_reg(void *data, u64 val)
  3848. {
  3849. int addr = (int)data;
  3850. int ret;
  3851. u8 temp;
  3852. temp = (u8) val;
  3853. ret = pm_chg_write(the_chip, addr, temp);
  3854. if (ret) {
  3855. pr_err("pm_chg_write to %x value =%d errored = %d\n",
  3856. addr, temp, ret);
  3857. return -EAGAIN;
  3858. }
  3859. return 0;
  3860. }
  3861. DEFINE_SIMPLE_ATTRIBUTE(reg_fops, get_reg, set_reg, "0x%02llx\n");
  3862. static int reg_loop;
  3863. #define MAX_REG_LOOP_CHAR 10
  3864. static int get_reg_loop_param(char *buf, struct kernel_param *kp)
  3865. {
  3866. u8 temp;
  3867. if (!the_chip) {
  3868. pr_err("called before init\n");
  3869. return -EINVAL;
  3870. }
  3871. temp = pm_chg_get_regulation_loop(the_chip);
  3872. return snprintf(buf, MAX_REG_LOOP_CHAR, "%d", temp);
  3873. }
  3874. module_param_call(reg_loop, NULL, get_reg_loop_param,
  3875. &reg_loop, 0644);
  3876. static int max_chg_ma;
  3877. #define MAX_MA_CHAR 10
  3878. static int get_max_chg_ma_param(char *buf, struct kernel_param *kp)
  3879. {
  3880. if (!the_chip) {
  3881. pr_err("called before init\n");
  3882. return -EINVAL;
  3883. }
  3884. return snprintf(buf, MAX_MA_CHAR, "%d", the_chip->max_bat_chg_current);
  3885. }
  3886. module_param_call(max_chg_ma, NULL, get_max_chg_ma_param,
  3887. &max_chg_ma, 0644);
  3888. static int ibatmax_ma;
  3889. static int set_ibat_max(const char *val, struct kernel_param *kp)
  3890. {
  3891. int rc;
  3892. if (!the_chip) {
  3893. pr_err("called before init\n");
  3894. return -EINVAL;
  3895. }
  3896. rc = param_set_int(val, kp);
  3897. if (rc) {
  3898. pr_err("error setting value %d\n", rc);
  3899. return rc;
  3900. }
  3901. if (abs(ibatmax_ma - the_chip->max_bat_chg_current)
  3902. <= the_chip->ibatmax_max_adj_ma) {
  3903. rc = pm_chg_ibatmax_set(the_chip, ibatmax_ma);
  3904. if (rc) {
  3905. pr_err("Failed to set ibatmax rc = %d\n", rc);
  3906. return rc;
  3907. }
  3908. }
  3909. return 0;
  3910. }
  3911. static int get_ibat_max(char *buf, struct kernel_param *kp)
  3912. {
  3913. int ibat_ma;
  3914. int rc;
  3915. if (!the_chip) {
  3916. pr_err("called before init\n");
  3917. return -EINVAL;
  3918. }
  3919. rc = pm_chg_ibatmax_get(the_chip, &ibat_ma);
  3920. if (rc) {
  3921. pr_err("ibatmax_get error = %d\n", rc);
  3922. return rc;
  3923. }
  3924. return snprintf(buf, MAX_MA_CHAR, "%d", ibat_ma);
  3925. }
  3926. module_param_call(ibatmax_ma, set_ibat_max, get_ibat_max,
  3927. &ibatmax_ma, 0644);
  3928. enum {
  3929. BAT_WARM_ZONE,
  3930. BAT_COOL_ZONE,
  3931. };
  3932. static int get_warm_cool(void *data, u64 * val)
  3933. {
  3934. if (!the_chip) {
  3935. pr_err("%s called before init\n", __func__);
  3936. return -EINVAL;
  3937. }
  3938. if ((int)data == BAT_WARM_ZONE)
  3939. *val = the_chip->is_bat_warm;
  3940. if ((int)data == BAT_COOL_ZONE)
  3941. *val = the_chip->is_bat_cool;
  3942. return 0;
  3943. }
  3944. DEFINE_SIMPLE_ATTRIBUTE(warm_cool_fops, get_warm_cool, NULL, "0x%lld\n");
  3945. static void create_debugfs_entries(struct pm8921_chg_chip *chip)
  3946. {
  3947. int i;
  3948. chip->dent = debugfs_create_dir("pm8921_chg", NULL);
  3949. if (IS_ERR(chip->dent)) {
  3950. pr_err("pmic charger couldnt create debugfs dir\n");
  3951. return;
  3952. }
  3953. debugfs_create_file("CHG_CNTRL", 0644, chip->dent,
  3954. (void *)CHG_CNTRL, &reg_fops);
  3955. debugfs_create_file("CHG_CNTRL_2", 0644, chip->dent,
  3956. (void *)CHG_CNTRL_2, &reg_fops);
  3957. debugfs_create_file("CHG_CNTRL_3", 0644, chip->dent,
  3958. (void *)CHG_CNTRL_3, &reg_fops);
  3959. debugfs_create_file("PBL_ACCESS1", 0644, chip->dent,
  3960. (void *)PBL_ACCESS1, &reg_fops);
  3961. debugfs_create_file("PBL_ACCESS2", 0644, chip->dent,
  3962. (void *)PBL_ACCESS2, &reg_fops);
  3963. debugfs_create_file("SYS_CONFIG_1", 0644, chip->dent,
  3964. (void *)SYS_CONFIG_1, &reg_fops);
  3965. debugfs_create_file("SYS_CONFIG_2", 0644, chip->dent,
  3966. (void *)SYS_CONFIG_2, &reg_fops);
  3967. debugfs_create_file("CHG_VDD_MAX", 0644, chip->dent,
  3968. (void *)CHG_VDD_MAX, &reg_fops);
  3969. debugfs_create_file("CHG_VDD_SAFE", 0644, chip->dent,
  3970. (void *)CHG_VDD_SAFE, &reg_fops);
  3971. debugfs_create_file("CHG_VBAT_DET", 0644, chip->dent,
  3972. (void *)CHG_VBAT_DET, &reg_fops);
  3973. debugfs_create_file("CHG_IBAT_MAX", 0644, chip->dent,
  3974. (void *)CHG_IBAT_MAX, &reg_fops);
  3975. debugfs_create_file("CHG_IBAT_SAFE", 0644, chip->dent,
  3976. (void *)CHG_IBAT_SAFE, &reg_fops);
  3977. debugfs_create_file("CHG_VIN_MIN", 0644, chip->dent,
  3978. (void *)CHG_VIN_MIN, &reg_fops);
  3979. debugfs_create_file("CHG_VTRICKLE", 0644, chip->dent,
  3980. (void *)CHG_VTRICKLE, &reg_fops);
  3981. debugfs_create_file("CHG_ITRICKLE", 0644, chip->dent,
  3982. (void *)CHG_ITRICKLE, &reg_fops);
  3983. debugfs_create_file("CHG_ITERM", 0644, chip->dent,
  3984. (void *)CHG_ITERM, &reg_fops);
  3985. debugfs_create_file("CHG_TCHG_MAX", 0644, chip->dent,
  3986. (void *)CHG_TCHG_MAX, &reg_fops);
  3987. debugfs_create_file("CHG_TWDOG", 0644, chip->dent,
  3988. (void *)CHG_TWDOG, &reg_fops);
  3989. debugfs_create_file("CHG_TEMP_THRESH", 0644, chip->dent,
  3990. (void *)CHG_TEMP_THRESH, &reg_fops);
  3991. debugfs_create_file("CHG_COMP_OVR", 0644, chip->dent,
  3992. (void *)CHG_COMP_OVR, &reg_fops);
  3993. debugfs_create_file("CHG_BUCK_CTRL_TEST1", 0644, chip->dent,
  3994. (void *)CHG_BUCK_CTRL_TEST1, &reg_fops);
  3995. debugfs_create_file("CHG_BUCK_CTRL_TEST2", 0644, chip->dent,
  3996. (void *)CHG_BUCK_CTRL_TEST2, &reg_fops);
  3997. debugfs_create_file("CHG_BUCK_CTRL_TEST3", 0644, chip->dent,
  3998. (void *)CHG_BUCK_CTRL_TEST3, &reg_fops);
  3999. debugfs_create_file("CHG_TEST", 0644, chip->dent,
  4000. (void *)CHG_TEST, &reg_fops);
  4001. debugfs_create_file("FSM_STATE", 0644, chip->dent, NULL,
  4002. &fsm_fops);
  4003. debugfs_create_file("REGULATION_LOOP_CONTROL", 0644, chip->dent, NULL,
  4004. &reg_loop_fops);
  4005. debugfs_create_file("BAT_WARM_ZONE", 0644, chip->dent,
  4006. (void *)BAT_WARM_ZONE, &warm_cool_fops);
  4007. debugfs_create_file("BAT_COOL_ZONE", 0644, chip->dent,
  4008. (void *)BAT_COOL_ZONE, &warm_cool_fops);
  4009. for (i = 0; i < ARRAY_SIZE(chg_irq_data); i++) {
  4010. if (chip->pmic_chg_irq[chg_irq_data[i].irq_id])
  4011. debugfs_create_file(chg_irq_data[i].name, 0444,
  4012. chip->dent,
  4013. (void *)chg_irq_data[i].irq_id,
  4014. &rt_fops);
  4015. }
  4016. }
  4017. static int pm8921_charger_suspend_noirq(struct device *dev)
  4018. {
  4019. int rc;
  4020. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4021. rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON, 0);
  4022. if (rc)
  4023. pr_err("Failed to Force Vref therm off rc=%d\n", rc);
  4024. rc = pm8921_chg_set_lpm(chip, 1);
  4025. if (rc)
  4026. pr_err("Failed to set lpm rc=%d\n", rc);
  4027. pm8921_chg_set_hw_clk_switching(chip);
  4028. return 0;
  4029. }
  4030. static int pm8921_charger_resume_noirq(struct device *dev)
  4031. {
  4032. int rc;
  4033. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4034. rc = pm8921_chg_set_lpm(chip, 0);
  4035. if (rc)
  4036. pr_err("Failed to set lpm rc=%d\n", rc);
  4037. pm8921_chg_force_19p2mhz_clk(chip);
  4038. rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON,
  4039. VREF_BATT_THERM_FORCE_ON);
  4040. if (rc)
  4041. pr_err("Failed to Force Vref therm on rc=%d\n", rc);
  4042. return 0;
  4043. }
  4044. static int pm8921_charger_resume(struct device *dev)
  4045. {
  4046. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4047. if (pm8921_chg_is_enabled(chip, LOOP_CHANGE_IRQ)) {
  4048. disable_irq_wake(chip->pmic_chg_irq[LOOP_CHANGE_IRQ]);
  4049. pm8921_chg_disable_irq(chip, LOOP_CHANGE_IRQ);
  4050. }
  4051. if (chip->btc_override && (is_dc_chg_plugged_in(the_chip) ||
  4052. is_usb_chg_plugged_in(the_chip)))
  4053. schedule_delayed_work(&chip->btc_override_work, 0);
  4054. schedule_delayed_work(&chip->update_heartbeat_work, 0);
  4055. return 0;
  4056. }
  4057. static int pm8921_charger_suspend(struct device *dev)
  4058. {
  4059. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4060. cancel_delayed_work_sync(&chip->update_heartbeat_work);
  4061. if (chip->btc_override)
  4062. cancel_delayed_work_sync(&chip->btc_override_work);
  4063. if (is_usb_chg_plugged_in(chip)) {
  4064. pm8921_chg_enable_irq(chip, LOOP_CHANGE_IRQ);
  4065. enable_irq_wake(chip->pmic_chg_irq[LOOP_CHANGE_IRQ]);
  4066. }
  4067. return 0;
  4068. }
  4069. static int __devinit pm8921_charger_probe(struct platform_device *pdev)
  4070. {
  4071. int rc = 0;
  4072. struct pm8921_chg_chip *chip;
  4073. const struct pm8921_charger_platform_data *pdata
  4074. = pdev->dev.platform_data;
  4075. if (!pdata) {
  4076. pr_err("missing platform data\n");
  4077. return -EINVAL;
  4078. }
  4079. chip = kzalloc(sizeof(struct pm8921_chg_chip),
  4080. GFP_KERNEL);
  4081. if (!chip) {
  4082. pr_err("Cannot allocate pm_chg_chip\n");
  4083. return -ENOMEM;
  4084. }
  4085. chip->dev = &pdev->dev;
  4086. chip->ttrkl_time = pdata->ttrkl_time;
  4087. chip->update_time = pdata->update_time;
  4088. chip->max_voltage_mv = pdata->max_voltage;
  4089. chip->alarm_low_mv = pdata->alarm_low_mv;
  4090. chip->alarm_high_mv = pdata->alarm_high_mv;
  4091. chip->min_voltage_mv = pdata->min_voltage;
  4092. chip->safe_current_ma = pdata->safe_current_ma;
  4093. chip->uvd_voltage_mv = pdata->uvd_thresh_voltage;
  4094. chip->resume_voltage_delta = pdata->resume_voltage_delta;
  4095. chip->resume_charge_percent = pdata->resume_charge_percent;
  4096. chip->term_current = pdata->term_current;
  4097. chip->vbat_channel = pdata->charger_cdata.vbat_channel;
  4098. chip->batt_temp_channel = pdata->charger_cdata.batt_temp_channel;
  4099. chip->batt_id_channel = pdata->charger_cdata.batt_id_channel;
  4100. chip->batt_id_min = pdata->batt_id_min;
  4101. chip->batt_id_max = pdata->batt_id_max;
  4102. if (pdata->cool_temp != INT_MIN)
  4103. chip->cool_temp_dc = pdata->cool_temp * 10;
  4104. else
  4105. chip->cool_temp_dc = INT_MIN;
  4106. if (pdata->warm_temp != INT_MIN)
  4107. chip->warm_temp_dc = pdata->warm_temp * 10;
  4108. else
  4109. chip->warm_temp_dc = INT_MIN;
  4110. if (pdata->hysteresis_temp)
  4111. chip->hysteresis_temp_dc = pdata->hysteresis_temp * 10;
  4112. else
  4113. chip->hysteresis_temp_dc = TEMP_HYSTERISIS_DECIDEGC;
  4114. chip->temp_check_period = pdata->temp_check_period;
  4115. chip->max_bat_chg_current = pdata->max_bat_chg_current;
  4116. /* Assign to corresponding module parameter */
  4117. usb_max_current = pdata->usb_max_current;
  4118. chip->cool_bat_chg_current = pdata->cool_bat_chg_current;
  4119. chip->warm_bat_chg_current = pdata->warm_bat_chg_current;
  4120. chip->cool_bat_voltage = pdata->cool_bat_voltage;
  4121. chip->warm_bat_voltage = pdata->warm_bat_voltage;
  4122. chip->trkl_voltage = pdata->trkl_voltage;
  4123. chip->weak_voltage = pdata->weak_voltage;
  4124. chip->trkl_current = pdata->trkl_current;
  4125. chip->weak_current = pdata->weak_current;
  4126. chip->vin_min = pdata->vin_min;
  4127. chip->thermal_mitigation = pdata->thermal_mitigation;
  4128. chip->thermal_levels = pdata->thermal_levels;
  4129. chip->disable_chg_rmvl_wrkarnd = pdata->disable_chg_rmvl_wrkarnd;
  4130. chip->cold_thr = pdata->cold_thr;
  4131. chip->hot_thr = pdata->hot_thr;
  4132. chip->rconn_mohm = pdata->rconn_mohm;
  4133. chip->led_src_config = pdata->led_src_config;
  4134. chip->has_dc_supply = pdata->has_dc_supply;
  4135. chip->battery_less_hardware = pdata->battery_less_hardware;
  4136. chip->btc_override = pdata->btc_override;
  4137. if (chip->btc_override) {
  4138. chip->btc_delay_ms = pdata->btc_delay_ms;
  4139. chip->btc_override_cold_decidegc
  4140. = pdata->btc_override_cold_degc * 10;
  4141. chip->btc_override_hot_decidegc
  4142. = pdata->btc_override_hot_degc * 10;
  4143. chip->btc_panic_if_cant_stop_chg
  4144. = pdata->btc_panic_if_cant_stop_chg;
  4145. }
  4146. if (chip->battery_less_hardware)
  4147. charging_disabled = 1;
  4148. chip->ibatmax_max_adj_ma = find_ibat_max_adj_ma(
  4149. chip->max_bat_chg_current);
  4150. chip->voter = msm_xo_get(MSM_XO_TCXO_D0, "pm8921_charger");
  4151. rc = pm8921_chg_hw_init(chip);
  4152. if (rc) {
  4153. pr_err("couldn't init hardware rc=%d\n", rc);
  4154. goto free_chip;
  4155. }
  4156. if (chip->btc_override)
  4157. pm8921_chg_btc_override_init(chip);
  4158. chip->stop_chg_upon_expiry = pdata->stop_chg_upon_expiry;
  4159. chip->usb_type = POWER_SUPPLY_TYPE_UNKNOWN;
  4160. chip->usb_psy.name = "usb";
  4161. chip->usb_psy.type = POWER_SUPPLY_TYPE_USB;
  4162. chip->usb_psy.supplied_to = pm_power_supplied_to;
  4163. chip->usb_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to);
  4164. chip->usb_psy.properties = pm_power_props_usb;
  4165. chip->usb_psy.num_properties = ARRAY_SIZE(pm_power_props_usb);
  4166. chip->usb_psy.get_property = pm_power_get_property_usb;
  4167. chip->usb_psy.set_property = pm_power_set_property_usb;
  4168. chip->usb_psy.property_is_writeable = usb_property_is_writeable;
  4169. chip->dc_psy.name = "pm8921-dc";
  4170. chip->dc_psy.type = POWER_SUPPLY_TYPE_MAINS;
  4171. chip->dc_psy.supplied_to = pm_power_supplied_to;
  4172. chip->dc_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to);
  4173. chip->dc_psy.properties = pm_power_props_mains;
  4174. chip->dc_psy.num_properties = ARRAY_SIZE(pm_power_props_mains);
  4175. chip->dc_psy.get_property = pm_power_get_property_mains;
  4176. chip->batt_psy.name = "battery";
  4177. chip->batt_psy.type = POWER_SUPPLY_TYPE_BATTERY;
  4178. chip->batt_psy.properties = msm_batt_power_props;
  4179. chip->batt_psy.num_properties = ARRAY_SIZE(msm_batt_power_props);
  4180. chip->batt_psy.get_property = pm_batt_power_get_property;
  4181. chip->batt_psy.external_power_changed = pm_batt_external_power_changed;
  4182. rc = power_supply_register(chip->dev, &chip->usb_psy);
  4183. if (rc < 0) {
  4184. pr_err("power_supply_register usb failed rc = %d\n", rc);
  4185. goto free_chip;
  4186. }
  4187. rc = power_supply_register(chip->dev, &chip->dc_psy);
  4188. if (rc < 0) {
  4189. pr_err("power_supply_register usb failed rc = %d\n", rc);
  4190. goto unregister_usb;
  4191. }
  4192. rc = power_supply_register(chip->dev, &chip->batt_psy);
  4193. if (rc < 0) {
  4194. pr_err("power_supply_register batt failed rc = %d\n", rc);
  4195. goto unregister_dc;
  4196. }
  4197. platform_set_drvdata(pdev, chip);
  4198. the_chip = chip;
  4199. wake_lock_init(&chip->eoc_wake_lock, WAKE_LOCK_SUSPEND, "pm8921_eoc");
  4200. INIT_DELAYED_WORK(&chip->eoc_work, eoc_worker);
  4201. INIT_DELAYED_WORK(&chip->vin_collapse_check_work,
  4202. vin_collapse_check_worker);
  4203. INIT_DELAYED_WORK(&chip->unplug_check_work, unplug_check_worker);
  4204. INIT_WORK(&chip->bms_notify.work, bms_notify);
  4205. INIT_WORK(&chip->battery_id_valid_work, battery_id_valid);
  4206. INIT_DELAYED_WORK(&chip->update_heartbeat_work, update_heartbeat);
  4207. INIT_DELAYED_WORK(&chip->btc_override_work, btc_override_worker);
  4208. rc = request_irqs(chip, pdev);
  4209. if (rc) {
  4210. pr_err("couldn't register interrupts rc=%d\n", rc);
  4211. goto unregister_batt;
  4212. }
  4213. enable_irq_wake(chip->pmic_chg_irq[USBIN_VALID_IRQ]);
  4214. enable_irq_wake(chip->pmic_chg_irq[DCIN_VALID_IRQ]);
  4215. enable_irq_wake(chip->pmic_chg_irq[VBATDET_LOW_IRQ]);
  4216. enable_irq_wake(chip->pmic_chg_irq[FASTCHG_IRQ]);
  4217. create_debugfs_entries(chip);
  4218. /* determine what state the charger is in */
  4219. determine_initial_state(chip);
  4220. if (chip->update_time)
  4221. schedule_delayed_work(&chip->update_heartbeat_work,
  4222. round_jiffies_relative(msecs_to_jiffies
  4223. (chip->update_time)));
  4224. return 0;
  4225. unregister_batt:
  4226. wake_lock_destroy(&chip->eoc_wake_lock);
  4227. power_supply_unregister(&chip->batt_psy);
  4228. unregister_dc:
  4229. power_supply_unregister(&chip->dc_psy);
  4230. unregister_usb:
  4231. power_supply_unregister(&chip->usb_psy);
  4232. free_chip:
  4233. kfree(chip);
  4234. return rc;
  4235. }
  4236. static int __devexit pm8921_charger_remove(struct platform_device *pdev)
  4237. {
  4238. struct pm8921_chg_chip *chip = platform_get_drvdata(pdev);
  4239. free_irqs(chip);
  4240. platform_set_drvdata(pdev, NULL);
  4241. the_chip = NULL;
  4242. kfree(chip);
  4243. return 0;
  4244. }
  4245. static const struct dev_pm_ops pm8921_pm_ops = {
  4246. .suspend = pm8921_charger_suspend,
  4247. .suspend_noirq = pm8921_charger_suspend_noirq,
  4248. .resume_noirq = pm8921_charger_resume_noirq,
  4249. .resume = pm8921_charger_resume,
  4250. };
  4251. static struct platform_driver pm8921_charger_driver = {
  4252. .probe = pm8921_charger_probe,
  4253. .remove = __devexit_p(pm8921_charger_remove),
  4254. .driver = {
  4255. .name = PM8921_CHARGER_DEV_NAME,
  4256. .owner = THIS_MODULE,
  4257. .pm = &pm8921_pm_ops,
  4258. },
  4259. };
  4260. static int __init pm8921_charger_init(void)
  4261. {
  4262. return platform_driver_register(&pm8921_charger_driver);
  4263. }
  4264. static void __exit pm8921_charger_exit(void)
  4265. {
  4266. platform_driver_unregister(&pm8921_charger_driver);
  4267. }
  4268. late_initcall(pm8921_charger_init);
  4269. module_exit(pm8921_charger_exit);
  4270. MODULE_LICENSE("GPL v2");
  4271. MODULE_DESCRIPTION("PMIC8921 charger/battery driver");
  4272. MODULE_VERSION("1.0");
  4273. MODULE_ALIAS("platform:" PM8921_CHARGER_DEV_NAME);