phy.h 3.4 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #ifndef __RTL92S_PHY_H__
  30. #define __RTL92S_PHY_H__
  31. #define MAX_TXPWR_IDX_NMODE_92S 63
  32. #define MAX_DOZE_WAITING_TIMES_9x 64
  33. /* Channel switch:The size of
  34. * command tables for switch channel */
  35. #define MAX_PRECMD_CNT 16
  36. #define MAX_RFDEPENDCMD_CNT 16
  37. #define MAX_POSTCMD_CNT 16
  38. #define RF90_PATH_MAX 4
  39. enum version_8192s {
  40. VERSION_8192S_ACUT,
  41. VERSION_8192S_BCUT,
  42. VERSION_8192S_CCUT
  43. };
  44. enum swchnlcmd_id {
  45. CMDID_END,
  46. CMDID_SET_TXPOWEROWER_LEVEL,
  47. CMDID_BBREGWRITE10,
  48. CMDID_WRITEPORT_ULONG,
  49. CMDID_WRITEPORT_USHORT,
  50. CMDID_WRITEPORT_UCHAR,
  51. CMDID_RF_WRITEREG,
  52. };
  53. struct swchnlcmd {
  54. enum swchnlcmd_id cmdid;
  55. u32 para1;
  56. u32 para2;
  57. u32 msdelay;
  58. };
  59. enum baseband_config_type {
  60. /* Radio Path A */
  61. BASEBAND_CONFIG_PHY_REG = 0,
  62. /* Radio Path B */
  63. BASEBAND_CONFIG_AGC_TAB = 1,
  64. };
  65. #define hal_get_firmwareversion(rtlpriv) \
  66. (((struct rt_firmware *)(rtlpriv->rtlhal.pfirmware))->firmwareversion)
  67. u32 rtl92s_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
  68. void rtl92s_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
  69. u32 data);
  70. void rtl92s_phy_scan_operation_backup(struct ieee80211_hw *hw, u8 operation);
  71. u32 rtl92s_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
  72. u32 regaddr, u32 bitmask);
  73. void rtl92s_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
  74. u32 regaddr, u32 bitmask, u32 data);
  75. void rtl92s_phy_set_bw_mode(struct ieee80211_hw *hw,
  76. enum nl80211_channel_type ch_type);
  77. u8 rtl92s_phy_sw_chnl(struct ieee80211_hw *hw);
  78. bool rtl92s_phy_set_rf_power_state(struct ieee80211_hw *hw,
  79. enum rf_pwrstate rfpower_state);
  80. bool rtl92s_phy_mac_config(struct ieee80211_hw *hw);
  81. void rtl92s_phy_switch_ephy_parameter(struct ieee80211_hw *hw);
  82. bool rtl92s_phy_bb_config(struct ieee80211_hw *hw);
  83. bool rtl92s_phy_rf_config(struct ieee80211_hw *hw);
  84. void rtl92s_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
  85. void rtl92s_phy_set_txpower(struct ieee80211_hw *hw, u8 channel);
  86. bool rtl92s_phy_set_fw_cmd(struct ieee80211_hw *hw, enum fwcmd_iotype fwcmd_io);
  87. void rtl92s_phy_chk_fwcmd_iodone(struct ieee80211_hw *hw);
  88. void rtl92s_phy_set_beacon_hwreg(struct ieee80211_hw *hw, u16 beaconinterval);
  89. u8 rtl92s_phy_config_rf(struct ieee80211_hw *hw, enum radio_path rfpath) ;
  90. #endif