islpci_dev.c 27 KB

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  1. /*
  2. * Copyright (C) 2002 Intersil Americas Inc.
  3. * Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
  4. * Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <linux/hardirq.h>
  21. #include <linux/module.h>
  22. #include <linux/slab.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/pci.h>
  26. #include <linux/sched.h>
  27. #include <linux/etherdevice.h>
  28. #include <linux/delay.h>
  29. #include <linux/if_arp.h>
  30. #include <asm/io.h>
  31. #include "prismcompat.h"
  32. #include "isl_38xx.h"
  33. #include "isl_ioctl.h"
  34. #include "islpci_dev.h"
  35. #include "islpci_mgt.h"
  36. #include "islpci_eth.h"
  37. #include "oid_mgt.h"
  38. #define ISL3877_IMAGE_FILE "isl3877"
  39. #define ISL3886_IMAGE_FILE "isl3886"
  40. #define ISL3890_IMAGE_FILE "isl3890"
  41. MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
  42. MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
  43. MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
  44. static int prism54_bring_down(islpci_private *);
  45. static int islpci_alloc_memory(islpci_private *);
  46. /* Temporary dummy MAC address to use until firmware is loaded.
  47. * The idea there is that some tools (such as nameif) may query
  48. * the MAC address before the netdev is 'open'. By using a valid
  49. * OUI prefix, they can process the netdev properly.
  50. * Of course, this is not the final/real MAC address. It doesn't
  51. * matter, as you are suppose to be able to change it anytime via
  52. * ndev->set_mac_address. Jean II */
  53. static const unsigned char dummy_mac[6] = { 0x00, 0x30, 0xB4, 0x00, 0x00, 0x00 };
  54. static int
  55. isl_upload_firmware(islpci_private *priv)
  56. {
  57. u32 reg, rc;
  58. void __iomem *device_base = priv->device_base;
  59. /* clear the RAMBoot and the Reset bit */
  60. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  61. reg &= ~ISL38XX_CTRL_STAT_RESET;
  62. reg &= ~ISL38XX_CTRL_STAT_RAMBOOT;
  63. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  64. wmb();
  65. udelay(ISL38XX_WRITEIO_DELAY);
  66. /* set the Reset bit without reading the register ! */
  67. reg |= ISL38XX_CTRL_STAT_RESET;
  68. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  69. wmb();
  70. udelay(ISL38XX_WRITEIO_DELAY);
  71. /* clear the Reset bit */
  72. reg &= ~ISL38XX_CTRL_STAT_RESET;
  73. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  74. wmb();
  75. /* wait a while for the device to reboot */
  76. mdelay(50);
  77. {
  78. const struct firmware *fw_entry = NULL;
  79. long fw_len;
  80. const u32 *fw_ptr;
  81. rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV);
  82. if (rc) {
  83. printk(KERN_ERR
  84. "%s: request_firmware() failed for '%s'\n",
  85. "prism54", priv->firmware);
  86. return rc;
  87. }
  88. /* prepare the Direct Memory Base register */
  89. reg = ISL38XX_DEV_FIRMWARE_ADDRES;
  90. fw_ptr = (u32 *) fw_entry->data;
  91. fw_len = fw_entry->size;
  92. if (fw_len % 4) {
  93. printk(KERN_ERR
  94. "%s: firmware '%s' size is not multiple of 32bit, aborting!\n",
  95. "prism54", priv->firmware);
  96. release_firmware(fw_entry);
  97. return -EILSEQ; /* Illegal byte sequence */;
  98. }
  99. while (fw_len > 0) {
  100. long _fw_len =
  101. (fw_len >
  102. ISL38XX_MEMORY_WINDOW_SIZE) ?
  103. ISL38XX_MEMORY_WINDOW_SIZE : fw_len;
  104. u32 __iomem *dev_fw_ptr = device_base + ISL38XX_DIRECT_MEM_WIN;
  105. /* set the card's base address for writing the data */
  106. isl38xx_w32_flush(device_base, reg,
  107. ISL38XX_DIR_MEM_BASE_REG);
  108. wmb(); /* be paranoid */
  109. /* increment the write address for next iteration */
  110. reg += _fw_len;
  111. fw_len -= _fw_len;
  112. /* write the data to the Direct Memory Window 32bit-wise */
  113. /* memcpy_toio() doesn't guarantee 32bit writes :-| */
  114. while (_fw_len > 0) {
  115. /* use non-swapping writel() */
  116. __raw_writel(*fw_ptr, dev_fw_ptr);
  117. fw_ptr++, dev_fw_ptr++;
  118. _fw_len -= 4;
  119. }
  120. /* flush PCI posting */
  121. (void) readl(device_base + ISL38XX_PCI_POSTING_FLUSH);
  122. wmb(); /* be paranoid again */
  123. BUG_ON(_fw_len != 0);
  124. }
  125. BUG_ON(fw_len != 0);
  126. /* Firmware version is at offset 40 (also for "newmac") */
  127. printk(KERN_DEBUG "%s: firmware version: %.8s\n",
  128. priv->ndev->name, fw_entry->data + 40);
  129. release_firmware(fw_entry);
  130. }
  131. /* now reset the device
  132. * clear the Reset & ClkRun bit, set the RAMBoot bit */
  133. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  134. reg &= ~ISL38XX_CTRL_STAT_CLKRUN;
  135. reg &= ~ISL38XX_CTRL_STAT_RESET;
  136. reg |= ISL38XX_CTRL_STAT_RAMBOOT;
  137. isl38xx_w32_flush(device_base, reg, ISL38XX_CTRL_STAT_REG);
  138. wmb();
  139. udelay(ISL38XX_WRITEIO_DELAY);
  140. /* set the reset bit latches the host override and RAMBoot bits
  141. * into the device for operation when the reset bit is reset */
  142. reg |= ISL38XX_CTRL_STAT_RESET;
  143. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  144. /* don't do flush PCI posting here! */
  145. wmb();
  146. udelay(ISL38XX_WRITEIO_DELAY);
  147. /* clear the reset bit should start the whole circus */
  148. reg &= ~ISL38XX_CTRL_STAT_RESET;
  149. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  150. /* don't do flush PCI posting here! */
  151. wmb();
  152. udelay(ISL38XX_WRITEIO_DELAY);
  153. return 0;
  154. }
  155. /******************************************************************************
  156. Device Interrupt Handler
  157. ******************************************************************************/
  158. irqreturn_t
  159. islpci_interrupt(int irq, void *config)
  160. {
  161. u32 reg;
  162. islpci_private *priv = config;
  163. struct net_device *ndev = priv->ndev;
  164. void __iomem *device = priv->device_base;
  165. int powerstate = ISL38XX_PSM_POWERSAVE_STATE;
  166. /* lock the interrupt handler */
  167. spin_lock(&priv->slock);
  168. /* received an interrupt request on a shared IRQ line
  169. * first check whether the device is in sleep mode */
  170. reg = readl(device + ISL38XX_CTRL_STAT_REG);
  171. if (reg & ISL38XX_CTRL_STAT_SLEEPMODE)
  172. /* device is in sleep mode, IRQ was generated by someone else */
  173. {
  174. #if VERBOSE > SHOW_ERROR_MESSAGES
  175. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  176. #endif
  177. spin_unlock(&priv->slock);
  178. return IRQ_NONE;
  179. }
  180. /* check whether there is any source of interrupt on the device */
  181. reg = readl(device + ISL38XX_INT_IDENT_REG);
  182. /* also check the contents of the Interrupt Enable Register, because this
  183. * will filter out interrupt sources from other devices on the same irq ! */
  184. reg &= readl(device + ISL38XX_INT_EN_REG);
  185. reg &= ISL38XX_INT_SOURCES;
  186. if (reg != 0) {
  187. if (islpci_get_state(priv) != PRV_STATE_SLEEP)
  188. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  189. /* reset the request bits in the Identification register */
  190. isl38xx_w32_flush(device, reg, ISL38XX_INT_ACK_REG);
  191. #if VERBOSE > SHOW_ERROR_MESSAGES
  192. DEBUG(SHOW_FUNCTION_CALLS,
  193. "IRQ: Identification register 0x%p 0x%x\n", device, reg);
  194. #endif
  195. /* check for each bit in the register separately */
  196. if (reg & ISL38XX_INT_IDENT_UPDATE) {
  197. #if VERBOSE > SHOW_ERROR_MESSAGES
  198. /* Queue has been updated */
  199. DEBUG(SHOW_TRACING, "IRQ: Update flag\n");
  200. DEBUG(SHOW_QUEUE_INDEXES,
  201. "CB drv Qs: [%i][%i][%i][%i][%i][%i]\n",
  202. le32_to_cpu(priv->control_block->
  203. driver_curr_frag[0]),
  204. le32_to_cpu(priv->control_block->
  205. driver_curr_frag[1]),
  206. le32_to_cpu(priv->control_block->
  207. driver_curr_frag[2]),
  208. le32_to_cpu(priv->control_block->
  209. driver_curr_frag[3]),
  210. le32_to_cpu(priv->control_block->
  211. driver_curr_frag[4]),
  212. le32_to_cpu(priv->control_block->
  213. driver_curr_frag[5])
  214. );
  215. DEBUG(SHOW_QUEUE_INDEXES,
  216. "CB dev Qs: [%i][%i][%i][%i][%i][%i]\n",
  217. le32_to_cpu(priv->control_block->
  218. device_curr_frag[0]),
  219. le32_to_cpu(priv->control_block->
  220. device_curr_frag[1]),
  221. le32_to_cpu(priv->control_block->
  222. device_curr_frag[2]),
  223. le32_to_cpu(priv->control_block->
  224. device_curr_frag[3]),
  225. le32_to_cpu(priv->control_block->
  226. device_curr_frag[4]),
  227. le32_to_cpu(priv->control_block->
  228. device_curr_frag[5])
  229. );
  230. #endif
  231. /* cleanup the data low transmit queue */
  232. islpci_eth_cleanup_transmit(priv, priv->control_block);
  233. /* device is in active state, update the
  234. * powerstate flag if necessary */
  235. powerstate = ISL38XX_PSM_ACTIVE_STATE;
  236. /* check all three queues in priority order
  237. * call the PIMFOR receive function until the
  238. * queue is empty */
  239. if (isl38xx_in_queue(priv->control_block,
  240. ISL38XX_CB_RX_MGMTQ) != 0) {
  241. #if VERBOSE > SHOW_ERROR_MESSAGES
  242. DEBUG(SHOW_TRACING,
  243. "Received frame in Management Queue\n");
  244. #endif
  245. islpci_mgt_receive(ndev);
  246. islpci_mgt_cleanup_transmit(ndev);
  247. /* Refill slots in receive queue */
  248. islpci_mgmt_rx_fill(ndev);
  249. /* no need to trigger the device, next
  250. islpci_mgt_transaction does it */
  251. }
  252. while (isl38xx_in_queue(priv->control_block,
  253. ISL38XX_CB_RX_DATA_LQ) != 0) {
  254. #if VERBOSE > SHOW_ERROR_MESSAGES
  255. DEBUG(SHOW_TRACING,
  256. "Received frame in Data Low Queue\n");
  257. #endif
  258. islpci_eth_receive(priv);
  259. }
  260. /* check whether the data transmit queues were full */
  261. if (priv->data_low_tx_full) {
  262. /* check whether the transmit is not full anymore */
  263. if (ISL38XX_CB_TX_QSIZE -
  264. isl38xx_in_queue(priv->control_block,
  265. ISL38XX_CB_TX_DATA_LQ) >=
  266. ISL38XX_MIN_QTHRESHOLD) {
  267. /* nope, the driver is ready for more network frames */
  268. netif_wake_queue(priv->ndev);
  269. /* reset the full flag */
  270. priv->data_low_tx_full = 0;
  271. }
  272. }
  273. }
  274. if (reg & ISL38XX_INT_IDENT_INIT) {
  275. /* Device has been initialized */
  276. #if VERBOSE > SHOW_ERROR_MESSAGES
  277. DEBUG(SHOW_TRACING,
  278. "IRQ: Init flag, device initialized\n");
  279. #endif
  280. wake_up(&priv->reset_done);
  281. }
  282. if (reg & ISL38XX_INT_IDENT_SLEEP) {
  283. /* Device intends to move to powersave state */
  284. #if VERBOSE > SHOW_ERROR_MESSAGES
  285. DEBUG(SHOW_TRACING, "IRQ: Sleep flag\n");
  286. #endif
  287. isl38xx_handle_sleep_request(priv->control_block,
  288. &powerstate,
  289. priv->device_base);
  290. }
  291. if (reg & ISL38XX_INT_IDENT_WAKEUP) {
  292. /* Device has been woken up to active state */
  293. #if VERBOSE > SHOW_ERROR_MESSAGES
  294. DEBUG(SHOW_TRACING, "IRQ: Wakeup flag\n");
  295. #endif
  296. isl38xx_handle_wakeup(priv->control_block,
  297. &powerstate, priv->device_base);
  298. }
  299. } else {
  300. #if VERBOSE > SHOW_ERROR_MESSAGES
  301. DEBUG(SHOW_TRACING, "Assuming someone else called the IRQ\n");
  302. #endif
  303. spin_unlock(&priv->slock);
  304. return IRQ_NONE;
  305. }
  306. /* sleep -> ready */
  307. if (islpci_get_state(priv) == PRV_STATE_SLEEP
  308. && powerstate == ISL38XX_PSM_ACTIVE_STATE)
  309. islpci_set_state(priv, PRV_STATE_READY);
  310. /* !sleep -> sleep */
  311. if (islpci_get_state(priv) != PRV_STATE_SLEEP
  312. && powerstate == ISL38XX_PSM_POWERSAVE_STATE)
  313. islpci_set_state(priv, PRV_STATE_SLEEP);
  314. /* unlock the interrupt handler */
  315. spin_unlock(&priv->slock);
  316. return IRQ_HANDLED;
  317. }
  318. /******************************************************************************
  319. Network Interface Control & Statistical functions
  320. ******************************************************************************/
  321. static int
  322. islpci_open(struct net_device *ndev)
  323. {
  324. u32 rc;
  325. islpci_private *priv = netdev_priv(ndev);
  326. /* reset data structures, upload firmware and reset device */
  327. rc = islpci_reset(priv,1);
  328. if (rc) {
  329. prism54_bring_down(priv);
  330. return rc; /* Returns informative message */
  331. }
  332. netif_start_queue(ndev);
  333. /* Turn off carrier if in STA or Ad-hoc mode. It will be turned on
  334. * once the firmware receives a trap of being associated
  335. * (GEN_OID_LINKSTATE). In other modes (AP or WDS or monitor) we
  336. * should just leave the carrier on as its expected the firmware
  337. * won't send us a trigger. */
  338. if (priv->iw_mode == IW_MODE_INFRA || priv->iw_mode == IW_MODE_ADHOC)
  339. netif_carrier_off(ndev);
  340. else
  341. netif_carrier_on(ndev);
  342. return 0;
  343. }
  344. static int
  345. islpci_close(struct net_device *ndev)
  346. {
  347. islpci_private *priv = netdev_priv(ndev);
  348. printk(KERN_DEBUG "%s: islpci_close ()\n", ndev->name);
  349. netif_stop_queue(ndev);
  350. return prism54_bring_down(priv);
  351. }
  352. static int
  353. prism54_bring_down(islpci_private *priv)
  354. {
  355. void __iomem *device_base = priv->device_base;
  356. u32 reg;
  357. /* we are going to shutdown the device */
  358. islpci_set_state(priv, PRV_STATE_PREBOOT);
  359. /* disable all device interrupts in case they weren't */
  360. isl38xx_disable_interrupts(priv->device_base);
  361. /* For safety reasons, we may want to ensure that no DMA transfer is
  362. * currently in progress by emptying the TX and RX queues. */
  363. /* wait until interrupts have finished executing on other CPUs */
  364. synchronize_irq(priv->pdev->irq);
  365. reg = readl(device_base + ISL38XX_CTRL_STAT_REG);
  366. reg &= ~(ISL38XX_CTRL_STAT_RESET | ISL38XX_CTRL_STAT_RAMBOOT);
  367. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  368. wmb();
  369. udelay(ISL38XX_WRITEIO_DELAY);
  370. reg |= ISL38XX_CTRL_STAT_RESET;
  371. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  372. wmb();
  373. udelay(ISL38XX_WRITEIO_DELAY);
  374. /* clear the Reset bit */
  375. reg &= ~ISL38XX_CTRL_STAT_RESET;
  376. writel(reg, device_base + ISL38XX_CTRL_STAT_REG);
  377. wmb();
  378. /* wait a while for the device to reset */
  379. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  380. return 0;
  381. }
  382. static int
  383. islpci_upload_fw(islpci_private *priv)
  384. {
  385. islpci_state_t old_state;
  386. u32 rc;
  387. old_state = islpci_set_state(priv, PRV_STATE_BOOT);
  388. printk(KERN_DEBUG "%s: uploading firmware...\n", priv->ndev->name);
  389. rc = isl_upload_firmware(priv);
  390. if (rc) {
  391. /* error uploading the firmware */
  392. printk(KERN_ERR "%s: could not upload firmware ('%s')\n",
  393. priv->ndev->name, priv->firmware);
  394. islpci_set_state(priv, old_state);
  395. return rc;
  396. }
  397. printk(KERN_DEBUG "%s: firmware upload complete\n",
  398. priv->ndev->name);
  399. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  400. return 0;
  401. }
  402. static int
  403. islpci_reset_if(islpci_private *priv)
  404. {
  405. long remaining;
  406. int result = -ETIME;
  407. int count;
  408. DEFINE_WAIT(wait);
  409. prepare_to_wait(&priv->reset_done, &wait, TASK_UNINTERRUPTIBLE);
  410. /* now the last step is to reset the interface */
  411. isl38xx_interface_reset(priv->device_base, priv->device_host_address);
  412. islpci_set_state(priv, PRV_STATE_PREINIT);
  413. for(count = 0; count < 2 && result; count++) {
  414. /* The software reset acknowledge needs about 220 msec here.
  415. * Be conservative and wait for up to one second. */
  416. remaining = schedule_timeout_uninterruptible(HZ);
  417. if(remaining > 0) {
  418. result = 0;
  419. break;
  420. }
  421. /* If we're here it's because our IRQ hasn't yet gone through.
  422. * Retry a bit more...
  423. */
  424. printk(KERN_ERR "%s: no 'reset complete' IRQ seen - retrying\n",
  425. priv->ndev->name);
  426. }
  427. finish_wait(&priv->reset_done, &wait);
  428. if (result) {
  429. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  430. return result;
  431. }
  432. islpci_set_state(priv, PRV_STATE_INIT);
  433. /* Now that the device is 100% up, let's allow
  434. * for the other interrupts --
  435. * NOTE: this is not *yet* true since we've only allowed the
  436. * INIT interrupt on the IRQ line. We can perhaps poll
  437. * the IRQ line until we know for sure the reset went through */
  438. isl38xx_enable_common_interrupts(priv->device_base);
  439. down_write(&priv->mib_sem);
  440. result = mgt_commit(priv);
  441. if (result) {
  442. printk(KERN_ERR "%s: interface reset failure\n", priv->ndev->name);
  443. up_write(&priv->mib_sem);
  444. return result;
  445. }
  446. up_write(&priv->mib_sem);
  447. islpci_set_state(priv, PRV_STATE_READY);
  448. printk(KERN_DEBUG "%s: interface reset complete\n", priv->ndev->name);
  449. return 0;
  450. }
  451. int
  452. islpci_reset(islpci_private *priv, int reload_firmware)
  453. {
  454. isl38xx_control_block *cb = /* volatile not needed */
  455. (isl38xx_control_block *) priv->control_block;
  456. unsigned counter;
  457. int rc;
  458. if (reload_firmware)
  459. islpci_set_state(priv, PRV_STATE_PREBOOT);
  460. else
  461. islpci_set_state(priv, PRV_STATE_POSTBOOT);
  462. printk(KERN_DEBUG "%s: resetting device...\n", priv->ndev->name);
  463. /* disable all device interrupts in case they weren't */
  464. isl38xx_disable_interrupts(priv->device_base);
  465. /* flush all management queues */
  466. priv->index_mgmt_tx = 0;
  467. priv->index_mgmt_rx = 0;
  468. /* clear the indexes in the frame pointer */
  469. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  470. cb->driver_curr_frag[counter] = cpu_to_le32(0);
  471. cb->device_curr_frag[counter] = cpu_to_le32(0);
  472. }
  473. /* reset the mgmt receive queue */
  474. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  475. isl38xx_fragment *frag = &cb->rx_data_mgmt[counter];
  476. frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
  477. frag->flags = 0;
  478. frag->address = cpu_to_le32(priv->mgmt_rx[counter].pci_addr);
  479. }
  480. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  481. cb->rx_data_low[counter].address =
  482. cpu_to_le32((u32) priv->pci_map_rx_address[counter]);
  483. }
  484. /* since the receive queues are filled with empty fragments, now we can
  485. * set the corresponding indexes in the Control Block */
  486. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_DATA_LQ] =
  487. cpu_to_le32(ISL38XX_CB_RX_QSIZE);
  488. priv->control_block->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] =
  489. cpu_to_le32(ISL38XX_CB_MGMT_QSIZE);
  490. /* reset the remaining real index registers and full flags */
  491. priv->free_data_rx = 0;
  492. priv->free_data_tx = 0;
  493. priv->data_low_tx_full = 0;
  494. if (reload_firmware) { /* Should we load the firmware ? */
  495. /* now that the data structures are cleaned up, upload
  496. * firmware and reset interface */
  497. rc = islpci_upload_fw(priv);
  498. if (rc) {
  499. printk(KERN_ERR "%s: islpci_reset: failure\n",
  500. priv->ndev->name);
  501. return rc;
  502. }
  503. }
  504. /* finally reset interface */
  505. rc = islpci_reset_if(priv);
  506. if (rc)
  507. printk(KERN_ERR "prism54: Your card/socket may be faulty, or IRQ line too busy :(\n");
  508. return rc;
  509. }
  510. /******************************************************************************
  511. Network device configuration functions
  512. ******************************************************************************/
  513. static int
  514. islpci_alloc_memory(islpci_private *priv)
  515. {
  516. int counter;
  517. #if VERBOSE > SHOW_ERROR_MESSAGES
  518. printk(KERN_DEBUG "islpci_alloc_memory\n");
  519. #endif
  520. /* remap the PCI device base address to accessible */
  521. if (!(priv->device_base =
  522. ioremap(pci_resource_start(priv->pdev, 0),
  523. ISL38XX_PCI_MEM_SIZE))) {
  524. /* error in remapping the PCI device memory address range */
  525. printk(KERN_ERR "PCI memory remapping failed\n");
  526. return -1;
  527. }
  528. /* memory layout for consistent DMA region:
  529. *
  530. * Area 1: Control Block for the device interface
  531. * Area 2: Power Save Mode Buffer for temporary frame storage. Be aware that
  532. * the number of supported stations in the AP determines the minimal
  533. * size of the buffer !
  534. */
  535. /* perform the allocation */
  536. priv->driver_mem_address = pci_alloc_consistent(priv->pdev,
  537. HOST_MEM_BLOCK,
  538. &priv->
  539. device_host_address);
  540. if (!priv->driver_mem_address) {
  541. /* error allocating the block of PCI memory */
  542. printk(KERN_ERR "%s: could not allocate DMA memory, aborting!",
  543. "prism54");
  544. return -1;
  545. }
  546. /* assign the Control Block to the first address of the allocated area */
  547. priv->control_block =
  548. (isl38xx_control_block *) priv->driver_mem_address;
  549. /* set the Power Save Buffer pointer directly behind the CB */
  550. priv->device_psm_buffer =
  551. priv->device_host_address + CONTROL_BLOCK_SIZE;
  552. /* make sure all buffer pointers are initialized */
  553. for (counter = 0; counter < ISL38XX_CB_QCOUNT; counter++) {
  554. priv->control_block->driver_curr_frag[counter] = cpu_to_le32(0);
  555. priv->control_block->device_curr_frag[counter] = cpu_to_le32(0);
  556. }
  557. priv->index_mgmt_rx = 0;
  558. memset(priv->mgmt_rx, 0, sizeof(priv->mgmt_rx));
  559. memset(priv->mgmt_tx, 0, sizeof(priv->mgmt_tx));
  560. /* allocate rx queue for management frames */
  561. if (islpci_mgmt_rx_fill(priv->ndev) < 0)
  562. goto out_free;
  563. /* now get the data rx skb's */
  564. memset(priv->data_low_rx, 0, sizeof (priv->data_low_rx));
  565. memset(priv->pci_map_rx_address, 0, sizeof (priv->pci_map_rx_address));
  566. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  567. struct sk_buff *skb;
  568. /* allocate an sk_buff for received data frames storage
  569. * each frame on receive size consists of 1 fragment
  570. * include any required allignment operations */
  571. if (!(skb = dev_alloc_skb(MAX_FRAGMENT_SIZE_RX + 2))) {
  572. /* error allocating an sk_buff structure elements */
  573. printk(KERN_ERR "Error allocating skb.\n");
  574. skb = NULL;
  575. goto out_free;
  576. }
  577. skb_reserve(skb, (4 - (long) skb->data) & 0x03);
  578. /* add the new allocated sk_buff to the buffer array */
  579. priv->data_low_rx[counter] = skb;
  580. /* map the allocated skb data area to pci */
  581. priv->pci_map_rx_address[counter] =
  582. pci_map_single(priv->pdev, (void *) skb->data,
  583. MAX_FRAGMENT_SIZE_RX + 2,
  584. PCI_DMA_FROMDEVICE);
  585. if (!priv->pci_map_rx_address[counter]) {
  586. /* error mapping the buffer to device
  587. accessible memory address */
  588. printk(KERN_ERR "failed to map skb DMA'able\n");
  589. goto out_free;
  590. }
  591. }
  592. prism54_acl_init(&priv->acl);
  593. prism54_wpa_bss_ie_init(priv);
  594. if (mgt_init(priv))
  595. goto out_free;
  596. return 0;
  597. out_free:
  598. islpci_free_memory(priv);
  599. return -1;
  600. }
  601. int
  602. islpci_free_memory(islpci_private *priv)
  603. {
  604. int counter;
  605. if (priv->device_base)
  606. iounmap(priv->device_base);
  607. priv->device_base = NULL;
  608. /* free consistent DMA area... */
  609. if (priv->driver_mem_address)
  610. pci_free_consistent(priv->pdev, HOST_MEM_BLOCK,
  611. priv->driver_mem_address,
  612. priv->device_host_address);
  613. /* clear some dangling pointers */
  614. priv->driver_mem_address = NULL;
  615. priv->device_host_address = 0;
  616. priv->device_psm_buffer = 0;
  617. priv->control_block = NULL;
  618. /* clean up mgmt rx buffers */
  619. for (counter = 0; counter < ISL38XX_CB_MGMT_QSIZE; counter++) {
  620. struct islpci_membuf *buf = &priv->mgmt_rx[counter];
  621. if (buf->pci_addr)
  622. pci_unmap_single(priv->pdev, buf->pci_addr,
  623. buf->size, PCI_DMA_FROMDEVICE);
  624. buf->pci_addr = 0;
  625. kfree(buf->mem);
  626. buf->size = 0;
  627. buf->mem = NULL;
  628. }
  629. /* clean up data rx buffers */
  630. for (counter = 0; counter < ISL38XX_CB_RX_QSIZE; counter++) {
  631. if (priv->pci_map_rx_address[counter])
  632. pci_unmap_single(priv->pdev,
  633. priv->pci_map_rx_address[counter],
  634. MAX_FRAGMENT_SIZE_RX + 2,
  635. PCI_DMA_FROMDEVICE);
  636. priv->pci_map_rx_address[counter] = 0;
  637. if (priv->data_low_rx[counter])
  638. dev_kfree_skb(priv->data_low_rx[counter]);
  639. priv->data_low_rx[counter] = NULL;
  640. }
  641. /* Free the access control list and the WPA list */
  642. prism54_acl_clean(&priv->acl);
  643. prism54_wpa_bss_ie_clean(priv);
  644. mgt_clean(priv);
  645. return 0;
  646. }
  647. #if 0
  648. static void
  649. islpci_set_multicast_list(struct net_device *dev)
  650. {
  651. /* put device into promisc mode and let network layer handle it */
  652. }
  653. #endif
  654. static void islpci_ethtool_get_drvinfo(struct net_device *dev,
  655. struct ethtool_drvinfo *info)
  656. {
  657. strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
  658. strlcpy(info->version, DRV_VERSION, sizeof(info->version));
  659. }
  660. static const struct ethtool_ops islpci_ethtool_ops = {
  661. .get_drvinfo = islpci_ethtool_get_drvinfo,
  662. };
  663. static const struct net_device_ops islpci_netdev_ops = {
  664. .ndo_open = islpci_open,
  665. .ndo_stop = islpci_close,
  666. .ndo_start_xmit = islpci_eth_transmit,
  667. .ndo_tx_timeout = islpci_eth_tx_timeout,
  668. .ndo_set_mac_address = prism54_set_mac_address,
  669. .ndo_change_mtu = eth_change_mtu,
  670. .ndo_validate_addr = eth_validate_addr,
  671. };
  672. static struct device_type wlan_type = {
  673. .name = "wlan",
  674. };
  675. struct net_device *
  676. islpci_setup(struct pci_dev *pdev)
  677. {
  678. islpci_private *priv;
  679. struct net_device *ndev = alloc_etherdev(sizeof (islpci_private));
  680. if (!ndev)
  681. return ndev;
  682. pci_set_drvdata(pdev, ndev);
  683. SET_NETDEV_DEV(ndev, &pdev->dev);
  684. SET_NETDEV_DEVTYPE(ndev, &wlan_type);
  685. /* setup the structure members */
  686. ndev->base_addr = pci_resource_start(pdev, 0);
  687. ndev->irq = pdev->irq;
  688. /* initialize the function pointers */
  689. ndev->netdev_ops = &islpci_netdev_ops;
  690. ndev->wireless_handlers = &prism54_handler_def;
  691. ndev->ethtool_ops = &islpci_ethtool_ops;
  692. /* ndev->set_multicast_list = &islpci_set_multicast_list; */
  693. ndev->addr_len = ETH_ALEN;
  694. /* Get a non-zero dummy MAC address for nameif. Jean II */
  695. memcpy(ndev->dev_addr, dummy_mac, 6);
  696. ndev->watchdog_timeo = ISLPCI_TX_TIMEOUT;
  697. /* allocate a private device structure to the network device */
  698. priv = netdev_priv(ndev);
  699. priv->ndev = ndev;
  700. priv->pdev = pdev;
  701. priv->monitor_type = ARPHRD_IEEE80211;
  702. priv->ndev->type = (priv->iw_mode == IW_MODE_MONITOR) ?
  703. priv->monitor_type : ARPHRD_ETHER;
  704. /* Add pointers to enable iwspy support. */
  705. priv->wireless_data.spy_data = &priv->spy_data;
  706. ndev->wireless_data = &priv->wireless_data;
  707. /* save the start and end address of the PCI memory area */
  708. ndev->mem_start = (unsigned long) priv->device_base;
  709. ndev->mem_end = ndev->mem_start + ISL38XX_PCI_MEM_SIZE;
  710. #if VERBOSE > SHOW_ERROR_MESSAGES
  711. DEBUG(SHOW_TRACING, "PCI Memory remapped to 0x%p\n", priv->device_base);
  712. #endif
  713. init_waitqueue_head(&priv->reset_done);
  714. /* init the queue read locks, process wait counter */
  715. mutex_init(&priv->mgmt_lock);
  716. priv->mgmt_received = NULL;
  717. init_waitqueue_head(&priv->mgmt_wqueue);
  718. mutex_init(&priv->stats_lock);
  719. spin_lock_init(&priv->slock);
  720. /* init state machine with off#1 state */
  721. priv->state = PRV_STATE_OFF;
  722. priv->state_off = 1;
  723. /* initialize workqueue's */
  724. INIT_WORK(&priv->stats_work, prism54_update_stats);
  725. priv->stats_timestamp = 0;
  726. INIT_WORK(&priv->reset_task, islpci_do_reset_and_wake);
  727. priv->reset_task_pending = 0;
  728. /* allocate various memory areas */
  729. if (islpci_alloc_memory(priv))
  730. goto do_free_netdev;
  731. /* select the firmware file depending on the device id */
  732. switch (pdev->device) {
  733. case 0x3877:
  734. strcpy(priv->firmware, ISL3877_IMAGE_FILE);
  735. break;
  736. case 0x3886:
  737. strcpy(priv->firmware, ISL3886_IMAGE_FILE);
  738. break;
  739. default:
  740. strcpy(priv->firmware, ISL3890_IMAGE_FILE);
  741. break;
  742. }
  743. if (register_netdev(ndev)) {
  744. DEBUG(SHOW_ERROR_MESSAGES,
  745. "ERROR: register_netdev() failed\n");
  746. goto do_islpci_free_memory;
  747. }
  748. return ndev;
  749. do_islpci_free_memory:
  750. islpci_free_memory(priv);
  751. do_free_netdev:
  752. pci_set_drvdata(pdev, NULL);
  753. free_netdev(ndev);
  754. priv = NULL;
  755. return NULL;
  756. }
  757. islpci_state_t
  758. islpci_set_state(islpci_private *priv, islpci_state_t new_state)
  759. {
  760. islpci_state_t old_state;
  761. /* lock */
  762. old_state = priv->state;
  763. /* this means either a race condition or some serious error in
  764. * the driver code */
  765. switch (new_state) {
  766. case PRV_STATE_OFF:
  767. priv->state_off++;
  768. default:
  769. priv->state = new_state;
  770. break;
  771. case PRV_STATE_PREBOOT:
  772. /* there are actually many off-states, enumerated by
  773. * state_off */
  774. if (old_state == PRV_STATE_OFF)
  775. priv->state_off--;
  776. /* only if hw_unavailable is zero now it means we either
  777. * were in off#1 state, or came here from
  778. * somewhere else */
  779. if (!priv->state_off)
  780. priv->state = new_state;
  781. break;
  782. }
  783. #if 0
  784. printk(KERN_DEBUG "%s: state transition %d -> %d (off#%d)\n",
  785. priv->ndev->name, old_state, new_state, priv->state_off);
  786. #endif
  787. /* invariants */
  788. BUG_ON(priv->state_off < 0);
  789. BUG_ON(priv->state_off && (priv->state != PRV_STATE_OFF));
  790. BUG_ON(!priv->state_off && (priv->state == PRV_STATE_OFF));
  791. /* unlock */
  792. return old_state;
  793. }