rx.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757
  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2005-2011 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #include <linux/socket.h>
  11. #include <linux/in.h>
  12. #include <linux/slab.h>
  13. #include <linux/ip.h>
  14. #include <linux/tcp.h>
  15. #include <linux/udp.h>
  16. #include <linux/prefetch.h>
  17. #include <linux/moduleparam.h>
  18. #include <net/ip.h>
  19. #include <net/checksum.h>
  20. #include "net_driver.h"
  21. #include "efx.h"
  22. #include "nic.h"
  23. #include "selftest.h"
  24. #include "workarounds.h"
  25. /* Number of RX descriptors pushed at once. */
  26. #define EFX_RX_BATCH 8
  27. /* Maximum size of a buffer sharing a page */
  28. #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
  29. /* Size of buffer allocated for skb header area. */
  30. #define EFX_SKB_HEADERS 64u
  31. /*
  32. * rx_alloc_method - RX buffer allocation method
  33. *
  34. * This driver supports two methods for allocating and using RX buffers:
  35. * each RX buffer may be backed by an skb or by an order-n page.
  36. *
  37. * When GRO is in use then the second method has a lower overhead,
  38. * since we don't have to allocate then free skbs on reassembled frames.
  39. *
  40. * Values:
  41. * - RX_ALLOC_METHOD_AUTO = 0
  42. * - RX_ALLOC_METHOD_SKB = 1
  43. * - RX_ALLOC_METHOD_PAGE = 2
  44. *
  45. * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count
  46. * controlled by the parameters below.
  47. *
  48. * - Since pushing and popping descriptors are separated by the rx_queue
  49. * size, so the watermarks should be ~rxd_size.
  50. * - The performance win by using page-based allocation for GRO is less
  51. * than the performance hit of using page-based allocation of non-GRO,
  52. * so the watermarks should reflect this.
  53. *
  54. * Per channel we maintain a single variable, updated by each channel:
  55. *
  56. * rx_alloc_level += (gro_performed ? RX_ALLOC_FACTOR_GRO :
  57. * RX_ALLOC_FACTOR_SKB)
  58. * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which
  59. * limits the hysteresis), and update the allocation strategy:
  60. *
  61. * rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_GRO ?
  62. * RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
  63. */
  64. static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
  65. #define RX_ALLOC_LEVEL_GRO 0x2000
  66. #define RX_ALLOC_LEVEL_MAX 0x3000
  67. #define RX_ALLOC_FACTOR_GRO 1
  68. #define RX_ALLOC_FACTOR_SKB (-2)
  69. /* This is the percentage fill level below which new RX descriptors
  70. * will be added to the RX descriptor ring.
  71. */
  72. static unsigned int rx_refill_threshold = 90;
  73. /* This is the percentage fill level to which an RX queue will be refilled
  74. * when the "RX refill threshold" is reached.
  75. */
  76. static unsigned int rx_refill_limit = 95;
  77. /*
  78. * RX maximum head room required.
  79. *
  80. * This must be at least 1 to prevent overflow and at least 2 to allow
  81. * pipelined receives.
  82. */
  83. #define EFX_RXD_HEAD_ROOM 2
  84. /* Offset of ethernet header within page */
  85. static inline unsigned int efx_rx_buf_offset(struct efx_nic *efx,
  86. struct efx_rx_buffer *buf)
  87. {
  88. return buf->page_offset + efx->type->rx_buffer_hash_size;
  89. }
  90. static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
  91. {
  92. return PAGE_SIZE << efx->rx_buffer_order;
  93. }
  94. static u8 *efx_rx_buf_eh(struct efx_nic *efx, struct efx_rx_buffer *buf)
  95. {
  96. if (buf->flags & EFX_RX_BUF_PAGE)
  97. return page_address(buf->u.page) + efx_rx_buf_offset(efx, buf);
  98. else
  99. return (u8 *)buf->u.skb->data + efx->type->rx_buffer_hash_size;
  100. }
  101. static inline u32 efx_rx_buf_hash(const u8 *eh)
  102. {
  103. /* The ethernet header is always directly after any hash. */
  104. #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || NET_IP_ALIGN % 4 == 0
  105. return __le32_to_cpup((const __le32 *)(eh - 4));
  106. #else
  107. const u8 *data = eh - 4;
  108. return (u32)data[0] |
  109. (u32)data[1] << 8 |
  110. (u32)data[2] << 16 |
  111. (u32)data[3] << 24;
  112. #endif
  113. }
  114. /**
  115. * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers
  116. *
  117. * @rx_queue: Efx RX queue
  118. *
  119. * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a
  120. * struct efx_rx_buffer for each one. Return a negative error code or 0
  121. * on success. May fail having only inserted fewer than EFX_RX_BATCH
  122. * buffers.
  123. */
  124. static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
  125. {
  126. struct efx_nic *efx = rx_queue->efx;
  127. struct net_device *net_dev = efx->net_dev;
  128. struct efx_rx_buffer *rx_buf;
  129. struct sk_buff *skb;
  130. int skb_len = efx->rx_buffer_len;
  131. unsigned index, count;
  132. for (count = 0; count < EFX_RX_BATCH; ++count) {
  133. index = rx_queue->added_count & rx_queue->ptr_mask;
  134. rx_buf = efx_rx_buffer(rx_queue, index);
  135. rx_buf->u.skb = skb = netdev_alloc_skb(net_dev, skb_len);
  136. if (unlikely(!skb))
  137. return -ENOMEM;
  138. /* Adjust the SKB for padding */
  139. skb_reserve(skb, NET_IP_ALIGN);
  140. rx_buf->len = skb_len - NET_IP_ALIGN;
  141. rx_buf->flags = 0;
  142. rx_buf->dma_addr = pci_map_single(efx->pci_dev,
  143. skb->data, rx_buf->len,
  144. PCI_DMA_FROMDEVICE);
  145. if (unlikely(pci_dma_mapping_error(efx->pci_dev,
  146. rx_buf->dma_addr))) {
  147. dev_kfree_skb_any(skb);
  148. rx_buf->u.skb = NULL;
  149. return -EIO;
  150. }
  151. ++rx_queue->added_count;
  152. ++rx_queue->alloc_skb_count;
  153. }
  154. return 0;
  155. }
  156. /**
  157. * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers
  158. *
  159. * @rx_queue: Efx RX queue
  160. *
  161. * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA,
  162. * and populates struct efx_rx_buffers for each one. Return a negative error
  163. * code or 0 on success. If a single page can be split between two buffers,
  164. * then the page will either be inserted fully, or not at at all.
  165. */
  166. static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
  167. {
  168. struct efx_nic *efx = rx_queue->efx;
  169. struct efx_rx_buffer *rx_buf;
  170. struct page *page;
  171. void *page_addr;
  172. unsigned int page_offset;
  173. struct efx_rx_page_state *state;
  174. dma_addr_t dma_addr;
  175. unsigned index, count;
  176. /* We can split a page between two buffers */
  177. BUILD_BUG_ON(EFX_RX_BATCH & 1);
  178. for (count = 0; count < EFX_RX_BATCH; ++count) {
  179. page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC,
  180. efx->rx_buffer_order);
  181. if (unlikely(page == NULL))
  182. return -ENOMEM;
  183. dma_addr = pci_map_page(efx->pci_dev, page, 0,
  184. efx_rx_buf_size(efx),
  185. PCI_DMA_FROMDEVICE);
  186. if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) {
  187. __free_pages(page, efx->rx_buffer_order);
  188. return -EIO;
  189. }
  190. page_addr = page_address(page);
  191. state = page_addr;
  192. state->refcnt = 0;
  193. state->dma_addr = dma_addr;
  194. page_addr += sizeof(struct efx_rx_page_state);
  195. dma_addr += sizeof(struct efx_rx_page_state);
  196. page_offset = sizeof(struct efx_rx_page_state);
  197. split:
  198. index = rx_queue->added_count & rx_queue->ptr_mask;
  199. rx_buf = efx_rx_buffer(rx_queue, index);
  200. rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
  201. rx_buf->u.page = page;
  202. rx_buf->page_offset = page_offset + EFX_PAGE_IP_ALIGN;
  203. rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
  204. rx_buf->flags = EFX_RX_BUF_PAGE;
  205. ++rx_queue->added_count;
  206. ++rx_queue->alloc_page_count;
  207. ++state->refcnt;
  208. if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
  209. /* Use the second half of the page */
  210. get_page(page);
  211. dma_addr += (PAGE_SIZE >> 1);
  212. page_addr += (PAGE_SIZE >> 1);
  213. page_offset += (PAGE_SIZE >> 1);
  214. ++count;
  215. goto split;
  216. }
  217. }
  218. return 0;
  219. }
  220. static void efx_unmap_rx_buffer(struct efx_nic *efx,
  221. struct efx_rx_buffer *rx_buf,
  222. unsigned int used_len)
  223. {
  224. if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
  225. struct efx_rx_page_state *state;
  226. state = page_address(rx_buf->u.page);
  227. if (--state->refcnt == 0) {
  228. pci_unmap_page(efx->pci_dev,
  229. state->dma_addr,
  230. efx_rx_buf_size(efx),
  231. PCI_DMA_FROMDEVICE);
  232. } else if (used_len) {
  233. dma_sync_single_for_cpu(&efx->pci_dev->dev,
  234. rx_buf->dma_addr, used_len,
  235. DMA_FROM_DEVICE);
  236. }
  237. } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
  238. pci_unmap_single(efx->pci_dev, rx_buf->dma_addr,
  239. rx_buf->len, PCI_DMA_FROMDEVICE);
  240. }
  241. }
  242. static void efx_free_rx_buffer(struct efx_nic *efx,
  243. struct efx_rx_buffer *rx_buf)
  244. {
  245. if ((rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.page) {
  246. __free_pages(rx_buf->u.page, efx->rx_buffer_order);
  247. rx_buf->u.page = NULL;
  248. } else if (!(rx_buf->flags & EFX_RX_BUF_PAGE) && rx_buf->u.skb) {
  249. dev_kfree_skb_any(rx_buf->u.skb);
  250. rx_buf->u.skb = NULL;
  251. }
  252. }
  253. static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
  254. struct efx_rx_buffer *rx_buf)
  255. {
  256. efx_unmap_rx_buffer(rx_queue->efx, rx_buf, 0);
  257. efx_free_rx_buffer(rx_queue->efx, rx_buf);
  258. }
  259. /* Attempt to resurrect the other receive buffer that used to share this page,
  260. * which had previously been passed up to the kernel and freed. */
  261. static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
  262. struct efx_rx_buffer *rx_buf)
  263. {
  264. struct efx_rx_page_state *state = page_address(rx_buf->u.page);
  265. struct efx_rx_buffer *new_buf;
  266. unsigned fill_level, index;
  267. /* +1 because efx_rx_packet() incremented removed_count. +1 because
  268. * we'd like to insert an additional descriptor whilst leaving
  269. * EFX_RXD_HEAD_ROOM for the non-recycle path */
  270. fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
  271. if (unlikely(fill_level > rx_queue->max_fill)) {
  272. /* We could place "state" on a list, and drain the list in
  273. * efx_fast_push_rx_descriptors(). For now, this will do. */
  274. return;
  275. }
  276. ++state->refcnt;
  277. get_page(rx_buf->u.page);
  278. index = rx_queue->added_count & rx_queue->ptr_mask;
  279. new_buf = efx_rx_buffer(rx_queue, index);
  280. new_buf->u.page = rx_buf->u.page;
  281. new_buf->page_offset = rx_buf->page_offset ^ (PAGE_SIZE >> 1);
  282. new_buf->dma_addr = state->dma_addr + new_buf->page_offset;
  283. new_buf->len = rx_buf->len;
  284. new_buf->flags = EFX_RX_BUF_PAGE;
  285. ++rx_queue->added_count;
  286. }
  287. /* Recycle the given rx buffer directly back into the rx_queue. There is
  288. * always room to add this buffer, because we've just popped a buffer. */
  289. static void efx_recycle_rx_buffer(struct efx_channel *channel,
  290. struct efx_rx_buffer *rx_buf)
  291. {
  292. struct efx_nic *efx = channel->efx;
  293. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  294. struct efx_rx_buffer *new_buf;
  295. unsigned index;
  296. rx_buf->flags &= EFX_RX_BUF_PAGE;
  297. if ((rx_buf->flags & EFX_RX_BUF_PAGE) &&
  298. efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
  299. page_count(rx_buf->u.page) == 1)
  300. efx_resurrect_rx_buffer(rx_queue, rx_buf);
  301. index = rx_queue->added_count & rx_queue->ptr_mask;
  302. new_buf = efx_rx_buffer(rx_queue, index);
  303. memcpy(new_buf, rx_buf, sizeof(*new_buf));
  304. rx_buf->u.page = NULL;
  305. ++rx_queue->added_count;
  306. }
  307. /**
  308. * efx_fast_push_rx_descriptors - push new RX descriptors quickly
  309. * @rx_queue: RX descriptor queue
  310. * This will aim to fill the RX descriptor queue up to
  311. * @rx_queue->@fast_fill_limit. If there is insufficient atomic
  312. * memory to do so, a slow fill will be scheduled.
  313. *
  314. * The caller must provide serialisation (none is used here). In practise,
  315. * this means this function must run from the NAPI handler, or be called
  316. * when NAPI is disabled.
  317. */
  318. void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
  319. {
  320. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  321. unsigned fill_level;
  322. int space, rc = 0;
  323. /* Calculate current fill level, and exit if we don't need to fill */
  324. fill_level = (rx_queue->added_count - rx_queue->removed_count);
  325. EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
  326. if (fill_level >= rx_queue->fast_fill_trigger)
  327. goto out;
  328. /* Record minimum fill level */
  329. if (unlikely(fill_level < rx_queue->min_fill)) {
  330. if (fill_level)
  331. rx_queue->min_fill = fill_level;
  332. }
  333. space = rx_queue->fast_fill_limit - fill_level;
  334. if (space < EFX_RX_BATCH)
  335. goto out;
  336. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  337. "RX queue %d fast-filling descriptor ring from"
  338. " level %d to level %d using %s allocation\n",
  339. efx_rx_queue_index(rx_queue), fill_level,
  340. rx_queue->fast_fill_limit,
  341. channel->rx_alloc_push_pages ? "page" : "skb");
  342. do {
  343. if (channel->rx_alloc_push_pages)
  344. rc = efx_init_rx_buffers_page(rx_queue);
  345. else
  346. rc = efx_init_rx_buffers_skb(rx_queue);
  347. if (unlikely(rc)) {
  348. /* Ensure that we don't leave the rx queue empty */
  349. if (rx_queue->added_count == rx_queue->removed_count)
  350. efx_schedule_slow_fill(rx_queue);
  351. goto out;
  352. }
  353. } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH);
  354. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  355. "RX queue %d fast-filled descriptor ring "
  356. "to level %d\n", efx_rx_queue_index(rx_queue),
  357. rx_queue->added_count - rx_queue->removed_count);
  358. out:
  359. if (rx_queue->notified_count != rx_queue->added_count)
  360. efx_nic_notify_rx_desc(rx_queue);
  361. }
  362. void efx_rx_slow_fill(unsigned long context)
  363. {
  364. struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
  365. /* Post an event to cause NAPI to run and refill the queue */
  366. efx_nic_generate_fill_event(rx_queue);
  367. ++rx_queue->slow_fill_count;
  368. }
  369. static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
  370. struct efx_rx_buffer *rx_buf,
  371. int len, bool *leak_packet)
  372. {
  373. struct efx_nic *efx = rx_queue->efx;
  374. unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
  375. if (likely(len <= max_len))
  376. return;
  377. /* The packet must be discarded, but this is only a fatal error
  378. * if the caller indicated it was
  379. */
  380. rx_buf->flags |= EFX_RX_PKT_DISCARD;
  381. if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
  382. if (net_ratelimit())
  383. netif_err(efx, rx_err, efx->net_dev,
  384. " RX queue %d seriously overlength "
  385. "RX event (0x%x > 0x%x+0x%x). Leaking\n",
  386. efx_rx_queue_index(rx_queue), len, max_len,
  387. efx->type->rx_buffer_padding);
  388. /* If this buffer was skb-allocated, then the meta
  389. * data at the end of the skb will be trashed. So
  390. * we have no choice but to leak the fragment.
  391. */
  392. *leak_packet = !(rx_buf->flags & EFX_RX_BUF_PAGE);
  393. efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
  394. } else {
  395. if (net_ratelimit())
  396. netif_err(efx, rx_err, efx->net_dev,
  397. " RX queue %d overlength RX event "
  398. "(0x%x > 0x%x)\n",
  399. efx_rx_queue_index(rx_queue), len, max_len);
  400. }
  401. efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
  402. }
  403. /* Pass a received packet up through GRO. GRO can handle pages
  404. * regardless of checksum state and skbs with a good checksum.
  405. */
  406. static void efx_rx_packet_gro(struct efx_channel *channel,
  407. struct efx_rx_buffer *rx_buf,
  408. const u8 *eh)
  409. {
  410. struct napi_struct *napi = &channel->napi_str;
  411. gro_result_t gro_result;
  412. if (rx_buf->flags & EFX_RX_BUF_PAGE) {
  413. struct efx_nic *efx = channel->efx;
  414. struct page *page = rx_buf->u.page;
  415. struct sk_buff *skb;
  416. rx_buf->u.page = NULL;
  417. skb = napi_get_frags(napi);
  418. if (!skb) {
  419. put_page(page);
  420. return;
  421. }
  422. if (efx->net_dev->features & NETIF_F_RXHASH)
  423. skb->rxhash = efx_rx_buf_hash(eh);
  424. skb_fill_page_desc(skb, 0, page,
  425. efx_rx_buf_offset(efx, rx_buf), rx_buf->len);
  426. skb->len = rx_buf->len;
  427. skb->data_len = rx_buf->len;
  428. skb->truesize += rx_buf->len;
  429. skb->ip_summed = ((rx_buf->flags & EFX_RX_PKT_CSUMMED) ?
  430. CHECKSUM_UNNECESSARY : CHECKSUM_NONE);
  431. skb_record_rx_queue(skb, channel->channel);
  432. gro_result = napi_gro_frags(napi);
  433. } else {
  434. struct sk_buff *skb = rx_buf->u.skb;
  435. EFX_BUG_ON_PARANOID(!(rx_buf->flags & EFX_RX_PKT_CSUMMED));
  436. rx_buf->u.skb = NULL;
  437. skb->ip_summed = CHECKSUM_UNNECESSARY;
  438. gro_result = napi_gro_receive(napi, skb);
  439. }
  440. if (gro_result == GRO_NORMAL) {
  441. channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
  442. } else if (gro_result != GRO_DROP) {
  443. channel->rx_alloc_level += RX_ALLOC_FACTOR_GRO;
  444. channel->irq_mod_score += 2;
  445. }
  446. }
  447. void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
  448. unsigned int len, u16 flags)
  449. {
  450. struct efx_nic *efx = rx_queue->efx;
  451. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  452. struct efx_rx_buffer *rx_buf;
  453. bool leak_packet = false;
  454. rx_buf = efx_rx_buffer(rx_queue, index);
  455. rx_buf->flags |= flags;
  456. /* This allows the refill path to post another buffer.
  457. * EFX_RXD_HEAD_ROOM ensures that the slot we are using
  458. * isn't overwritten yet.
  459. */
  460. rx_queue->removed_count++;
  461. /* Validate the length encoded in the event vs the descriptor pushed */
  462. efx_rx_packet__check_len(rx_queue, rx_buf, len, &leak_packet);
  463. netif_vdbg(efx, rx_status, efx->net_dev,
  464. "RX queue %d received id %x at %llx+%x %s%s\n",
  465. efx_rx_queue_index(rx_queue), index,
  466. (unsigned long long)rx_buf->dma_addr, len,
  467. (rx_buf->flags & EFX_RX_PKT_CSUMMED) ? " [SUMMED]" : "",
  468. (rx_buf->flags & EFX_RX_PKT_DISCARD) ? " [DISCARD]" : "");
  469. /* Discard packet, if instructed to do so */
  470. if (unlikely(rx_buf->flags & EFX_RX_PKT_DISCARD)) {
  471. if (unlikely(leak_packet))
  472. channel->n_skbuff_leaks++;
  473. else
  474. efx_recycle_rx_buffer(channel, rx_buf);
  475. /* Don't hold off the previous receive */
  476. rx_buf = NULL;
  477. goto out;
  478. }
  479. /* Release and/or sync DMA mapping - assumes all RX buffers
  480. * consumed in-order per RX queue
  481. */
  482. efx_unmap_rx_buffer(efx, rx_buf, len);
  483. /* Prefetch nice and early so data will (hopefully) be in cache by
  484. * the time we look at it.
  485. */
  486. prefetch(efx_rx_buf_eh(efx, rx_buf));
  487. /* Pipeline receives so that we give time for packet headers to be
  488. * prefetched into cache.
  489. */
  490. rx_buf->len = len - efx->type->rx_buffer_hash_size;
  491. out:
  492. if (channel->rx_pkt)
  493. __efx_rx_packet(channel, channel->rx_pkt);
  494. channel->rx_pkt = rx_buf;
  495. }
  496. static void efx_rx_deliver(struct efx_channel *channel,
  497. struct efx_rx_buffer *rx_buf)
  498. {
  499. struct sk_buff *skb;
  500. /* We now own the SKB */
  501. skb = rx_buf->u.skb;
  502. rx_buf->u.skb = NULL;
  503. /* Set the SKB flags */
  504. skb_checksum_none_assert(skb);
  505. /* Pass the packet up */
  506. netif_receive_skb(skb);
  507. /* Update allocation strategy method */
  508. channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
  509. }
  510. /* Handle a received packet. Second half: Touches packet payload. */
  511. void __efx_rx_packet(struct efx_channel *channel, struct efx_rx_buffer *rx_buf)
  512. {
  513. struct efx_nic *efx = channel->efx;
  514. u8 *eh = efx_rx_buf_eh(efx, rx_buf);
  515. /* If we're in loopback test, then pass the packet directly to the
  516. * loopback layer, and free the rx_buf here
  517. */
  518. if (unlikely(efx->loopback_selftest)) {
  519. efx_loopback_rx_packet(efx, eh, rx_buf->len);
  520. efx_free_rx_buffer(efx, rx_buf);
  521. return;
  522. }
  523. if (!(rx_buf->flags & EFX_RX_BUF_PAGE)) {
  524. struct sk_buff *skb = rx_buf->u.skb;
  525. prefetch(skb_shinfo(skb));
  526. skb_reserve(skb, efx->type->rx_buffer_hash_size);
  527. skb_put(skb, rx_buf->len);
  528. if (efx->net_dev->features & NETIF_F_RXHASH)
  529. skb->rxhash = efx_rx_buf_hash(eh);
  530. /* Move past the ethernet header. rx_buf->data still points
  531. * at the ethernet header */
  532. skb->protocol = eth_type_trans(skb, efx->net_dev);
  533. skb_record_rx_queue(skb, channel->channel);
  534. }
  535. if (unlikely(!(efx->net_dev->features & NETIF_F_RXCSUM)))
  536. rx_buf->flags &= ~EFX_RX_PKT_CSUMMED;
  537. if (likely(rx_buf->flags & (EFX_RX_BUF_PAGE | EFX_RX_PKT_CSUMMED)))
  538. efx_rx_packet_gro(channel, rx_buf, eh);
  539. else
  540. efx_rx_deliver(channel, rx_buf);
  541. }
  542. void efx_rx_strategy(struct efx_channel *channel)
  543. {
  544. enum efx_rx_alloc_method method = rx_alloc_method;
  545. /* Only makes sense to use page based allocation if GRO is enabled */
  546. if (!(channel->efx->net_dev->features & NETIF_F_GRO)) {
  547. method = RX_ALLOC_METHOD_SKB;
  548. } else if (method == RX_ALLOC_METHOD_AUTO) {
  549. /* Constrain the rx_alloc_level */
  550. if (channel->rx_alloc_level < 0)
  551. channel->rx_alloc_level = 0;
  552. else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX)
  553. channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX;
  554. /* Decide on the allocation method */
  555. method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_GRO) ?
  556. RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB);
  557. }
  558. /* Push the option */
  559. channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE);
  560. }
  561. int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
  562. {
  563. struct efx_nic *efx = rx_queue->efx;
  564. unsigned int entries;
  565. int rc;
  566. /* Create the smallest power-of-two aligned ring */
  567. entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
  568. EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
  569. rx_queue->ptr_mask = entries - 1;
  570. netif_dbg(efx, probe, efx->net_dev,
  571. "creating RX queue %d size %#x mask %#x\n",
  572. efx_rx_queue_index(rx_queue), efx->rxq_entries,
  573. rx_queue->ptr_mask);
  574. /* Allocate RX buffers */
  575. rx_queue->buffer = kcalloc(entries, sizeof(*rx_queue->buffer),
  576. GFP_KERNEL);
  577. if (!rx_queue->buffer)
  578. return -ENOMEM;
  579. rc = efx_nic_probe_rx(rx_queue);
  580. if (rc) {
  581. kfree(rx_queue->buffer);
  582. rx_queue->buffer = NULL;
  583. }
  584. return rc;
  585. }
  586. void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
  587. {
  588. struct efx_nic *efx = rx_queue->efx;
  589. unsigned int max_fill, trigger, limit;
  590. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  591. "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
  592. /* Initialise ptr fields */
  593. rx_queue->added_count = 0;
  594. rx_queue->notified_count = 0;
  595. rx_queue->removed_count = 0;
  596. rx_queue->min_fill = -1U;
  597. /* Initialise limit fields */
  598. max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
  599. trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
  600. limit = max_fill * min(rx_refill_limit, 100U) / 100U;
  601. rx_queue->max_fill = max_fill;
  602. rx_queue->fast_fill_trigger = trigger;
  603. rx_queue->fast_fill_limit = limit;
  604. /* Set up RX descriptor ring */
  605. rx_queue->enabled = true;
  606. efx_nic_init_rx(rx_queue);
  607. }
  608. void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
  609. {
  610. int i;
  611. struct efx_rx_buffer *rx_buf;
  612. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  613. "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
  614. /* A flush failure might have left rx_queue->enabled */
  615. rx_queue->enabled = false;
  616. del_timer_sync(&rx_queue->slow_fill);
  617. efx_nic_fini_rx(rx_queue);
  618. /* Release RX buffers NB start at index 0 not current HW ptr */
  619. if (rx_queue->buffer) {
  620. for (i = 0; i <= rx_queue->ptr_mask; i++) {
  621. rx_buf = efx_rx_buffer(rx_queue, i);
  622. efx_fini_rx_buffer(rx_queue, rx_buf);
  623. }
  624. }
  625. }
  626. void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
  627. {
  628. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  629. "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
  630. efx_nic_remove_rx(rx_queue);
  631. kfree(rx_queue->buffer);
  632. rx_queue->buffer = NULL;
  633. }
  634. module_param(rx_alloc_method, int, 0644);
  635. MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");
  636. module_param(rx_refill_threshold, uint, 0444);
  637. MODULE_PARM_DESC(rx_refill_threshold,
  638. "RX descriptor ring fast/slow fill threshold (%)");