ushc.c 13 KB

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  1. /*
  2. * USB SD Host Controller (USHC) controller driver.
  3. *
  4. * Copyright (C) 2010 Cambridge Silicon Radio Ltd.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or (at
  9. * your option) any later version.
  10. *
  11. * Notes:
  12. * - Only version 2 devices are supported.
  13. * - Version 2 devices only support SDIO cards/devices (R2 response is
  14. * unsupported).
  15. *
  16. * References:
  17. * [USHC] USB SD Host Controller specification (CS-118793-SP)
  18. */
  19. #include <linux/module.h>
  20. #include <linux/usb.h>
  21. #include <linux/kernel.h>
  22. #include <linux/slab.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/mmc/host.h>
  25. enum ushc_request {
  26. USHC_GET_CAPS = 0x00,
  27. USHC_HOST_CTRL = 0x01,
  28. USHC_PWR_CTRL = 0x02,
  29. USHC_CLK_FREQ = 0x03,
  30. USHC_EXEC_CMD = 0x04,
  31. USHC_READ_RESP = 0x05,
  32. USHC_RESET = 0x06,
  33. };
  34. enum ushc_request_type {
  35. USHC_GET_CAPS_TYPE = USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  36. USHC_HOST_CTRL_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  37. USHC_PWR_CTRL_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  38. USHC_CLK_FREQ_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  39. USHC_EXEC_CMD_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  40. USHC_READ_RESP_TYPE = USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  41. USHC_RESET_TYPE = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  42. };
  43. #define USHC_GET_CAPS_VERSION_MASK 0xff
  44. #define USHC_GET_CAPS_3V3 (1 << 8)
  45. #define USHC_GET_CAPS_3V0 (1 << 9)
  46. #define USHC_GET_CAPS_1V8 (1 << 10)
  47. #define USHC_GET_CAPS_HIGH_SPD (1 << 16)
  48. #define USHC_HOST_CTRL_4BIT (1 << 1)
  49. #define USHC_HOST_CTRL_HIGH_SPD (1 << 0)
  50. #define USHC_PWR_CTRL_OFF 0x00
  51. #define USHC_PWR_CTRL_3V3 0x01
  52. #define USHC_PWR_CTRL_3V0 0x02
  53. #define USHC_PWR_CTRL_1V8 0x03
  54. #define USHC_READ_RESP_BUSY (1 << 4)
  55. #define USHC_READ_RESP_ERR_TIMEOUT (1 << 3)
  56. #define USHC_READ_RESP_ERR_CRC (1 << 2)
  57. #define USHC_READ_RESP_ERR_DAT (1 << 1)
  58. #define USHC_READ_RESP_ERR_CMD (1 << 0)
  59. #define USHC_READ_RESP_ERR_MASK 0x0f
  60. struct ushc_cbw {
  61. __u8 signature;
  62. __u8 cmd_idx;
  63. __le16 block_size;
  64. __le32 arg;
  65. } __attribute__((packed));
  66. #define USHC_CBW_SIGNATURE 'C'
  67. struct ushc_csw {
  68. __u8 signature;
  69. __u8 status;
  70. __le32 response;
  71. } __attribute__((packed));
  72. #define USHC_CSW_SIGNATURE 'S'
  73. struct ushc_int_data {
  74. u8 status;
  75. u8 reserved[3];
  76. };
  77. #define USHC_INT_STATUS_SDIO_INT (1 << 1)
  78. #define USHC_INT_STATUS_CARD_PRESENT (1 << 0)
  79. struct ushc_data {
  80. struct usb_device *usb_dev;
  81. struct mmc_host *mmc;
  82. struct urb *int_urb;
  83. struct ushc_int_data *int_data;
  84. struct urb *cbw_urb;
  85. struct ushc_cbw *cbw;
  86. struct urb *data_urb;
  87. struct urb *csw_urb;
  88. struct ushc_csw *csw;
  89. spinlock_t lock;
  90. struct mmc_request *current_req;
  91. u32 caps;
  92. u16 host_ctrl;
  93. unsigned long flags;
  94. u8 last_status;
  95. int clock_freq;
  96. };
  97. #define DISCONNECTED 0
  98. #define INT_EN 1
  99. #define IGNORE_NEXT_INT 2
  100. static void data_callback(struct urb *urb);
  101. static int ushc_hw_reset(struct ushc_data *ushc)
  102. {
  103. return usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  104. USHC_RESET, USHC_RESET_TYPE,
  105. 0, 0, NULL, 0, 100);
  106. }
  107. static int ushc_hw_get_caps(struct ushc_data *ushc)
  108. {
  109. int ret;
  110. int version;
  111. ret = usb_control_msg(ushc->usb_dev, usb_rcvctrlpipe(ushc->usb_dev, 0),
  112. USHC_GET_CAPS, USHC_GET_CAPS_TYPE,
  113. 0, 0, &ushc->caps, sizeof(ushc->caps), 100);
  114. if (ret < 0)
  115. return ret;
  116. ushc->caps = le32_to_cpu(ushc->caps);
  117. version = ushc->caps & USHC_GET_CAPS_VERSION_MASK;
  118. if (version != 0x02) {
  119. dev_err(&ushc->usb_dev->dev, "controller version %d is not supported\n", version);
  120. return -EINVAL;
  121. }
  122. return 0;
  123. }
  124. static int ushc_hw_set_host_ctrl(struct ushc_data *ushc, u16 mask, u16 val)
  125. {
  126. u16 host_ctrl;
  127. int ret;
  128. host_ctrl = (ushc->host_ctrl & ~mask) | val;
  129. ret = usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  130. USHC_HOST_CTRL, USHC_HOST_CTRL_TYPE,
  131. host_ctrl, 0, NULL, 0, 100);
  132. if (ret < 0)
  133. return ret;
  134. ushc->host_ctrl = host_ctrl;
  135. return 0;
  136. }
  137. static void int_callback(struct urb *urb)
  138. {
  139. struct ushc_data *ushc = urb->context;
  140. u8 status, last_status;
  141. if (urb->status < 0)
  142. return;
  143. status = ushc->int_data->status;
  144. last_status = ushc->last_status;
  145. ushc->last_status = status;
  146. /*
  147. * Ignore the card interrupt status on interrupt transfers that
  148. * were submitted while card interrupts where disabled.
  149. *
  150. * This avoid occasional spurious interrupts when enabling
  151. * interrupts immediately after clearing the source on the card.
  152. */
  153. if (!test_and_clear_bit(IGNORE_NEXT_INT, &ushc->flags)
  154. && test_bit(INT_EN, &ushc->flags)
  155. && status & USHC_INT_STATUS_SDIO_INT) {
  156. mmc_signal_sdio_irq(ushc->mmc);
  157. }
  158. if ((status ^ last_status) & USHC_INT_STATUS_CARD_PRESENT)
  159. mmc_detect_change(ushc->mmc, msecs_to_jiffies(100));
  160. if (!test_bit(INT_EN, &ushc->flags))
  161. set_bit(IGNORE_NEXT_INT, &ushc->flags);
  162. usb_submit_urb(ushc->int_urb, GFP_ATOMIC);
  163. }
  164. static void cbw_callback(struct urb *urb)
  165. {
  166. struct ushc_data *ushc = urb->context;
  167. if (urb->status != 0) {
  168. usb_unlink_urb(ushc->data_urb);
  169. usb_unlink_urb(ushc->csw_urb);
  170. }
  171. }
  172. static void data_callback(struct urb *urb)
  173. {
  174. struct ushc_data *ushc = urb->context;
  175. if (urb->status != 0)
  176. usb_unlink_urb(ushc->csw_urb);
  177. }
  178. static void csw_callback(struct urb *urb)
  179. {
  180. struct ushc_data *ushc = urb->context;
  181. struct mmc_request *req = ushc->current_req;
  182. int status;
  183. status = ushc->csw->status;
  184. if (urb->status != 0) {
  185. req->cmd->error = urb->status;
  186. } else if (status & USHC_READ_RESP_ERR_CMD) {
  187. if (status & USHC_READ_RESP_ERR_CRC)
  188. req->cmd->error = -EIO;
  189. else
  190. req->cmd->error = -ETIMEDOUT;
  191. }
  192. if (req->data) {
  193. if (status & USHC_READ_RESP_ERR_DAT) {
  194. if (status & USHC_READ_RESP_ERR_CRC)
  195. req->data->error = -EIO;
  196. else
  197. req->data->error = -ETIMEDOUT;
  198. req->data->bytes_xfered = 0;
  199. } else {
  200. req->data->bytes_xfered = req->data->blksz * req->data->blocks;
  201. }
  202. }
  203. req->cmd->resp[0] = le32_to_cpu(ushc->csw->response);
  204. mmc_request_done(ushc->mmc, req);
  205. }
  206. static void ushc_request(struct mmc_host *mmc, struct mmc_request *req)
  207. {
  208. struct ushc_data *ushc = mmc_priv(mmc);
  209. int ret;
  210. unsigned long flags;
  211. spin_lock_irqsave(&ushc->lock, flags);
  212. if (test_bit(DISCONNECTED, &ushc->flags)) {
  213. ret = -ENODEV;
  214. goto out;
  215. }
  216. /* Version 2 firmware doesn't support the R2 response format. */
  217. if (req->cmd->flags & MMC_RSP_136) {
  218. ret = -EINVAL;
  219. goto out;
  220. }
  221. /* The Astoria's data FIFOs don't work with clock speeds < 5MHz so
  222. limit commands with data to 6MHz or more. */
  223. if (req->data && ushc->clock_freq < 6000000) {
  224. ret = -EINVAL;
  225. goto out;
  226. }
  227. ushc->current_req = req;
  228. /* Start cmd with CBW. */
  229. ushc->cbw->cmd_idx = cpu_to_le16(req->cmd->opcode);
  230. if (req->data)
  231. ushc->cbw->block_size = cpu_to_le16(req->data->blksz);
  232. else
  233. ushc->cbw->block_size = 0;
  234. ushc->cbw->arg = cpu_to_le32(req->cmd->arg);
  235. ret = usb_submit_urb(ushc->cbw_urb, GFP_ATOMIC);
  236. if (ret < 0)
  237. goto out;
  238. /* Submit data (if any). */
  239. if (req->data) {
  240. struct mmc_data *data = req->data;
  241. int pipe;
  242. if (data->flags & MMC_DATA_READ)
  243. pipe = usb_rcvbulkpipe(ushc->usb_dev, 6);
  244. else
  245. pipe = usb_sndbulkpipe(ushc->usb_dev, 2);
  246. usb_fill_bulk_urb(ushc->data_urb, ushc->usb_dev, pipe,
  247. sg_virt(data->sg), data->sg->length,
  248. data_callback, ushc);
  249. ret = usb_submit_urb(ushc->data_urb, GFP_ATOMIC);
  250. if (ret < 0)
  251. goto out;
  252. }
  253. /* Submit CSW. */
  254. ret = usb_submit_urb(ushc->csw_urb, GFP_ATOMIC);
  255. if (ret < 0)
  256. goto out;
  257. out:
  258. spin_unlock_irqrestore(&ushc->lock, flags);
  259. if (ret < 0) {
  260. usb_unlink_urb(ushc->cbw_urb);
  261. usb_unlink_urb(ushc->data_urb);
  262. req->cmd->error = ret;
  263. mmc_request_done(mmc, req);
  264. }
  265. }
  266. static int ushc_set_power(struct ushc_data *ushc, unsigned char power_mode)
  267. {
  268. u16 voltage;
  269. switch (power_mode) {
  270. case MMC_POWER_OFF:
  271. voltage = USHC_PWR_CTRL_OFF;
  272. break;
  273. case MMC_POWER_UP:
  274. case MMC_POWER_ON:
  275. voltage = USHC_PWR_CTRL_3V3;
  276. break;
  277. default:
  278. return -EINVAL;
  279. }
  280. return usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  281. USHC_PWR_CTRL, USHC_PWR_CTRL_TYPE,
  282. voltage, 0, NULL, 0, 100);
  283. }
  284. static int ushc_set_bus_width(struct ushc_data *ushc, int bus_width)
  285. {
  286. return ushc_hw_set_host_ctrl(ushc, USHC_HOST_CTRL_4BIT,
  287. bus_width == 4 ? USHC_HOST_CTRL_4BIT : 0);
  288. }
  289. static int ushc_set_bus_freq(struct ushc_data *ushc, int clk, bool enable_hs)
  290. {
  291. int ret;
  292. /* Hardware can't detect interrupts while the clock is off. */
  293. if (clk == 0)
  294. clk = 400000;
  295. ret = ushc_hw_set_host_ctrl(ushc, USHC_HOST_CTRL_HIGH_SPD,
  296. enable_hs ? USHC_HOST_CTRL_HIGH_SPD : 0);
  297. if (ret < 0)
  298. return ret;
  299. ret = usb_control_msg(ushc->usb_dev, usb_sndctrlpipe(ushc->usb_dev, 0),
  300. USHC_CLK_FREQ, USHC_CLK_FREQ_TYPE,
  301. clk & 0xffff, (clk >> 16) & 0xffff, NULL, 0, 100);
  302. if (ret < 0)
  303. return ret;
  304. ushc->clock_freq = clk;
  305. return 0;
  306. }
  307. static void ushc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  308. {
  309. struct ushc_data *ushc = mmc_priv(mmc);
  310. ushc_set_power(ushc, ios->power_mode);
  311. ushc_set_bus_width(ushc, 1 << ios->bus_width);
  312. ushc_set_bus_freq(ushc, ios->clock, ios->timing == MMC_TIMING_SD_HS);
  313. }
  314. static int ushc_get_cd(struct mmc_host *mmc)
  315. {
  316. struct ushc_data *ushc = mmc_priv(mmc);
  317. return !!(ushc->last_status & USHC_INT_STATUS_CARD_PRESENT);
  318. }
  319. static void ushc_enable_sdio_irq(struct mmc_host *mmc, int enable)
  320. {
  321. struct ushc_data *ushc = mmc_priv(mmc);
  322. if (enable)
  323. set_bit(INT_EN, &ushc->flags);
  324. else
  325. clear_bit(INT_EN, &ushc->flags);
  326. }
  327. static void ushc_clean_up(struct ushc_data *ushc)
  328. {
  329. usb_free_urb(ushc->int_urb);
  330. usb_free_urb(ushc->csw_urb);
  331. usb_free_urb(ushc->data_urb);
  332. usb_free_urb(ushc->cbw_urb);
  333. kfree(ushc->int_data);
  334. kfree(ushc->cbw);
  335. kfree(ushc->csw);
  336. mmc_free_host(ushc->mmc);
  337. }
  338. static const struct mmc_host_ops ushc_ops = {
  339. .request = ushc_request,
  340. .set_ios = ushc_set_ios,
  341. .get_cd = ushc_get_cd,
  342. .enable_sdio_irq = ushc_enable_sdio_irq,
  343. };
  344. static int ushc_probe(struct usb_interface *intf, const struct usb_device_id *id)
  345. {
  346. struct usb_device *usb_dev = interface_to_usbdev(intf);
  347. struct mmc_host *mmc;
  348. struct ushc_data *ushc;
  349. int ret;
  350. mmc = mmc_alloc_host(sizeof(struct ushc_data), &intf->dev);
  351. if (mmc == NULL)
  352. return -ENOMEM;
  353. ushc = mmc_priv(mmc);
  354. usb_set_intfdata(intf, ushc);
  355. ushc->usb_dev = usb_dev;
  356. ushc->mmc = mmc;
  357. spin_lock_init(&ushc->lock);
  358. ret = ushc_hw_reset(ushc);
  359. if (ret < 0)
  360. goto err;
  361. /* Read capabilities. */
  362. ret = ushc_hw_get_caps(ushc);
  363. if (ret < 0)
  364. goto err;
  365. mmc->ops = &ushc_ops;
  366. mmc->f_min = 400000;
  367. mmc->f_max = 50000000;
  368. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
  369. mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
  370. mmc->caps |= (ushc->caps & USHC_GET_CAPS_HIGH_SPD) ? MMC_CAP_SD_HIGHSPEED : 0;
  371. mmc->max_seg_size = 512*511;
  372. mmc->max_segs = 1;
  373. mmc->max_req_size = 512*511;
  374. mmc->max_blk_size = 512;
  375. mmc->max_blk_count = 511;
  376. ushc->int_urb = usb_alloc_urb(0, GFP_KERNEL);
  377. if (ushc->int_urb == NULL) {
  378. ret = -ENOMEM;
  379. goto err;
  380. }
  381. ushc->int_data = kzalloc(sizeof(struct ushc_int_data), GFP_KERNEL);
  382. if (ushc->int_data == NULL) {
  383. ret = -ENOMEM;
  384. goto err;
  385. }
  386. usb_fill_int_urb(ushc->int_urb, ushc->usb_dev,
  387. usb_rcvintpipe(usb_dev,
  388. intf->cur_altsetting->endpoint[0].desc.bEndpointAddress),
  389. ushc->int_data, sizeof(struct ushc_int_data),
  390. int_callback, ushc,
  391. intf->cur_altsetting->endpoint[0].desc.bInterval);
  392. ushc->cbw_urb = usb_alloc_urb(0, GFP_KERNEL);
  393. if (ushc->cbw_urb == NULL) {
  394. ret = -ENOMEM;
  395. goto err;
  396. }
  397. ushc->cbw = kzalloc(sizeof(struct ushc_cbw), GFP_KERNEL);
  398. if (ushc->cbw == NULL) {
  399. ret = -ENOMEM;
  400. goto err;
  401. }
  402. ushc->cbw->signature = USHC_CBW_SIGNATURE;
  403. usb_fill_bulk_urb(ushc->cbw_urb, ushc->usb_dev, usb_sndbulkpipe(usb_dev, 2),
  404. ushc->cbw, sizeof(struct ushc_cbw),
  405. cbw_callback, ushc);
  406. ushc->data_urb = usb_alloc_urb(0, GFP_KERNEL);
  407. if (ushc->data_urb == NULL) {
  408. ret = -ENOMEM;
  409. goto err;
  410. }
  411. ushc->csw_urb = usb_alloc_urb(0, GFP_KERNEL);
  412. if (ushc->csw_urb == NULL) {
  413. ret = -ENOMEM;
  414. goto err;
  415. }
  416. ushc->csw = kzalloc(sizeof(struct ushc_cbw), GFP_KERNEL);
  417. if (ushc->csw == NULL) {
  418. ret = -ENOMEM;
  419. goto err;
  420. }
  421. usb_fill_bulk_urb(ushc->csw_urb, ushc->usb_dev, usb_rcvbulkpipe(usb_dev, 6),
  422. ushc->csw, sizeof(struct ushc_csw),
  423. csw_callback, ushc);
  424. ret = mmc_add_host(ushc->mmc);
  425. if (ret)
  426. goto err;
  427. ret = usb_submit_urb(ushc->int_urb, GFP_KERNEL);
  428. if (ret < 0) {
  429. mmc_remove_host(ushc->mmc);
  430. goto err;
  431. }
  432. return 0;
  433. err:
  434. ushc_clean_up(ushc);
  435. return ret;
  436. }
  437. static void ushc_disconnect(struct usb_interface *intf)
  438. {
  439. struct ushc_data *ushc = usb_get_intfdata(intf);
  440. spin_lock_irq(&ushc->lock);
  441. set_bit(DISCONNECTED, &ushc->flags);
  442. spin_unlock_irq(&ushc->lock);
  443. usb_kill_urb(ushc->int_urb);
  444. usb_kill_urb(ushc->cbw_urb);
  445. usb_kill_urb(ushc->data_urb);
  446. usb_kill_urb(ushc->csw_urb);
  447. mmc_remove_host(ushc->mmc);
  448. ushc_clean_up(ushc);
  449. }
  450. static struct usb_device_id ushc_id_table[] = {
  451. /* CSR USB SD Host Controller */
  452. { USB_DEVICE(0x0a12, 0x5d10) },
  453. { },
  454. };
  455. MODULE_DEVICE_TABLE(usb, ushc_id_table);
  456. static struct usb_driver ushc_driver = {
  457. .name = "ushc",
  458. .id_table = ushc_id_table,
  459. .probe = ushc_probe,
  460. .disconnect = ushc_disconnect,
  461. };
  462. module_usb_driver(ushc_driver);
  463. MODULE_DESCRIPTION("USB SD Host Controller driver");
  464. MODULE_AUTHOR("David Vrabel <david.vrabel@csr.com>");
  465. MODULE_LICENSE("GPL");