tmio_mmc_pio.c 28 KB

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  1. /*
  2. * linux/drivers/mmc/host/tmio_mmc_pio.c
  3. *
  4. * Copyright (C) 2011 Guennadi Liakhovetski
  5. * Copyright (C) 2007 Ian Molton
  6. * Copyright (C) 2004 Ian Molton
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Driver for the MMC / SD / SDIO IP found in:
  13. *
  14. * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
  15. *
  16. * This driver draws mainly on scattered spec sheets, Reverse engineering
  17. * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
  18. * support). (Further 4 bit support from a later datasheet).
  19. *
  20. * TODO:
  21. * Investigate using a workqueue for PIO transfers
  22. * Eliminate FIXMEs
  23. * SDIO support
  24. * Better Power management
  25. * Handle MMC errors better
  26. * double buffer support
  27. *
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/device.h>
  31. #include <linux/highmem.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/io.h>
  34. #include <linux/irq.h>
  35. #include <linux/mfd/tmio.h>
  36. #include <linux/mmc/cd-gpio.h>
  37. #include <linux/mmc/host.h>
  38. #include <linux/mmc/tmio.h>
  39. #include <linux/module.h>
  40. #include <linux/pagemap.h>
  41. #include <linux/platform_device.h>
  42. #include <linux/pm_qos.h>
  43. #include <linux/pm_runtime.h>
  44. #include <linux/scatterlist.h>
  45. #include <linux/spinlock.h>
  46. #include <linux/workqueue.h>
  47. #include "tmio_mmc.h"
  48. void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  49. {
  50. host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
  51. sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
  52. }
  53. void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  54. {
  55. host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
  56. sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
  57. }
  58. static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
  59. {
  60. sd_ctrl_write32(host, CTL_STATUS, ~i);
  61. }
  62. static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
  63. {
  64. host->sg_len = data->sg_len;
  65. host->sg_ptr = data->sg;
  66. host->sg_orig = data->sg;
  67. host->sg_off = 0;
  68. }
  69. static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
  70. {
  71. host->sg_ptr = sg_next(host->sg_ptr);
  72. host->sg_off = 0;
  73. return --host->sg_len;
  74. }
  75. #ifdef CONFIG_MMC_DEBUG
  76. #define STATUS_TO_TEXT(a, status, i) \
  77. do { \
  78. if (status & TMIO_STAT_##a) { \
  79. if (i++) \
  80. printk(" | "); \
  81. printk(#a); \
  82. } \
  83. } while (0)
  84. static void pr_debug_status(u32 status)
  85. {
  86. int i = 0;
  87. pr_debug("status: %08x = ", status);
  88. STATUS_TO_TEXT(CARD_REMOVE, status, i);
  89. STATUS_TO_TEXT(CARD_INSERT, status, i);
  90. STATUS_TO_TEXT(SIGSTATE, status, i);
  91. STATUS_TO_TEXT(WRPROTECT, status, i);
  92. STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
  93. STATUS_TO_TEXT(CARD_INSERT_A, status, i);
  94. STATUS_TO_TEXT(SIGSTATE_A, status, i);
  95. STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
  96. STATUS_TO_TEXT(STOPBIT_ERR, status, i);
  97. STATUS_TO_TEXT(ILL_FUNC, status, i);
  98. STATUS_TO_TEXT(CMD_BUSY, status, i);
  99. STATUS_TO_TEXT(CMDRESPEND, status, i);
  100. STATUS_TO_TEXT(DATAEND, status, i);
  101. STATUS_TO_TEXT(CRCFAIL, status, i);
  102. STATUS_TO_TEXT(DATATIMEOUT, status, i);
  103. STATUS_TO_TEXT(CMDTIMEOUT, status, i);
  104. STATUS_TO_TEXT(RXOVERFLOW, status, i);
  105. STATUS_TO_TEXT(TXUNDERRUN, status, i);
  106. STATUS_TO_TEXT(RXRDY, status, i);
  107. STATUS_TO_TEXT(TXRQ, status, i);
  108. STATUS_TO_TEXT(ILL_ACCESS, status, i);
  109. printk("\n");
  110. }
  111. #else
  112. #define pr_debug_status(s) do { } while (0)
  113. #endif
  114. static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
  115. {
  116. struct tmio_mmc_host *host = mmc_priv(mmc);
  117. if (enable) {
  118. host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
  119. ~TMIO_SDIO_STAT_IOIRQ;
  120. sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
  121. sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
  122. } else {
  123. host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
  124. sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
  125. sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
  126. }
  127. }
  128. static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
  129. {
  130. u32 clk = 0, clock;
  131. if (new_clock) {
  132. for (clock = host->mmc->f_min, clk = 0x80000080;
  133. new_clock >= (clock<<1); clk >>= 1)
  134. clock <<= 1;
  135. clk |= 0x100;
  136. }
  137. if (host->set_clk_div)
  138. host->set_clk_div(host->pdev, (clk>>22) & 1);
  139. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
  140. }
  141. static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
  142. {
  143. struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
  144. /* implicit BUG_ON(!res) */
  145. if (resource_size(res) > 0x100) {
  146. sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
  147. msleep(10);
  148. }
  149. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
  150. sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  151. msleep(10);
  152. }
  153. static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
  154. {
  155. struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
  156. sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
  157. sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
  158. msleep(10);
  159. /* implicit BUG_ON(!res) */
  160. if (resource_size(res) > 0x100) {
  161. sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
  162. msleep(10);
  163. }
  164. }
  165. static void tmio_mmc_reset(struct tmio_mmc_host *host)
  166. {
  167. struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
  168. /* FIXME - should we set stop clock reg here */
  169. sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
  170. /* implicit BUG_ON(!res) */
  171. if (resource_size(res) > 0x100)
  172. sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
  173. msleep(10);
  174. sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
  175. if (resource_size(res) > 0x100)
  176. sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
  177. msleep(10);
  178. }
  179. static void tmio_mmc_reset_work(struct work_struct *work)
  180. {
  181. struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
  182. delayed_reset_work.work);
  183. struct mmc_request *mrq;
  184. unsigned long flags;
  185. spin_lock_irqsave(&host->lock, flags);
  186. mrq = host->mrq;
  187. /*
  188. * is request already finished? Since we use a non-blocking
  189. * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
  190. * us, so, have to check for IS_ERR(host->mrq)
  191. */
  192. if (IS_ERR_OR_NULL(mrq)
  193. || time_is_after_jiffies(host->last_req_ts +
  194. msecs_to_jiffies(2000))) {
  195. spin_unlock_irqrestore(&host->lock, flags);
  196. return;
  197. }
  198. dev_warn(&host->pdev->dev,
  199. "timeout waiting for hardware interrupt (CMD%u)\n",
  200. mrq->cmd->opcode);
  201. if (host->data)
  202. host->data->error = -ETIMEDOUT;
  203. else if (host->cmd)
  204. host->cmd->error = -ETIMEDOUT;
  205. else
  206. mrq->cmd->error = -ETIMEDOUT;
  207. host->cmd = NULL;
  208. host->data = NULL;
  209. host->force_pio = false;
  210. spin_unlock_irqrestore(&host->lock, flags);
  211. tmio_mmc_reset(host);
  212. /* Ready for new calls */
  213. host->mrq = NULL;
  214. tmio_mmc_abort_dma(host);
  215. mmc_request_done(host->mmc, mrq);
  216. }
  217. /* called with host->lock held, interrupts disabled */
  218. static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
  219. {
  220. struct mmc_request *mrq;
  221. unsigned long flags;
  222. spin_lock_irqsave(&host->lock, flags);
  223. mrq = host->mrq;
  224. if (IS_ERR_OR_NULL(mrq)) {
  225. spin_unlock_irqrestore(&host->lock, flags);
  226. return;
  227. }
  228. host->cmd = NULL;
  229. host->data = NULL;
  230. host->force_pio = false;
  231. cancel_delayed_work(&host->delayed_reset_work);
  232. host->mrq = NULL;
  233. spin_unlock_irqrestore(&host->lock, flags);
  234. if (mrq->cmd->error || (mrq->data && mrq->data->error))
  235. tmio_mmc_abort_dma(host);
  236. mmc_request_done(host->mmc, mrq);
  237. }
  238. static void tmio_mmc_done_work(struct work_struct *work)
  239. {
  240. struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
  241. done);
  242. tmio_mmc_finish_request(host);
  243. }
  244. /* These are the bitmasks the tmio chip requires to implement the MMC response
  245. * types. Note that R1 and R6 are the same in this scheme. */
  246. #define APP_CMD 0x0040
  247. #define RESP_NONE 0x0300
  248. #define RESP_R1 0x0400
  249. #define RESP_R1B 0x0500
  250. #define RESP_R2 0x0600
  251. #define RESP_R3 0x0700
  252. #define DATA_PRESENT 0x0800
  253. #define TRANSFER_READ 0x1000
  254. #define TRANSFER_MULTI 0x2000
  255. #define SECURITY_CMD 0x4000
  256. static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
  257. {
  258. struct mmc_data *data = host->data;
  259. int c = cmd->opcode;
  260. u32 irq_mask = TMIO_MASK_CMD;
  261. /* Command 12 is handled by hardware */
  262. if (cmd->opcode == 12 && !cmd->arg) {
  263. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
  264. return 0;
  265. }
  266. switch (mmc_resp_type(cmd)) {
  267. case MMC_RSP_NONE: c |= RESP_NONE; break;
  268. case MMC_RSP_R1: c |= RESP_R1; break;
  269. case MMC_RSP_R1B: c |= RESP_R1B; break;
  270. case MMC_RSP_R2: c |= RESP_R2; break;
  271. case MMC_RSP_R3: c |= RESP_R3; break;
  272. default:
  273. pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
  274. return -EINVAL;
  275. }
  276. host->cmd = cmd;
  277. /* FIXME - this seems to be ok commented out but the spec suggest this bit
  278. * should be set when issuing app commands.
  279. * if(cmd->flags & MMC_FLAG_ACMD)
  280. * c |= APP_CMD;
  281. */
  282. if (data) {
  283. c |= DATA_PRESENT;
  284. if (data->blocks > 1) {
  285. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
  286. c |= TRANSFER_MULTI;
  287. }
  288. if (data->flags & MMC_DATA_READ)
  289. c |= TRANSFER_READ;
  290. }
  291. if (!host->native_hotplug)
  292. irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
  293. tmio_mmc_enable_mmc_irqs(host, irq_mask);
  294. /* Fire off the command */
  295. sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
  296. sd_ctrl_write16(host, CTL_SD_CMD, c);
  297. return 0;
  298. }
  299. /*
  300. * This chip always returns (at least?) as much data as you ask for.
  301. * I'm unsure what happens if you ask for less than a block. This should be
  302. * looked into to ensure that a funny length read doesn't hose the controller.
  303. */
  304. static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
  305. {
  306. struct mmc_data *data = host->data;
  307. void *sg_virt;
  308. unsigned short *buf;
  309. unsigned int count;
  310. unsigned long flags;
  311. if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
  312. pr_err("PIO IRQ in DMA mode!\n");
  313. return;
  314. } else if (!data) {
  315. pr_debug("Spurious PIO IRQ\n");
  316. return;
  317. }
  318. sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
  319. buf = (unsigned short *)(sg_virt + host->sg_off);
  320. count = host->sg_ptr->length - host->sg_off;
  321. if (count > data->blksz)
  322. count = data->blksz;
  323. pr_debug("count: %08x offset: %08x flags %08x\n",
  324. count, host->sg_off, data->flags);
  325. /* Transfer the data */
  326. if (data->flags & MMC_DATA_READ)
  327. sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  328. else
  329. sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
  330. host->sg_off += count;
  331. tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
  332. if (host->sg_off == host->sg_ptr->length)
  333. tmio_mmc_next_sg(host);
  334. return;
  335. }
  336. static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
  337. {
  338. if (host->sg_ptr == &host->bounce_sg) {
  339. unsigned long flags;
  340. void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
  341. memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
  342. tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
  343. }
  344. }
  345. /* needs to be called with host->lock held */
  346. void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
  347. {
  348. struct mmc_data *data = host->data;
  349. struct mmc_command *stop;
  350. host->data = NULL;
  351. if (!data) {
  352. dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
  353. return;
  354. }
  355. stop = data->stop;
  356. /* FIXME - return correct transfer count on errors */
  357. if (!data->error)
  358. data->bytes_xfered = data->blocks * data->blksz;
  359. else
  360. data->bytes_xfered = 0;
  361. pr_debug("Completed data request\n");
  362. /*
  363. * FIXME: other drivers allow an optional stop command of any given type
  364. * which we dont do, as the chip can auto generate them.
  365. * Perhaps we can be smarter about when to use auto CMD12 and
  366. * only issue the auto request when we know this is the desired
  367. * stop command, allowing fallback to the stop command the
  368. * upper layers expect. For now, we do what works.
  369. */
  370. if (data->flags & MMC_DATA_READ) {
  371. if (host->chan_rx && !host->force_pio)
  372. tmio_mmc_check_bounce_buffer(host);
  373. dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
  374. host->mrq);
  375. } else {
  376. dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
  377. host->mrq);
  378. }
  379. if (stop) {
  380. if (stop->opcode == 12 && !stop->arg)
  381. sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
  382. else
  383. BUG();
  384. }
  385. schedule_work(&host->done);
  386. }
  387. static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
  388. {
  389. struct mmc_data *data;
  390. spin_lock(&host->lock);
  391. data = host->data;
  392. if (!data)
  393. goto out;
  394. if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
  395. /*
  396. * Has all data been written out yet? Testing on SuperH showed,
  397. * that in most cases the first interrupt comes already with the
  398. * BUSY status bit clear, but on some operations, like mount or
  399. * in the beginning of a write / sync / umount, there is one
  400. * DATAEND interrupt with the BUSY bit set, in this cases
  401. * waiting for one more interrupt fixes the problem.
  402. */
  403. if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
  404. tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
  405. tasklet_schedule(&host->dma_complete);
  406. }
  407. } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
  408. tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
  409. tasklet_schedule(&host->dma_complete);
  410. } else {
  411. tmio_mmc_do_data_irq(host);
  412. tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
  413. }
  414. out:
  415. spin_unlock(&host->lock);
  416. }
  417. static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
  418. unsigned int stat)
  419. {
  420. struct mmc_command *cmd = host->cmd;
  421. int i, addr;
  422. spin_lock(&host->lock);
  423. if (!host->cmd) {
  424. pr_debug("Spurious CMD irq\n");
  425. goto out;
  426. }
  427. host->cmd = NULL;
  428. /* This controller is sicker than the PXA one. Not only do we need to
  429. * drop the top 8 bits of the first response word, we also need to
  430. * modify the order of the response for short response command types.
  431. */
  432. for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
  433. cmd->resp[i] = sd_ctrl_read32(host, addr);
  434. if (cmd->flags & MMC_RSP_136) {
  435. cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
  436. cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
  437. cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
  438. cmd->resp[3] <<= 8;
  439. } else if (cmd->flags & MMC_RSP_R3) {
  440. cmd->resp[0] = cmd->resp[3];
  441. }
  442. if (stat & TMIO_STAT_CMDTIMEOUT)
  443. cmd->error = -ETIMEDOUT;
  444. else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
  445. cmd->error = -EILSEQ;
  446. /* If there is data to handle we enable data IRQs here, and
  447. * we will ultimatley finish the request in the data_end handler.
  448. * If theres no data or we encountered an error, finish now.
  449. */
  450. if (host->data && !cmd->error) {
  451. if (host->data->flags & MMC_DATA_READ) {
  452. if (host->force_pio || !host->chan_rx)
  453. tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
  454. else
  455. tasklet_schedule(&host->dma_issue);
  456. } else {
  457. if (host->force_pio || !host->chan_tx)
  458. tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
  459. else
  460. tasklet_schedule(&host->dma_issue);
  461. }
  462. } else {
  463. schedule_work(&host->done);
  464. }
  465. out:
  466. spin_unlock(&host->lock);
  467. }
  468. static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
  469. int *ireg, int *status)
  470. {
  471. *status = sd_ctrl_read32(host, CTL_STATUS);
  472. *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
  473. pr_debug_status(*status);
  474. pr_debug_status(*ireg);
  475. }
  476. static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
  477. int ireg, int status)
  478. {
  479. struct mmc_host *mmc = host->mmc;
  480. /* Card insert / remove attempts */
  481. if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
  482. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
  483. TMIO_STAT_CARD_REMOVE);
  484. if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
  485. ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
  486. !work_pending(&mmc->detect.work))
  487. mmc_detect_change(host->mmc, msecs_to_jiffies(100));
  488. return true;
  489. }
  490. return false;
  491. }
  492. irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
  493. {
  494. unsigned int ireg, status;
  495. struct tmio_mmc_host *host = devid;
  496. tmio_mmc_card_irq_status(host, &ireg, &status);
  497. __tmio_mmc_card_detect_irq(host, ireg, status);
  498. return IRQ_HANDLED;
  499. }
  500. EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
  501. static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
  502. int ireg, int status)
  503. {
  504. /* Command completion */
  505. if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
  506. tmio_mmc_ack_mmc_irqs(host,
  507. TMIO_STAT_CMDRESPEND |
  508. TMIO_STAT_CMDTIMEOUT);
  509. tmio_mmc_cmd_irq(host, status);
  510. return true;
  511. }
  512. /* Data transfer */
  513. if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
  514. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
  515. tmio_mmc_pio_irq(host);
  516. return true;
  517. }
  518. /* Data transfer completion */
  519. if (ireg & TMIO_STAT_DATAEND) {
  520. tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
  521. tmio_mmc_data_irq(host);
  522. return true;
  523. }
  524. return false;
  525. }
  526. irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
  527. {
  528. unsigned int ireg, status;
  529. struct tmio_mmc_host *host = devid;
  530. tmio_mmc_card_irq_status(host, &ireg, &status);
  531. __tmio_mmc_sdcard_irq(host, ireg, status);
  532. return IRQ_HANDLED;
  533. }
  534. EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
  535. irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
  536. {
  537. struct tmio_mmc_host *host = devid;
  538. struct mmc_host *mmc = host->mmc;
  539. struct tmio_mmc_data *pdata = host->pdata;
  540. unsigned int ireg, status;
  541. if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
  542. return IRQ_HANDLED;
  543. status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
  544. ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
  545. sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
  546. if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
  547. mmc_signal_sdio_irq(mmc);
  548. return IRQ_HANDLED;
  549. }
  550. EXPORT_SYMBOL(tmio_mmc_sdio_irq);
  551. irqreturn_t tmio_mmc_irq(int irq, void *devid)
  552. {
  553. struct tmio_mmc_host *host = devid;
  554. unsigned int ireg, status;
  555. pr_debug("MMC IRQ begin\n");
  556. tmio_mmc_card_irq_status(host, &ireg, &status);
  557. if (__tmio_mmc_card_detect_irq(host, ireg, status))
  558. return IRQ_HANDLED;
  559. if (__tmio_mmc_sdcard_irq(host, ireg, status))
  560. return IRQ_HANDLED;
  561. tmio_mmc_sdio_irq(irq, devid);
  562. return IRQ_HANDLED;
  563. }
  564. EXPORT_SYMBOL(tmio_mmc_irq);
  565. static int tmio_mmc_start_data(struct tmio_mmc_host *host,
  566. struct mmc_data *data)
  567. {
  568. struct tmio_mmc_data *pdata = host->pdata;
  569. pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
  570. data->blksz, data->blocks);
  571. /* Some hardware cannot perform 2 byte requests in 4 bit mode */
  572. if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
  573. int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
  574. if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
  575. pr_err("%s: %d byte block unsupported in 4 bit mode\n",
  576. mmc_hostname(host->mmc), data->blksz);
  577. return -EINVAL;
  578. }
  579. }
  580. tmio_mmc_init_sg(host, data);
  581. host->data = data;
  582. /* Set transfer length / blocksize */
  583. sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
  584. sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
  585. tmio_mmc_start_dma(host, data);
  586. return 0;
  587. }
  588. /* Process requests from the MMC layer */
  589. static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  590. {
  591. struct tmio_mmc_host *host = mmc_priv(mmc);
  592. unsigned long flags;
  593. int ret;
  594. spin_lock_irqsave(&host->lock, flags);
  595. if (host->mrq) {
  596. pr_debug("request not null\n");
  597. if (IS_ERR(host->mrq)) {
  598. spin_unlock_irqrestore(&host->lock, flags);
  599. mrq->cmd->error = -EAGAIN;
  600. mmc_request_done(mmc, mrq);
  601. return;
  602. }
  603. }
  604. host->last_req_ts = jiffies;
  605. wmb();
  606. host->mrq = mrq;
  607. spin_unlock_irqrestore(&host->lock, flags);
  608. if (mrq->data) {
  609. ret = tmio_mmc_start_data(host, mrq->data);
  610. if (ret)
  611. goto fail;
  612. }
  613. ret = tmio_mmc_start_command(host, mrq->cmd);
  614. if (!ret) {
  615. schedule_delayed_work(&host->delayed_reset_work,
  616. msecs_to_jiffies(2000));
  617. return;
  618. }
  619. fail:
  620. host->force_pio = false;
  621. host->mrq = NULL;
  622. mrq->cmd->error = ret;
  623. mmc_request_done(mmc, mrq);
  624. }
  625. /* Set MMC clock / power.
  626. * Note: This controller uses a simple divider scheme therefore it cannot
  627. * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
  628. * MMC wont run that fast, it has to be clocked at 12MHz which is the next
  629. * slowest setting.
  630. */
  631. static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  632. {
  633. struct tmio_mmc_host *host = mmc_priv(mmc);
  634. struct device *dev = &host->pdev->dev;
  635. unsigned long flags;
  636. mutex_lock(&host->ios_lock);
  637. spin_lock_irqsave(&host->lock, flags);
  638. if (host->mrq) {
  639. if (IS_ERR(host->mrq)) {
  640. dev_dbg(dev,
  641. "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
  642. current->comm, task_pid_nr(current),
  643. ios->clock, ios->power_mode);
  644. host->mrq = ERR_PTR(-EINTR);
  645. } else {
  646. dev_dbg(dev,
  647. "%s.%d: CMD%u active since %lu, now %lu!\n",
  648. current->comm, task_pid_nr(current),
  649. host->mrq->cmd->opcode, host->last_req_ts, jiffies);
  650. }
  651. spin_unlock_irqrestore(&host->lock, flags);
  652. mutex_unlock(&host->ios_lock);
  653. return;
  654. }
  655. host->mrq = ERR_PTR(-EBUSY);
  656. spin_unlock_irqrestore(&host->lock, flags);
  657. /*
  658. * host->power toggles between false and true in both cases - either
  659. * or not the controller can be runtime-suspended during inactivity.
  660. * But if the controller has to be kept on, the runtime-pm usage_count
  661. * is kept positive, so no suspending actually takes place.
  662. */
  663. if (ios->power_mode == MMC_POWER_ON && ios->clock) {
  664. if (!host->power) {
  665. pm_runtime_get_sync(dev);
  666. host->power = true;
  667. }
  668. tmio_mmc_set_clock(host, ios->clock);
  669. /* power up SD bus */
  670. if (host->set_pwr)
  671. host->set_pwr(host->pdev, 1);
  672. /* start bus clock */
  673. tmio_mmc_clk_start(host);
  674. } else if (ios->power_mode != MMC_POWER_UP) {
  675. if (host->set_pwr && ios->power_mode == MMC_POWER_OFF)
  676. host->set_pwr(host->pdev, 0);
  677. if (host->power) {
  678. host->power = false;
  679. pm_runtime_put(dev);
  680. }
  681. tmio_mmc_clk_stop(host);
  682. }
  683. switch (ios->bus_width) {
  684. case MMC_BUS_WIDTH_1:
  685. sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
  686. break;
  687. case MMC_BUS_WIDTH_4:
  688. sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
  689. break;
  690. }
  691. /* Let things settle. delay taken from winCE driver */
  692. udelay(140);
  693. if (PTR_ERR(host->mrq) == -EINTR)
  694. dev_dbg(&host->pdev->dev,
  695. "%s.%d: IOS interrupted: clk %u, mode %u",
  696. current->comm, task_pid_nr(current),
  697. ios->clock, ios->power_mode);
  698. host->mrq = NULL;
  699. mutex_unlock(&host->ios_lock);
  700. }
  701. static int tmio_mmc_get_ro(struct mmc_host *mmc)
  702. {
  703. struct tmio_mmc_host *host = mmc_priv(mmc);
  704. struct tmio_mmc_data *pdata = host->pdata;
  705. return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
  706. (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
  707. }
  708. static int tmio_mmc_get_cd(struct mmc_host *mmc)
  709. {
  710. struct tmio_mmc_host *host = mmc_priv(mmc);
  711. struct tmio_mmc_data *pdata = host->pdata;
  712. if (!pdata->get_cd)
  713. return -ENOSYS;
  714. else
  715. return pdata->get_cd(host->pdev);
  716. }
  717. static const struct mmc_host_ops tmio_mmc_ops = {
  718. .request = tmio_mmc_request,
  719. .set_ios = tmio_mmc_set_ios,
  720. .get_ro = tmio_mmc_get_ro,
  721. .get_cd = tmio_mmc_get_cd,
  722. .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
  723. };
  724. int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host,
  725. struct platform_device *pdev,
  726. struct tmio_mmc_data *pdata)
  727. {
  728. struct tmio_mmc_host *_host;
  729. struct mmc_host *mmc;
  730. struct resource *res_ctl;
  731. int ret;
  732. u32 irq_mask = TMIO_MASK_CMD;
  733. res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  734. if (!res_ctl)
  735. return -EINVAL;
  736. mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
  737. if (!mmc)
  738. return -ENOMEM;
  739. pdata->dev = &pdev->dev;
  740. _host = mmc_priv(mmc);
  741. _host->pdata = pdata;
  742. _host->mmc = mmc;
  743. _host->pdev = pdev;
  744. platform_set_drvdata(pdev, mmc);
  745. _host->set_pwr = pdata->set_pwr;
  746. _host->set_clk_div = pdata->set_clk_div;
  747. /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
  748. _host->bus_shift = resource_size(res_ctl) >> 10;
  749. _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
  750. if (!_host->ctl) {
  751. ret = -ENOMEM;
  752. goto host_free;
  753. }
  754. mmc->ops = &tmio_mmc_ops;
  755. mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities;
  756. mmc->f_max = pdata->hclk;
  757. mmc->f_min = mmc->f_max / 512;
  758. mmc->max_segs = 32;
  759. mmc->max_blk_size = 512;
  760. mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
  761. mmc->max_segs;
  762. mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
  763. mmc->max_seg_size = mmc->max_req_size;
  764. if (pdata->ocr_mask)
  765. mmc->ocr_avail = pdata->ocr_mask;
  766. else
  767. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
  768. _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
  769. mmc->caps & MMC_CAP_NEEDS_POLL ||
  770. mmc->caps & MMC_CAP_NONREMOVABLE);
  771. _host->power = false;
  772. pm_runtime_enable(&pdev->dev);
  773. ret = pm_runtime_resume(&pdev->dev);
  774. if (ret < 0)
  775. goto pm_disable;
  776. /*
  777. * There are 4 different scenarios for the card detection:
  778. * 1) an external gpio irq handles the cd (best for power savings)
  779. * 2) internal sdhi irq handles the cd
  780. * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
  781. * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
  782. *
  783. * While we increment the runtime PM counter for all scenarios when
  784. * the mmc core activates us by calling an appropriate set_ios(), we
  785. * must additionally ensure that in case 2) the tmio mmc hardware stays
  786. * additionally ensure that in case 2) the tmio mmc hardware stays
  787. * powered on during runtime for the card detection to work.
  788. */
  789. if (_host->native_hotplug)
  790. pm_runtime_get_noresume(&pdev->dev);
  791. tmio_mmc_clk_stop(_host);
  792. tmio_mmc_reset(_host);
  793. _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
  794. tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
  795. if (pdata->flags & TMIO_MMC_SDIO_IRQ)
  796. tmio_mmc_enable_sdio_irq(mmc, 0);
  797. spin_lock_init(&_host->lock);
  798. mutex_init(&_host->ios_lock);
  799. /* Init delayed work for request timeouts */
  800. INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
  801. INIT_WORK(&_host->done, tmio_mmc_done_work);
  802. /* See if we also get DMA */
  803. tmio_mmc_request_dma(_host, pdata);
  804. mmc_add_host(mmc);
  805. dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
  806. /* Unmask the IRQs we want to know about */
  807. if (!_host->chan_rx)
  808. irq_mask |= TMIO_MASK_READOP;
  809. if (!_host->chan_tx)
  810. irq_mask |= TMIO_MASK_WRITEOP;
  811. if (!_host->native_hotplug)
  812. irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
  813. tmio_mmc_enable_mmc_irqs(_host, irq_mask);
  814. if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
  815. ret = mmc_cd_gpio_request(mmc, pdata->cd_gpio);
  816. if (ret < 0) {
  817. tmio_mmc_host_remove(_host);
  818. return ret;
  819. }
  820. }
  821. *host = _host;
  822. return 0;
  823. pm_disable:
  824. pm_runtime_disable(&pdev->dev);
  825. iounmap(_host->ctl);
  826. host_free:
  827. mmc_free_host(mmc);
  828. return ret;
  829. }
  830. EXPORT_SYMBOL(tmio_mmc_host_probe);
  831. void tmio_mmc_host_remove(struct tmio_mmc_host *host)
  832. {
  833. struct platform_device *pdev = host->pdev;
  834. struct tmio_mmc_data *pdata = host->pdata;
  835. struct mmc_host *mmc = host->mmc;
  836. if (pdata->flags & TMIO_MMC_USE_GPIO_CD)
  837. /*
  838. * This means we can miss a card-eject, but this is anyway
  839. * possible, because of delayed processing of hotplug events.
  840. */
  841. mmc_cd_gpio_free(mmc);
  842. if (!host->native_hotplug)
  843. pm_runtime_get_sync(&pdev->dev);
  844. dev_pm_qos_hide_latency_limit(&pdev->dev);
  845. mmc_remove_host(mmc);
  846. cancel_work_sync(&host->done);
  847. cancel_delayed_work_sync(&host->delayed_reset_work);
  848. tmio_mmc_release_dma(host);
  849. pm_runtime_put_sync(&pdev->dev);
  850. pm_runtime_disable(&pdev->dev);
  851. iounmap(host->ctl);
  852. mmc_free_host(mmc);
  853. }
  854. EXPORT_SYMBOL(tmio_mmc_host_remove);
  855. #ifdef CONFIG_PM
  856. int tmio_mmc_host_suspend(struct device *dev)
  857. {
  858. struct mmc_host *mmc = dev_get_drvdata(dev);
  859. struct tmio_mmc_host *host = mmc_priv(mmc);
  860. int ret = mmc_suspend_host(mmc);
  861. if (!ret)
  862. tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
  863. return ret;
  864. }
  865. EXPORT_SYMBOL(tmio_mmc_host_suspend);
  866. int tmio_mmc_host_resume(struct device *dev)
  867. {
  868. struct mmc_host *mmc = dev_get_drvdata(dev);
  869. struct tmio_mmc_host *host = mmc_priv(mmc);
  870. tmio_mmc_reset(host);
  871. tmio_mmc_enable_dma(host, true);
  872. /* The MMC core will perform the complete set up */
  873. return mmc_resume_host(mmc);
  874. }
  875. EXPORT_SYMBOL(tmio_mmc_host_resume);
  876. #endif /* CONFIG_PM */
  877. int tmio_mmc_host_runtime_suspend(struct device *dev)
  878. {
  879. return 0;
  880. }
  881. EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
  882. int tmio_mmc_host_runtime_resume(struct device *dev)
  883. {
  884. struct mmc_host *mmc = dev_get_drvdata(dev);
  885. struct tmio_mmc_host *host = mmc_priv(mmc);
  886. tmio_mmc_reset(host);
  887. tmio_mmc_enable_dma(host, true);
  888. return 0;
  889. }
  890. EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
  891. MODULE_LICENSE("GPL v2");