speedstep-ich.c 11 KB

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  1. /*
  2. * (C) 2001 Dave Jones, Arjan van de ven.
  3. * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
  4. *
  5. * Licensed under the terms of the GNU GPL License version 2.
  6. * Based upon reverse engineered information, and on Intel documentation
  7. * for chipsets ICH2-M and ICH3-M.
  8. *
  9. * Many thanks to Ducrot Bruno for finding and fixing the last
  10. * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11. * for extensive testing.
  12. *
  13. * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14. */
  15. /*********************************************************************
  16. * SPEEDSTEP - DEFINITIONS *
  17. *********************************************************************/
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/init.h>
  21. #include <linux/cpufreq.h>
  22. #include <linux/pci.h>
  23. #include <linux/sched.h>
  24. #include <asm/cpu_device_id.h>
  25. #include "speedstep-lib.h"
  26. /* speedstep_chipset:
  27. * It is necessary to know which chipset is used. As accesses to
  28. * this device occur at various places in this module, we need a
  29. * static struct pci_dev * pointing to that device.
  30. */
  31. static struct pci_dev *speedstep_chipset_dev;
  32. /* speedstep_processor
  33. */
  34. static enum speedstep_processor speedstep_processor;
  35. static u32 pmbase;
  36. /*
  37. * There are only two frequency states for each processor. Values
  38. * are in kHz for the time being.
  39. */
  40. static struct cpufreq_frequency_table speedstep_freqs[] = {
  41. {SPEEDSTEP_HIGH, 0},
  42. {SPEEDSTEP_LOW, 0},
  43. {0, CPUFREQ_TABLE_END},
  44. };
  45. /**
  46. * speedstep_find_register - read the PMBASE address
  47. *
  48. * Returns: -ENODEV if no register could be found
  49. */
  50. static int speedstep_find_register(void)
  51. {
  52. if (!speedstep_chipset_dev)
  53. return -ENODEV;
  54. /* get PMBASE */
  55. pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  56. if (!(pmbase & 0x01)) {
  57. printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  58. return -ENODEV;
  59. }
  60. pmbase &= 0xFFFFFFFE;
  61. if (!pmbase) {
  62. printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  63. return -ENODEV;
  64. }
  65. pr_debug("pmbase is 0x%x\n", pmbase);
  66. return 0;
  67. }
  68. /**
  69. * speedstep_set_state - set the SpeedStep state
  70. * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  71. *
  72. * Tries to change the SpeedStep state. Can be called from
  73. * smp_call_function_single.
  74. */
  75. static void speedstep_set_state(unsigned int state)
  76. {
  77. u8 pm2_blk;
  78. u8 value;
  79. unsigned long flags;
  80. if (state > 0x1)
  81. return;
  82. /* Disable IRQs */
  83. local_irq_save(flags);
  84. /* read state */
  85. value = inb(pmbase + 0x50);
  86. pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
  87. /* write new state */
  88. value &= 0xFE;
  89. value |= state;
  90. pr_debug("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
  91. /* Disable bus master arbitration */
  92. pm2_blk = inb(pmbase + 0x20);
  93. pm2_blk |= 0x01;
  94. outb(pm2_blk, (pmbase + 0x20));
  95. /* Actual transition */
  96. outb(value, (pmbase + 0x50));
  97. /* Restore bus master arbitration */
  98. pm2_blk &= 0xfe;
  99. outb(pm2_blk, (pmbase + 0x20));
  100. /* check if transition was successful */
  101. value = inb(pmbase + 0x50);
  102. /* Enable IRQs */
  103. local_irq_restore(flags);
  104. pr_debug("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
  105. if (state == (value & 0x1))
  106. pr_debug("change to %u MHz succeeded\n",
  107. speedstep_get_frequency(speedstep_processor) / 1000);
  108. else
  109. printk(KERN_ERR "cpufreq: change failed - I/O error\n");
  110. return;
  111. }
  112. /* Wrapper for smp_call_function_single. */
  113. static void _speedstep_set_state(void *_state)
  114. {
  115. speedstep_set_state(*(unsigned int *)_state);
  116. }
  117. /**
  118. * speedstep_activate - activate SpeedStep control in the chipset
  119. *
  120. * Tries to activate the SpeedStep status and control registers.
  121. * Returns -EINVAL on an unsupported chipset, and zero on success.
  122. */
  123. static int speedstep_activate(void)
  124. {
  125. u16 value = 0;
  126. if (!speedstep_chipset_dev)
  127. return -EINVAL;
  128. pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
  129. if (!(value & 0x08)) {
  130. value |= 0x08;
  131. pr_debug("activating SpeedStep (TM) registers\n");
  132. pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
  133. }
  134. return 0;
  135. }
  136. /**
  137. * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
  138. *
  139. * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
  140. * the LPC bridge / PM module which contains all power-management
  141. * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
  142. * chipset, or zero on failure.
  143. */
  144. static unsigned int speedstep_detect_chipset(void)
  145. {
  146. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  147. PCI_DEVICE_ID_INTEL_82801DB_12,
  148. PCI_ANY_ID, PCI_ANY_ID,
  149. NULL);
  150. if (speedstep_chipset_dev)
  151. return 4; /* 4-M */
  152. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  153. PCI_DEVICE_ID_INTEL_82801CA_12,
  154. PCI_ANY_ID, PCI_ANY_ID,
  155. NULL);
  156. if (speedstep_chipset_dev)
  157. return 3; /* 3-M */
  158. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  159. PCI_DEVICE_ID_INTEL_82801BA_10,
  160. PCI_ANY_ID, PCI_ANY_ID,
  161. NULL);
  162. if (speedstep_chipset_dev) {
  163. /* speedstep.c causes lockups on Dell Inspirons 8000 and
  164. * 8100 which use a pretty old revision of the 82815
  165. * host bridge. Abort on these systems.
  166. */
  167. static struct pci_dev *hostbridge;
  168. hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  169. PCI_DEVICE_ID_INTEL_82815_MC,
  170. PCI_ANY_ID, PCI_ANY_ID,
  171. NULL);
  172. if (!hostbridge)
  173. return 2; /* 2-M */
  174. if (hostbridge->revision < 5) {
  175. pr_debug("hostbridge does not support speedstep\n");
  176. speedstep_chipset_dev = NULL;
  177. pci_dev_put(hostbridge);
  178. return 0;
  179. }
  180. pci_dev_put(hostbridge);
  181. return 2; /* 2-M */
  182. }
  183. return 0;
  184. }
  185. static void get_freq_data(void *_speed)
  186. {
  187. unsigned int *speed = _speed;
  188. *speed = speedstep_get_frequency(speedstep_processor);
  189. }
  190. static unsigned int speedstep_get(unsigned int cpu)
  191. {
  192. unsigned int speed;
  193. /* You're supposed to ensure CPU is online. */
  194. if (smp_call_function_single(cpu, get_freq_data, &speed, 1) != 0)
  195. BUG();
  196. pr_debug("detected %u kHz as current frequency\n", speed);
  197. return speed;
  198. }
  199. /**
  200. * speedstep_target - set a new CPUFreq policy
  201. * @policy: new policy
  202. * @target_freq: the target frequency
  203. * @relation: how that frequency relates to achieved frequency
  204. * (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  205. *
  206. * Sets a new CPUFreq policy.
  207. */
  208. static int speedstep_target(struct cpufreq_policy *policy,
  209. unsigned int target_freq,
  210. unsigned int relation)
  211. {
  212. unsigned int newstate = 0, policy_cpu;
  213. struct cpufreq_freqs freqs;
  214. int i;
  215. if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
  216. target_freq, relation, &newstate))
  217. return -EINVAL;
  218. policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
  219. freqs.old = speedstep_get(policy_cpu);
  220. freqs.new = speedstep_freqs[newstate].frequency;
  221. freqs.cpu = policy->cpu;
  222. pr_debug("transiting from %u to %u kHz\n", freqs.old, freqs.new);
  223. /* no transition necessary */
  224. if (freqs.old == freqs.new)
  225. return 0;
  226. for_each_cpu(i, policy->cpus) {
  227. freqs.cpu = i;
  228. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  229. }
  230. smp_call_function_single(policy_cpu, _speedstep_set_state, &newstate,
  231. true);
  232. for_each_cpu(i, policy->cpus) {
  233. freqs.cpu = i;
  234. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  235. }
  236. return 0;
  237. }
  238. /**
  239. * speedstep_verify - verifies a new CPUFreq policy
  240. * @policy: new policy
  241. *
  242. * Limit must be within speedstep_low_freq and speedstep_high_freq, with
  243. * at least one border included.
  244. */
  245. static int speedstep_verify(struct cpufreq_policy *policy)
  246. {
  247. return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
  248. }
  249. struct get_freqs {
  250. struct cpufreq_policy *policy;
  251. int ret;
  252. };
  253. static void get_freqs_on_cpu(void *_get_freqs)
  254. {
  255. struct get_freqs *get_freqs = _get_freqs;
  256. get_freqs->ret =
  257. speedstep_get_freqs(speedstep_processor,
  258. &speedstep_freqs[SPEEDSTEP_LOW].frequency,
  259. &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
  260. &get_freqs->policy->cpuinfo.transition_latency,
  261. &speedstep_set_state);
  262. }
  263. static int speedstep_cpu_init(struct cpufreq_policy *policy)
  264. {
  265. int result;
  266. unsigned int policy_cpu, speed;
  267. struct get_freqs gf;
  268. /* only run on CPU to be set, or on its sibling */
  269. #ifdef CONFIG_SMP
  270. cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
  271. #endif
  272. policy_cpu = cpumask_any_and(policy->cpus, cpu_online_mask);
  273. /* detect low and high frequency and transition latency */
  274. gf.policy = policy;
  275. smp_call_function_single(policy_cpu, get_freqs_on_cpu, &gf, 1);
  276. if (gf.ret)
  277. return gf.ret;
  278. /* get current speed setting */
  279. speed = speedstep_get(policy_cpu);
  280. if (!speed)
  281. return -EIO;
  282. pr_debug("currently at %s speed setting - %i MHz\n",
  283. (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
  284. ? "low" : "high",
  285. (speed / 1000));
  286. /* cpuinfo and default policy values */
  287. policy->cur = speed;
  288. result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
  289. if (result)
  290. return result;
  291. cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
  292. return 0;
  293. }
  294. static int speedstep_cpu_exit(struct cpufreq_policy *policy)
  295. {
  296. cpufreq_frequency_table_put_attr(policy->cpu);
  297. return 0;
  298. }
  299. static struct freq_attr *speedstep_attr[] = {
  300. &cpufreq_freq_attr_scaling_available_freqs,
  301. NULL,
  302. };
  303. static struct cpufreq_driver speedstep_driver = {
  304. .name = "speedstep-ich",
  305. .verify = speedstep_verify,
  306. .target = speedstep_target,
  307. .init = speedstep_cpu_init,
  308. .exit = speedstep_cpu_exit,
  309. .get = speedstep_get,
  310. .owner = THIS_MODULE,
  311. .attr = speedstep_attr,
  312. };
  313. static const struct x86_cpu_id ss_smi_ids[] = {
  314. { X86_VENDOR_INTEL, 6, 0xb, },
  315. { X86_VENDOR_INTEL, 6, 0x8, },
  316. { X86_VENDOR_INTEL, 15, 2 },
  317. {}
  318. };
  319. #if 0
  320. /* Autoload or not? Do not for now. */
  321. MODULE_DEVICE_TABLE(x86cpu, ss_smi_ids);
  322. #endif
  323. /**
  324. * speedstep_init - initializes the SpeedStep CPUFreq driver
  325. *
  326. * Initializes the SpeedStep support. Returns -ENODEV on unsupported
  327. * devices, -EINVAL on problems during initiatization, and zero on
  328. * success.
  329. */
  330. static int __init speedstep_init(void)
  331. {
  332. if (!x86_match_cpu(ss_smi_ids))
  333. return -ENODEV;
  334. /* detect processor */
  335. speedstep_processor = speedstep_detect_processor();
  336. if (!speedstep_processor) {
  337. pr_debug("Intel(R) SpeedStep(TM) capable processor "
  338. "not found\n");
  339. return -ENODEV;
  340. }
  341. /* detect chipset */
  342. if (!speedstep_detect_chipset()) {
  343. pr_debug("Intel(R) SpeedStep(TM) for this chipset not "
  344. "(yet) available.\n");
  345. return -ENODEV;
  346. }
  347. /* activate speedstep support */
  348. if (speedstep_activate()) {
  349. pci_dev_put(speedstep_chipset_dev);
  350. return -EINVAL;
  351. }
  352. if (speedstep_find_register())
  353. return -ENODEV;
  354. return cpufreq_register_driver(&speedstep_driver);
  355. }
  356. /**
  357. * speedstep_exit - unregisters SpeedStep support
  358. *
  359. * Unregisters SpeedStep support.
  360. */
  361. static void __exit speedstep_exit(void)
  362. {
  363. pci_dev_put(speedstep_chipset_dev);
  364. cpufreq_unregister_driver(&speedstep_driver);
  365. }
  366. MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
  367. "Dominik Brodowski <linux@brodo.de>");
  368. MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
  369. "with ICH-M southbridges.");
  370. MODULE_LICENSE("GPL");
  371. module_init(speedstep_init);
  372. module_exit(speedstep_exit);