exynos-cpufreq.c 7.5 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  3. * http://www.samsung.com
  4. *
  5. * EXYNOS - CPU frequency scaling support for EXYNOS series
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/err.h>
  13. #include <linux/clk.h>
  14. #include <linux/io.h>
  15. #include <linux/slab.h>
  16. #include <linux/regulator/consumer.h>
  17. #include <linux/cpufreq.h>
  18. #include <linux/suspend.h>
  19. #include <mach/cpufreq.h>
  20. #include <plat/cpu.h>
  21. static struct exynos_dvfs_info *exynos_info;
  22. static struct regulator *arm_regulator;
  23. static struct cpufreq_freqs freqs;
  24. static unsigned int locking_frequency;
  25. static bool frequency_locked;
  26. static DEFINE_MUTEX(cpufreq_lock);
  27. int exynos_verify_speed(struct cpufreq_policy *policy)
  28. {
  29. return cpufreq_frequency_table_verify(policy,
  30. exynos_info->freq_table);
  31. }
  32. unsigned int exynos_getspeed(unsigned int cpu)
  33. {
  34. return clk_get_rate(exynos_info->cpu_clk) / 1000;
  35. }
  36. static int exynos_target(struct cpufreq_policy *policy,
  37. unsigned int target_freq,
  38. unsigned int relation)
  39. {
  40. unsigned int index, old_index;
  41. unsigned int arm_volt, safe_arm_volt = 0;
  42. int ret = 0;
  43. struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
  44. unsigned int *volt_table = exynos_info->volt_table;
  45. unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
  46. mutex_lock(&cpufreq_lock);
  47. freqs.old = policy->cur;
  48. if (frequency_locked && target_freq != locking_frequency) {
  49. ret = -EAGAIN;
  50. goto out;
  51. }
  52. if (cpufreq_frequency_table_target(policy, freq_table,
  53. freqs.old, relation, &old_index)) {
  54. ret = -EINVAL;
  55. goto out;
  56. }
  57. if (cpufreq_frequency_table_target(policy, freq_table,
  58. target_freq, relation, &index)) {
  59. ret = -EINVAL;
  60. goto out;
  61. }
  62. freqs.new = freq_table[index].frequency;
  63. freqs.cpu = policy->cpu;
  64. /*
  65. * ARM clock source will be changed APLL to MPLL temporary
  66. * To support this level, need to control regulator for
  67. * required voltage level
  68. */
  69. if (exynos_info->need_apll_change != NULL) {
  70. if (exynos_info->need_apll_change(old_index, index) &&
  71. (freq_table[index].frequency < mpll_freq_khz) &&
  72. (freq_table[old_index].frequency < mpll_freq_khz))
  73. safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
  74. }
  75. arm_volt = volt_table[index];
  76. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  77. /* When the new frequency is higher than current frequency */
  78. if ((freqs.new > freqs.old) && !safe_arm_volt) {
  79. /* Firstly, voltage up to increase frequency */
  80. regulator_set_voltage(arm_regulator, arm_volt,
  81. arm_volt);
  82. }
  83. if (safe_arm_volt)
  84. regulator_set_voltage(arm_regulator, safe_arm_volt,
  85. safe_arm_volt);
  86. if (freqs.new != freqs.old)
  87. exynos_info->set_freq(old_index, index);
  88. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  89. /* When the new frequency is lower than current frequency */
  90. if ((freqs.new < freqs.old) ||
  91. ((freqs.new > freqs.old) && safe_arm_volt)) {
  92. /* down the voltage after frequency change */
  93. regulator_set_voltage(arm_regulator, arm_volt,
  94. arm_volt);
  95. }
  96. out:
  97. mutex_unlock(&cpufreq_lock);
  98. return ret;
  99. }
  100. #ifdef CONFIG_PM
  101. static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
  102. {
  103. return 0;
  104. }
  105. static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
  106. {
  107. return 0;
  108. }
  109. #endif
  110. /**
  111. * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
  112. * context
  113. * @notifier
  114. * @pm_event
  115. * @v
  116. *
  117. * While frequency_locked == true, target() ignores every frequency but
  118. * locking_frequency. The locking_frequency value is the initial frequency,
  119. * which is set by the bootloader. In order to eliminate possible
  120. * inconsistency in clock values, we save and restore frequencies during
  121. * suspend and resume and block CPUFREQ activities. Note that the standard
  122. * suspend/resume cannot be used as they are too deep (syscore_ops) for
  123. * regulator actions.
  124. */
  125. static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
  126. unsigned long pm_event, void *v)
  127. {
  128. struct cpufreq_policy *policy = cpufreq_cpu_get(0); /* boot CPU */
  129. static unsigned int saved_frequency;
  130. unsigned int temp;
  131. mutex_lock(&cpufreq_lock);
  132. switch (pm_event) {
  133. case PM_SUSPEND_PREPARE:
  134. if (frequency_locked)
  135. goto out;
  136. frequency_locked = true;
  137. if (locking_frequency) {
  138. saved_frequency = exynos_getspeed(0);
  139. mutex_unlock(&cpufreq_lock);
  140. exynos_target(policy, locking_frequency,
  141. CPUFREQ_RELATION_H);
  142. mutex_lock(&cpufreq_lock);
  143. }
  144. break;
  145. case PM_POST_SUSPEND:
  146. if (saved_frequency) {
  147. /*
  148. * While frequency_locked, only locking_frequency
  149. * is valid for target(). In order to use
  150. * saved_frequency while keeping frequency_locked,
  151. * we temporarly overwrite locking_frequency.
  152. */
  153. temp = locking_frequency;
  154. locking_frequency = saved_frequency;
  155. mutex_unlock(&cpufreq_lock);
  156. exynos_target(policy, locking_frequency,
  157. CPUFREQ_RELATION_H);
  158. mutex_lock(&cpufreq_lock);
  159. locking_frequency = temp;
  160. }
  161. frequency_locked = false;
  162. break;
  163. }
  164. out:
  165. mutex_unlock(&cpufreq_lock);
  166. return NOTIFY_OK;
  167. }
  168. static struct notifier_block exynos_cpufreq_nb = {
  169. .notifier_call = exynos_cpufreq_pm_notifier,
  170. };
  171. static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
  172. {
  173. policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
  174. cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
  175. locking_frequency = exynos_getspeed(0);
  176. /* set the transition latency value */
  177. policy->cpuinfo.transition_latency = 100000;
  178. /*
  179. * EXYNOS4 multi-core processors has 2 cores
  180. * that the frequency cannot be set independently.
  181. * Each cpu is bound to the same speed.
  182. * So the affected cpu is all of the cpus.
  183. */
  184. if (num_online_cpus() == 1) {
  185. cpumask_copy(policy->related_cpus, cpu_possible_mask);
  186. cpumask_copy(policy->cpus, cpu_online_mask);
  187. } else {
  188. cpumask_setall(policy->cpus);
  189. }
  190. return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
  191. }
  192. static struct cpufreq_driver exynos_driver = {
  193. .flags = CPUFREQ_STICKY,
  194. .verify = exynos_verify_speed,
  195. .target = exynos_target,
  196. .get = exynos_getspeed,
  197. .init = exynos_cpufreq_cpu_init,
  198. .name = "exynos_cpufreq",
  199. #ifdef CONFIG_PM
  200. .suspend = exynos_cpufreq_suspend,
  201. .resume = exynos_cpufreq_resume,
  202. #endif
  203. };
  204. static int __init exynos_cpufreq_init(void)
  205. {
  206. int ret = -EINVAL;
  207. exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
  208. if (!exynos_info)
  209. return -ENOMEM;
  210. if (soc_is_exynos4210())
  211. ret = exynos4210_cpufreq_init(exynos_info);
  212. else if (soc_is_exynos4212() || soc_is_exynos4412())
  213. ret = exynos4x12_cpufreq_init(exynos_info);
  214. else if (soc_is_exynos5250())
  215. ret = exynos5250_cpufreq_init(exynos_info);
  216. else
  217. pr_err("%s: CPU type not found\n", __func__);
  218. if (ret)
  219. goto err_vdd_arm;
  220. if (exynos_info->set_freq == NULL) {
  221. pr_err("%s: No set_freq function (ERR)\n", __func__);
  222. goto err_vdd_arm;
  223. }
  224. arm_regulator = regulator_get(NULL, "vdd_arm");
  225. if (IS_ERR(arm_regulator)) {
  226. pr_err("%s: failed to get resource vdd_arm\n", __func__);
  227. goto err_vdd_arm;
  228. }
  229. register_pm_notifier(&exynos_cpufreq_nb);
  230. if (cpufreq_register_driver(&exynos_driver)) {
  231. pr_err("%s: failed to register cpufreq driver\n", __func__);
  232. goto err_cpufreq;
  233. }
  234. return 0;
  235. err_cpufreq:
  236. unregister_pm_notifier(&exynos_cpufreq_nb);
  237. if (!IS_ERR(arm_regulator))
  238. regulator_put(arm_regulator);
  239. err_vdd_arm:
  240. kfree(exynos_info);
  241. pr_debug("%s: failed initialization\n", __func__);
  242. return -EINVAL;
  243. }
  244. late_initcall(exynos_cpufreq_init);