lowcore.h 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363
  1. /*
  2. * Copyright IBM Corp. 1999,2012
  3. * Author(s): Hartmut Penner <hp@de.ibm.com>,
  4. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  5. * Denis Joseph Barrow,
  6. */
  7. #ifndef _ASM_S390_LOWCORE_H
  8. #define _ASM_S390_LOWCORE_H
  9. #include <linux/types.h>
  10. #include <asm/ptrace.h>
  11. #include <asm/cpu.h>
  12. #ifdef CONFIG_32BIT
  13. #define LC_ORDER 0
  14. #define LC_PAGES 1
  15. struct save_area {
  16. u32 ext_save;
  17. u64 timer;
  18. u64 clk_cmp;
  19. u8 pad1[24];
  20. u8 psw[8];
  21. u32 pref_reg;
  22. u8 pad2[20];
  23. u32 acc_regs[16];
  24. u64 fp_regs[4];
  25. u32 gp_regs[16];
  26. u32 ctrl_regs[16];
  27. } __packed;
  28. struct _lowcore {
  29. psw_t restart_psw; /* 0x0000 */
  30. psw_t restart_old_psw; /* 0x0008 */
  31. __u8 pad_0x0010[0x0014-0x0010]; /* 0x0010 */
  32. __u32 ipl_parmblock_ptr; /* 0x0014 */
  33. psw_t external_old_psw; /* 0x0018 */
  34. psw_t svc_old_psw; /* 0x0020 */
  35. psw_t program_old_psw; /* 0x0028 */
  36. psw_t mcck_old_psw; /* 0x0030 */
  37. psw_t io_old_psw; /* 0x0038 */
  38. __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
  39. psw_t external_new_psw; /* 0x0058 */
  40. psw_t svc_new_psw; /* 0x0060 */
  41. psw_t program_new_psw; /* 0x0068 */
  42. psw_t mcck_new_psw; /* 0x0070 */
  43. psw_t io_new_psw; /* 0x0078 */
  44. __u32 ext_params; /* 0x0080 */
  45. __u16 ext_cpu_addr; /* 0x0084 */
  46. __u16 ext_int_code; /* 0x0086 */
  47. __u16 svc_ilc; /* 0x0088 */
  48. __u16 svc_code; /* 0x008a */
  49. __u16 pgm_ilc; /* 0x008c */
  50. __u16 pgm_code; /* 0x008e */
  51. __u32 trans_exc_code; /* 0x0090 */
  52. __u16 mon_class_num; /* 0x0094 */
  53. __u16 per_perc_atmid; /* 0x0096 */
  54. __u32 per_address; /* 0x0098 */
  55. __u32 monitor_code; /* 0x009c */
  56. __u8 exc_access_id; /* 0x00a0 */
  57. __u8 per_access_id; /* 0x00a1 */
  58. __u8 op_access_id; /* 0x00a2 */
  59. __u8 ar_access_id; /* 0x00a3 */
  60. __u8 pad_0x00a4[0x00b8-0x00a4]; /* 0x00a4 */
  61. __u16 subchannel_id; /* 0x00b8 */
  62. __u16 subchannel_nr; /* 0x00ba */
  63. __u32 io_int_parm; /* 0x00bc */
  64. __u32 io_int_word; /* 0x00c0 */
  65. __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
  66. __u32 stfl_fac_list; /* 0x00c8 */
  67. __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
  68. __u32 extended_save_area_addr; /* 0x00d4 */
  69. __u32 cpu_timer_save_area[2]; /* 0x00d8 */
  70. __u32 clock_comp_save_area[2]; /* 0x00e0 */
  71. __u32 mcck_interruption_code[2]; /* 0x00e8 */
  72. __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
  73. __u32 external_damage_code; /* 0x00f4 */
  74. __u32 failing_storage_address; /* 0x00f8 */
  75. __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
  76. psw_t psw_save_area; /* 0x0100 */
  77. __u32 prefixreg_save_area; /* 0x0108 */
  78. __u8 pad_0x010c[0x0120-0x010c]; /* 0x010c */
  79. /* CPU register save area: defined by architecture */
  80. __u32 access_regs_save_area[16]; /* 0x0120 */
  81. __u32 floating_pt_save_area[8]; /* 0x0160 */
  82. __u32 gpregs_save_area[16]; /* 0x0180 */
  83. __u32 cregs_save_area[16]; /* 0x01c0 */
  84. /* Save areas. */
  85. __u32 save_area_sync[8]; /* 0x0200 */
  86. __u32 save_area_async[8]; /* 0x0220 */
  87. __u32 save_area_restart[1]; /* 0x0240 */
  88. __u8 pad_0x0244[0x0248-0x0244]; /* 0x0244 */
  89. /* Return psws. */
  90. psw_t return_psw; /* 0x0248 */
  91. psw_t return_mcck_psw; /* 0x0250 */
  92. /* CPU time accounting values */
  93. __u64 sync_enter_timer; /* 0x0258 */
  94. __u64 async_enter_timer; /* 0x0260 */
  95. __u64 mcck_enter_timer; /* 0x0268 */
  96. __u64 exit_timer; /* 0x0270 */
  97. __u64 user_timer; /* 0x0278 */
  98. __u64 system_timer; /* 0x0280 */
  99. __u64 steal_timer; /* 0x0288 */
  100. __u64 last_update_timer; /* 0x0290 */
  101. __u64 last_update_clock; /* 0x0298 */
  102. __u64 int_clock; /* 0x02a0 */
  103. __u64 mcck_clock; /* 0x02a8 */
  104. __u64 clock_comparator; /* 0x02b0 */
  105. /* Current process. */
  106. __u32 current_task; /* 0x02b8 */
  107. __u32 thread_info; /* 0x02bc */
  108. __u32 kernel_stack; /* 0x02c0 */
  109. /* Interrupt, panic and restart stack. */
  110. __u32 async_stack; /* 0x02c4 */
  111. __u32 panic_stack; /* 0x02c8 */
  112. __u32 restart_stack; /* 0x02cc */
  113. /* Restart function and parameter. */
  114. __u32 restart_fn; /* 0x02d0 */
  115. __u32 restart_data; /* 0x02d4 */
  116. __u32 restart_source; /* 0x02d8 */
  117. /* Address space pointer. */
  118. __u32 kernel_asce; /* 0x02dc */
  119. __u32 user_asce; /* 0x02e0 */
  120. __u32 current_pid; /* 0x02e4 */
  121. /* SMP info area */
  122. __u32 cpu_nr; /* 0x02e8 */
  123. __u32 softirq_pending; /* 0x02ec */
  124. __u32 percpu_offset; /* 0x02f0 */
  125. __u32 machine_flags; /* 0x02f4 */
  126. __u32 ftrace_func; /* 0x02f8 */
  127. __u8 pad_0x02fc[0x0300-0x02fc]; /* 0x02fc */
  128. /* Interrupt response block */
  129. __u8 irb[96]; /* 0x0300 */
  130. __u8 pad_0x0360[0x0e00-0x0360]; /* 0x0360 */
  131. /*
  132. * 0xe00 contains the address of the IPL Parameter Information
  133. * block. Dump tools need IPIB for IPL after dump.
  134. * Note: do not change the position of any fields in 0x0e00-0x0f00
  135. */
  136. __u32 ipib; /* 0x0e00 */
  137. __u32 ipib_checksum; /* 0x0e04 */
  138. __u32 vmcore_info; /* 0x0e08 */
  139. __u8 pad_0x0e0c[0x0e18-0x0e0c]; /* 0x0e0c */
  140. __u32 os_info; /* 0x0e18 */
  141. __u8 pad_0x0e1c[0x0f00-0x0e1c]; /* 0x0e1c */
  142. /* Extended facility list */
  143. __u64 stfle_fac_list[32]; /* 0x0f00 */
  144. } __packed;
  145. #else /* CONFIG_32BIT */
  146. #define LC_ORDER 1
  147. #define LC_PAGES 2
  148. struct save_area {
  149. u64 fp_regs[16];
  150. u64 gp_regs[16];
  151. u8 psw[16];
  152. u8 pad1[8];
  153. u32 pref_reg;
  154. u32 fp_ctrl_reg;
  155. u8 pad2[4];
  156. u32 tod_reg;
  157. u64 timer;
  158. u64 clk_cmp;
  159. u8 pad3[8];
  160. u32 acc_regs[16];
  161. u64 ctrl_regs[16];
  162. } __packed;
  163. struct _lowcore {
  164. __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
  165. __u32 ipl_parmblock_ptr; /* 0x0014 */
  166. __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
  167. __u32 ext_params; /* 0x0080 */
  168. __u16 ext_cpu_addr; /* 0x0084 */
  169. __u16 ext_int_code; /* 0x0086 */
  170. __u16 svc_ilc; /* 0x0088 */
  171. __u16 svc_code; /* 0x008a */
  172. __u16 pgm_ilc; /* 0x008c */
  173. __u16 pgm_code; /* 0x008e */
  174. __u32 data_exc_code; /* 0x0090 */
  175. __u16 mon_class_num; /* 0x0094 */
  176. __u16 per_perc_atmid; /* 0x0096 */
  177. __u64 per_address; /* 0x0098 */
  178. __u8 exc_access_id; /* 0x00a0 */
  179. __u8 per_access_id; /* 0x00a1 */
  180. __u8 op_access_id; /* 0x00a2 */
  181. __u8 ar_access_id; /* 0x00a3 */
  182. __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
  183. __u64 trans_exc_code; /* 0x00a8 */
  184. __u64 monitor_code; /* 0x00b0 */
  185. __u16 subchannel_id; /* 0x00b8 */
  186. __u16 subchannel_nr; /* 0x00ba */
  187. __u32 io_int_parm; /* 0x00bc */
  188. __u32 io_int_word; /* 0x00c0 */
  189. __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
  190. __u32 stfl_fac_list; /* 0x00c8 */
  191. __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
  192. __u32 mcck_interruption_code[2]; /* 0x00e8 */
  193. __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
  194. __u32 external_damage_code; /* 0x00f4 */
  195. __u64 failing_storage_address; /* 0x00f8 */
  196. __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
  197. __u64 breaking_event_addr; /* 0x0110 */
  198. __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
  199. psw_t restart_old_psw; /* 0x0120 */
  200. psw_t external_old_psw; /* 0x0130 */
  201. psw_t svc_old_psw; /* 0x0140 */
  202. psw_t program_old_psw; /* 0x0150 */
  203. psw_t mcck_old_psw; /* 0x0160 */
  204. psw_t io_old_psw; /* 0x0170 */
  205. __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
  206. psw_t restart_psw; /* 0x01a0 */
  207. psw_t external_new_psw; /* 0x01b0 */
  208. psw_t svc_new_psw; /* 0x01c0 */
  209. psw_t program_new_psw; /* 0x01d0 */
  210. psw_t mcck_new_psw; /* 0x01e0 */
  211. psw_t io_new_psw; /* 0x01f0 */
  212. /* Save areas. */
  213. __u64 save_area_sync[8]; /* 0x0200 */
  214. __u64 save_area_async[8]; /* 0x0240 */
  215. __u64 save_area_restart[1]; /* 0x0280 */
  216. __u8 pad_0x0288[0x0290-0x0288]; /* 0x0288 */
  217. /* Return psws. */
  218. psw_t return_psw; /* 0x0290 */
  219. psw_t return_mcck_psw; /* 0x02a0 */
  220. /* CPU accounting and timing values. */
  221. __u64 sync_enter_timer; /* 0x02b0 */
  222. __u64 async_enter_timer; /* 0x02b8 */
  223. __u64 mcck_enter_timer; /* 0x02c0 */
  224. __u64 exit_timer; /* 0x02c8 */
  225. __u64 user_timer; /* 0x02d0 */
  226. __u64 system_timer; /* 0x02d8 */
  227. __u64 steal_timer; /* 0x02e0 */
  228. __u64 last_update_timer; /* 0x02e8 */
  229. __u64 last_update_clock; /* 0x02f0 */
  230. __u64 int_clock; /* 0x02f8 */
  231. __u64 mcck_clock; /* 0x0300 */
  232. __u64 clock_comparator; /* 0x0308 */
  233. /* Current process. */
  234. __u64 current_task; /* 0x0310 */
  235. __u64 thread_info; /* 0x0318 */
  236. __u64 kernel_stack; /* 0x0320 */
  237. /* Interrupt, panic and restart stack. */
  238. __u64 async_stack; /* 0x0328 */
  239. __u64 panic_stack; /* 0x0330 */
  240. __u64 restart_stack; /* 0x0338 */
  241. /* Restart function and parameter. */
  242. __u64 restart_fn; /* 0x0340 */
  243. __u64 restart_data; /* 0x0348 */
  244. __u64 restart_source; /* 0x0350 */
  245. /* Address space pointer. */
  246. __u64 kernel_asce; /* 0x0358 */
  247. __u64 user_asce; /* 0x0360 */
  248. __u64 current_pid; /* 0x0368 */
  249. /* SMP info area */
  250. __u32 cpu_nr; /* 0x0370 */
  251. __u32 softirq_pending; /* 0x0374 */
  252. __u64 percpu_offset; /* 0x0378 */
  253. __u64 vdso_per_cpu_data; /* 0x0380 */
  254. __u64 machine_flags; /* 0x0388 */
  255. __u64 ftrace_func; /* 0x0390 */
  256. __u64 gmap; /* 0x0398 */
  257. __u8 pad_0x03a0[0x0400-0x03a0]; /* 0x03a0 */
  258. /* Interrupt response block. */
  259. __u8 irb[96]; /* 0x0400 */
  260. __u8 pad_0x0460[0x0480-0x0460]; /* 0x0460 */
  261. /* Per cpu primary space access list */
  262. __u32 paste[16]; /* 0x0480 */
  263. __u8 pad_0x04c0[0x0e00-0x04c0]; /* 0x04c0 */
  264. /*
  265. * 0xe00 contains the address of the IPL Parameter Information
  266. * block. Dump tools need IPIB for IPL after dump.
  267. * Note: do not change the position of any fields in 0x0e00-0x0f00
  268. */
  269. __u64 ipib; /* 0x0e00 */
  270. __u32 ipib_checksum; /* 0x0e08 */
  271. /*
  272. * Because the vmcore_info pointer is not 8 byte aligned it never
  273. * should not be accessed directly. For accessing the pointer, first
  274. * copy it to a local pointer variable.
  275. */
  276. __u8 vmcore_info[8]; /* 0x0e0c */
  277. __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */
  278. __u64 os_info; /* 0x0e18 */
  279. __u8 pad_0x0e20[0x0f00-0x0e20]; /* 0x0e20 */
  280. /* Extended facility list */
  281. __u64 stfle_fac_list[32]; /* 0x0f00 */
  282. __u8 pad_0x1000[0x11b8-0x1000]; /* 0x1000 */
  283. /* 64 bit extparam used for pfault/diag 250: defined by architecture */
  284. __u64 ext_params2; /* 0x11B8 */
  285. __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
  286. /* CPU register save area: defined by architecture */
  287. __u64 floating_pt_save_area[16]; /* 0x1200 */
  288. __u64 gpregs_save_area[16]; /* 0x1280 */
  289. psw_t psw_save_area; /* 0x1300 */
  290. __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
  291. __u32 prefixreg_save_area; /* 0x1318 */
  292. __u32 fpt_creg_save_area; /* 0x131c */
  293. __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
  294. __u32 tod_progreg_save_area; /* 0x1324 */
  295. __u32 cpu_timer_save_area[2]; /* 0x1328 */
  296. __u32 clock_comp_save_area[2]; /* 0x1330 */
  297. __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */
  298. __u32 access_regs_save_area[16]; /* 0x1340 */
  299. __u64 cregs_save_area[16]; /* 0x1380 */
  300. /* align to the top of the prefix area */
  301. __u8 pad_0x1400[0x2000-0x1400]; /* 0x1400 */
  302. } __packed;
  303. #endif /* CONFIG_32BIT */
  304. #define S390_lowcore (*((struct _lowcore *) 0))
  305. extern struct _lowcore *lowcore_ptr[];
  306. static inline void set_prefix(__u32 address)
  307. {
  308. asm volatile("spx %0" : : "m" (address) : "memory");
  309. }
  310. static inline __u32 store_prefix(void)
  311. {
  312. __u32 address;
  313. asm volatile("stpx %0" : "=m" (address));
  314. return address;
  315. }
  316. #endif /* _ASM_S390_LOWCORE_H */