msm9625-coresight.dtsi 7.7 KB

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  1. /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. &soc {
  13. tmc_etr: tmc@fc322000 {
  14. compatible = "arm,coresight-tmc";
  15. reg = <0xfc322000 0x1000>,
  16. <0xfc37c000 0x3000>;
  17. reg-names = "tmc-base", "bam-base";
  18. interrupts = <0 166 0>;
  19. interrupt-names = "byte-cntr-irq";
  20. qcom,memory-size = <0x20000>;
  21. coresight-id = <0>;
  22. coresight-name = "coresight-tmc-etr";
  23. coresight-nr-inports = <1>;
  24. coresight-ctis = <&cti0 &cti8>;
  25. };
  26. tpiu: tpiu@fc318000 {
  27. compatible = "arm,coresight-tpiu";
  28. reg = <0xfc318000 0x1000>;
  29. reg-names = "tpiu-base";
  30. coresight-id = <1>;
  31. coresight-name = "coresight-tpiu";
  32. coresight-nr-inports = <1>;
  33. vdd-supply = <&ext_2p95v>;
  34. };
  35. replicator: replicator@fc31c000 {
  36. compatible = "qcom,coresight-replicator";
  37. reg = <0xfc31c000 0x1000>;
  38. reg-names = "replicator-base";
  39. coresight-id = <2>;
  40. coresight-name = "coresight-replicator";
  41. coresight-nr-inports = <1>;
  42. coresight-outports = <0 1>;
  43. coresight-child-list = <&tmc_etr &tpiu>;
  44. coresight-child-ports = <0 0>;
  45. };
  46. tmc_etf: tmc@fc307000 {
  47. compatible = "arm,coresight-tmc";
  48. reg = <0xfc307000 0x1000>;
  49. reg-names = "tmc-base";
  50. coresight-id = <3>;
  51. coresight-name = "coresight-tmc-etf";
  52. coresight-nr-inports = <1>;
  53. coresight-outports = <0>;
  54. coresight-child-list = <&replicator>;
  55. coresight-child-ports = <0>;
  56. coresight-default-sink;
  57. coresight-ctis = <&cti0 &cti8>;
  58. };
  59. funnel_merg: funnel@fc31b000 {
  60. compatible = "arm,coresight-funnel";
  61. reg = <0xfc31b000 0x1000>;
  62. reg-names = "funnel-base";
  63. coresight-id = <4>;
  64. coresight-name = "coresight-funnel-merg";
  65. coresight-nr-inports = <2>;
  66. coresight-outports = <0>;
  67. coresight-child-list = <&tmc_etf>;
  68. coresight-child-ports = <0>;
  69. };
  70. funnel_in0: funnel@fc319000 {
  71. compatible = "arm,coresight-funnel";
  72. reg = <0xfc319000 0x1000>;
  73. reg-names = "funnel-base";
  74. coresight-id = <5>;
  75. coresight-name = "coresight-funnel-in0";
  76. coresight-nr-inports = <8>;
  77. coresight-outports = <0>;
  78. coresight-child-list = <&funnel_merg>;
  79. coresight-child-ports = <0>;
  80. };
  81. funnel_in1: funnel@fc31a000 {
  82. compatible = "arm,coresight-funnel";
  83. reg = <0xfc31a000 0x1000>;
  84. reg-names = "funnel-base";
  85. coresight-id = <6>;
  86. coresight-name = "coresight-funnel-in1";
  87. coresight-nr-inports = <8>;
  88. coresight-outports = <0>;
  89. coresight-child-list = <&funnel_merg>;
  90. coresight-child-ports = <1>;
  91. };
  92. stm: stm@fc321000 {
  93. compatible = "arm,coresight-stm";
  94. reg = <0xfc321000 0x1000>,
  95. <0xfa280000 0x180000>;
  96. reg-names = "stm-base", "stm-data-base";
  97. coresight-id = <7>;
  98. coresight-name = "coresight-stm";
  99. coresight-nr-inports = <0>;
  100. coresight-outports = <0>;
  101. coresight-child-list = <&funnel_in1>;
  102. coresight-child-ports = <7>;
  103. };
  104. etm0: etm@fc332000 {
  105. compatible = "arm,coresight-etm";
  106. reg = <0xfc332000 0x1000>;
  107. reg-names = "etm-base";
  108. coresight-id = <8>;
  109. coresight-name = "coresight-etm0";
  110. coresight-nr-inports = <0>;
  111. coresight-outports = <0>;
  112. coresight-child-list = <&funnel_in0>;
  113. coresight-child-ports = <4>;
  114. qcom,round-robin;
  115. };
  116. audio_etm0 {
  117. compatible = "qcom,coresight-audio-etm";
  118. coresight-id = <9>;
  119. coresight-name = "coresight-audio-etm0";
  120. coresight-nr-inports = <0>;
  121. coresight-outports = <0>;
  122. coresight-child-list = <&funnel_in0>;
  123. coresight-child-ports = <2>;
  124. };
  125. modem_etm0 {
  126. compatible = "qcom,coresight-modem-etm";
  127. coresight-id = <10>;
  128. coresight-name = "coresight-modem-etm0";
  129. coresight-nr-inports = <0>;
  130. coresight-outports = <0>;
  131. coresight-child-list = <&funnel_in0>;
  132. coresight-child-ports = <1>;
  133. };
  134. rpm_etm0 {
  135. compatible = "qcom,coresight-rpm-etm";
  136. coresight-id = <11>;
  137. coresight-name = "coresight-rpm-etm0";
  138. coresight-nr-inports = <0>;
  139. coresight-outports = <0>;
  140. coresight-child-list = <&funnel_in0>;
  141. coresight-child-ports = <0>;
  142. };
  143. csr: csr@fc302000 {
  144. compatible = "qcom,coresight-csr";
  145. reg = <0xfc302000 0x1000>;
  146. reg-names = "csr-base";
  147. coresight-id = <12>;
  148. coresight-name = "coresight-csr";
  149. coresight-nr-inports = <0>;
  150. qcom,blk-size = <1>;
  151. };
  152. cti0: cti@fc308000 {
  153. compatible = "arm,coresight-cti";
  154. reg = <0xfc308000 0x1000>;
  155. reg-names = "cti-base";
  156. coresight-id = <13>;
  157. coresight-name = "coresight-cti0";
  158. coresight-nr-inports = <0>;
  159. };
  160. cti1: cti@fc309000 {
  161. compatible = "arm,coresight-cti";
  162. reg = <0xfc309000 0x1000>;
  163. reg-names = "cti-base";
  164. coresight-id = <14>;
  165. coresight-name = "coresight-cti1";
  166. coresight-nr-inports = <0>;
  167. };
  168. cti2: cti@fc30a000 {
  169. compatible = "arm,coresight-cti";
  170. reg = <0xfc30a000 0x1000>;
  171. reg-names = "cti-base";
  172. coresight-id = <15>;
  173. coresight-name = "coresight-cti2";
  174. coresight-nr-inports = <0>;
  175. };
  176. cti3: cti@fc30b000 {
  177. compatible = "arm,coresight-cti";
  178. reg = <0xfc30b000 0x1000>;
  179. reg-names = "cti-base";
  180. coresight-id = <16>;
  181. coresight-name = "coresight-cti3";
  182. coresight-nr-inports = <0>;
  183. };
  184. cti4: cti@fc30c000 {
  185. compatible = "arm,coresight-cti";
  186. reg = <0xfc30c000 0x1000>;
  187. reg-names = "cti-base";
  188. coresight-id = <17>;
  189. coresight-name = "coresight-cti4";
  190. coresight-nr-inports = <0>;
  191. };
  192. cti5: cti@fc30d000 {
  193. compatible = "arm,coresight-cti";
  194. reg = <0xfc30d000 0x1000>;
  195. reg-names = "cti-base";
  196. coresight-id = <18>;
  197. coresight-name = "coresight-cti5";
  198. coresight-nr-inports = <0>;
  199. };
  200. cti6: cti@fc30e000 {
  201. compatible = "arm,coresight-cti";
  202. reg = <0xfc30e000 0x1000>;
  203. reg-names = "cti-base";
  204. coresight-id = <19>;
  205. coresight-name = "coresight-cti6";
  206. coresight-nr-inports = <0>;
  207. };
  208. cti7: cti@fc30f000 {
  209. compatible = "arm,coresight-cti";
  210. reg = <0xfc30f000 0x1000>;
  211. reg-names = "cti-base";
  212. coresight-id = <20>;
  213. coresight-name = "coresight-cti7";
  214. coresight-nr-inports = <0>;
  215. };
  216. cti8: cti@fc310000 {
  217. compatible = "arm,coresight-cti";
  218. reg = <0xfc310000 0x1000>;
  219. reg-names = "cti-base";
  220. coresight-id = <21>;
  221. coresight-name = "coresight-cti8";
  222. coresight-nr-inports = <0>;
  223. };
  224. cti_cpu0: cti@fc333000 {
  225. compatible = "arm,coresight-cti";
  226. reg = <0xfc333000 0x1000>;
  227. reg-names = "cti-base";
  228. coresight-id = <22>;
  229. coresight-name = "coresight-cti-cpu0";
  230. coresight-nr-inports = <0>;
  231. };
  232. cti_modem_cpu0: cti@fc350000 {
  233. compatible = "arm,coresight-cti";
  234. reg = <0xfc350000 0x1000>;
  235. reg-names = "cti-base";
  236. coresight-id = <23>;
  237. coresight-name = "coresight-cti-modem-cpu0";
  238. coresight-nr-inports = <0>;
  239. };
  240. cti_audio_cpu0: cti@fc354000 {
  241. compatible = "arm,coresight-cti";
  242. reg = <0xfc354000 0x1000>;
  243. reg-names = "cti-base";
  244. coresight-id = <24>;
  245. coresight-name = "coresight-cti-audio-cpu0";
  246. coresight-nr-inports = <0>;
  247. };
  248. cti_rpm_cpu0: cti@fc358000 {
  249. compatible = "arm,coresight-cti";
  250. reg = <0xfc358000 0x1000>;
  251. reg-names = "cti-base";
  252. coresight-id = <25>;
  253. coresight-name = "coresight-cti-rpm-cpu0";
  254. coresight-nr-inports = <0>;
  255. };
  256. hwevent: hwevent@f9011038 {
  257. compatible = "qcom,coresight-hwevent";
  258. reg = <0xf9011038 0x8>,
  259. <0xfd4ab160 0x80>,
  260. <0xfc401600 0x80>;
  261. reg-names = "apcs-mux", "ppss-mux", "gcc-mux";
  262. coresight-id = <26>;
  263. coresight-name = "coresight-hwevent";
  264. coresight-nr-inports = <0>;
  265. };
  266. fuse: fuse@fc4be024 {
  267. compatible = "arm,coresight-fuse";
  268. reg = <0xfc4be024 0x8>;
  269. reg-names = "fuse-base";
  270. coresight-id = <27>;
  271. coresight-name = "coresight-fuse";
  272. coresight-nr-inports = <0>;
  273. };
  274. };