msm8974-v2-pm.dtsi 10 KB

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  1. /* Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. &soc {
  13. qcom,spm@f9089000 {
  14. compatible = "qcom,spm-v2";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. reg = <0xf9089000 0x1000>;
  18. qcom,core-id = <0>;
  19. qcom,saw2-ver-reg = <0xfd0>;
  20. qcom,saw2-cfg = <0x01>;
  21. qcom,saw2-avs-ctl = <0>;
  22. qcom,saw2-avs-hysteresis = <0>;
  23. qcom,saw2-avs-limit = <0>;
  24. qcom,saw2-avs-dly= <0>;
  25. qcom,saw2-spm-dly= <0x3C102800>;
  26. qcom,saw2-spm-ctl = <0x1>;
  27. qcom,saw2-spm-cmd-wfi = [03 0b 0f];
  28. qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
  29. qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
  30. 30 06 26 30 0F];
  31. qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
  32. 30 06 26 30 0F];
  33. };
  34. qcom,spm@f9099000 {
  35. compatible = "qcom,spm-v2";
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. reg = <0xf9099000 0x1000>;
  39. qcom,core-id = <1>;
  40. qcom,saw2-ver-reg = <0xfd0>;
  41. qcom,saw2-cfg = <0x01>;
  42. qcom,saw2-avs-ctl = <0>;
  43. qcom,saw2-avs-hysteresis = <0>;
  44. qcom,saw2-avs-limit = <0>;
  45. qcom,saw2-avs-dly= <0>;
  46. qcom,saw2-spm-dly= <0x3C102800>;
  47. qcom,saw2-spm-ctl = <0x1>;
  48. qcom,saw2-spm-cmd-wfi = [03 0b 0f];
  49. qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
  50. qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
  51. 30 06 26 30 0F];
  52. qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
  53. 30 06 26 30 0F];
  54. };
  55. qcom,spm@f90a9000 {
  56. compatible = "qcom,spm-v2";
  57. #address-cells = <1>;
  58. #size-cells = <1>;
  59. reg = <0xf90a9000 0x1000>;
  60. qcom,core-id = <2>;
  61. qcom,saw2-ver-reg = <0xfd0>;
  62. qcom,saw2-cfg = <0x01>;
  63. qcom,saw2-avs-ctl = <0>;
  64. qcom,saw2-avs-hysteresis = <0>;
  65. qcom,saw2-avs-limit = <0>;
  66. qcom,saw2-avs-dly= <0>;
  67. qcom,saw2-spm-dly= <0x3C102800>;
  68. qcom,saw2-spm-ctl = <0x1>;
  69. qcom,saw2-spm-cmd-wfi = [03 0b 0f];
  70. qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
  71. qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
  72. 30 06 26 30 0F];
  73. qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
  74. 30 06 26 30 0F];
  75. };
  76. qcom,spm@f90b9000 {
  77. compatible = "qcom,spm-v2";
  78. #address-cells = <1>;
  79. #size-cells = <1>;
  80. reg = <0xf90b9000 0x1000>;
  81. qcom,core-id = <3>;
  82. qcom,saw2-ver-reg = <0xfd0>;
  83. qcom,saw2-cfg = <0x01>;
  84. qcom,saw2-avs-ctl = <0>;
  85. qcom,saw2-avs-hysteresis = <0>;
  86. qcom,saw2-avs-limit = <0>;
  87. qcom,saw2-avs-dly= <0>;
  88. qcom,saw2-spm-dly= <0x3C102800>;
  89. qcom,saw2-spm-ctl = <0x1>;
  90. qcom,saw2-spm-cmd-wfi = [03 0b 0f];
  91. qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5B 03 d8 5b 0b 00 42 1b 0f];
  92. qcom,saw2-spm-cmd-spc = [00 20 80 10 E8 5B 03 3B E8 5B 82 10 0B
  93. 30 06 26 30 0F];
  94. qcom,saw2-spm-cmd-pc = [00 20 80 10 E8 5B 07 3B E8 5B 82 10 0B
  95. 30 06 26 30 0F];
  96. };
  97. qcom,spm@f9012000 {
  98. compatible = "qcom,spm-v2";
  99. #address-cells = <1>;
  100. #size-cells = <1>;
  101. reg = <0xf9012000 0x1000>;
  102. qcom,core-id = <0xffff>; /* L2/APCS SAW */
  103. qcom,saw2-ver-reg = <0xfd0>;
  104. qcom,saw2-cfg = <0x14>;
  105. qcom,saw2-avs-ctl = <0>;
  106. qcom,saw2-avs-hysteresis = <0>;
  107. qcom,saw2-avs-limit = <0>;
  108. qcom,saw2-avs-dly= <0>;
  109. qcom,saw2-spm-dly= <0x3C102800>;
  110. qcom,saw2-spm-ctl = <0x1>;
  111. qcom,saw2-pmic-data0 = <0x02030080>;
  112. qcom,saw2-pmic-data1 = <0x00030000>;
  113. qcom,vctl-timeout-us = <50>;
  114. qcom,vctl-port = <0x0>;
  115. qcom,phase-port = <0x1>;
  116. qcom,pfm-port = <0x2>;
  117. qcom,saw2-spm-cmd-ret = [1f 00 03 00 0f];
  118. qcom,saw2-spm-cmd-gdhs = [00 32 42 03 44 50 02 32 50 0f];
  119. qcom,saw2-spm-cmd-pc = [00 10 32 b0 11 42 07 01 b0 12 44
  120. 50 02 32 50 0f];
  121. qcom,L2-spm-is-apcs-master;
  122. };
  123. lpm_levels: qcom,lpm-levels {
  124. compatible = "qcom,lpm-levels";
  125. qcom,default-l2-state = "l2_cache_retention";
  126. #address-cells = <1>;
  127. #size-cells = <1>;
  128. qcom,cpu-modes {
  129. compatible = "qcom,cpu-modes";
  130. qcom,cpu-mode@0 {
  131. qcom,mode = "wfi";
  132. qcom,latency-us = <1>;
  133. qcom,ss-power = <715>;
  134. qcom,energy-overhead = <17700>;
  135. qcom,time-overhead = <2>;
  136. };
  137. qcom,cpu-mode@1 {
  138. qcom,mode = "retention";
  139. qcom,latency-us = <35>;
  140. qcom,ss-power = <542>;
  141. qcom,energy-overhead = <34920>;
  142. qcom,time-overhead = <40>;
  143. };
  144. qcom,cpu-mode@2 {
  145. qcom,mode = "standalone_pc";
  146. qcom,latency-us = <300>;
  147. qcom,ss-power = <476>;
  148. qcom,energy-overhead = <225300>;
  149. qcom,time-overhead = <350>;
  150. };
  151. qcom,cpu-mode@3 {
  152. qcom,mode = "pc";
  153. qcom,latency-us = <500>;
  154. qcom,ss-power = <400>;
  155. qcom,energy-overhead = <280000>;
  156. qcom,time-overhead = <500>;
  157. };
  158. };
  159. qcom,system-modes {
  160. compatible = "qcom,system-modes";
  161. qcom,system-mode@0 {
  162. qcom,l2 = "l2_cache_gdhs";
  163. qcom,latency-us = <500>;
  164. qcom,ss-power = <163>;
  165. qcom,energy-overhead = <577736>;
  166. qcom,time-overhead = <1000>;
  167. qcom,min-cpu-mode= "standalone_pc";
  168. qcom,sync-cpus;
  169. };
  170. qcom,system-mode@1 {
  171. qcom,l2 = "l2_cache_pc";
  172. qcom,latency-us = <30000>;
  173. qcom,ss-power = <83>;
  174. qcom,energy-overhead = <2274420>;
  175. qcom,time-overhead = <6605>;
  176. qcom,min-cpu-mode = "pc";
  177. qcom,sync-cpus;
  178. qcom,send-rpm-sleep-set;
  179. };
  180. };
  181. };
  182. qcom,pm-boot {
  183. compatible = "qcom,pm-boot";
  184. qcom,mode = "tz";
  185. };
  186. qcom,mpm@fc4281d0 {
  187. compatible = "qcom,mpm-v2";
  188. reg = <0xfc4281d0 0x1000>, /* MSM_RPM_MPM_BASE 4K */
  189. <0xf9011008 0x4>; /* MSM_APCS_GCC_BASE 4K */
  190. reg-names = "vmpm", "ipc";
  191. interrupts = <0 171 1>;
  192. qcom,ipc-bit-offset = <1>;
  193. qcom,gic-parent = <&intc>;
  194. qcom,gic-map = <2 216>, /* tsens_upper_lower_int */
  195. <47 165>, /* usb30_hs_phy_irq */
  196. <50 172>, /* usb1_hs_async_wakeup_irq */
  197. <53 104>, /* mdss_irq */
  198. <62 222>, /* ee0_krait_hlos_spmi_periph_irq */
  199. <0xff 33>, /* APCC_qgicL2PerfMonIrptReq */
  200. <0xff 34>, /* APCC_qgicL2ErrorIrptReq */
  201. <0xff 35>, /* WDT_barkInt */
  202. <0xff 40>, /* qtimer_phy_irq */
  203. <0xff 56>, /* modem_watchdog */
  204. <0xff 57>, /* mss_to_apps_irq(0) */
  205. <0xff 58>, /* mss_to_apps_irq(1) */
  206. <0xff 59>, /* mss_to_apps_irq(2) */
  207. <0xff 60>, /* mss_to_apps_irq(3) */
  208. <0xff 61>, /* mss_a2_bam_irq */
  209. <0xff 70>, /* iommu_pmon_nonsecure_irq */
  210. <0xff 74>, /* osmmu_CIrpt[1] */
  211. <0xff 75>, /* osmmu_CIrpt[0] */
  212. <0xff 77>, /* osmmu_CIrpt[0] */
  213. <0xff 78>, /* osmmu_CIrpt[0] */
  214. <0xff 79>, /* osmmu_CIrpt[0] */
  215. <0xff 94>, /* osmmu_CIrpt[0] */
  216. <0xff 97>, /* iommu_nonsecure_irq */
  217. <0xff 99>, /* msm_iommu_pmon_nonsecure_irq */
  218. <0xff 102>, /* osmmu_CIrpt[1] */
  219. <0xff 105>, /* iommu_pmon_nonsecure_irq */
  220. <0xff 109>, /* ocmem_dm_nonsec_irq */
  221. <0xff 126>, /* bam_irq[0] */
  222. <0xff 155>, /* sdcc_irq[0] */
  223. <0xff 163>, /* usb30_ee1_irq */
  224. <0xff 170>, /* sdcc_pwr_cmd_irq */
  225. <0xff 173>, /* o_wcss_apss_smd_hi */
  226. <0xff 174>, /* o_wcss_apss_smd_med */
  227. <0xff 175>, /* o_wcss_apss_smd_low */
  228. <0xff 176>, /* o_wcss_apss_smsm_irq */
  229. <0xff 177>, /* o_wcss_apss_wlan_data_xfer_done */
  230. <0xff 178>, /* o_wcss_apss_wlan_rx_data_avail */
  231. <0xff 179>, /* o_wcss_apss_asic_intr */
  232. <0xff 181>, /* wcnss watchdog */
  233. <0xff 188>, /* lpass_irq_out_apcs(0) */
  234. <0xff 189>, /* lpass_irq_out_apcs(1) */
  235. <0xff 190>, /* lpass_irq_out_apcs(2) */
  236. <0xff 191>, /* lpass_irq_out_apcs(3) */
  237. <0xff 192>, /* lpass_irq_out_apcs(4) */
  238. <0xff 193>, /* lpass_irq_out_apcs(5) */
  239. <0xff 194>, /* lpass_irq_out_apcs(6) */
  240. <0xff 195>, /* lpass_irq_out_apcs(7) */
  241. <0xff 196>, /* lpass_irq_out_apcs(8) */
  242. <0xff 197>, /* lpass_irq_out_apcs(9) */
  243. <0xff 198>, /* coresight-tmc-etr interrupt */
  244. <0xff 200>, /* rpm_ipc(4) */
  245. <0xff 201>, /* rpm_ipc(5) */
  246. <0xff 202>, /* rpm_ipc(6) */
  247. <0xff 203>, /* rpm_ipc(7) */
  248. <0xff 204>, /* rpm_ipc(24) */
  249. <0xff 205>, /* rpm_ipc(25) */
  250. <0xff 206>, /* rpm_ipc(26) */
  251. <0xff 207>, /* rpm_ipc(27) */
  252. <0xff 211>, /* usb_dwc3_otg */
  253. <0xff 240>, /* summary_irq_kpss */
  254. <0xff 268>, /* bam_irq[1] */
  255. <0xff 270>, /* bam_irq[0] */
  256. <0xff 271>; /* bam_irq[0] */
  257. qcom,gpio-parent = <&msmgpio>;
  258. qcom,gpio-map = <3 102>,
  259. <4 1 >,
  260. <5 5 >,
  261. <6 9 >,
  262. <7 18>,
  263. <8 20>,
  264. <9 24>,
  265. <10 27>,
  266. <11 28>,
  267. <12 34>,
  268. <13 35>,
  269. <14 37>,
  270. <15 42>,
  271. <16 44>,
  272. <17 46>,
  273. <18 50>,
  274. <19 54>,
  275. <20 59>,
  276. <21 61>,
  277. <22 62>,
  278. <23 64>,
  279. <24 65>,
  280. <25 66>,
  281. <26 67>,
  282. <27 68>,
  283. <28 71>,
  284. <29 72>,
  285. <30 73>,
  286. <31 74>,
  287. <32 75>,
  288. <33 77>,
  289. <34 79>,
  290. <35 80>,
  291. <36 82>,
  292. <37 86>,
  293. <38 92>,
  294. <39 93>,
  295. <40 95>,
  296. <41 144>;
  297. };
  298. qcom,pm-8x60@fe805664 {
  299. compatible = "qcom,pm-8x60";
  300. #address-cells = <1>;
  301. #size-cells = <1>;
  302. ranges;
  303. reg = <0xfe805664 0x40>;
  304. qcom,pc-mode = "tz_l2_int";
  305. qcom,use-sync-timer;
  306. qcom,cpus-as-clocks;
  307. qcom,lpm-levels = <&lpm_levels>;
  308. qcom,pm-snoc-client {
  309. compatible = "qcom,pm-snoc-client";
  310. qcom,msm-bus,name = "ocimem_snoc";
  311. qcom,msm-bus,num-cases = <2>;
  312. qcom,msm-bus,num-paths = <1>;
  313. qcom,msm-bus,active-only;
  314. qcom,msm-bus,vectors-KBps =
  315. <54 585 0 0>,
  316. <54 585 0 800000>;
  317. };
  318. };
  319. qcom,cpu-sleep-status@f9088008{
  320. compatible = "qcom,cpu-sleep-status";
  321. reg = <0xf9088008 0x100>;
  322. qcom,cpu-alias-addr = <0x10000>;
  323. qcom,sleep-status-mask= <0x80000>;
  324. };
  325. qcom,rpm-log@fc19dc00 {
  326. compatible = "qcom,rpm-log";
  327. reg = <0xfc19dc00 0x4000>;
  328. qcom,rpm-addr-phys = <0xfc000000>;
  329. qcom,offset-version = <4>;
  330. qcom,offset-page-buffer-addr = <36>;
  331. qcom,offset-log-len = <40>;
  332. qcom,offset-log-len-mask = <44>;
  333. qcom,offset-page-indices = <56>;
  334. };
  335. qcom,rpm-stats@fc19dba0 {
  336. compatible = "qcom,rpm-stats";
  337. reg = <0xfc19dba0 0x1000>;
  338. reg-names = "phys_addr_base";
  339. qcom,sleep-stats-version = <2>;
  340. };
  341. qcom,rpm-rbcpr-stats@fc000000 {
  342. compatible = "qcom,rpmrbcpr-stats";
  343. reg = <0xfc000000 0x1a0000>;
  344. qcom,start-offset = <0x190010>;
  345. };
  346. qcom,rpm-master-stats@fc428150 {
  347. compatible = "qcom,rpm-master-stats";
  348. reg = <0xfc428150 0x3200>;
  349. qcom,masters = "APSS", "MPSS", "LPSS", "PRONTO";
  350. qcom,master-stats-version = <2>;
  351. qcom,master-offset = <2560>;
  352. };
  353. };