msm8974-v1.dtsi 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189
  1. /* Copyright (c) 2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. /*
  13. * As a general rule, only version-specific property overrides should be placed
  14. * inside this file. However, device definitions should be placed inside the
  15. * msm8974.dtsi file.
  16. */
  17. /include/ "msm8974.dtsi"
  18. /include/ "msm-pm8x41-rpm-regulator.dtsi"
  19. /include/ "msm-pm8841.dtsi"
  20. &spmi_bus {
  21. pm8941_lsid0: qcom,pm8941@0 {
  22. reg = <0x0>;
  23. };
  24. pm8941_lsid1: qcom,pm8941@1 {
  25. reg = <0x1>;
  26. };
  27. };
  28. /include/ "msm-pm8941.dtsi"
  29. /include/ "msm8974-regulator.dtsi"
  30. /include/ "msm8974-clock.dtsi"
  31. /include/ "msm8974-v1-iommu.dtsi"
  32. /include/ "msm8974-v1-iommu-domains.dtsi"
  33. /include/ "msm8974-v1-pm.dtsi"
  34. &soc {
  35. android_usb@fc42b0c8 {
  36. compatible = "qcom,android-usb";
  37. reg = <0xfc42b0c8 0xc8>;
  38. qcom,android-usb-swfi-latency = <1>;
  39. qcom,android-usb-uicc-nluns = /bits/ 8 <1>;
  40. };
  41. qcom,msm-imem@fc42b000 {
  42. compatible = "qcom,msm-imem";
  43. reg = <0xfc42b000 0x1000>; /* Address and size of IMEM */
  44. };
  45. };
  46. &tsens {
  47. qcom,calibration-less-mode;
  48. };
  49. /* I2C clock frequency overrides */
  50. &i2c_0 {
  51. qcom,i2c-src-freq = <19200000>;
  52. };
  53. &i2c_2 {
  54. qcom,i2c-src-freq = <19200000>;
  55. };
  56. /* CoreSight */
  57. &tmc_etr {
  58. qcom,reset-flush-race;
  59. qcom,byte-cntr-absent;
  60. };
  61. &stm {
  62. qcom,write-64bit;
  63. };
  64. &mdss_mdp {
  65. qcom,mdss-pingpong-off = <0x00021B00 0x00021C00 0x00021D00>;
  66. };
  67. &msm_vidc {
  68. qcom,vidc-cp-map = <0x1000000 0x3f000000>;
  69. qcom,vidc-ns-map = <0x40000000 0x40000000>;
  70. qcom,load-freq-tbl = <979200 410000000>,
  71. <783360 410000000>,
  72. <489600 266670000>,
  73. <244800 133330000>;
  74. qcom,reg-presets = <0x80004 0x1>,
  75. <0x80178 0x00001FFF>,
  76. <0x8017c 0x1FFF1FFF>,
  77. <0x800b0 0x10101001>,
  78. <0x800b4 0x10101010>,
  79. <0x800b8 0x10101010>,
  80. <0x800bc 0x00000010>,
  81. <0x800c0 0x1010100f>,
  82. <0x800c4 0x10101010>,
  83. <0x800c8 0x10101010>,
  84. <0x800cc 0x00000010>,
  85. <0x800d0 0x00001010>,
  86. <0x800d4 0x00001010>,
  87. <0x800f0 0x00000030>,
  88. <0x800d8 0x00000707>,
  89. <0x800dc 0x00000707>,
  90. <0x80124 0x00000001>,
  91. <0xE0020 0x5555556>,
  92. <0xE0024 0x0>;
  93. qcom,bus-ports = <1>;
  94. qcom,enc-ocmem-ab-ib = <0 0>,
  95. <138200 1222000>,
  96. <414700 1222000>,
  97. <940000 2444000>,
  98. <1880000 2444000>,
  99. <3008000 3910400>,
  100. <3760000 4888000>;
  101. qcom,dec-ocmem-ab-ib = <0 0>,
  102. <176900 1556640>,
  103. <456200 1556640>,
  104. <864800 1556640>,
  105. <1729600 3113280>,
  106. <2767360 4981248>,
  107. <3459200 6226560>;
  108. qcom,enc-ddr-ab-ib = <0 0>,
  109. <60000 664950>,
  110. <181000 664950>,
  111. <403000 664950>,
  112. <806000 1329900>,
  113. <1289600 2127840>,
  114. <161200 6400000>;
  115. qcom,dec-ddr-ab-ib = <0 0>,
  116. <110000 909000>,
  117. <268000 909000>,
  118. <505000 909000>,
  119. <1010000 1818000>,
  120. <1616000 2908800>,
  121. <2020000 6400000>;
  122. qcom,iommu-groups = <&venus_domain_ns &venus_domain_cp>;
  123. qcom,iommu-group-buffer-types = <0xfff 0x1ff>;
  124. qcom,buffer-type-tz-usage-table = <0x1 0x1>,
  125. <0x7fe 0x2>;
  126. };
  127. &sfpb_spinlock {
  128. status = "disable";
  129. };
  130. &ldrex_spinlock {
  131. status = "ok";
  132. };
  133. &usb_otg {
  134. qcom,hsusb-otg-pnoc-errata-fix;
  135. };
  136. &usb3 {
  137. qcom,usbin-vadc = <&pm8941_vadc>;
  138. };
  139. &gdsc_venus {
  140. qcom,skip-logic-collapse;
  141. qcom,retain-periph;
  142. qcom,retain-mem;
  143. };
  144. &gdsc_mdss {
  145. qcom,skip-logic-collapse;
  146. qcom,retain-periph;
  147. qcom,retain-mem;
  148. };
  149. &gdsc_oxili_gx {
  150. qcom,retain-mem;
  151. qcom,retain-periph;
  152. };
  153. &krait_regulator_pmic {
  154. status = "ok";
  155. qcom,ctl@2000 {
  156. status = "ok";
  157. };
  158. qcom,ps@2100 {
  159. status = "ok";
  160. };
  161. qcom,freq@2200 {
  162. status = "ok";
  163. };
  164. };