at91sam9g45.dtsi 5.1 KB

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  1. /*
  2. * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
  3. * applies to AT91SAM9G45, AT91SAM9M10,
  4. * AT91SAM9G46, AT91SAM9M11 SoC
  5. *
  6. * Copyright (C) 2011 Atmel,
  7. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9G45 family SoC";
  14. compatible = "atmel,at91sam9g45";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. serial4 = &usart3;
  22. gpio0 = &pioA;
  23. gpio1 = &pioB;
  24. gpio2 = &pioC;
  25. gpio3 = &pioD;
  26. gpio4 = &pioE;
  27. tcb0 = &tcb0;
  28. tcb1 = &tcb1;
  29. };
  30. cpus {
  31. cpu@0 {
  32. compatible = "arm,arm926ejs";
  33. };
  34. };
  35. memory {
  36. reg = <0x70000000 0x10000000>;
  37. };
  38. ahb {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. apb {
  44. compatible = "simple-bus";
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. ranges;
  48. aic: interrupt-controller@fffff000 {
  49. #interrupt-cells = <2>;
  50. compatible = "atmel,at91rm9200-aic";
  51. interrupt-controller;
  52. reg = <0xfffff000 0x200>;
  53. };
  54. ramc0: ramc@ffffe400 {
  55. compatible = "atmel,at91sam9g45-ddramc";
  56. reg = <0xffffe400 0x200
  57. 0xffffe600 0x200>;
  58. };
  59. pmc: pmc@fffffc00 {
  60. compatible = "atmel,at91rm9200-pmc";
  61. reg = <0xfffffc00 0x100>;
  62. };
  63. rstc@fffffd00 {
  64. compatible = "atmel,at91sam9g45-rstc";
  65. reg = <0xfffffd00 0x10>;
  66. };
  67. pit: timer@fffffd30 {
  68. compatible = "atmel,at91sam9260-pit";
  69. reg = <0xfffffd30 0xf>;
  70. interrupts = <1 4>;
  71. };
  72. shdwc@fffffd10 {
  73. compatible = "atmel,at91sam9rl-shdwc";
  74. reg = <0xfffffd10 0x10>;
  75. };
  76. tcb0: timer@fff7c000 {
  77. compatible = "atmel,at91rm9200-tcb";
  78. reg = <0xfff7c000 0x100>;
  79. interrupts = <18 4>;
  80. };
  81. tcb1: timer@fffd4000 {
  82. compatible = "atmel,at91rm9200-tcb";
  83. reg = <0xfffd4000 0x100>;
  84. interrupts = <18 4>;
  85. };
  86. dma: dma-controller@ffffec00 {
  87. compatible = "atmel,at91sam9g45-dma";
  88. reg = <0xffffec00 0x200>;
  89. interrupts = <21 4>;
  90. };
  91. pioA: gpio@fffff200 {
  92. compatible = "atmel,at91rm9200-gpio";
  93. reg = <0xfffff200 0x100>;
  94. interrupts = <2 4>;
  95. #gpio-cells = <2>;
  96. gpio-controller;
  97. interrupt-controller;
  98. };
  99. pioB: gpio@fffff400 {
  100. compatible = "atmel,at91rm9200-gpio";
  101. reg = <0xfffff400 0x100>;
  102. interrupts = <3 4>;
  103. #gpio-cells = <2>;
  104. gpio-controller;
  105. interrupt-controller;
  106. };
  107. pioC: gpio@fffff600 {
  108. compatible = "atmel,at91rm9200-gpio";
  109. reg = <0xfffff600 0x100>;
  110. interrupts = <4 4>;
  111. #gpio-cells = <2>;
  112. gpio-controller;
  113. interrupt-controller;
  114. };
  115. pioD: gpio@fffff800 {
  116. compatible = "atmel,at91rm9200-gpio";
  117. reg = <0xfffff800 0x100>;
  118. interrupts = <5 4>;
  119. #gpio-cells = <2>;
  120. gpio-controller;
  121. interrupt-controller;
  122. };
  123. pioE: gpio@fffffa00 {
  124. compatible = "atmel,at91rm9200-gpio";
  125. reg = <0xfffffa00 0x100>;
  126. interrupts = <5 4>;
  127. #gpio-cells = <2>;
  128. gpio-controller;
  129. interrupt-controller;
  130. };
  131. dbgu: serial@ffffee00 {
  132. compatible = "atmel,at91sam9260-usart";
  133. reg = <0xffffee00 0x200>;
  134. interrupts = <1 4>;
  135. status = "disabled";
  136. };
  137. usart0: serial@fff8c000 {
  138. compatible = "atmel,at91sam9260-usart";
  139. reg = <0xfff8c000 0x200>;
  140. interrupts = <7 4>;
  141. atmel,use-dma-rx;
  142. atmel,use-dma-tx;
  143. status = "disabled";
  144. };
  145. usart1: serial@fff90000 {
  146. compatible = "atmel,at91sam9260-usart";
  147. reg = <0xfff90000 0x200>;
  148. interrupts = <8 4>;
  149. atmel,use-dma-rx;
  150. atmel,use-dma-tx;
  151. status = "disabled";
  152. };
  153. usart2: serial@fff94000 {
  154. compatible = "atmel,at91sam9260-usart";
  155. reg = <0xfff94000 0x200>;
  156. interrupts = <9 4>;
  157. atmel,use-dma-rx;
  158. atmel,use-dma-tx;
  159. status = "disabled";
  160. };
  161. usart3: serial@fff98000 {
  162. compatible = "atmel,at91sam9260-usart";
  163. reg = <0xfff98000 0x200>;
  164. interrupts = <10 4>;
  165. atmel,use-dma-rx;
  166. atmel,use-dma-tx;
  167. status = "disabled";
  168. };
  169. macb0: ethernet@fffbc000 {
  170. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  171. reg = <0xfffbc000 0x100>;
  172. interrupts = <25 4>;
  173. status = "disabled";
  174. };
  175. };
  176. nand0: nand@40000000 {
  177. compatible = "atmel,at91rm9200-nand";
  178. #address-cells = <1>;
  179. #size-cells = <1>;
  180. reg = <0x40000000 0x10000000
  181. 0xffffe200 0x200
  182. >;
  183. atmel,nand-addr-offset = <21>;
  184. atmel,nand-cmd-offset = <22>;
  185. gpios = <&pioC 8 0
  186. &pioC 14 0
  187. 0
  188. >;
  189. status = "disabled";
  190. };
  191. usb0: ohci@00700000 {
  192. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  193. reg = <0x00700000 0x100000>;
  194. interrupts = <22 4>;
  195. status = "disabled";
  196. };
  197. usb1: ehci@00800000 {
  198. compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  199. reg = <0x00800000 0x100000>;
  200. interrupts = <22 4>;
  201. status = "disabled";
  202. };
  203. };
  204. i2c@0 {
  205. compatible = "i2c-gpio";
  206. gpios = <&pioA 20 0 /* sda */
  207. &pioA 21 0 /* scl */
  208. >;
  209. i2c-gpio,sda-open-drain;
  210. i2c-gpio,scl-open-drain;
  211. i2c-gpio,delay-us = <5>; /* ~100 kHz */
  212. #address-cells = <1>;
  213. #size-cells = <0>;
  214. status = "disabled";
  215. };
  216. };