slim-msm-ctrl.txt 3.7 KB

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  1. Qualcomm SLIMBUS controller
  2. Qualcomm implements 2 type of slimbus controllers:
  3. 1. "qcom,slim-msm": This controller is used if applications processor
  4. driver is controlling slimbus master component. This driver is
  5. responsible for communicating with slave HW directly using
  6. messaging interface, and doing data channel management. Driver
  7. also communicates with satellite component (driver implemented
  8. by other execution environment, such as ADSP) to get its
  9. requirements for data channel and bandwidth requirements.
  10. 2. "qcom,slim-ngd": This controller is used if applications processor
  11. driver is controlling slimbus satellite component (also known as
  12. Non-ported Generic Device, or NGD). This is light-weight slimbus
  13. controller responsible for communicating with slave HW directly
  14. over bus messaging interface, and communicating with master component
  15. (driver residing on other execution environment, such as ADSP)
  16. for bandwidth and data channel management.
  17. Required properties:
  18. - reg : Offset and length of the register region(s) for the device
  19. - reg-names : Register region name(s) referenced in reg above
  20. Required register resource entries are:
  21. "slimbus_physical": Physical adderss of controller register blocks
  22. "slimbus_bam_physical": Physical address of Bus Access Module (BAM)
  23. for this controller
  24. - compatible : should be "qcom,slim-msm" if this is master component driver
  25. - compatible : should be "qcom,slim-ngd" if this is satellite component driver
  26. - cell-index : SLIMBUS number used for this controller
  27. - interrupts : Interrupt numbers used by this controller
  28. - interrupt-names : Required interrupt resource entries are:
  29. "slimbus_irq" : Interrupt for SLIMBUS core
  30. "slimbus_bam_irq" : Interrupt for controller core's BAM
  31. Optional property:
  32. - reg entry for slew rate : If slew rate control register is provided, this
  33. entry should be used.
  34. - reg-name for slew rate: "slimbus_slew_reg"
  35. - qcom,min-clk-gear : Minimum clock gear at which this controller can be run
  36. (range: 1-10)
  37. Default value will be 1 if this entry is not specified
  38. - qcom,max-clk-gear: Maximum clock gear at which this controller can be run
  39. (range: 1-10)
  40. Default value will be 10 if this entry is not specified
  41. - qcom,rxreg-access: This boolean indicates that slimbus RX should use direct
  42. register access to receive data. This flag is only needed if
  43. BAM pipe is not available to receive data from slimbus
  44. - qcom,apps-ch-pipes: This value represents BAM pipe-mask used by application
  45. processor for data channels. If this property is not defined,
  46. default mask of 0x3F000000 is used indicating apps can use 6
  47. pipes from 24-29.
  48. - qcom,ea-pc: This value represents product code (PC) field of enumeration
  49. address (EA) for the Qualcomm slimbus controller hardware.
  50. This value is needed if data-channels originating from apps
  51. are to be used, so that application processor can query
  52. logical address of the ported generic device to be used.
  53. Other than PC, fields of EA are same across platforms.
  54. - qcom,slim-mdm: This value provides the identifier of slimbus component on
  55. external mdm. This property enables the slimbus driver to
  56. register and receive subsytem restart notification from mdm
  57. and follow appropriate steps to ensure communication on the bus
  58. can be resumed after mdm-restart.
  59. Example:
  60. slim@fe12f000 {
  61. cell-index = <1>;
  62. compatible = "qcom,slim-msm";
  63. reg = <0xfe12f000 0x35000>,
  64. <0xfe104000 0x20000>;
  65. reg-names = "slimbus_physical", "slimbus_bam_physical";
  66. interrupts = <0 163 0 0 164 0>;
  67. interrupt-names = "slimbus_irq", "slimbus_bam_irq";
  68. qcom,min-clk-gear = <10>;
  69. qcom,rxreg-access;
  70. qcom,apps-ch-pipes = <0x60000000>;
  71. qcom,ea-pc = <0x30>;
  72. };