msm_sdcc.txt 4.4 KB

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  1. Qualcomm Secure Digital Card Controller (SDCC)
  2. Secure Digital Card Controller provides host interface to
  3. SD/MMC/SDIO cards.
  4. Required properties:
  5. - compatible: should be "qcom,msm-sdcc"
  6. - reg: should contain SDCC (mandatory), SDCC-DML (optional) and BAM
  7. (optional) register maps.
  8. - reg-names: indicates various resources passed to driver (via reg
  9. property) by name. "reg-names" examples are "core_mem", "dml_mem"
  10. and "bam_mem". "dml_mem" and "bam_mem" are optional, and the SDCC
  11. driver will default to PIO mode when neither are present.
  12. - interrupts: should contain SDCC core interrupt.
  13. - interrupt-names: indicates interrupts passed to driver (via interrupts
  14. property) by name. "core_irq" is mandatory, "bam_irq" is mandatory only
  15. when BAM DMA engine is used. "status_irq" and "sdiowakeup_irq" are
  16. optional.
  17. - qcom,clk-rates: specifies supported SDCC clock frequencies, Units - Hz.
  18. - qcom,sup-voltages: specifies supported voltage ranges for card. Should
  19. always be specified in pairs (min, max), Units - mV.
  20. - <supply-name>-supply: phandle to the regulator device tree node.
  21. "supply-name" examples are "vdd", "vdd-io".
  22. Optional Properties:
  23. - cell-index: defines slot ID.
  24. - qcom,bus-width: defines the bus I/O width that controller supports.
  25. - wp-gpios: specify GPIO for write protect switch detection.
  26. - cd-gpios: specify GPIO for card detection.
  27. - qcom,nonremovable: specifies whether the card in slot is hot pluggable
  28. or hard wired.
  29. - qcom,disable-cmd23: disable sending CMD23 to card when controller
  30. can't support it.
  31. - qcom,bus-speed-mode: specifies supported bus speed modes by host.
  32. - qcom,current-limit: specifies max. current the host can drive.
  33. - qcom,xpc: specifies if the host can supply more than 150mA for SDXC
  34. cards.
  35. - qcom,dat1-mpm-int: specifies MPM interrupt number corresponding to
  36. DAT1 line of SDCC (used only if slot has dedicated DAT1 MSM pin
  37. (not GPIO))
  38. In the following, <supply> can be vdd (flash core voltage) or vdd-io
  39. (I/O voltage).
  40. - qcom,<supply>-always-on: specifies whether supply should be kept "on"
  41. always.
  42. - qcom,<supply>-lpm-sup: specifies whether supply can be kept in low
  43. power mode (lpm).
  44. - qcom,<supply>-voltage-level: specifies voltage levels for supply.
  45. Should be specified in pairs (min, max), units uV.
  46. - qcom,<supply>-current-level: specifies load levels for supply in
  47. lpm or high power mode (hpm). Should be specified in pairs (lpm, hpm),
  48. units uA.
  49. - gpios: specifies gpios assigned for sdcc slot.
  50. - qcom,gpio-names: a list of strings that map in order to the list
  51. of gpios. A slot has either gpios or dedicated tlmm pins as represented
  52. below.
  53. - qcom,pad-pull-on: Active pull configuration for sdc tlmm pins
  54. - qcom,pad-pull-off: Suspend pull configuration for sdc tlmm pins.
  55. - qcom,pad-drv-on: Active drive strength configuration for sdc tlmm pins.
  56. - qcom,pad-drv-off: Suspend drive strength configuration for sdc tlmm pins.
  57. Tlmm pins are specified as <clk cmd data>
  58. - qcom,bus-bw-vectors-bps: specifies array of throughput values in
  59. Bytes/sec. The values in the array are determined according to
  60. supported bus speed modes. For example, if host supports SDR12 mode,
  61. value is 13631488 Bytes/sec.
  62. - Refer to "Documentation/devicetree/bindings/arm/msm/msm_bus.txt" for
  63. below optional properties:
  64. - qcom,msm-bus,name
  65. - qcom,msm-bus,num-cases
  66. - qcom,msm-bus,active-only
  67. - qcom,msm-bus,num-paths
  68. - qcom,msm-bus,vectors-KBps
  69. Example:
  70. qcom,sdcc@f9600000 {
  71. /* SDC1 used as eMMC slot */
  72. cell-index = <1>;
  73. compatible = "qcom,msm-sdcc";
  74. reg = <0xf9600000 0x800 // SDCC register interface
  75. /* To use PIO instead of BAM, skip DML and BAM regs */
  76. 0xf9600800 0x1800 // DML register interface
  77. 0xf9602000 0x2000> // BAM register interface
  78. interrupts = <123>;
  79. qcom,clk-rates = <400000 24000000 48000000>;
  80. qcom,sup-voltages = <2700 3300>;
  81. qcom,bus-width = <8>; //8-bit wide
  82. qcom,nonremovable;
  83. qcom,msm-bus,name = "sdcc2";
  84. qcom,msm-bus,num-cases = <7>;
  85. qcom,msm-bus,num-paths = <1>;
  86. qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
  87. <81 512 6656 13312>, /* 13 MB/s*/
  88. <81 512 13312 26624>, /* 26 MB/s */
  89. <81 512 26624 53248>, /* 52 MB/s */
  90. <81 512 53248 106496>, /* 104 MB/s */
  91. <81 512 106496 212992>, /* 208 MB/s */
  92. <81 512 2147483647 4294967295>; /* Max. bandwidth */
  93. qcom,bus-bw-vectors-bps = <0 13631488 27262976 54525952 109051904 218103808 4294967295>;
  94. };