marvell.txt 16 KB

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  1. Marvell Discovery mv64[345]6x System Controller chips
  2. ===========================================================
  3. The Marvell mv64[345]60 series of system controller chips contain
  4. many of the peripherals needed to implement a complete computer
  5. system. In this section, we define device tree nodes to describe
  6. the system controller chip itself and each of the peripherals
  7. which it contains. Compatible string values for each node are
  8. prefixed with the string "marvell,", for Marvell Technology Group Ltd.
  9. 1) The /system-controller node
  10. This node is used to represent the system-controller and must be
  11. present when the system uses a system controller chip. The top-level
  12. system-controller node contains information that is global to all
  13. devices within the system controller chip. The node name begins
  14. with "system-controller" followed by the unit address, which is
  15. the base address of the memory-mapped register set for the system
  16. controller chip.
  17. Required properties:
  18. - ranges : Describes the translation of system controller addresses
  19. for memory mapped registers.
  20. - clock-frequency: Contains the main clock frequency for the system
  21. controller chip.
  22. - reg : This property defines the address and size of the
  23. memory-mapped registers contained within the system controller
  24. chip. The address specified in the "reg" property should match
  25. the unit address of the system-controller node.
  26. - #address-cells : Address representation for system controller
  27. devices. This field represents the number of cells needed to
  28. represent the address of the memory-mapped registers of devices
  29. within the system controller chip.
  30. - #size-cells : Size representation for the memory-mapped
  31. registers within the system controller chip.
  32. - #interrupt-cells : Defines the width of cells used to represent
  33. interrupts.
  34. Optional properties:
  35. - model : The specific model of the system controller chip. Such
  36. as, "mv64360", "mv64460", or "mv64560".
  37. - compatible : A string identifying the compatibility identifiers
  38. of the system controller chip.
  39. The system-controller node contains child nodes for each system
  40. controller device that the platform uses. Nodes should not be created
  41. for devices which exist on the system controller chip but are not used
  42. Example Marvell Discovery mv64360 system-controller node:
  43. system-controller@f1000000 { /* Marvell Discovery mv64360 */
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. model = "mv64360"; /* Default */
  47. compatible = "marvell,mv64360";
  48. clock-frequency = <133333333>;
  49. reg = <0xf1000000 0x10000>;
  50. virtual-reg = <0xf1000000>;
  51. ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
  52. 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
  53. 0xa0000000 0xa0000000 0x4000000 /* User FLASH */
  54. 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
  55. 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */
  56. [ child node definitions... ]
  57. }
  58. 2) Child nodes of /system-controller
  59. a) Marvell Discovery MDIO bus
  60. The MDIO is a bus to which the PHY devices are connected. For each
  61. device that exists on this bus, a child node should be created. See
  62. the definition of the PHY node below for an example of how to define
  63. a PHY.
  64. Required properties:
  65. - #address-cells : Should be <1>
  66. - #size-cells : Should be <0>
  67. - device_type : Should be "mdio"
  68. - compatible : Should be "marvell,mv64360-mdio"
  69. Example:
  70. mdio {
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. device_type = "mdio";
  74. compatible = "marvell,mv64360-mdio";
  75. ethernet-phy@0 {
  76. ......
  77. };
  78. };
  79. b) Marvell Discovery ethernet controller
  80. The Discover ethernet controller is described with two levels
  81. of nodes. The first level describes an ethernet silicon block
  82. and the second level describes up to 3 ethernet nodes within
  83. that block. The reason for the multiple levels is that the
  84. registers for the node are interleaved within a single set
  85. of registers. The "ethernet-block" level describes the
  86. shared register set, and the "ethernet" nodes describe ethernet
  87. port-specific properties.
  88. Ethernet block node
  89. Required properties:
  90. - #address-cells : <1>
  91. - #size-cells : <0>
  92. - compatible : "marvell,mv64360-eth-block"
  93. - reg : Offset and length of the register set for this block
  94. Example Discovery Ethernet block node:
  95. ethernet-block@2000 {
  96. #address-cells = <1>;
  97. #size-cells = <0>;
  98. compatible = "marvell,mv64360-eth-block";
  99. reg = <0x2000 0x2000>;
  100. ethernet@0 {
  101. .......
  102. };
  103. };
  104. Ethernet port node
  105. Required properties:
  106. - device_type : Should be "network".
  107. - compatible : Should be "marvell,mv64360-eth".
  108. - reg : Should be <0>, <1>, or <2>, according to which registers
  109. within the silicon block the device uses.
  110. - interrupts : <a> where a is the interrupt number for the port.
  111. - interrupt-parent : the phandle for the interrupt controller
  112. that services interrupts for this device.
  113. - phy : the phandle for the PHY connected to this ethernet
  114. controller.
  115. - local-mac-address : 6 bytes, MAC address
  116. Example Discovery Ethernet port node:
  117. ethernet@0 {
  118. device_type = "network";
  119. compatible = "marvell,mv64360-eth";
  120. reg = <0>;
  121. interrupts = <32>;
  122. interrupt-parent = <&PIC>;
  123. phy = <&PHY0>;
  124. local-mac-address = [ 00 00 00 00 00 00 ];
  125. };
  126. c) Marvell Discovery PHY nodes
  127. Required properties:
  128. - device_type : Should be "ethernet-phy"
  129. - interrupts : <a> where a is the interrupt number for this phy.
  130. - interrupt-parent : the phandle for the interrupt controller that
  131. services interrupts for this device.
  132. - reg : The ID number for the phy, usually a small integer
  133. Example Discovery PHY node:
  134. ethernet-phy@1 {
  135. device_type = "ethernet-phy";
  136. compatible = "broadcom,bcm5421";
  137. interrupts = <76>; /* GPP 12 */
  138. interrupt-parent = <&PIC>;
  139. reg = <1>;
  140. };
  141. d) Marvell Discovery SDMA nodes
  142. Represent DMA hardware associated with the MPSC (multiprotocol
  143. serial controllers).
  144. Required properties:
  145. - compatible : "marvell,mv64360-sdma"
  146. - reg : Offset and length of the register set for this device
  147. - interrupts : <a> where a is the interrupt number for the DMA
  148. device.
  149. - interrupt-parent : the phandle for the interrupt controller
  150. that services interrupts for this device.
  151. Example Discovery SDMA node:
  152. sdma@4000 {
  153. compatible = "marvell,mv64360-sdma";
  154. reg = <0x4000 0xc18>;
  155. virtual-reg = <0xf1004000>;
  156. interrupts = <36>;
  157. interrupt-parent = <&PIC>;
  158. };
  159. e) Marvell Discovery BRG nodes
  160. Represent baud rate generator hardware associated with the MPSC
  161. (multiprotocol serial controllers).
  162. Required properties:
  163. - compatible : "marvell,mv64360-brg"
  164. - reg : Offset and length of the register set for this device
  165. - clock-src : A value from 0 to 15 which selects the clock
  166. source for the baud rate generator. This value corresponds
  167. to the CLKS value in the BRGx configuration register. See
  168. the mv64x60 User's Manual.
  169. - clock-frequence : The frequency (in Hz) of the baud rate
  170. generator's input clock.
  171. - current-speed : The current speed setting (presumably by
  172. firmware) of the baud rate generator.
  173. Example Discovery BRG node:
  174. brg@b200 {
  175. compatible = "marvell,mv64360-brg";
  176. reg = <0xb200 0x8>;
  177. clock-src = <8>;
  178. clock-frequency = <133333333>;
  179. current-speed = <9600>;
  180. };
  181. f) Marvell Discovery CUNIT nodes
  182. Represent the Serial Communications Unit device hardware.
  183. Required properties:
  184. - reg : Offset and length of the register set for this device
  185. Example Discovery CUNIT node:
  186. cunit@f200 {
  187. reg = <0xf200 0x200>;
  188. };
  189. g) Marvell Discovery MPSCROUTING nodes
  190. Represent the Discovery's MPSC routing hardware
  191. Required properties:
  192. - reg : Offset and length of the register set for this device
  193. Example Discovery CUNIT node:
  194. mpscrouting@b500 {
  195. reg = <0xb400 0xc>;
  196. };
  197. h) Marvell Discovery MPSCINTR nodes
  198. Represent the Discovery's MPSC DMA interrupt hardware registers
  199. (SDMA cause and mask registers).
  200. Required properties:
  201. - reg : Offset and length of the register set for this device
  202. Example Discovery MPSCINTR node:
  203. mpsintr@b800 {
  204. reg = <0xb800 0x100>;
  205. };
  206. i) Marvell Discovery MPSC nodes
  207. Represent the Discovery's MPSC (Multiprotocol Serial Controller)
  208. serial port.
  209. Required properties:
  210. - device_type : "serial"
  211. - compatible : "marvell,mv64360-mpsc"
  212. - reg : Offset and length of the register set for this device
  213. - sdma : the phandle for the SDMA node used by this port
  214. - brg : the phandle for the BRG node used by this port
  215. - cunit : the phandle for the CUNIT node used by this port
  216. - mpscrouting : the phandle for the MPSCROUTING node used by this port
  217. - mpscintr : the phandle for the MPSCINTR node used by this port
  218. - cell-index : the hardware index of this cell in the MPSC core
  219. - max_idle : value needed for MPSC CHR3 (Maximum Frame Length)
  220. register
  221. - interrupts : <a> where a is the interrupt number for the MPSC.
  222. - interrupt-parent : the phandle for the interrupt controller
  223. that services interrupts for this device.
  224. Example Discovery MPSCINTR node:
  225. mpsc@8000 {
  226. device_type = "serial";
  227. compatible = "marvell,mv64360-mpsc";
  228. reg = <0x8000 0x38>;
  229. virtual-reg = <0xf1008000>;
  230. sdma = <&SDMA0>;
  231. brg = <&BRG0>;
  232. cunit = <&CUNIT>;
  233. mpscrouting = <&MPSCROUTING>;
  234. mpscintr = <&MPSCINTR>;
  235. cell-index = <0>;
  236. max_idle = <40>;
  237. interrupts = <40>;
  238. interrupt-parent = <&PIC>;
  239. };
  240. j) Marvell Discovery Watch Dog Timer nodes
  241. Represent the Discovery's watchdog timer hardware
  242. Required properties:
  243. - compatible : "marvell,mv64360-wdt"
  244. - reg : Offset and length of the register set for this device
  245. Example Discovery Watch Dog Timer node:
  246. wdt@b410 {
  247. compatible = "marvell,mv64360-wdt";
  248. reg = <0xb410 0x8>;
  249. };
  250. k) Marvell Discovery I2C nodes
  251. Represent the Discovery's I2C hardware
  252. Required properties:
  253. - device_type : "i2c"
  254. - compatible : "marvell,mv64360-i2c"
  255. - reg : Offset and length of the register set for this device
  256. - interrupts : <a> where a is the interrupt number for the I2C.
  257. - interrupt-parent : the phandle for the interrupt controller
  258. that services interrupts for this device.
  259. Example Discovery I2C node:
  260. compatible = "marvell,mv64360-i2c";
  261. reg = <0xc000 0x20>;
  262. virtual-reg = <0xf100c000>;
  263. interrupts = <37>;
  264. interrupt-parent = <&PIC>;
  265. };
  266. l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
  267. Represent the Discovery's PIC hardware
  268. Required properties:
  269. - #interrupt-cells : <1>
  270. - #address-cells : <0>
  271. - compatible : "marvell,mv64360-pic"
  272. - reg : Offset and length of the register set for this device
  273. - interrupt-controller
  274. Example Discovery PIC node:
  275. pic {
  276. #interrupt-cells = <1>;
  277. #address-cells = <0>;
  278. compatible = "marvell,mv64360-pic";
  279. reg = <0x0 0x88>;
  280. interrupt-controller;
  281. };
  282. m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
  283. Represent the Discovery's MPP hardware
  284. Required properties:
  285. - compatible : "marvell,mv64360-mpp"
  286. - reg : Offset and length of the register set for this device
  287. Example Discovery MPP node:
  288. mpp@f000 {
  289. compatible = "marvell,mv64360-mpp";
  290. reg = <0xf000 0x10>;
  291. };
  292. n) Marvell Discovery GPP (General Purpose Pins) nodes
  293. Represent the Discovery's GPP hardware
  294. Required properties:
  295. - compatible : "marvell,mv64360-gpp"
  296. - reg : Offset and length of the register set for this device
  297. Example Discovery GPP node:
  298. gpp@f000 {
  299. compatible = "marvell,mv64360-gpp";
  300. reg = <0xf100 0x20>;
  301. };
  302. o) Marvell Discovery PCI host bridge node
  303. Represents the Discovery's PCI host bridge device. The properties
  304. for this node conform to Rev 2.1 of the PCI Bus Binding to IEEE
  305. 1275-1994. A typical value for the compatible property is
  306. "marvell,mv64360-pci".
  307. Example Discovery PCI host bridge node
  308. pci@80000000 {
  309. #address-cells = <3>;
  310. #size-cells = <2>;
  311. #interrupt-cells = <1>;
  312. device_type = "pci";
  313. compatible = "marvell,mv64360-pci";
  314. reg = <0xcf8 0x8>;
  315. ranges = <0x01000000 0x0 0x0
  316. 0x88000000 0x0 0x01000000
  317. 0x02000000 0x0 0x80000000
  318. 0x80000000 0x0 0x08000000>;
  319. bus-range = <0 255>;
  320. clock-frequency = <66000000>;
  321. interrupt-parent = <&PIC>;
  322. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  323. interrupt-map = <
  324. /* IDSEL 0x0a */
  325. 0x5000 0 0 1 &PIC 80
  326. 0x5000 0 0 2 &PIC 81
  327. 0x5000 0 0 3 &PIC 91
  328. 0x5000 0 0 4 &PIC 93
  329. /* IDSEL 0x0b */
  330. 0x5800 0 0 1 &PIC 91
  331. 0x5800 0 0 2 &PIC 93
  332. 0x5800 0 0 3 &PIC 80
  333. 0x5800 0 0 4 &PIC 81
  334. /* IDSEL 0x0c */
  335. 0x6000 0 0 1 &PIC 91
  336. 0x6000 0 0 2 &PIC 93
  337. 0x6000 0 0 3 &PIC 80
  338. 0x6000 0 0 4 &PIC 81
  339. /* IDSEL 0x0d */
  340. 0x6800 0 0 1 &PIC 93
  341. 0x6800 0 0 2 &PIC 80
  342. 0x6800 0 0 3 &PIC 81
  343. 0x6800 0 0 4 &PIC 91
  344. >;
  345. };
  346. p) Marvell Discovery CPU Error nodes
  347. Represent the Discovery's CPU error handler device.
  348. Required properties:
  349. - compatible : "marvell,mv64360-cpu-error"
  350. - reg : Offset and length of the register set for this device
  351. - interrupts : the interrupt number for this device
  352. - interrupt-parent : the phandle for the interrupt controller
  353. that services interrupts for this device.
  354. Example Discovery CPU Error node:
  355. cpu-error@0070 {
  356. compatible = "marvell,mv64360-cpu-error";
  357. reg = <0x70 0x10 0x128 0x28>;
  358. interrupts = <3>;
  359. interrupt-parent = <&PIC>;
  360. };
  361. q) Marvell Discovery SRAM Controller nodes
  362. Represent the Discovery's SRAM controller device.
  363. Required properties:
  364. - compatible : "marvell,mv64360-sram-ctrl"
  365. - reg : Offset and length of the register set for this device
  366. - interrupts : the interrupt number for this device
  367. - interrupt-parent : the phandle for the interrupt controller
  368. that services interrupts for this device.
  369. Example Discovery SRAM Controller node:
  370. sram-ctrl@0380 {
  371. compatible = "marvell,mv64360-sram-ctrl";
  372. reg = <0x380 0x80>;
  373. interrupts = <13>;
  374. interrupt-parent = <&PIC>;
  375. };
  376. r) Marvell Discovery PCI Error Handler nodes
  377. Represent the Discovery's PCI error handler device.
  378. Required properties:
  379. - compatible : "marvell,mv64360-pci-error"
  380. - reg : Offset and length of the register set for this device
  381. - interrupts : the interrupt number for this device
  382. - interrupt-parent : the phandle for the interrupt controller
  383. that services interrupts for this device.
  384. Example Discovery PCI Error Handler node:
  385. pci-error@1d40 {
  386. compatible = "marvell,mv64360-pci-error";
  387. reg = <0x1d40 0x40 0xc28 0x4>;
  388. interrupts = <12>;
  389. interrupt-parent = <&PIC>;
  390. };
  391. s) Marvell Discovery Memory Controller nodes
  392. Represent the Discovery's memory controller device.
  393. Required properties:
  394. - compatible : "marvell,mv64360-mem-ctrl"
  395. - reg : Offset and length of the register set for this device
  396. - interrupts : the interrupt number for this device
  397. - interrupt-parent : the phandle for the interrupt controller
  398. that services interrupts for this device.
  399. Example Discovery Memory Controller node:
  400. mem-ctrl@1400 {
  401. compatible = "marvell,mv64360-mem-ctrl";
  402. reg = <0x1400 0x60>;
  403. interrupts = <17>;
  404. interrupt-parent = <&PIC>;
  405. };