qpnp-pin.txt 6.6 KB

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  1. * msm-qpnp-pin
  2. msm-qpnp-pin is a GPIO chip driver for the MSM SPMI implementation.
  3. It creates a spmi_device for every spmi-dev-container block of device_nodes.
  4. These device_nodes contained within specify the PMIC pin number associated
  5. with each gpio chip. The driver will map these to Linux GPIO numbers.
  6. [PMIC GPIO Device Declarations]
  7. -Root Node-
  8. Required properties :
  9. - spmi-dev-container : Used to specify the following child nodes as part of the
  10. same SPMI device.
  11. - gpio-controller : Specify as gpio-contoller. All child nodes will belong to
  12. this gpio_chip.
  13. - #gpio-cells: We encode a PMIC pin number and a 32-bit flag field to
  14. specify the gpio configuration. This must be set to '2'.
  15. - #address-cells: Specify one address field. This must be set to '1'.
  16. - #size-cells: Specify one size-cell. This must be set to '1'.
  17. - compatible = "qcom,qpnp-pin" : Specify driver matching for this driver.
  18. - label: String giving the name for the gpio_chip device. This name
  19. should be unique on the system and portray the specifics of the device.
  20. -Child Nodes-
  21. Required properties :
  22. - reg : Specify the spmi offset and size for this pin device.
  23. - qcom,pin-num : Specify the PMIC pin number for this device.
  24. Optional configuration properties :
  25. - qcom,mode: indicates whether the pin should be input, output, or
  26. both for gpios. mpp pins also support bidirectional,
  27. analog in, analog out and current sink.
  28. QPNP_PIN_MODE_DIG_IN = 0, (GPIO/MPP)
  29. QPNP_PIN_MODE_DIG_OUT = 1, (GPIO/MPP)
  30. QPNP_PIN_MODE_DIG_IN_OUT = 2, (GPIO/MPP)
  31. QPNP_PIN_MODE_BIDIR = 3, (MPP)
  32. QPNP_PIN_MODE_AIN = 4, (MPP)
  33. QPNP_PIN_MODE_AOUT = 5, (MPP)
  34. QPNP_PIN_MODE_SINK = 6 (MPP)
  35. - qcom,output-type: indicates gpio should be configured as CMOS or open
  36. drain.
  37. QPNP_PIN_OUT_BUF_CMOS = 0, (GPIO)
  38. QPNP_PIN_OUT_BUF_OPEN_DRAIN_NMOS = 1, (GPIO)
  39. QPNP_PIN_OUT_BUF_OPEN_DRAIN_PMOS = 2 (GPIO)
  40. - qcom,invert: Invert the signal of the gpio line -
  41. QPNP_PIN_INVERT_DISABLE = 0 (GPIO/MPP)
  42. QPNP_PIN_INVERT_ENABLE = 1 (GPIO/MPP)
  43. - qcom,pull: This parameter should be programmed to different values
  44. depending on whether it's GPIO or MPP.
  45. For GPIO, it indicates whether a pull up or pull down
  46. should be applied. If a pullup is required the
  47. current strength needs to be specified.
  48. Current values of 30uA, 1.5uA, 31.5uA, 1.5uA with 30uA
  49. boost are supported. This value should be one of
  50. the QPNP_PIN_GPIO_PULL_*. Note that the hardware ignores
  51. this configuration if the GPIO is not set to input or
  52. output open-drain mode.
  53. QPNP_PIN_PULL_UP_30 = 0, (GPIO)
  54. QPNP_PIN_PULL_UP_1P5 = 1, (GPIO)
  55. QPNP_PIN_PULL_UP_31P5 = 2, (GPIO)
  56. QPNP_PIN_PULL_UP_1P5_30 = 3, (GPIO)
  57. QPNP_PIN_PULL_DN = 4, (GPIO)
  58. QPNP_PIN_PULL_NO = 5 (GPIO)
  59. For MPP, it indicates whether a pullup should be
  60. applied for bidirectitional mode only. The hardware
  61. ignores the configuration when operating in other modes.
  62. This value should be one of the QPNP_PIN_MPP_PULL_*.
  63. QPNP_PIN_MPP_PULL_UP_0P6KOHM = 0, (MPP)
  64. QPNP_PIN_MPP_PULL_UP_OPEN = 1 (MPP)
  65. QPNP_PIN_MPP_PULL_UP_10KOHM = 2, (MPP)
  66. QPNP_PIN_MPP_PULL_UP_30KOHM = 3, (MPP)
  67. - qcom,vin-sel: specifies the voltage level when the output is set to 1.
  68. For an input gpio specifies the voltage level at which
  69. the input is interpreted as a logical 1.
  70. QPNP_PIN_VIN0 = 0, (GPIO/MPP)
  71. QPNP_PIN_VIN1 = 1, (GPIO/MPP)
  72. QPNP_PIN_VIN2 = 2, (GPIO/MPP)
  73. QPNP_PIN_VIN3 = 3, (GPIO/MPP)
  74. QPNP_PIN_VIN4 = 4, (GPIO/MPP)
  75. QPNP_PIN_VIN5 = 5, (GPIO/MPP)
  76. QPNP_PIN_VIN6 = 6, (GPIO/MPP)
  77. QPNP_PIN_VIN7 = 7 (GPIO/MPP)
  78. - qcom,out-strength: the amount of current supplied for an output gpio.
  79. QPNP_PIN_OUT_STRENGTH_LOW = 1 (GPIO)
  80. QPNP_PIN_OUT_STRENGTH_MED = 2, (GPIO)
  81. QPNP_PIN_OUT_STRENGTH_HIGH = 3, (GPIO)
  82. - qcom,src-sel: select a function for the pin. Certain pins
  83. can be paired (shorted) with each other. Some gpio pins
  84. can act as alternate functions.
  85. In the context of gpio, this acts as a source select.
  86. For mpps, this is an enable select.
  87. QPNP_PIN_SEL_FUNC_CONSTANT = 0, (GPIO/MPP)
  88. QPNP_PIN_SEL_FUNC_PAIRED = 1, (GPIO/MPP)
  89. QPNP_PIN_SEL_FUNC_1 = 2, (GPIO/MPP)
  90. QPNP_PIN_SEL_FUNC_2 = 3, (GPIO/MPP)
  91. QPNP_PIN_SEL_DTEST1 = 4, (GPIO/MPP)
  92. QPNP_PIN_SEL_DTEST2 = 5, (GPIO/MPP)
  93. QPNP_PIN_SEL_DTEST3 = 6, (GPIO/MPP)
  94. QPNP_PIN_SEL_DTEST4 = 7 (GPIO/MPP)
  95. - qcom,master-en: 1 = Enable features within the
  96. pin block based on configurations. (GPIO/MPP)
  97. 0 = Completely disable the block and
  98. let the pin float with high impedance
  99. regardless of other settings. (GPIO/MPP)
  100. - qcom,aout-ref: set the analog output reference.
  101. QPNP_PIN_AOUT_1V25 = 0, (MPP)
  102. QPNP_PIN_AOUT_0V625 = 1, (MPP)
  103. QPNP_PIN_AOUT_0V3125 = 2, (MPP)
  104. QPNP_PIN_AOUT_MPP = 3, (MPP)
  105. QPNP_PIN_AOUT_ABUS1 = 4, (MPP)
  106. QPNP_PIN_AOUT_ABUS2 = 5, (MPP)
  107. QPNP_PIN_AOUT_ABUS3 = 6, (MPP)
  108. QPNP_PIN_AOUT_ABUS4 = 7 (MPP)
  109. - qcom,ain-route: Set the destination for analog input.
  110. QPNP_PIN_AIN_AMUX_CH5 = 0, (MPP)
  111. QPNP_PIN_AIN_AMUX_CH6 = 1, (MPP)
  112. QPNP_PIN_AIN_AMUX_CH7 = 2, (MPP)
  113. QPNP_PIN_AIN_AMUX_CH8 = 3, (MPP)
  114. QPNP_PIN_AIN_AMUX_ABUS1 = 4, (MPP)
  115. QPNP_PIN_AIN_AMUX_ABUS2 = 5, (MPP)
  116. QPNP_PIN_AIN_AMUX_ABUS3 = 6, (MPP)
  117. QPNP_PIN_AIN_AMUX_ABUS4 = 7 (MPP)
  118. - qcom,cs-out: Set the the amount of output to sync in mA.
  119. QPNP_PIN_CS_OUT_5MA = 0, (MPP)
  120. QPNP_PIN_CS_OUT_10MA = 1, (MPP)
  121. QPNP_PIN_CS_OUT_15MA = 2, (MPP)
  122. QPNP_PIN_CS_OUT_20MA = 3, (MPP)
  123. QPNP_PIN_CS_OUT_25MA = 4, (MPP)
  124. QPNP_PIN_CS_OUT_30MA = 5, (MPP)
  125. QPNP_PIN_CS_OUT_35MA = 6, (MPP)
  126. QPNP_PIN_CS_OUT_40MA = 7 (MPP)
  127. *Note: If any of the configuration properties are not specified, then the
  128. qpnp-pin driver will not modify that respective configuration in
  129. hardware.
  130. [PMIC GPIO clients]
  131. Required properties :
  132. - gpios : Contains 3 fields of the form <&gpio_controller pmic_pin_num flags>
  133. [Example]
  134. qpnp: qcom,spmi@fc4c0000 {
  135. #address-cells = <1>;
  136. #size-cells = <0>;
  137. interrupt-controller;
  138. #interrupt-cells = <3>;
  139. qcom,pm8941@0 {
  140. spmi-slave-container;
  141. reg = <0x0>;
  142. #address-cells = <1>;
  143. #size-cells = <1>;
  144. pm8941_gpios: gpios {
  145. spmi-dev-container;
  146. compatible = "qcom,qpnp-pin";
  147. gpio-controller;
  148. #gpio-cells = <2>;
  149. #address-cells = <1>;
  150. #size-cells = <1>;
  151. gpio@c000 {
  152. reg = <0xc000 0x100>;
  153. qcom,pin-num = <62>;
  154. };
  155. gpio@c100 {
  156. reg = <0xc100 0x100>;
  157. qcom,pin-num = <20>;
  158. qcom,source_sel = <2>;
  159. qcom,pull = <5>;
  160. };
  161. };
  162. qcom,testgpio@1000 {
  163. compatible = "qcom,qpnp-testgpio";
  164. reg = <0x1000 0x1000>;
  165. gpios = <&pm8941_gpios 62 0x0 &pm8941_gpios 20 0x1>;
  166. };
  167. };
  168. };
  169. };