kernel_samsung_msm8974/Documentation/devicetree/bindings/fb/mdss-mdp.txt

Qualcomm MDSS MDP

MDSS is Mobile Display SubSystem which implements Linux framebuffer APIs to
drive user interface to different panel interfaces. MDP driver is the core of
MDSS which manage all data paths to different panel interfaces.

Required properties
- compatible :		Must be "qcom,mdss_mdp"
- reg :			offset and length of the register set for the device.
- reg-names :		names to refer to register sets related to this device
- interrupts :		Interrupt associated with MDSS.
- vdd-supply :		Phandle for vdd regulator device node.
- qcom,max-clk-rate:	Specify maximum MDP core clock rate in hz that this
			device supports.
- qcom,mdss-pipe-vig-off:	Array of offset for MDP source surface pipes of
				type VIG, the offsets are calculated from
				register "mdp_phys" defined in reg property.
				The number of offsets defined here should
				reflect the amount of VIG pipes that can be
				active in MDP for this configuration.
- qcom,mdss-pipe-vig-fetch-id:	Array of shared memory pool fetch ids
				corresponding to the VIG pipe offsets defined in
				previous property, the amount of fetch ids
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-vig-off
- qcom,mdss-pipe-vig-xin-id:	Array of VBIF clients ids (xins) corresponding
				to the respective VIG pipes. Number of xin ids
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-vig-off
- qcom,mdss-pipe-vig-clk-ctrl-off: Array of offsets describing clk control
				offsets for dynamic clock gating. 1st value
				in the array represents offset of the control
				register. 2nd value represents bit offset within
				control register and 3rd value represents bit
				offset within status register. Number of tuples
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-vig-off
- qcom,mdss-pipe-rgb-off:	Array of offsets for MDP source surface pipes of
				type RGB, the offsets are calculated from
				register "mdp_phys" defined in reg property.
				The number of offsets defined here should
				reflect the amount of RGB pipes that can be
				active in MDP for this configuration.
- qcom,mdss-pipe-rgb-fetch-id:	Array of shared memory pool fetch ids
				corresponding to the RGB pipe offsets defined in
				previous property, the amount of fetch ids
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-rgb-off
- qcom,mdss-pipe-rgb-xin-id:	Array of VBIF clients ids (xins) corresponding
				to the respective RGB pipes. Number of xin ids
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-rgb-off
- qcom,mdss-pipe-rgb-clk-ctrl-off: Array of offsets describing clk control
				offsets for dynamic clock gating. 1st value
				in the array represents offset of the control
				register. 2nd value represents bit offset within
				control register and 3rd value represents bit
				offset within status register. Number of tuples
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-rgb-off
- qcom,mdss-pipe-dma-off:	Array of offsets for MDP source surface pipes of
				type DMA, the offsets are calculated from
				register "mdp_phys" defined in reg property.
				The number of offsets defined here should
				reflect the amount of DMA pipes that can be
				active in MDP for this configuration.
- qcom,mdss-pipe-dma-fetch-id:	Array of shared memory pool fetch ids
				corresponding to the DMA pipe offsets defined in
				previous property, the amount of fetch ids
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-dma-off
- qcom,mdss-pipe-dma-xin-id:	Array of VBIF clients ids (xins) corresponding
				to the respective DMA pipes. Number of xin ids
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-dma-off
- qcom,mdss-pipe-dma-clk-ctrl-off: Array of offsets describing clk control
				offsets for dynamic clock gating. 1st value
				in the array represents offset of the control
				register. 2nd value represents bit offset within
				control register and 3rd value represents bit
				offset within status register. Number of tuples
				defined should match the number of offsets
				defined in property: qcom,mdss-pipe-dma-off
- qcom,mdss-smp-data:		Array of shared memory pool data. There should
				be only two values in this property. The first
				value corresponds to the number of smp blocks
				and the second is the size of each block
				present in the mdss hardware.
- qcom,mdss-ctl-off:		Array of offset addresses for the available ctl
				hw blocks within MDP, these offsets are
				calculated from register "mdp_phys" defined in
				reg property.  The number of ctl offsets defined
				here should reflect the number of control paths
				that can be configured concurrently on MDP for
				this configuration.
- qcom,mdss-wb-off:		Array of offset addresses for the progammable
				writeback blocks within MDP. The number of
				offsets defined should match the number of ctl
				blocks defined in property: qcom,mdss-ctl-off
- qcom,mdss-mixer-intf-off: 	Array of offset addresses for the available
				mixer blocks that can drive data to panel
				interfaces.
				These offsets are be calculated from register
				"mdp_phys" defined in reg property.
				The number of offsets defined should reflect the
				amount of mixers that can drive data to a panel
				interface.
- qcom,mdss-dspp-off: 		Array of offset addresses for the available dspp
				blocks. These offsets are calculated from
				regsiter "mdp_phys" defined in reg property.
				The number of dspp blocks should match the
				number of mixers driving data to interface
				defined in property: qcom,mdss-mixer-intf-off
- qcom,mdss-pingpong-off:	Array of offset addresses for the available
				pingpong blocks. These offsets are calculated
				from regsiter "mdp_phys" defined in reg property.
				The number of pingpong blocks should match the
				number of mixers driving data to interface
				defined in property: qcom,mdss-mixer-intf-off
- qcom,mdss-mixer-wb-off: 	Array of offset addresses for the available
				mixer blocks that can be drive data to writeback
				block.  These offsets will be calculated from
				register "mdp_phys" defined in reg property.
				The number of writeback mixer offsets defined
				should reflect the number of mixers that can
				drive data to a writeback block.
- qcom,mdss-intf-off:		Array of offset addresses for the available MDP
				video interface blocks that can drive data to a
				panel controller through timing engine.
				The offsets are calculated from "mdp_phys"
				defined in reg property. The number of offsets
				defiend should reflect the number of progammable
				interface blocks available in hardware.
- qcom,mdss-pref-prim-intf:	A string which indicates the configured hardware
				interface between MDP and the primary panel.
				Individual panel controller drivers initialize
				hardware based on this property.
				Based on the interfaces supported at present,
				possible values are:
				- "dsi"
				- "edp"
				- "hdmi"

Bus Scaling Data:
- qcom,msm-bus,name:		String property describing MDSS client.
- qcom,msm-bus,num-cases:	This is the the number of Bus Scaling use cases
				defined in the vectors property. This must be
				set to <3> for MDSS driver where use-case 0 is
				used to take off MDSS BW votes from the system.
				And use-case 1 & 2 are used in ping-pong fashion
				to generate run-time BW requests.
- qcom,msm-bus,active-only:	A boolean flag indicating if it is active only.
- qcom,msm-bus,num-paths:	This represents the number of paths in each
				Bus Scaling Usecase. This value depends on
				how many number of AXI master ports are
				dedicated to MDSS for particular chipset.
- qcom,msm-bus,vectors-KBps:	* A series of 4 cell properties, with a format
				of (src, dst, ab, ib) which is defined at
				Documentation/devicetree/bindings/arm/msm/msm_bus.txt
				* Current values of src & dst are defined at
				arch/arm/mach-msm/msm_bus_board.h
				src values allowed for MDSS are:
					22 = MSM_BUS_MASTER_MDP_PORT0
					23 = MSM_BUS_MASTER_MDP_PORT1
				dst values allowed for MDSS are:
					512 = MSM_BUS_SLAVE_EBI_CH0
				ab: Represents aggregated bandwidth.
				ib: Represents instantaneous bandwidth.
				* Total number of 4 cell properties will be
				(number of use-cases * number of paths).
				* These values will be overridden by the driver
				based on the run-time requirements. So initial
				ab and ib values defined here are random and
				bare no logic except for the use-case 0 where ab
				and ib values needs to be 0.

- qcom,mdss-prefill-outstanding-buffer-bytes: The size of mdp outstanding buffer
				in bytes. The buffer is filled during prefill
				time and the buffer size shall be included in
				prefill bandwidth calculation.
- qcom,mdss-prefill-y-buffer-bytes: The size of mdp y plane buffer in bytes. The
				buffer is filled during prefill time when format
				is YUV and the buffer size shall be included in
				prefill bandwidth calculation.
- qcom,mdss-prefill-scaler-buffer-lines-bilinear: The value indicates how many lines
				of scaler line buffer need to be filled during
				prefill time. If bilinear scalar is enabled, then this
				number of lines is used to determine how many bytes
				of scaler buffer to be included in prefill bandwidth
				calculation.
- qcom,mdss-prefill-scaler-buffer-lines-caf: The value indicates how many lines of
				of scaler line buffer need to be filled during
				prefill time. If CAF mode filter is enabled, then
				this number of lines is used to determine how many
				bytes of scaler buffer to be included in prefill
				bandwidth calculation.
- qcom,mdss-prefill-post-scaler-buffer: The size of post scaler buffer in bytes.
				The buffer is used to smooth the output of the
				scaler. If the buffer is present in h/w, it is
				filled during prefill time and the number of bytes
				shall be included in prefill bandwidth calculation.
- qcom,mdss-prefill-pingpong-buffer-pixels: The size of pingpong buffer in pixels.
				The buffer is used to keep pixels flowing to the
				panel interface. If the vertical start position of a
				layer is in the beginning of the active area, pingpong
				buffer must be filled during prefill time to generate
				starting lines. The number of bytes to be filled is
				determined by the line width, starting position,
				byte per pixel and scaling ratio, this number shall be
				included in prefill bandwidth calculation.
- qcom,mdss-prefill-fbc-lines:  The value indicates how many lines are required to fill
				fbc buffer during prefill time if FBC (Frame Buffer
				Compressor) is enabled. The number of bytes to be filled
				is determined by the line width, bytes per pixel and
				scaling ratio, this number shall be included in prefill bandwidth
				calculation.
Optional properties:
- vdd-cx-supply :	Phandle for vdd CX regulator device node.
- batfet-supply :	Phandle for battery FET regulator device node.
- qcom,vbif-settings :	Array with key-value pairs of constant VBIF register
			settings used to setup MDSS QoS for optimum performance.
			The key used should be offset from "vbif_phys" register
			defined in reg property.
- qcom,mdp-settings :	Array with key-value pairs of constant MDP register
			settings used to setup MDSS QoS for best performance.
			The key used should be offset from "mdp_phys" register
			defined in reg property.
- qcom,mdss-rot-block-size:	The size of a memory block (in pixels) to be used
				by the rotator. If this property is not specified,
				then a default value of 128 pixels would be used.
- qcom,mdss-has-bwc: Boolean property to indicate the presence of bandwidth
		      compression feature in the rotator.
- qcom,mdss-has-decimation: Boolean property to indicate the presence of
			    decimation feature in fetch.
- qcom,mdss-ad-off:		Array of offset addresses for the available
				Assertive Display (AD) blocks. These offsets
				are calculated from the register "mdp_phys"
				defined in reg property. The number of AD
				offsets should be less than or equal to the
				number of mixers driving interfaces defined in
				property: qcom,mdss-mixer-intf-off. Assumes
				that AD blocks are aligned with the mixer
				offsets as well (i.e. the first mixer offset
				corresponds to the same pathway as the first
				AD offset).
- qcom,mdss-has-wfd-blk: Boolean property to indicate the presence of dedicated
			writeback wfd block in MDSS as opposed to writeback
			block that is shared between rotator and wfd.
- qcom,mdss-no-lut-read: 	Boolean property to indicate reading of LUT is
				not supported.
- qcom,mdss-smp-mb-per-pipe:	Maximum number of shared memory pool blocks
				restricted for a source surface pipe. If this
				property is not specified, no such restriction
				would be applied.
- qcom,mdss-pipe-rgb-fixed-mmb: Array of indexes describing fixed Memory Macro
				Blocks (MMBs) for rgb pipes. First value denotes
				total numbers of MMBs per pipe while values, if
				any, following first one denotes indexes of MMBs
				to that RGB pipe.
- qcom,max-bandwidth-low-kbps:	This value indicates the max bandwidth in KB
				that can be supported without underflow.
				This is a low bandwidth threshold which should
				be applied in most scenarios to be safe from
				underflows when unable to satisfy bandwith
				requirements.
- qcom,max-bandwidth-high-kbps:	This value indicates the max bandwidth in KB
				that can be supported without underflow.
				This is a high bandwidth threshold which can be
				applied in scenarios where panel interface can
				be more tolerant to memory latency such as
				command mode panels.
- qcom,mdss-rotator-ot-limit:	This integer value indicates maximum number of pending
				writes that can be allowed from rotator client. Default
				value is 16 which is the maximum. This value can be
				used to reduce the pending writes limit dynamically
				and can be tuned to match performance requirements
				depending upon system state.
- qcom,mdss-clk-levels:		This array indicates the mdp core clock level selection
				array. Core clock is calculated for each frame and
				hence depending upon calculated value, clock rate
				will be rounded up to the next level according to
				this table. Order of entries need to be ordered in
				ascending order.

Fudge Factors:			Fudge factors are used to boost demand for
				resources like bus bandswidth, clk rate etc. to
				overcome system inefficiencies and avoid any
				glitches. These fudge factors are expressed in
				terms of numerator and denominator. First value
				is numerator followed by denominator. They all
				are optional but highly recommended.
				Ex:
				x = value to be fudged
				a = numerator, default value is 1
				b = denominator, default value is 1
				FUDGE(x, a, b) = ((x * a) / b)
- qcom,mdss-ib-factor:		This fudge factor is applied to calculated ib
				values in default conditions.
- qcom,mdss-ib-factor-overlap:	This fudge factor is applied to calculated ib
				values when the overlap bandwidth is the
				predominant value compared to prefill bandwidth
				value.
- qcom,mdss-clk-factor:		This fudge factor is applied to calculated mdp
				clk rate in default conditions.
- qcom,mdss-highest-bank-bit: Property to indicate tile format as opposed to usual
				linear format. The value tells the GPU highest memory
				 bank bit used.

Optional subnodes:
Child nodes representing the frame buffer virtual devices.

Subnode properties:
- compatible :		Must be "qcom,mdss-fb"
- cell-index :		Index representing frame buffer
- qcom,mdss-mixer-swap: A boolean property that indicates if the mixer muxes
			 need to be swapped based on the target panel.
			 By default the property is not defined.
- qcom,mdss-fb-split:	 Array of splitted framebuffer size. There should
			 be only two values in this property. The values
			 correspond to the left and right size respectively.
			 MDP muxes two mixer output together before sending to
			 the panel interface and these values are used to set
			 each mixer width, so the sum of these two values
			 should be equal to the panel x-resolution.

			 Note that if the sum of two values is not equal to
			 x-resolution or this subnode itself is not defined
			 in device tree there are two cases: 1)split is not
			 enabled if framebuffer size is less than max mixer
			 width; 2) the defaut even split is enabled if frambuffer
			 size is greater than max mixer width.
- qcom,memblock-reserve: Specifies the memory location and the size reserved
			 for the framebuffer used to display the splash screen.
			 This property is required whenever the continuous splash
			 screen feature is enabled for the corresponding
			 framebuffer device.
- qcom,mdss-fb-splash-logo-enabled:    The boolean entry enables the framebuffer
					driver to display the splash logo image.
					It is independent of continuous splash
					screen feature and has no relation with
					qcom,cont-splash-enabled entry present in
					panel configuration.
- qcom,mdss-idle-power-collapse-enabled: Boolean property that enables support
					for mdss power collapse in idle
					screen use cases with smart panels.

Example:
	mdss_mdp: qcom,mdss_mdp@fd900000 {
		compatible = "qcom,mdss_mdp";
		reg = <0xfd900000 0x22100>,
			<0xfd924000 0x1000>;
		reg-names = "mdp_phys", "vbif_phys";
		interrupts = <0 72 0>;
		vdd-supply = <&gdsc_mdss>;
		vdd-cx-supply = <&pm8841_s2_corner>;
		batfet-supply = <&pm8941_chg_batif>;

		qcom,max-bandwidth-low-kbps = <2300000>;
		qcom,max-bandwidth-high-kbps = <3000000>;

		/* Bus Scale Settings */
		qcom,msm-bus,name = "mdss_mdp";
		qcom,msm-bus,num-cases = <3>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
			<22 512 0 0>, <23 512 0 0>,
			<22 512 0 6400000>, <23 512 0 6400000>,
			<22 512 0 6400000>, <23 512 0 6400000>;

		/* Fudge factors */
		qcom,mdss-ab-factor = <2 1>;		/* 2 times    */
		qcom,mdss-ib-factor = <3 2>;		/* 1.5 times  */
		qcom,mdss-clk-factor = <5 4>;		/* 1.25 times */

		/* Clock levels */
		qcom,mdss-clk-levels = <92310000, 177780000, 200000000>;

		qcom,max-clk-rate = <320000000>;
		qcom,vbif-settings = <0x0004 0x00000001>,
				     <0x00D8 0x00000707>;
		qcom,mdp-settings = <0x02E0 0x000000AA>,
				    <0x02E4 0x00000055>;
		qcom,mdss-pipe-vig-off = <0x00001200 0x00001600
					  0x00001A00>;
		qcom,mdss-pipe-rgb-off = <0x00001E00 0x00002200
					  0x00002600>;
		qcom,mdss-pipe-dma-off = <0x00002A00 0x00002E00>;
		qcom,mdss-pipe-vig-fetch-id = <1 4 7>;
		qcom,mdss-pipe-rgb-fetch-id = <16 17 18>;
		qcom,mdss-pipe-dma-fetch-id = <10 13>;
		qcom,mdss-pipe-rgb-fixed-mmb =	<2 0 1>,
						<2 2 3>,
						<2 4 5>,
						<2 6 7>;

		qcom,mdss-pipe-vig-xin-id = <0 4 8>;
		qcom,mdss-pipe-rgb-xin-id = <1 5 9>;
		qcom,mdss-pipe-dma-xin-id = <2 10>;

		qcom,mdss-smp-data = <22 4096>;
		qcom,mdss-rot-block-size = <64>;
		qcom,mdss-rotator-ot-limit = <2>;
		qcom,mdss-smp-mb-per-pipe = <2>;
		qcom,mdss-pref-prim-intf = "dsi";
		qcom,mdss-has-bwc;
		qcom,mdss-has-decimation;
		qcom,mdss-has-wfd-blk;
		qcom,mdss-no-lut-read;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3AC 0 0>,
						      <0x3B4 0 0>,
						      <0x3BC 0 0>,
						      <0x3C4 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3AC 4 8>,
						      <0x3B4 4 8>,
						      <0x3BC 4 8>,
						      <0x3C4 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3AC 8 12>,
						      <0x3B4 8 12>;

		qcom,mdss-ctl-off = <0x00000600 0x00000700 0x00000800
				     0x00000900 0x0000A00>;
		qcom,mdss-mixer-intf-off = <0x00003200 0x00003600
					    0x00003A00>;
		qcom,mdss-mixer-wb-off = <0x00003E00 0x00004200>;
		qcom,mdss-dspp-off = <0x00004600 0x00004A00 0x00004E00>;
		qcom,mdss-pingpong-off = <0x00012D00 0x00012E00 0x00012F00>;
		qcom,mdss-wb-off = <0x00011100 0x00013100 0x00015100
				    0x00017100 0x00019100>;
		qcom,mdss-intf-off = <0x00021100 0x00021300
					   0x00021500 0x00021700>;

		/* buffer parameters to calculate prefill bandwidth */
		qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;
		qcom,mdss-prefill-y-buffer-bytes = <4096>;
		qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
		qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
		qcom,mdss-prefill-post-scaler-buffer-pixels = <2048>;
		qcom,mdss-prefill-pingpong-buffer-pixels = <5120>;
		qcom,mdss-prefill-fbc-lines = <2>;
		qcom,mdss-idle-power-collapse-enabled;

		mdss_fb0: qcom,mdss_fb_primary {
			cell-index = <0>;
			compatible = "qcom,mdss-fb";
			qcom,mdss-mixer-swap;
			qcom,mdss-fb-split = <480 240>
			qcom,mdss-fb-splash-logo-enabled:
		};
	};