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- Qualcomm Shared Memory
- [Root level node]
- Required properties:
- -compatible : should be "qcom,smem"
- -reg : the location and size of smem, the irq register base memory, and
- optionally any auxiliary smem areas
- -reg-names : "smem" - string to identify the shared memory region
- "irq-reg-base" - string to identify the irq register region
- "aux-mem1", "aux-mem2", "aux-mem3", ... - optional strings to
- identify any auxiliary shared memory regions
- Optional properties:
- -mpu-enabled : boolean value indicating that Memory Protection Unit based
- security is enabled on the "smem" shared memory region
- [Second level nodes]
- qcom,smd
- Required properties:
- -compatible : should be "qcom,smd"
- -qcom,smd-edge : the smd edge
- -qcom,smd-irq-offset : the offset into the irq register base memory for sending
- interrupts
- -qcom,smd-irq-bitmask : the sending irq bitmask
- -interrupts : the receiving interrupt line
- Optional properties:
- -qcom,pil-string : the name to use when loading this edge
- -qcom,irq-no-suspend: configure the incoming irq line as active during suspend
- qcom,smsm
- Required properties:
- -compatible : should be "qcom,smsm"
- -qcom,smsm-edge : the smsm edge
- -qcom,smsm-irq-offset : the offset into the irq register base memory for sending
- interrupts
- -qcom,smsm-irq-bitmask : the sending irq bitmask
- -interrupts : the receiving interrupt line
- Example:
- qcom,smem@fa00000 {
- compatible = "qcom,smem";
- reg = <0xfa00000 0x200000>,
- <0xfa006000 0x1000>,
- <0xfc428000 0x4000>;
- reg-names = "smem", "irq-reg-base", "aux-mem1";
- qcom,smd-modem {
- compatible = "qcom,smd";
- qcom,smd-edge = <0>;
- qcom,smd-irq-offset = <0x8>;
- qcom,smd-irq-bitmask = <0x1000>;
- qcom,pil-string = "modem";
- interrupts = <0 25 1>;
- };
- qcom,smsm-modem {
- compatible = "qcom,smsm";
- qcom,smsm-edge = <0>;
- qcom,smsm-irq-offset = <0x8>;
- qcom,smsm-irq-bitmask = <0x2000>;
- interrupts = <0 26 1>;
- };
- qcom,smd-adsp {
- compatible = "qcom,smd";
- qcom,smd-edge = <1>;
- qcom,smd-irq-offset = <0x8>;
- qcom,smd-irq-bitmask = <0x100>;
- qcom,pil-string = "adsp";
- interrupts = <0 156 1>;
- };
- qcom,smsm-adsp {
- compatible = "qcom,smsm";
- qcom,smsm-edge = <1>;
- qcom,smsm-irq-offset = <0x8>;
- qcom,smsm-irq-bitmask = <0x200>;
- interrupts = <0 157 1>;
- };
- qcom,smd-wcnss {
- compatible = "qcom,smd";
- qcom,smd-edge = <6>;
- qcom,smd-irq-offset = <0x8>;
- qcom,smd-irq-bitmask = <0x20000>;
- qcom,pil-string = "wcnss";
- interrupts = <0 142 1>;
- };
- qcom,smsm-wcnss {
- compatible = "qcom,smsm";
- qcom,smsm-edge = <6>;
- qcom,smsm-irq-offset = <0x8>;
- qcom,smsm-irq-bitmask = <0x80000>;
- interrupts = <0 144 1>;
- };
- qcom,smd-rpm {
- compatible = "qcom,smd";
- qcom,smd-edge = <15>;
- qcom,smd-irq-offset = <0x8>;
- qcom,smd-irq-bitmask = <0x1>;
- interrupts = <0 168 1>;
- qcom,irq-no-syspend;
- };
- };
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