msm_thermal.c 80 KB

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  1. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #define pr_fmt(fmt) "%s:%s " fmt, KBUILD_MODNAME, __func__
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/kthread.h>
  18. #include <linux/mutex.h>
  19. #include <linux/msm_tsens.h>
  20. #include <linux/workqueue.h>
  21. #include <linux/completion.h>
  22. #include <linux/cpu.h>
  23. #include <linux/cpufreq.h>
  24. #include <linux/msm_tsens.h>
  25. #include <linux/msm_thermal.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/of.h>
  28. #include <linux/err.h>
  29. #include <linux/slab.h>
  30. #include <linux/of.h>
  31. #include <linux/sysfs.h>
  32. #include <linux/types.h>
  33. #include <linux/io.h>
  34. #include <linux/hrtimer.h>
  35. #include <linux/thermal.h>
  36. #include <mach/rpm-regulator.h>
  37. #include <mach/rpm-regulator-smd.h>
  38. #include <linux/regulator/consumer.h>
  39. #include <linux/msm_thermal_ioctl.h>
  40. #include <mach/rpm-smd.h>
  41. #include <mach/scm.h>
  42. #include <linux/sched.h>
  43. #define MAX_CURRENT_UA 1000000
  44. #define MAX_RAILS 5
  45. #define MAX_THRESHOLD 2
  46. #define MONITOR_ALL_TSENS -1
  47. #define BYTES_PER_FUSE_ROW 8
  48. #define MAX_EFUSE_VALUE 16
  49. #define THERM_SECURE_BITE_CMD 8
  50. static struct msm_thermal_data msm_thermal_info;
  51. static struct delayed_work check_temp_work;
  52. static struct delayed_work temp_log_work;
  53. static bool core_control_enabled;
  54. static uint32_t cpus_offlined;
  55. static DEFINE_MUTEX(core_control_mutex);
  56. static uint32_t wakeup_ms;
  57. static struct hrtimer thermal_rtc_hrtimer;
  58. static struct kobject *tt_kobj;
  59. static struct kobject *cc_kobj;
  60. static struct work_struct timer_work;
  61. static struct task_struct *hotplug_task;
  62. static struct task_struct *freq_mitigation_task;
  63. static struct task_struct *thermal_monitor_task;
  64. static struct completion hotplug_notify_complete;
  65. static struct completion freq_mitigation_complete;
  66. static struct completion thermal_monitor_complete;
  67. static int enabled;
  68. static int polling_enabled;
  69. static int rails_cnt;
  70. static int psm_rails_cnt;
  71. static int ocr_rail_cnt;
  72. static int limit_idx;
  73. static int limit_idx_low;
  74. static int limit_idx_high;
  75. static int max_tsens_num;
  76. static struct cpufreq_frequency_table *table;
  77. static uint32_t usefreq;
  78. static int freq_table_get;
  79. static bool vdd_rstr_enabled;
  80. static bool vdd_rstr_nodes_called;
  81. static bool vdd_rstr_probed;
  82. static bool psm_enabled;
  83. static bool psm_nodes_called;
  84. static bool psm_probed;
  85. static bool hotplug_enabled;
  86. static bool freq_mitigation_enabled;
  87. static bool ocr_enabled;
  88. static bool ocr_nodes_called;
  89. static bool ocr_probed;
  90. static bool interrupt_mode_enable;
  91. static bool msm_thermal_probed;
  92. static bool therm_reset_enabled;
  93. static int *tsens_id_map;
  94. static DEFINE_MUTEX(vdd_rstr_mutex);
  95. static DEFINE_MUTEX(psm_mutex);
  96. static DEFINE_MUTEX(ocr_mutex);
  97. static uint32_t min_freq_limit;
  98. static uint32_t default_cpu_temp_limit;
  99. static bool default_temp_limit_enabled;
  100. static bool default_temp_limit_probed;
  101. static bool default_temp_limit_nodes_called;
  102. enum thermal_threshold {
  103. HOTPLUG_THRESHOLD_HIGH,
  104. HOTPLUG_THRESHOLD_LOW,
  105. FREQ_THRESHOLD_HIGH,
  106. FREQ_THRESHOLD_LOW,
  107. THRESHOLD_MAX_NR,
  108. };
  109. enum sensor_id_type {
  110. THERM_ZONE_ID,
  111. THERM_TSENS_ID,
  112. THERM_ID_MAX_NR,
  113. };
  114. struct cpu_info {
  115. uint32_t cpu;
  116. const char *sensor_type;
  117. enum sensor_id_type id_type;
  118. uint32_t sensor_id;
  119. bool offline;
  120. bool user_offline;
  121. bool hotplug_thresh_clear;
  122. struct sensor_threshold threshold[THRESHOLD_MAX_NR];
  123. bool max_freq;
  124. uint32_t user_max_freq;
  125. uint32_t user_min_freq;
  126. uint32_t limited_max_freq;
  127. uint32_t limited_min_freq;
  128. bool freq_thresh_clear;
  129. };
  130. struct threshold_info;
  131. struct therm_threshold {
  132. int32_t sensor_id;
  133. struct sensor_threshold threshold[MAX_THRESHOLD];
  134. int32_t trip_triggered;
  135. void (*notify)(struct therm_threshold *);
  136. struct threshold_info *parent;
  137. };
  138. struct threshold_info {
  139. uint32_t thresh_ct;
  140. bool thresh_triggered;
  141. struct therm_threshold *thresh_list;
  142. };
  143. struct rail {
  144. const char *name;
  145. uint32_t freq_req;
  146. uint32_t min_level;
  147. uint32_t num_levels;
  148. int32_t curr_level;
  149. uint32_t levels[3];
  150. struct kobj_attribute value_attr;
  151. struct kobj_attribute level_attr;
  152. struct regulator *reg;
  153. struct attribute_group attr_gp;
  154. };
  155. struct psm_rail {
  156. const char *name;
  157. uint8_t init;
  158. uint8_t mode;
  159. struct kobj_attribute mode_attr;
  160. struct rpm_regulator *reg;
  161. struct regulator *phase_reg;
  162. struct attribute_group attr_gp;
  163. };
  164. enum msm_thresh_list {
  165. MSM_THERM_RESET,
  166. MSM_VDD_RESTRICTION,
  167. MSM_LIST_MAX_NR,
  168. };
  169. static struct psm_rail *psm_rails;
  170. static struct psm_rail *ocr_rails;
  171. static struct rail *rails;
  172. static struct cpu_info cpus[NR_CPUS];
  173. static struct threshold_info *thresh;
  174. struct vdd_rstr_enable {
  175. struct kobj_attribute ko_attr;
  176. uint32_t enabled;
  177. };
  178. enum efuse_data {
  179. EFUSE_ADDRESS = 0,
  180. EFUSE_SIZE,
  181. EFUSE_ROW,
  182. EFUSE_START_BIT,
  183. EFUSE_BIT_MASK,
  184. EFUSE_DATA_MAX,
  185. };
  186. /* For SMPS only*/
  187. enum PMIC_SW_MODE {
  188. PMIC_AUTO_MODE = RPM_REGULATOR_MODE_AUTO,
  189. PMIC_IPEAK_MODE = RPM_REGULATOR_MODE_IPEAK,
  190. PMIC_PWM_MODE = RPM_REGULATOR_MODE_HPM,
  191. };
  192. enum ocr_request {
  193. OPTIMUM_CURRENT_MIN,
  194. OPTIMUM_CURRENT_MAX,
  195. OPTIMUM_CURRENT_NR,
  196. };
  197. #define VDD_RES_RO_ATTRIB(_rail, ko_attr, j, _name) \
  198. ko_attr.attr.name = __stringify(_name); \
  199. ko_attr.attr.mode = 0444; \
  200. ko_attr.show = vdd_rstr_reg_##_name##_show; \
  201. ko_attr.store = NULL; \
  202. sysfs_attr_init(&ko_attr.attr); \
  203. _rail.attr_gp.attrs[j] = &ko_attr.attr;
  204. #define VDD_RES_RW_ATTRIB(_rail, ko_attr, j, _name) \
  205. ko_attr.attr.name = __stringify(_name); \
  206. ko_attr.attr.mode = 0644; \
  207. ko_attr.show = vdd_rstr_reg_##_name##_show; \
  208. ko_attr.store = vdd_rstr_reg_##_name##_store; \
  209. sysfs_attr_init(&ko_attr.attr); \
  210. _rail.attr_gp.attrs[j] = &ko_attr.attr;
  211. #define VDD_RSTR_ENABLE_FROM_ATTRIBS(attr) \
  212. (container_of(attr, struct vdd_rstr_enable, ko_attr));
  213. #define VDD_RSTR_REG_VALUE_FROM_ATTRIBS(attr) \
  214. (container_of(attr, struct rail, value_attr));
  215. #define VDD_RSTR_REG_LEVEL_FROM_ATTRIBS(attr) \
  216. (container_of(attr, struct rail, level_attr));
  217. #define OCR_RW_ATTRIB(_rail, ko_attr, j, _name) \
  218. ko_attr.attr.name = __stringify(_name); \
  219. ko_attr.attr.mode = 0644; \
  220. ko_attr.show = ocr_reg_##_name##_show; \
  221. ko_attr.store = ocr_reg_##_name##_store; \
  222. sysfs_attr_init(&ko_attr.attr); \
  223. _rail.attr_gp.attrs[j] = &ko_attr.attr;
  224. #define PSM_RW_ATTRIB(_rail, ko_attr, j, _name) \
  225. ko_attr.attr.name = __stringify(_name); \
  226. ko_attr.attr.mode = 0644; \
  227. ko_attr.show = psm_reg_##_name##_show; \
  228. ko_attr.store = psm_reg_##_name##_store; \
  229. sysfs_attr_init(&ko_attr.attr); \
  230. _rail.attr_gp.attrs[j] = &ko_attr.attr;
  231. #define PSM_REG_MODE_FROM_ATTRIBS(attr) \
  232. (container_of(attr, struct psm_rail, mode_attr));
  233. static int msm_thermal_cpufreq_callback(struct notifier_block *nfb,
  234. unsigned long event, void *data)
  235. {
  236. struct cpufreq_policy *policy = data;
  237. uint32_t max_freq_req = cpus[policy->cpu].limited_max_freq;
  238. uint32_t min_freq_req = cpus[policy->cpu].limited_min_freq;
  239. switch (event) {
  240. case CPUFREQ_INCOMPATIBLE:
  241. pr_debug("mitigating CPU%d to freq max: %u min: %u\n",
  242. policy->cpu, max_freq_req, min_freq_req);
  243. cpufreq_verify_within_limits(policy, min_freq_req,
  244. max_freq_req);
  245. if (max_freq_req < min_freq_req)
  246. pr_err("Invalid frequency request Max:%u Min:%u\n",
  247. max_freq_req, min_freq_req);
  248. break;
  249. }
  250. return NOTIFY_OK;
  251. }
  252. static struct notifier_block msm_thermal_cpufreq_notifier = {
  253. .notifier_call = msm_thermal_cpufreq_callback,
  254. };
  255. /* If freq table exists, then we can send freq request */
  256. static int check_freq_table(void)
  257. {
  258. int ret = 0;
  259. struct cpufreq_frequency_table *table = NULL;
  260. table = cpufreq_frequency_get_table(0);
  261. if (!table) {
  262. pr_debug("error reading cpufreq table\n");
  263. return -EINVAL;
  264. }
  265. freq_table_get = 1;
  266. return ret;
  267. }
  268. static void update_cpu_freq(int cpu)
  269. {
  270. int ret = 0;
  271. if (cpu_online(cpu)) {
  272. ret = cpufreq_update_policy(cpu);
  273. if (ret)
  274. pr_err("Unable to update policy for cpu:%d. err:%d\n",
  275. cpu, ret);
  276. }
  277. }
  278. static int update_cpu_min_freq_all(uint32_t min)
  279. {
  280. uint32_t cpu = 0;
  281. int ret = 0;
  282. if (!freq_table_get) {
  283. ret = check_freq_table();
  284. if (ret) {
  285. pr_err("Fail to get freq table. err:%d\n", ret);
  286. return ret;
  287. }
  288. }
  289. /* If min is larger than allowed max */
  290. min = min(min, table[limit_idx_high].frequency);
  291. pr_debug("Requesting min freq:%u for all CPU's\n", min);
  292. if (freq_mitigation_task) {
  293. min_freq_limit = min;
  294. complete(&freq_mitigation_complete);
  295. } else {
  296. get_online_cpus();
  297. for_each_possible_cpu(cpu) {
  298. cpus[cpu].limited_min_freq = min;
  299. update_cpu_freq(cpu);
  300. }
  301. put_online_cpus();
  302. }
  303. return ret;
  304. }
  305. static int vdd_restriction_apply_freq(struct rail *r, int level)
  306. {
  307. int ret = 0;
  308. if (level == r->curr_level)
  309. return ret;
  310. /* level = -1: disable, level = 0,1,2..n: enable */
  311. if (level == -1) {
  312. ret = update_cpu_min_freq_all(r->min_level);
  313. if (ret)
  314. return ret;
  315. else
  316. r->curr_level = -1;
  317. } else if (level >= 0 && level < (r->num_levels)) {
  318. ret = update_cpu_min_freq_all(r->levels[level]);
  319. if (ret)
  320. return ret;
  321. else
  322. r->curr_level = level;
  323. } else {
  324. pr_err("level input:%d is not within range\n", level);
  325. return -EINVAL;
  326. }
  327. return ret;
  328. }
  329. static int vdd_restriction_apply_voltage(struct rail *r, int level)
  330. {
  331. int ret = 0;
  332. if (r->reg == NULL) {
  333. pr_err("%s don't have regulator handle. can't apply vdd\n",
  334. r->name);
  335. return -EFAULT;
  336. }
  337. if (level == r->curr_level)
  338. return ret;
  339. /* level = -1: disable, level = 0,1,2..n: enable */
  340. if (level == -1) {
  341. ret = regulator_set_voltage(r->reg, r->min_level,
  342. r->levels[r->num_levels - 1]);
  343. if (!ret)
  344. r->curr_level = -1;
  345. pr_debug("Requested min level for %s. curr level: %d\n",
  346. r->name, r->curr_level);
  347. } else if (level >= 0 && level < (r->num_levels)) {
  348. ret = regulator_set_voltage(r->reg, r->levels[level],
  349. r->levels[r->num_levels - 1]);
  350. if (!ret)
  351. r->curr_level = level;
  352. pr_debug("Requesting level %d for %s. curr level: %d\n",
  353. r->levels[level], r->name, r->levels[r->curr_level]);
  354. } else {
  355. pr_err("level input:%d is not within range\n", level);
  356. return -EINVAL;
  357. }
  358. return ret;
  359. }
  360. /* Setting all rails the same mode */
  361. static int psm_set_mode_all(int mode)
  362. {
  363. int i = 0;
  364. int fail_cnt = 0;
  365. int ret = 0;
  366. pr_debug("Requesting PMIC Mode: %d\n", mode);
  367. for (i = 0; i < psm_rails_cnt; i++) {
  368. if (psm_rails[i].mode != mode) {
  369. ret = rpm_regulator_set_mode(psm_rails[i].reg, mode);
  370. if (ret) {
  371. pr_err("Cannot set mode:%d for %s. err:%d",
  372. mode, psm_rails[i].name, ret);
  373. fail_cnt++;
  374. } else
  375. psm_rails[i].mode = mode;
  376. }
  377. }
  378. return fail_cnt ? (-EFAULT) : ret;
  379. }
  380. static ssize_t default_cpu_temp_limit_show(struct kobject *kobj,
  381. struct kobj_attribute *attr, char *buf)
  382. {
  383. return snprintf(buf, PAGE_SIZE, "%d\n", default_cpu_temp_limit);
  384. }
  385. static int vdd_rstr_en_show(
  386. struct kobject *kobj, struct kobj_attribute *attr, char *buf)
  387. {
  388. struct vdd_rstr_enable *en = VDD_RSTR_ENABLE_FROM_ATTRIBS(attr);
  389. return snprintf(buf, PAGE_SIZE, "%d\n", en->enabled);
  390. }
  391. static ssize_t vdd_rstr_en_store(struct kobject *kobj,
  392. struct kobj_attribute *attr, const char *buf, size_t count)
  393. {
  394. int ret = 0;
  395. int i = 0;
  396. uint8_t en_cnt = 0;
  397. uint8_t dis_cnt = 0;
  398. uint32_t val = 0;
  399. struct kernel_param kp;
  400. struct vdd_rstr_enable *en = VDD_RSTR_ENABLE_FROM_ATTRIBS(attr);
  401. mutex_lock(&vdd_rstr_mutex);
  402. kp.arg = &val;
  403. ret = param_set_bool(buf, &kp);
  404. if (ret) {
  405. pr_err("Invalid input %s for enabled\n", buf);
  406. goto done_vdd_rstr_en;
  407. }
  408. if ((val == 0) && (en->enabled == 0))
  409. goto done_vdd_rstr_en;
  410. for (i = 0; i < rails_cnt; i++) {
  411. if (rails[i].freq_req == 1 && freq_table_get)
  412. ret = vdd_restriction_apply_freq(&rails[i],
  413. (val) ? 0 : -1);
  414. else
  415. ret = vdd_restriction_apply_voltage(&rails[i],
  416. (val) ? 0 : -1);
  417. /*
  418. * Even if fail to set one rail, still try to set the
  419. * others. Continue the loop
  420. */
  421. if (ret)
  422. pr_err("Set vdd restriction for %s failed\n",
  423. rails[i].name);
  424. else {
  425. if (val)
  426. en_cnt++;
  427. else
  428. dis_cnt++;
  429. }
  430. }
  431. /* As long as one rail is enabled, vdd rstr is enabled */
  432. if (val && en_cnt)
  433. en->enabled = 1;
  434. else if (!val && (dis_cnt == rails_cnt))
  435. en->enabled = 0;
  436. pr_debug("%s vdd restriction. curr: %d\n",
  437. (val) ? "Enable" : "Disable", en->enabled);
  438. done_vdd_rstr_en:
  439. mutex_unlock(&vdd_rstr_mutex);
  440. return count;
  441. }
  442. static struct vdd_rstr_enable vdd_rstr_en = {
  443. .ko_attr.attr.name = __stringify(enabled),
  444. .ko_attr.attr.mode = 0644,
  445. .ko_attr.show = vdd_rstr_en_show,
  446. .ko_attr.store = vdd_rstr_en_store,
  447. .enabled = 1,
  448. };
  449. static struct attribute *vdd_rstr_en_attribs[] = {
  450. &vdd_rstr_en.ko_attr.attr,
  451. NULL,
  452. };
  453. static struct attribute_group vdd_rstr_en_attribs_gp = {
  454. .attrs = vdd_rstr_en_attribs,
  455. };
  456. static int vdd_rstr_reg_value_show(
  457. struct kobject *kobj, struct kobj_attribute *attr, char *buf)
  458. {
  459. int val = 0;
  460. struct rail *reg = VDD_RSTR_REG_VALUE_FROM_ATTRIBS(attr);
  461. /* -1:disabled, -2:fail to get regualtor handle */
  462. if (reg->curr_level < 0)
  463. val = reg->curr_level;
  464. else
  465. val = reg->levels[reg->curr_level];
  466. return snprintf(buf, PAGE_SIZE, "%d\n", val);
  467. }
  468. static int vdd_rstr_reg_level_show(
  469. struct kobject *kobj, struct kobj_attribute *attr, char *buf)
  470. {
  471. struct rail *reg = VDD_RSTR_REG_LEVEL_FROM_ATTRIBS(attr);
  472. return snprintf(buf, PAGE_SIZE, "%d\n", reg->curr_level);
  473. }
  474. static ssize_t vdd_rstr_reg_level_store(struct kobject *kobj,
  475. struct kobj_attribute *attr, const char *buf, size_t count)
  476. {
  477. int ret = 0;
  478. int val = 0;
  479. struct rail *reg = VDD_RSTR_REG_LEVEL_FROM_ATTRIBS(attr);
  480. mutex_lock(&vdd_rstr_mutex);
  481. if (vdd_rstr_en.enabled == 0)
  482. goto done_store_level;
  483. ret = kstrtouint(buf, 10, &val);
  484. if (ret) {
  485. pr_err("Invalid input %s for level\n", buf);
  486. goto done_store_level;
  487. }
  488. if (val < 0 || val > reg->num_levels - 1) {
  489. pr_err(" Invalid number %d for level\n", val);
  490. goto done_store_level;
  491. }
  492. if (val != reg->curr_level) {
  493. if (reg->freq_req == 1 && freq_table_get)
  494. update_cpu_min_freq_all(reg->levels[val]);
  495. else {
  496. ret = vdd_restriction_apply_voltage(reg, val);
  497. if (ret) {
  498. pr_err( \
  499. "Set vdd restriction for regulator %s failed. err:%d\n",
  500. reg->name, ret);
  501. goto done_store_level;
  502. }
  503. }
  504. reg->curr_level = val;
  505. pr_debug("Request level %d for %s\n",
  506. reg->curr_level, reg->name);
  507. }
  508. done_store_level:
  509. mutex_unlock(&vdd_rstr_mutex);
  510. return count;
  511. }
  512. static int request_optimum_current(struct psm_rail *rail, enum ocr_request req)
  513. {
  514. int ret = 0;
  515. if ((!rail) || (req >= OPTIMUM_CURRENT_NR) ||
  516. (req < 0)) {
  517. pr_err("%s:%s Invalid input\n", KBUILD_MODNAME, __func__);
  518. ret = -EINVAL;
  519. goto request_ocr_exit;
  520. }
  521. ret = regulator_set_optimum_mode(rail->phase_reg,
  522. (req == OPTIMUM_CURRENT_MAX) ? MAX_CURRENT_UA : 0);
  523. if (ret < 0) {
  524. pr_err("%s: Optimum current request failed\n", KBUILD_MODNAME);
  525. goto request_ocr_exit;
  526. }
  527. ret = 0; /*regulator_set_optimum_mode returns the mode on success*/
  528. pr_debug("%s: Requested optimum current mode: %d\n",
  529. KBUILD_MODNAME, req);
  530. request_ocr_exit:
  531. return ret;
  532. }
  533. static int ocr_set_mode_all(enum ocr_request req)
  534. {
  535. int ret = 0, i;
  536. for (i = 0; i < ocr_rail_cnt; i++) {
  537. if (ocr_rails[i].mode == req)
  538. continue;
  539. ret = request_optimum_current(&ocr_rails[i], req);
  540. if (ret)
  541. goto ocr_set_mode_exit;
  542. ocr_rails[i].mode = req;
  543. }
  544. ocr_set_mode_exit:
  545. return ret;
  546. }
  547. static int ocr_reg_mode_show(struct kobject *kobj,
  548. struct kobj_attribute *attr, char *buf)
  549. {
  550. struct psm_rail *reg = PSM_REG_MODE_FROM_ATTRIBS(attr);
  551. return snprintf(buf, PAGE_SIZE, "%d\n", reg->mode);
  552. }
  553. static ssize_t ocr_reg_mode_store(struct kobject *kobj,
  554. struct kobj_attribute *attr, const char *buf, size_t count)
  555. {
  556. int ret = 0;
  557. int val = 0;
  558. struct psm_rail *reg = PSM_REG_MODE_FROM_ATTRIBS(attr);
  559. if (!ocr_enabled)
  560. return count;
  561. mutex_lock(&ocr_mutex);
  562. ret = kstrtoint(buf, 10, &val);
  563. if (ret) {
  564. pr_err("%s: Invalid input %s for mode\n",
  565. KBUILD_MODNAME, buf);
  566. goto done_ocr_store;
  567. }
  568. if ((val != OPTIMUM_CURRENT_MAX) &&
  569. (val != OPTIMUM_CURRENT_MIN)) {
  570. pr_err("%s: Invalid value %d for mode\n",
  571. KBUILD_MODNAME, val);
  572. goto done_ocr_store;
  573. }
  574. if (val != reg->mode) {
  575. ret = request_optimum_current(reg, val);
  576. if (ret)
  577. goto done_ocr_store;
  578. reg->mode = val;
  579. }
  580. done_ocr_store:
  581. mutex_unlock(&ocr_mutex);
  582. return count;
  583. }
  584. static int psm_reg_mode_show(
  585. struct kobject *kobj, struct kobj_attribute *attr, char *buf)
  586. {
  587. struct psm_rail *reg = PSM_REG_MODE_FROM_ATTRIBS(attr);
  588. return snprintf(buf, PAGE_SIZE, "%d\n", reg->mode);
  589. }
  590. static ssize_t psm_reg_mode_store(struct kobject *kobj,
  591. struct kobj_attribute *attr, const char *buf, size_t count)
  592. {
  593. int ret = 0;
  594. int val = 0;
  595. struct psm_rail *reg = PSM_REG_MODE_FROM_ATTRIBS(attr);
  596. mutex_lock(&psm_mutex);
  597. ret = kstrtoint(buf, 10, &val);
  598. if (ret) {
  599. pr_err("Invalid input %s for mode\n", buf);
  600. goto done_psm_store;
  601. }
  602. if ((val != PMIC_PWM_MODE) && (val != PMIC_AUTO_MODE)) {
  603. pr_err("Invalid number %d for mode\n", val);
  604. goto done_psm_store;
  605. }
  606. if (val != reg->mode) {
  607. ret = rpm_regulator_set_mode(reg->reg, val);
  608. if (ret) {
  609. pr_err("Fail to set Mode:%d for %s. err:%d\n",
  610. val, reg->name, ret);
  611. goto done_psm_store;
  612. }
  613. reg->mode = val;
  614. }
  615. done_psm_store:
  616. mutex_unlock(&psm_mutex);
  617. return count;
  618. }
  619. static int check_sensor_id(int sensor_id)
  620. {
  621. int i = 0;
  622. bool hw_id_found = false;
  623. int ret = 0;
  624. for (i = 0; i < max_tsens_num; i++) {
  625. if (sensor_id == tsens_id_map[i]) {
  626. hw_id_found = true;
  627. break;
  628. }
  629. }
  630. if (!hw_id_found) {
  631. pr_err("Invalid sensor hw id:%d\n", sensor_id);
  632. return -EINVAL;
  633. }
  634. return ret;
  635. }
  636. static int create_sensor_id_map(void)
  637. {
  638. int i = 0;
  639. int ret = 0;
  640. tsens_id_map = kzalloc(sizeof(int) * max_tsens_num,
  641. GFP_KERNEL);
  642. if (!tsens_id_map) {
  643. pr_err("Cannot allocate memory for tsens_id_map\n");
  644. return -ENOMEM;
  645. }
  646. for (i = 0; i < max_tsens_num; i++) {
  647. ret = tsens_get_hw_id_mapping(i, &tsens_id_map[i]);
  648. /* If return -ENXIO, hw_id is default in sequence */
  649. if (ret) {
  650. if (ret == -ENXIO) {
  651. tsens_id_map[i] = i;
  652. ret = 0;
  653. } else {
  654. pr_err("Failed to get hw id for id:%d.err:%d\n",
  655. i, ret);
  656. goto fail;
  657. }
  658. }
  659. }
  660. return ret;
  661. fail:
  662. kfree(tsens_id_map);
  663. return ret;
  664. }
  665. /* 1:enable, 0:disable */
  666. static int vdd_restriction_apply_all(int en)
  667. {
  668. int i = 0;
  669. int en_cnt = 0;
  670. int dis_cnt = 0;
  671. int fail_cnt = 0;
  672. int ret = 0;
  673. for (i = 0; i < rails_cnt; i++) {
  674. if (rails[i].freq_req == 1 && freq_table_get)
  675. ret = vdd_restriction_apply_freq(&rails[i],
  676. en ? 0 : -1);
  677. else
  678. ret = vdd_restriction_apply_voltage(&rails[i],
  679. en ? 0 : -1);
  680. if (ret) {
  681. pr_err("Failed to %s for %s. err:%d",
  682. (en) ? "enable" : "disable",
  683. rails[i].name, ret);
  684. fail_cnt++;
  685. } else {
  686. if (en)
  687. en_cnt++;
  688. else
  689. dis_cnt++;
  690. }
  691. }
  692. /* As long as one rail is enabled, vdd rstr is enabled */
  693. if (en && en_cnt)
  694. vdd_rstr_en.enabled = 1;
  695. else if (!en && (dis_cnt == rails_cnt))
  696. vdd_rstr_en.enabled = 0;
  697. /*
  698. * Check fail_cnt again to make sure all of the rails are applied
  699. * restriction successfully or not
  700. */
  701. if (fail_cnt)
  702. return -EFAULT;
  703. return ret;
  704. }
  705. static int msm_thermal_get_freq_table(void)
  706. {
  707. int ret = 0;
  708. int i = 0;
  709. table = cpufreq_frequency_get_table(0);
  710. if (table == NULL) {
  711. pr_err("error reading cpufreq table\n");
  712. ret = -EINVAL;
  713. goto fail;
  714. }
  715. while (table[i].frequency != CPUFREQ_TABLE_END)
  716. i++;
  717. //#ifdef CONFIG_SEC_PM
  718. // limit_idx_low = 7;
  719. //#else
  720. limit_idx_low = 0;
  721. //#endif
  722. limit_idx_high = limit_idx = i - 1;
  723. BUG_ON(limit_idx_high <= 0 || limit_idx_high <= limit_idx_low);
  724. fail:
  725. return ret;
  726. }
  727. static int set_and_activate_threshold(uint32_t sensor_id,
  728. struct sensor_threshold *threshold)
  729. {
  730. int ret = 0;
  731. ret = sensor_set_trip(sensor_id, threshold);
  732. if (ret != 0) {
  733. pr_err("sensor:%u Error in setting trip:%d. err:%d\n",
  734. sensor_id, threshold->trip, ret);
  735. goto set_done;
  736. }
  737. ret = sensor_activate_trip(sensor_id, threshold, true);
  738. if (ret != 0) {
  739. pr_err("sensor:%u Error in enabling trip:%d. err:%d\n",
  740. sensor_id, threshold->trip, ret);
  741. goto set_done;
  742. }
  743. set_done:
  744. return ret;
  745. }
  746. static int therm_get_temp(uint32_t id, enum sensor_id_type type, long *temp)
  747. {
  748. int ret = 0;
  749. struct tsens_device tsens_dev;
  750. if (!temp) {
  751. pr_err("Invalid value\n");
  752. ret = -EINVAL;
  753. goto get_temp_exit;
  754. }
  755. switch (type) {
  756. case THERM_ZONE_ID:
  757. tsens_dev.sensor_num = tsens_id_map[id];
  758. break;
  759. case THERM_TSENS_ID:
  760. tsens_dev.sensor_num = id;
  761. break;
  762. default:
  763. pr_err("Invalid type\n");
  764. ret = -EINVAL;
  765. goto get_temp_exit;
  766. break;
  767. }
  768. ret = tsens_get_temp(&tsens_dev, temp);
  769. if (ret) {
  770. pr_err("Unable to read TSENS sensor:%d\n",
  771. tsens_dev.sensor_num);
  772. goto get_temp_exit;
  773. }
  774. get_temp_exit:
  775. return ret;
  776. }
  777. static int set_threshold(uint32_t zone_id,
  778. struct sensor_threshold *threshold)
  779. {
  780. int i = 0, ret = 0;
  781. long temp;
  782. if ((!threshold) || (zone_id >= max_tsens_num)) {
  783. pr_err("Invalid input\n");
  784. ret = -EINVAL;
  785. goto set_threshold_exit;
  786. }
  787. ret = therm_get_temp(zone_id, THERM_ZONE_ID, &temp);
  788. if (ret) {
  789. pr_err("Unable to read temperature for zone:%d. err:%d\n",
  790. zone_id, ret);
  791. goto set_threshold_exit;
  792. }
  793. while (i < MAX_THRESHOLD) {
  794. switch (threshold[i].trip) {
  795. case THERMAL_TRIP_CONFIGURABLE_HI:
  796. if (threshold[i].temp >= temp) {
  797. ret = set_and_activate_threshold(zone_id,
  798. &threshold[i]);
  799. if (ret)
  800. goto set_threshold_exit;
  801. }
  802. break;
  803. case THERMAL_TRIP_CONFIGURABLE_LOW:
  804. if (threshold[i].temp <= temp) {
  805. ret = set_and_activate_threshold(zone_id,
  806. &threshold[i]);
  807. if (ret)
  808. goto set_threshold_exit;
  809. }
  810. break;
  811. default:
  812. pr_err("zone:%u Invalid trip:%d\n", zone_id,
  813. threshold[i].trip);
  814. break;
  815. }
  816. i++;
  817. }
  818. set_threshold_exit:
  819. return ret;
  820. }
  821. static void msm_thermal_bite(int tsens_id, long temp)
  822. {
  823. pr_err("TSENS:%d reached temperature:%ld. System reset\n",
  824. tsens_id, temp);
  825. scm_call_atomic1(SCM_SVC_BOOT, THERM_SECURE_BITE_CMD, 0);
  826. }
  827. static int do_therm_reset(void)
  828. {
  829. int ret = 0, i;
  830. long temp = 0;
  831. if (!therm_reset_enabled)
  832. return ret;
  833. for (i = 0; i < thresh[MSM_THERM_RESET].thresh_ct; i++) {
  834. ret = therm_get_temp(
  835. thresh[MSM_THERM_RESET].thresh_list[i].sensor_id,
  836. THERM_TSENS_ID,
  837. &temp);
  838. if (ret) {
  839. pr_err("Unable to read TSENS sensor:%d. err:%d\n",
  840. thresh[MSM_THERM_RESET].thresh_list[i].sensor_id,
  841. ret);
  842. continue;
  843. }
  844. if (temp >= msm_thermal_info.therm_reset_temp_degC)
  845. msm_thermal_bite(
  846. thresh[MSM_THERM_RESET].thresh_list[i].sensor_id, temp);
  847. }
  848. return ret;
  849. }
  850. static void therm_reset_notify(struct therm_threshold *thresh_data)
  851. {
  852. long temp;
  853. int ret = 0;
  854. if (!therm_reset_enabled)
  855. return;
  856. if (!thresh_data) {
  857. pr_err("Invalid input\n");
  858. return;
  859. }
  860. switch (thresh_data->trip_triggered) {
  861. case THERMAL_TRIP_CONFIGURABLE_HI:
  862. ret = therm_get_temp(thresh_data->sensor_id,
  863. THERM_TSENS_ID, &temp);
  864. if (ret)
  865. pr_err("Unable to read TSENS sensor:%d. err:%d\n",
  866. thresh_data->sensor_id, ret);
  867. msm_thermal_bite(tsens_id_map[thresh_data->sensor_id],
  868. temp);
  869. break;
  870. case THERMAL_TRIP_CONFIGURABLE_LOW:
  871. break;
  872. default:
  873. pr_err("Invalid trip type\n");
  874. break;
  875. }
  876. set_threshold(thresh_data->sensor_id, thresh_data->threshold);
  877. }
  878. #ifdef CONFIG_SMP
  879. static void __ref do_core_control(long temp)
  880. {
  881. int i = 0;
  882. int ret = 0;
  883. if (!core_control_enabled)
  884. return;
  885. mutex_lock(&core_control_mutex);
  886. if (msm_thermal_info.core_control_mask &&
  887. temp >= msm_thermal_info.core_limit_temp_degC) {
  888. for (i = num_possible_cpus(); i > 0; i--) {
  889. if (!(msm_thermal_info.core_control_mask & BIT(i)))
  890. continue;
  891. if (cpus_offlined & BIT(i) && !cpu_online(i))
  892. continue;
  893. pr_info("Set Offline: CPU%d Temp: %ld\n",
  894. i, temp);
  895. ret = cpu_down(i);
  896. if (ret)
  897. pr_err("Error %d offline core %d\n",
  898. ret, i);
  899. cpus_offlined |= BIT(i);
  900. break;
  901. }
  902. } else if (msm_thermal_info.core_control_mask && cpus_offlined &&
  903. temp <= (msm_thermal_info.core_limit_temp_degC -
  904. msm_thermal_info.core_temp_hysteresis_degC)) {
  905. for (i = 0; i < num_possible_cpus(); i++) {
  906. if (!(cpus_offlined & BIT(i)))
  907. continue;
  908. cpus_offlined &= ~BIT(i);
  909. pr_info("Allow Online CPU%d Temp: %ld\n",
  910. i, temp);
  911. /*
  912. * If this core is already online, then bring up the
  913. * next offlined core.
  914. */
  915. if (cpu_online(i))
  916. continue;
  917. ret = cpu_up(i);
  918. if (ret)
  919. pr_err("Error %d online core %d\n",
  920. ret, i);
  921. break;
  922. }
  923. }
  924. mutex_unlock(&core_control_mutex);
  925. }
  926. /* Call with core_control_mutex locked */
  927. static int __ref update_offline_cores(int val)
  928. {
  929. uint32_t cpu = 0;
  930. int ret = 0;
  931. if (!core_control_enabled)
  932. return 0;
  933. cpus_offlined = msm_thermal_info.core_control_mask & val;
  934. for_each_possible_cpu(cpu) {
  935. if (!(cpus_offlined & BIT(cpu)))
  936. continue;
  937. if (!cpu_online(cpu))
  938. continue;
  939. ret = cpu_down(cpu);
  940. if (ret)
  941. pr_err("Unable to offline CPU%d. err:%d\n",
  942. cpu, ret);
  943. else
  944. pr_debug("Offlined CPU%d\n", cpu);
  945. }
  946. return ret;
  947. }
  948. static __ref int do_hotplug(void *data)
  949. {
  950. int ret = 0;
  951. uint32_t cpu = 0, mask = 0;
  952. struct sched_param param = {.sched_priority = MAX_RT_PRIO-2};
  953. if (!core_control_enabled) {
  954. pr_debug("Core control disabled\n");
  955. return -EINVAL;
  956. }
  957. sched_setscheduler(current, SCHED_FIFO, &param);
  958. while (!kthread_should_stop()) {
  959. while (wait_for_completion_interruptible(
  960. &hotplug_notify_complete) != 0)
  961. ;
  962. INIT_COMPLETION(hotplug_notify_complete);
  963. mask = 0;
  964. mutex_lock(&core_control_mutex);
  965. for_each_possible_cpu(cpu) {
  966. if (hotplug_enabled &&
  967. cpus[cpu].hotplug_thresh_clear) {
  968. set_threshold(cpus[cpu].sensor_id,
  969. &cpus[cpu].threshold[HOTPLUG_THRESHOLD_HIGH]);
  970. cpus[cpu].hotplug_thresh_clear = false;
  971. }
  972. if (cpus[cpu].offline || cpus[cpu].user_offline)
  973. mask |= BIT(cpu);
  974. }
  975. if (mask != cpus_offlined)
  976. update_offline_cores(mask);
  977. mutex_unlock(&core_control_mutex);
  978. sysfs_notify(cc_kobj, NULL, "cpus_offlined");
  979. }
  980. return ret;
  981. }
  982. #else
  983. static void do_core_control(long temp)
  984. {
  985. return;
  986. }
  987. static __ref int do_hotplug(void *data)
  988. {
  989. return 0;
  990. }
  991. #endif
  992. static int do_ocr(void)
  993. {
  994. long temp = 0;
  995. int ret = 0;
  996. int i = 0, j = 0;
  997. int auto_cnt = 0;
  998. if (!ocr_enabled)
  999. return ret;
  1000. mutex_lock(&ocr_mutex);
  1001. for (i = 0; i < max_tsens_num; i++) {
  1002. ret = therm_get_temp(tsens_id_map[i], THERM_TSENS_ID, &temp);
  1003. if (ret) {
  1004. pr_debug("%s: Unable to read TSENS sensor %d\n",
  1005. __func__, tsens_id_map[i]);
  1006. auto_cnt++;
  1007. continue;
  1008. }
  1009. if (temp > msm_thermal_info.ocr_temp_degC) {
  1010. if (ocr_rails[0].init != OPTIMUM_CURRENT_NR)
  1011. for (j = 0; j < ocr_rail_cnt; j++)
  1012. ocr_rails[j].init = OPTIMUM_CURRENT_NR;
  1013. ret = ocr_set_mode_all(OPTIMUM_CURRENT_MAX);
  1014. if (ret)
  1015. pr_err("Error setting max ocr. err:%d\n",
  1016. ret);
  1017. else
  1018. pr_debug("Requested MAX OCR. tsens:%d Temp:%ld",
  1019. tsens_id_map[i], temp);
  1020. goto do_ocr_exit;
  1021. } else if (temp <= (msm_thermal_info.ocr_temp_degC -
  1022. msm_thermal_info.ocr_temp_hyst_degC))
  1023. auto_cnt++;
  1024. }
  1025. if (auto_cnt == max_tsens_num ||
  1026. ocr_rails[0].init != OPTIMUM_CURRENT_NR) {
  1027. /* 'init' not equal to OPTIMUM_CURRENT_NR means this is the
  1028. ** first polling iteration after device probe. During first
  1029. ** iteration, if temperature is less than the set point, clear
  1030. ** the max current request made and reset the 'init'.
  1031. */
  1032. if (ocr_rails[0].init != OPTIMUM_CURRENT_NR)
  1033. for (j = 0; j < ocr_rail_cnt; j++)
  1034. ocr_rails[j].init = OPTIMUM_CURRENT_NR;
  1035. ret = ocr_set_mode_all(OPTIMUM_CURRENT_MIN);
  1036. if (ret) {
  1037. pr_err("Error setting min optimum current\n");
  1038. goto do_ocr_exit;
  1039. } else {
  1040. pr_debug("Requested MIN OCR. Temp:%ld", temp);
  1041. }
  1042. }
  1043. do_ocr_exit:
  1044. mutex_unlock(&ocr_mutex);
  1045. return ret;
  1046. }
  1047. static int do_vdd_restriction(void)
  1048. {
  1049. long temp = 0;
  1050. int ret = 0;
  1051. int i = 0;
  1052. int dis_cnt = 0;
  1053. if (!vdd_rstr_enabled)
  1054. return ret;
  1055. if (usefreq && !freq_table_get) {
  1056. if (check_freq_table())
  1057. return ret;
  1058. }
  1059. mutex_lock(&vdd_rstr_mutex);
  1060. for (i = 0; i < max_tsens_num; i++) {
  1061. ret = therm_get_temp(tsens_id_map[i], THERM_TSENS_ID, &temp);
  1062. if (ret) {
  1063. pr_err("Unable to read TSENS sensor:%d. err:%d\n",
  1064. tsens_id_map[i], ret);
  1065. dis_cnt++;
  1066. continue;
  1067. }
  1068. if (temp <= msm_thermal_info.vdd_rstr_temp_degC) {
  1069. ret = vdd_restriction_apply_all(1);
  1070. if (ret) {
  1071. pr_err( \
  1072. "Enable vdd rstr for all failed. err:%d\n",
  1073. ret);
  1074. goto exit;
  1075. }
  1076. pr_debug("Enabled Vdd Restriction tsens:%d. Temp:%ld\n",
  1077. thresh[MSM_VDD_RESTRICTION].thresh_list[i].sensor_id,
  1078. temp);
  1079. goto exit;
  1080. } else if (temp > msm_thermal_info.vdd_rstr_temp_hyst_degC)
  1081. dis_cnt++;
  1082. }
  1083. if (dis_cnt == max_tsens_num) {
  1084. ret = vdd_restriction_apply_all(0);
  1085. if (ret) {
  1086. pr_err("Disable vdd rstr for all failed. err:%d\n",
  1087. ret);
  1088. goto exit;
  1089. }
  1090. pr_debug("Disabled Vdd Restriction\n");
  1091. }
  1092. exit:
  1093. mutex_unlock(&vdd_rstr_mutex);
  1094. return ret;
  1095. }
  1096. static int do_psm(void)
  1097. {
  1098. long temp = 0;
  1099. int ret = 0;
  1100. int i = 0;
  1101. int auto_cnt = 0;
  1102. mutex_lock(&psm_mutex);
  1103. for (i = 0; i < max_tsens_num; i++) {
  1104. ret = therm_get_temp(tsens_id_map[i], THERM_TSENS_ID, &temp);
  1105. if (ret) {
  1106. pr_err("Unable to read TSENS sensor:%d. err:%d\n",
  1107. tsens_id_map[i], ret);
  1108. auto_cnt++;
  1109. continue;
  1110. }
  1111. /*
  1112. * As long as one sensor is above the threshold, set PWM mode
  1113. * on all rails, and loop stops. Set auto mode when all rails
  1114. * are below thershold
  1115. */
  1116. if (temp > msm_thermal_info.psm_temp_degC) {
  1117. ret = psm_set_mode_all(PMIC_PWM_MODE);
  1118. if (ret) {
  1119. pr_err("Set pwm mode for all failed. err:%d\n",
  1120. ret);
  1121. goto exit;
  1122. }
  1123. pr_debug("Requested PMIC PWM Mode tsens:%d. Temp:%ld\n",
  1124. tsens_id_map[i], temp);
  1125. break;
  1126. } else if (temp <= msm_thermal_info.psm_temp_hyst_degC)
  1127. auto_cnt++;
  1128. }
  1129. if (auto_cnt == max_tsens_num) {
  1130. ret = psm_set_mode_all(PMIC_AUTO_MODE);
  1131. if (ret) {
  1132. pr_err("Set auto mode for all failed. err:%d\n", ret);
  1133. goto exit;
  1134. }
  1135. pr_debug("Requested PMIC AUTO Mode\n");
  1136. }
  1137. exit:
  1138. mutex_unlock(&psm_mutex);
  1139. return ret;
  1140. }
  1141. static void __ref do_freq_control(long temp)
  1142. {
  1143. uint32_t cpu = 0;
  1144. uint32_t max_freq = cpus[cpu].limited_max_freq;
  1145. if (temp >= msm_thermal_info.limit_temp_degC) {
  1146. if (limit_idx == limit_idx_low)
  1147. return;
  1148. limit_idx -= msm_thermal_info.bootup_freq_step;
  1149. if (limit_idx < limit_idx_low)
  1150. limit_idx = limit_idx_low;
  1151. max_freq = table[limit_idx].frequency;
  1152. #ifdef CONFIG_SEC_PM_DEBUG
  1153. pr_info("%s: down Limit=%d Temp: %ld\n",
  1154. KBUILD_MODNAME, limit_idx, temp);
  1155. #endif
  1156. } else if (temp < msm_thermal_info.limit_temp_degC -
  1157. msm_thermal_info.temp_hysteresis_degC) {
  1158. if (limit_idx == limit_idx_high)
  1159. return;
  1160. limit_idx += msm_thermal_info.bootup_freq_step;
  1161. if (limit_idx >= limit_idx_high) {
  1162. limit_idx = limit_idx_high;
  1163. max_freq = UINT_MAX;
  1164. } else
  1165. max_freq = table[limit_idx].frequency;
  1166. #ifdef CONFIG_SEC_PM_DEBUG
  1167. pr_info("%s: up Limit=%d Temp: %ld\n",
  1168. KBUILD_MODNAME, limit_idx, temp);
  1169. #endif
  1170. }
  1171. if (max_freq == cpus[cpu].limited_max_freq)
  1172. return;
  1173. /* Update new limits */
  1174. get_online_cpus();
  1175. for_each_possible_cpu(cpu) {
  1176. if (!(msm_thermal_info.bootup_freq_control_mask & BIT(cpu)))
  1177. continue;
  1178. pr_info("Limiting CPU%d max frequency to %u. Temp:%ld\n",
  1179. cpu, max_freq, temp);
  1180. cpus[cpu].limited_max_freq = max_freq;
  1181. update_cpu_freq(cpu);
  1182. }
  1183. put_online_cpus();
  1184. }
  1185. static void __ref check_temp(struct work_struct *work)
  1186. {
  1187. static int limit_init;
  1188. long temp = 0;
  1189. int ret = 0;
  1190. if (!msm_thermal_probed)
  1191. return;
  1192. do_therm_reset();
  1193. ret = therm_get_temp(msm_thermal_info.sensor_id, THERM_TSENS_ID, &temp);
  1194. if (ret) {
  1195. pr_err("Unable to read TSENS sensor:%d. err:%d\n",
  1196. msm_thermal_info.sensor_id, ret);
  1197. goto reschedule;
  1198. }
  1199. if (!limit_init) {
  1200. ret = msm_thermal_get_freq_table();
  1201. if (ret)
  1202. goto reschedule;
  1203. else
  1204. limit_init = 1;
  1205. }
  1206. do_core_control(temp);
  1207. do_vdd_restriction();
  1208. do_psm();
  1209. do_ocr();
  1210. do_freq_control(temp);
  1211. reschedule:
  1212. if (polling_enabled)
  1213. schedule_delayed_work(&check_temp_work,
  1214. msecs_to_jiffies(msm_thermal_info.poll_ms));
  1215. }
  1216. static void __ref msm_therm_temp_log(struct work_struct *work)
  1217. {
  1218. struct tsens_device tsens_dev;
  1219. long temp = 0;
  1220. int i, added = 0, ret = 0;
  1221. uint32_t max_sensors = 0;
  1222. char buffer[500];
  1223. if(!tsens_get_max_sensor_num(&max_sensors))
  1224. {
  1225. pr_info( "Debug Temp for Sensor: ");
  1226. for(i=0;i<max_sensors;i++)
  1227. {
  1228. tsens_dev.sensor_num = i;
  1229. tsens_get_temp(&tsens_dev, &temp);
  1230. ret = sprintf(buffer + added, "(%d --- %ld)", i, temp);
  1231. added += ret;
  1232. }
  1233. pr_info("%s", buffer);
  1234. }
  1235. schedule_delayed_work(&temp_log_work,
  1236. HZ*5); //For every 5 seconds log the temperature values of all the msm thermistors.
  1237. }
  1238. static int __ref msm_thermal_cpu_callback(struct notifier_block *nfb,
  1239. unsigned long action, void *hcpu)
  1240. {
  1241. uint32_t cpu = (uint32_t)hcpu;
  1242. if (action == CPU_UP_PREPARE || action == CPU_UP_PREPARE_FROZEN) {
  1243. if (core_control_enabled &&
  1244. (msm_thermal_info.core_control_mask & BIT(cpu)) &&
  1245. (cpus_offlined & BIT(cpu))) {
  1246. pr_debug("Preventing CPU%d from coming online.\n",
  1247. cpu);
  1248. return NOTIFY_BAD;
  1249. }
  1250. }
  1251. pr_debug("voting for CPU%d to be online\n", cpu);
  1252. return NOTIFY_OK;
  1253. }
  1254. static struct notifier_block __refdata msm_thermal_cpu_notifier = {
  1255. .notifier_call = msm_thermal_cpu_callback,
  1256. };
  1257. static void thermal_rtc_setup(void)
  1258. {
  1259. ktime_t wakeup_time;
  1260. ktime_t curr_time;
  1261. curr_time = ktime_get_boottime();
  1262. wakeup_time = ktime_add_us(curr_time,
  1263. (wakeup_ms * USEC_PER_MSEC));
  1264. hrtimer_start_range_ns(&thermal_rtc_hrtimer, wakeup_time,
  1265. ULONG_MAX, HRTIMER_MODE_ABS);
  1266. pr_debug("%s: Current Time: %ld %ld, Alarm set to: %ld %ld\n",
  1267. KBUILD_MODNAME,
  1268. ktime_to_timeval(curr_time).tv_sec,
  1269. ktime_to_timeval(curr_time).tv_usec,
  1270. ktime_to_timeval(wakeup_time).tv_sec,
  1271. ktime_to_timeval(wakeup_time).tv_usec);
  1272. }
  1273. static void timer_work_fn(struct work_struct *work)
  1274. {
  1275. sysfs_notify(tt_kobj, NULL, "wakeup_ms");
  1276. }
  1277. enum hrtimer_restart thermal_rtc_callback(struct hrtimer *timer)
  1278. {
  1279. struct timespec ts;
  1280. get_monotonic_boottime(&ts);
  1281. schedule_work(&timer_work);
  1282. pr_debug("%s: Time on alarm expiry: %ld %ld\n", KBUILD_MODNAME,
  1283. ts.tv_sec, ts.tv_nsec / 1000);
  1284. return HRTIMER_NORESTART;
  1285. }
  1286. static int hotplug_notify(enum thermal_trip_type type, int temp, void *data)
  1287. {
  1288. struct cpu_info *cpu_node = (struct cpu_info *)data;
  1289. pr_info("%s reach temp threshold: %d\n", cpu_node->sensor_type, temp);
  1290. if (!(msm_thermal_info.core_control_mask & BIT(cpu_node->cpu)))
  1291. return 0;
  1292. switch (type) {
  1293. case THERMAL_TRIP_CONFIGURABLE_HI:
  1294. if (!(cpu_node->offline))
  1295. cpu_node->offline = 1;
  1296. break;
  1297. case THERMAL_TRIP_CONFIGURABLE_LOW:
  1298. if (cpu_node->offline)
  1299. cpu_node->offline = 0;
  1300. break;
  1301. default:
  1302. break;
  1303. }
  1304. if (hotplug_task) {
  1305. cpu_node->hotplug_thresh_clear = true;
  1306. complete(&hotplug_notify_complete);
  1307. } else {
  1308. pr_err("Hotplug task is not initialized\n");
  1309. }
  1310. return 0;
  1311. }
  1312. /* Adjust cpus offlined bit based on temperature reading. */
  1313. static int hotplug_init_cpu_offlined(void)
  1314. {
  1315. long temp = 0;
  1316. uint32_t cpu = 0;
  1317. if (!hotplug_enabled)
  1318. return 0;
  1319. mutex_lock(&core_control_mutex);
  1320. for_each_possible_cpu(cpu) {
  1321. if (!(msm_thermal_info.core_control_mask & BIT(cpus[cpu].cpu)))
  1322. continue;
  1323. if (therm_get_temp(cpus[cpu].sensor_id, cpus[cpu].id_type,
  1324. &temp)) {
  1325. pr_err("Unable to read TSENS sensor:%d.\n",
  1326. cpus[cpu].sensor_id);
  1327. mutex_unlock(&core_control_mutex);
  1328. return -EINVAL;
  1329. }
  1330. if (temp >= msm_thermal_info.hotplug_temp_degC)
  1331. cpus[cpu].offline = 1;
  1332. else if (temp <= (msm_thermal_info.hotplug_temp_degC -
  1333. msm_thermal_info.hotplug_temp_hysteresis_degC))
  1334. cpus[cpu].offline = 0;
  1335. }
  1336. mutex_unlock(&core_control_mutex);
  1337. if (hotplug_task)
  1338. complete(&hotplug_notify_complete);
  1339. else {
  1340. pr_err("Hotplug task is not initialized\n");
  1341. return -EINVAL;
  1342. }
  1343. return 0;
  1344. }
  1345. static void hotplug_init(void)
  1346. {
  1347. uint32_t cpu = 0;
  1348. struct sensor_threshold *hi_thresh = NULL, *low_thresh = NULL;
  1349. if (hotplug_task)
  1350. return;
  1351. if (!hotplug_enabled)
  1352. goto init_kthread;
  1353. for_each_possible_cpu(cpu) {
  1354. cpus[cpu].sensor_id =
  1355. sensor_get_id((char *)cpus[cpu].sensor_type);
  1356. cpus[cpu].id_type = THERM_ZONE_ID;
  1357. if (!(msm_thermal_info.core_control_mask & BIT(cpus[cpu].cpu)))
  1358. continue;
  1359. hi_thresh = &cpus[cpu].threshold[HOTPLUG_THRESHOLD_HIGH];
  1360. low_thresh = &cpus[cpu].threshold[HOTPLUG_THRESHOLD_LOW];
  1361. hi_thresh->temp = msm_thermal_info.hotplug_temp_degC;
  1362. hi_thresh->trip = THERMAL_TRIP_CONFIGURABLE_HI;
  1363. low_thresh->temp = msm_thermal_info.hotplug_temp_degC -
  1364. msm_thermal_info.hotplug_temp_hysteresis_degC;
  1365. low_thresh->trip = THERMAL_TRIP_CONFIGURABLE_LOW;
  1366. hi_thresh->notify = low_thresh->notify = hotplug_notify;
  1367. hi_thresh->data = low_thresh->data = (void *)&cpus[cpu];
  1368. set_threshold(cpus[cpu].sensor_id, hi_thresh);
  1369. }
  1370. init_kthread:
  1371. init_completion(&hotplug_notify_complete);
  1372. hotplug_task = kthread_run(do_hotplug, NULL, "msm_thermal:hotplug");
  1373. if (IS_ERR(hotplug_task)) {
  1374. pr_err("Failed to create do_hotplug thread. err:%ld\n",
  1375. PTR_ERR(hotplug_task));
  1376. return;
  1377. }
  1378. /*
  1379. * Adjust cpus offlined bit when hotplug intitializes so that the new
  1380. * cpus offlined state is based on hotplug threshold range
  1381. */
  1382. if (hotplug_init_cpu_offlined())
  1383. kthread_stop(hotplug_task);
  1384. }
  1385. static __ref int do_freq_mitigation(void *data)
  1386. {
  1387. int ret = 0;
  1388. uint32_t cpu = 0, max_freq_req = 0, min_freq_req = 0;
  1389. struct sched_param param = {.sched_priority = MAX_RT_PRIO-1};
  1390. sched_setscheduler(current, SCHED_FIFO, &param);
  1391. while (!kthread_should_stop()) {
  1392. while (wait_for_completion_interruptible(
  1393. &freq_mitigation_complete) != 0)
  1394. ;
  1395. INIT_COMPLETION(freq_mitigation_complete);
  1396. for_each_possible_cpu(cpu) {
  1397. max_freq_req = (cpus[cpu].max_freq) ?
  1398. msm_thermal_info.freq_limit :
  1399. UINT_MAX;
  1400. max_freq_req = min(max_freq_req,
  1401. cpus[cpu].user_max_freq);
  1402. min_freq_req = max(min_freq_limit,
  1403. cpus[cpu].user_min_freq);
  1404. if ((max_freq_req == cpus[cpu].limited_max_freq)
  1405. && (min_freq_req ==
  1406. cpus[cpu].limited_min_freq))
  1407. goto reset_threshold;
  1408. cpus[cpu].limited_max_freq = max_freq_req;
  1409. cpus[cpu].limited_min_freq = min_freq_req;
  1410. update_cpu_freq(cpu);
  1411. reset_threshold:
  1412. if (freq_mitigation_enabled &&
  1413. cpus[cpu].freq_thresh_clear) {
  1414. set_threshold(cpus[cpu].sensor_id,
  1415. &cpus[cpu].threshold[FREQ_THRESHOLD_HIGH]);
  1416. cpus[cpu].freq_thresh_clear = false;
  1417. }
  1418. }
  1419. }
  1420. return ret;
  1421. }
  1422. static int freq_mitigation_notify(enum thermal_trip_type type,
  1423. int temp, void *data)
  1424. {
  1425. struct cpu_info *cpu_node = (struct cpu_info *) data;
  1426. pr_debug("%s reached temp threshold: %d\n",
  1427. cpu_node->sensor_type, temp);
  1428. if (!(msm_thermal_info.freq_mitig_control_mask &
  1429. BIT(cpu_node->cpu)))
  1430. return 0;
  1431. switch (type) {
  1432. case THERMAL_TRIP_CONFIGURABLE_HI:
  1433. if (!cpu_node->max_freq) {
  1434. pr_info("Mitigating CPU%d frequency to %d\n",
  1435. cpu_node->cpu,
  1436. msm_thermal_info.freq_limit);
  1437. cpu_node->max_freq = true;
  1438. }
  1439. break;
  1440. case THERMAL_TRIP_CONFIGURABLE_LOW:
  1441. if (cpu_node->max_freq) {
  1442. pr_info("Removing frequency mitigation for CPU%d\n",
  1443. cpu_node->cpu);
  1444. cpu_node->max_freq = false;
  1445. }
  1446. break;
  1447. default:
  1448. break;
  1449. }
  1450. if (freq_mitigation_task) {
  1451. cpu_node->freq_thresh_clear = true;
  1452. complete(&freq_mitigation_complete);
  1453. } else {
  1454. pr_err("Frequency mitigation task is not initialized\n");
  1455. }
  1456. return 0;
  1457. }
  1458. static void freq_mitigation_init(void)
  1459. {
  1460. uint32_t cpu = 0;
  1461. struct sensor_threshold *hi_thresh = NULL, *low_thresh = NULL;
  1462. if (freq_mitigation_task)
  1463. return;
  1464. if (!freq_mitigation_enabled)
  1465. goto init_freq_thread;
  1466. for_each_possible_cpu(cpu) {
  1467. if (!(msm_thermal_info.freq_mitig_control_mask & BIT(cpu)))
  1468. continue;
  1469. hi_thresh = &cpus[cpu].threshold[FREQ_THRESHOLD_HIGH];
  1470. low_thresh = &cpus[cpu].threshold[FREQ_THRESHOLD_LOW];
  1471. hi_thresh->temp = msm_thermal_info.freq_mitig_temp_degc;
  1472. hi_thresh->trip = THERMAL_TRIP_CONFIGURABLE_HI;
  1473. low_thresh->temp = msm_thermal_info.freq_mitig_temp_degc -
  1474. msm_thermal_info.freq_mitig_temp_hysteresis_degc;
  1475. low_thresh->trip = THERMAL_TRIP_CONFIGURABLE_LOW;
  1476. hi_thresh->notify = low_thresh->notify =
  1477. freq_mitigation_notify;
  1478. hi_thresh->data = low_thresh->data = (void *)&cpus[cpu];
  1479. set_threshold(cpus[cpu].sensor_id, hi_thresh);
  1480. }
  1481. init_freq_thread:
  1482. init_completion(&freq_mitigation_complete);
  1483. freq_mitigation_task = kthread_run(do_freq_mitigation, NULL,
  1484. "msm_thermal:freq_mitig");
  1485. if (IS_ERR(freq_mitigation_task)) {
  1486. pr_err("Failed to create frequency mitigation thread. err:%ld\n",
  1487. PTR_ERR(freq_mitigation_task));
  1488. return;
  1489. }
  1490. }
  1491. int msm_thermal_set_frequency(uint32_t cpu, uint32_t freq, bool is_max)
  1492. {
  1493. int ret = 0;
  1494. if (cpu >= num_possible_cpus()) {
  1495. pr_err("Invalid input\n");
  1496. ret = -EINVAL;
  1497. goto set_freq_exit;
  1498. }
  1499. pr_debug("Userspace requested %s frequency %u for CPU%u\n",
  1500. (is_max) ? "Max" : "Min", freq, cpu);
  1501. if (is_max) {
  1502. if (cpus[cpu].user_max_freq == freq)
  1503. goto set_freq_exit;
  1504. cpus[cpu].user_max_freq = freq;
  1505. } else {
  1506. if (cpus[cpu].user_min_freq == freq)
  1507. goto set_freq_exit;
  1508. cpus[cpu].user_min_freq = freq;
  1509. }
  1510. if (freq_mitigation_task) {
  1511. complete(&freq_mitigation_complete);
  1512. } else {
  1513. pr_err("Frequency mitigation task is not initialized\n");
  1514. ret = -ESRCH;
  1515. goto set_freq_exit;
  1516. }
  1517. set_freq_exit:
  1518. return ret;
  1519. }
  1520. int therm_set_threshold(struct threshold_info *thresh_inp)
  1521. {
  1522. int ret = 0, i = 0, err = 0;
  1523. struct therm_threshold *thresh_ptr;
  1524. if (!thresh_inp) {
  1525. pr_err("Invalid input\n");
  1526. ret = -EINVAL;
  1527. goto therm_set_exit;
  1528. }
  1529. thresh_inp->thresh_triggered = false;
  1530. for (i = 0; i < thresh_inp->thresh_ct; i++) {
  1531. thresh_ptr = &thresh_inp->thresh_list[i];
  1532. thresh_ptr->trip_triggered = -1;
  1533. err = set_threshold(thresh_ptr->sensor_id,
  1534. thresh_ptr->threshold);
  1535. if (err) {
  1536. ret = err;
  1537. err = 0;
  1538. }
  1539. }
  1540. therm_set_exit:
  1541. return ret;
  1542. }
  1543. static void vdd_restriction_notify(struct therm_threshold *trig_thresh)
  1544. {
  1545. int ret = 0;
  1546. static uint32_t vdd_sens_status;
  1547. if (!vdd_rstr_enabled)
  1548. return;
  1549. if (!trig_thresh) {
  1550. pr_err("Invalid input\n");
  1551. return;
  1552. }
  1553. if (trig_thresh->trip_triggered < 0)
  1554. goto set_and_exit;
  1555. mutex_lock(&vdd_rstr_mutex);
  1556. pr_debug("sensor:%d reached %s thresh for Vdd restriction\n",
  1557. tsens_id_map[trig_thresh->sensor_id],
  1558. (trig_thresh->trip_triggered == THERMAL_TRIP_CONFIGURABLE_HI) ?
  1559. "high" : "low");
  1560. switch (trig_thresh->trip_triggered) {
  1561. case THERMAL_TRIP_CONFIGURABLE_HI:
  1562. if (vdd_sens_status & BIT(trig_thresh->sensor_id))
  1563. vdd_sens_status ^= BIT(trig_thresh->sensor_id);
  1564. break;
  1565. case THERMAL_TRIP_CONFIGURABLE_LOW:
  1566. vdd_sens_status |= BIT(trig_thresh->sensor_id);
  1567. break;
  1568. default:
  1569. pr_err("Unsupported trip type\n");
  1570. goto unlock_and_exit;
  1571. break;
  1572. }
  1573. ret = vdd_restriction_apply_all((vdd_sens_status) ? 1 : 0);
  1574. if (ret) {
  1575. pr_err("%s vdd rstr votlage for all failed\n",
  1576. (vdd_sens_status) ?
  1577. "Enable" : "Disable");
  1578. goto unlock_and_exit;
  1579. }
  1580. unlock_and_exit:
  1581. mutex_unlock(&vdd_rstr_mutex);
  1582. set_and_exit:
  1583. set_threshold(trig_thresh->sensor_id, trig_thresh->threshold);
  1584. return;
  1585. }
  1586. static __ref int do_thermal_monitor(void *data)
  1587. {
  1588. int ret = 0, i, j;
  1589. struct therm_threshold *sensor_list;
  1590. while (!kthread_should_stop()) {
  1591. while (wait_for_completion_interruptible(
  1592. &thermal_monitor_complete) != 0)
  1593. ;
  1594. INIT_COMPLETION(thermal_monitor_complete);
  1595. for (i = 0; i < MSM_LIST_MAX_NR; i++) {
  1596. if (!thresh[i].thresh_triggered)
  1597. continue;
  1598. thresh[i].thresh_triggered = false;
  1599. for (j = 0; j < thresh[i].thresh_ct; j++) {
  1600. sensor_list = &thresh[i].thresh_list[j];
  1601. if (sensor_list->trip_triggered < 0)
  1602. continue;
  1603. sensor_list->notify(sensor_list);
  1604. sensor_list->trip_triggered = -1;
  1605. }
  1606. }
  1607. }
  1608. return ret;
  1609. }
  1610. static void thermal_monitor_init(void)
  1611. {
  1612. if (thermal_monitor_task)
  1613. return;
  1614. init_completion(&thermal_monitor_complete);
  1615. thermal_monitor_task = kthread_run(do_thermal_monitor, NULL,
  1616. "msm_thermal:therm_monitor");
  1617. if (IS_ERR(thermal_monitor_task)) {
  1618. pr_err("Failed to create thermal monitor thread. err:%ld\n",
  1619. PTR_ERR(thermal_monitor_task));
  1620. goto init_exit;
  1621. }
  1622. if (therm_reset_enabled)
  1623. therm_set_threshold(&thresh[MSM_THERM_RESET]);
  1624. if (vdd_rstr_enabled)
  1625. therm_set_threshold(&thresh[MSM_VDD_RESTRICTION]);
  1626. init_exit:
  1627. return;
  1628. }
  1629. static int msm_thermal_notify(enum thermal_trip_type type, int temp, void *data)
  1630. {
  1631. struct therm_threshold *thresh_data = (struct therm_threshold *)data;
  1632. if (thermal_monitor_task) {
  1633. thresh_data->trip_triggered = type;
  1634. thresh_data->parent->thresh_triggered = true;
  1635. complete(&thermal_monitor_complete);
  1636. } else {
  1637. pr_err("Thermal monitor task is not initialized\n");
  1638. }
  1639. return 0;
  1640. }
  1641. static int init_threshold(enum msm_thresh_list index,
  1642. int sensor_id, int32_t hi_temp, int32_t low_temp,
  1643. void (*callback)(struct therm_threshold *))
  1644. {
  1645. int ret = 0, i;
  1646. struct therm_threshold *thresh_ptr;
  1647. if (!callback || index >= MSM_LIST_MAX_NR || index < 0
  1648. || sensor_id == -ENODEV) {
  1649. pr_err("Invalid input. sensor:%d. index:%d\n",
  1650. sensor_id, index);
  1651. ret = -EINVAL;
  1652. goto init_thresh_exit;
  1653. }
  1654. if (thresh[index].thresh_list) {
  1655. pr_err("threshold id:%d already initialized\n", index);
  1656. ret = -EEXIST;
  1657. goto init_thresh_exit;
  1658. }
  1659. thresh[index].thresh_ct = (sensor_id == MONITOR_ALL_TSENS) ?
  1660. max_tsens_num : 1;
  1661. thresh[index].thresh_triggered = false;
  1662. thresh[index].thresh_list = kzalloc(sizeof(struct therm_threshold) *
  1663. thresh[index].thresh_ct, GFP_KERNEL);
  1664. if (!thresh[index].thresh_list) {
  1665. pr_err("kzalloc failed for thresh index:%d\n", index);
  1666. ret = -ENOMEM;
  1667. goto init_thresh_exit;
  1668. }
  1669. thresh_ptr = thresh[index].thresh_list;
  1670. if (sensor_id == MONITOR_ALL_TSENS) {
  1671. for (i = 0; i < max_tsens_num; i++) {
  1672. thresh_ptr[i].sensor_id = tsens_id_map[i];
  1673. thresh_ptr[i].notify = callback;
  1674. thresh_ptr[i].trip_triggered = -1;
  1675. thresh_ptr[i].parent = &thresh[index];
  1676. thresh_ptr[i].threshold[0].temp = hi_temp;
  1677. thresh_ptr[i].threshold[0].trip =
  1678. THERMAL_TRIP_CONFIGURABLE_HI;
  1679. thresh_ptr[i].threshold[1].temp = low_temp;
  1680. thresh_ptr[i].threshold[1].trip =
  1681. THERMAL_TRIP_CONFIGURABLE_LOW;
  1682. thresh_ptr[i].threshold[0].notify =
  1683. thresh_ptr[i].threshold[1].notify = msm_thermal_notify;
  1684. thresh_ptr[i].threshold[0].data =
  1685. thresh_ptr[i].threshold[1].data =
  1686. (void *)&thresh_ptr[i];
  1687. }
  1688. } else {
  1689. thresh_ptr->sensor_id = sensor_id;
  1690. thresh_ptr->notify = callback;
  1691. thresh_ptr->trip_triggered = -1;
  1692. thresh_ptr->parent = &thresh[index];
  1693. thresh_ptr->threshold[0].temp = hi_temp;
  1694. thresh_ptr->threshold[0].trip =
  1695. THERMAL_TRIP_CONFIGURABLE_HI;
  1696. thresh_ptr->threshold[1].temp = low_temp;
  1697. thresh_ptr->threshold[1].trip =
  1698. THERMAL_TRIP_CONFIGURABLE_LOW;
  1699. thresh_ptr->threshold[0].notify =
  1700. thresh_ptr->threshold[1].notify = msm_thermal_notify;
  1701. thresh_ptr->threshold[0].data =
  1702. thresh_ptr->threshold[1].data = (void *)thresh_ptr;
  1703. }
  1704. init_thresh_exit:
  1705. return ret;
  1706. }
  1707. /*
  1708. * We will reset the cpu frequencies limits here. The core online/offline
  1709. * status will be carried over to the process stopping the msm_thermal, as
  1710. * we dont want to online a core and bring in the thermal issues.
  1711. */
  1712. static void __ref disable_msm_thermal(void)
  1713. {
  1714. uint32_t cpu = 0;
  1715. /* make sure check_temp is no longer running */
  1716. /* kor_ts@sec
  1717. * flush_scheduled_work () should be avoided.
  1718. */
  1719. cancel_delayed_work_sync(&check_temp_work);
  1720. get_online_cpus();
  1721. for_each_possible_cpu(cpu) {
  1722. if (cpus[cpu].limited_max_freq == UINT_MAX &&
  1723. cpus[cpu].limited_min_freq == 0)
  1724. continue;
  1725. pr_info("Max frequency reset for CPU%d\n", cpu);
  1726. cpus[cpu].limited_max_freq = UINT_MAX;
  1727. cpus[cpu].limited_min_freq = 0;
  1728. update_cpu_freq(cpu);
  1729. }
  1730. put_online_cpus();
  1731. }
  1732. static void interrupt_mode_init(void)
  1733. {
  1734. if (!msm_thermal_probed) {
  1735. interrupt_mode_enable = true;
  1736. return;
  1737. }
  1738. if (polling_enabled) {
  1739. pr_info("Interrupt mode init\n");
  1740. polling_enabled = 0;
  1741. disable_msm_thermal();
  1742. hotplug_init();
  1743. freq_mitigation_init();
  1744. thermal_monitor_init();
  1745. }
  1746. }
  1747. static int __ref set_enabled(const char *val, const struct kernel_param *kp)
  1748. {
  1749. int ret = 0;
  1750. ret = param_set_bool(val, kp);
  1751. if (!enabled)
  1752. interrupt_mode_init();
  1753. else
  1754. pr_info("no action for enabled = %d\n",
  1755. enabled);
  1756. pr_info("enabled = %d\n", enabled);
  1757. return ret;
  1758. }
  1759. static struct kernel_param_ops module_ops = {
  1760. .set = set_enabled,
  1761. .get = param_get_bool,
  1762. };
  1763. module_param_cb(enabled, &module_ops, &enabled, 0644);
  1764. MODULE_PARM_DESC(enabled, "enforce thermal limit on cpu");
  1765. static ssize_t show_cc_enabled(struct kobject *kobj,
  1766. struct kobj_attribute *attr, char *buf)
  1767. {
  1768. return snprintf(buf, PAGE_SIZE, "%d\n", core_control_enabled);
  1769. }
  1770. static ssize_t __ref store_cc_enabled(struct kobject *kobj,
  1771. struct kobj_attribute *attr, const char *buf, size_t count)
  1772. {
  1773. int ret = 0;
  1774. int val = 0;
  1775. ret = kstrtoint(buf, 10, &val);
  1776. if (ret) {
  1777. pr_err("Invalid input %s. err:%d\n", buf, ret);
  1778. goto done_store_cc;
  1779. }
  1780. if (core_control_enabled == !!val)
  1781. goto done_store_cc;
  1782. core_control_enabled = !!val;
  1783. if (core_control_enabled) {
  1784. pr_info("Core control enabled\n");
  1785. register_cpu_notifier(&msm_thermal_cpu_notifier);
  1786. if (hotplug_task)
  1787. complete(&hotplug_notify_complete);
  1788. else
  1789. pr_err("Hotplug task is not initialized\n");
  1790. } else {
  1791. pr_info("Core control disabled\n");
  1792. unregister_cpu_notifier(&msm_thermal_cpu_notifier);
  1793. }
  1794. done_store_cc:
  1795. return count;
  1796. }
  1797. static ssize_t show_cpus_offlined(struct kobject *kobj,
  1798. struct kobj_attribute *attr, char *buf)
  1799. {
  1800. return snprintf(buf, PAGE_SIZE, "%d\n", cpus_offlined);
  1801. }
  1802. static ssize_t __ref store_cpus_offlined(struct kobject *kobj,
  1803. struct kobj_attribute *attr, const char *buf, size_t count)
  1804. {
  1805. int ret = 0;
  1806. uint32_t val = 0;
  1807. uint32_t cpu;
  1808. mutex_lock(&core_control_mutex);
  1809. ret = kstrtouint(buf, 10, &val);
  1810. if (ret) {
  1811. pr_err("Invalid input %s. err:%d\n", buf, ret);
  1812. goto done_cc;
  1813. }
  1814. if (polling_enabled) {
  1815. pr_err("Ignoring request; polling thread is enabled.\n");
  1816. goto done_cc;
  1817. }
  1818. for_each_possible_cpu(cpu) {
  1819. if (!(msm_thermal_info.core_control_mask & BIT(cpu)))
  1820. continue;
  1821. cpus[cpu].user_offline = !!(val & BIT(cpu));
  1822. pr_debug("\"%s\"(PID:%i) requests %s CPU%d.\n", current->comm,
  1823. current->pid, (cpus[cpu].user_offline) ? "offline" :
  1824. "online", cpu);
  1825. }
  1826. if (hotplug_task)
  1827. complete(&hotplug_notify_complete);
  1828. else
  1829. pr_err("Hotplug task is not initialized\n");
  1830. done_cc:
  1831. mutex_unlock(&core_control_mutex);
  1832. return count;
  1833. }
  1834. static __refdata struct kobj_attribute cc_enabled_attr =
  1835. __ATTR(enabled, 0644, show_cc_enabled, store_cc_enabled);
  1836. static __refdata struct kobj_attribute cpus_offlined_attr =
  1837. __ATTR(cpus_offlined, 0644, show_cpus_offlined, store_cpus_offlined);
  1838. static __refdata struct attribute *cc_attrs[] = {
  1839. &cc_enabled_attr.attr,
  1840. &cpus_offlined_attr.attr,
  1841. NULL,
  1842. };
  1843. static __refdata struct attribute_group cc_attr_group = {
  1844. .attrs = cc_attrs,
  1845. };
  1846. static ssize_t show_wakeup_ms(struct kobject *kobj,
  1847. struct kobj_attribute *attr, char *buf)
  1848. {
  1849. return snprintf(buf, PAGE_SIZE, "%d\n", wakeup_ms);
  1850. }
  1851. static ssize_t store_wakeup_ms(struct kobject *kobj,
  1852. struct kobj_attribute *attr, const char *buf, size_t count)
  1853. {
  1854. int ret;
  1855. ret = kstrtouint(buf, 10, &wakeup_ms);
  1856. if (ret) {
  1857. pr_err("%s: Trying to set invalid wakeup timer\n",
  1858. KBUILD_MODNAME);
  1859. return ret;
  1860. }
  1861. if (wakeup_ms > 0) {
  1862. thermal_rtc_setup();
  1863. pr_debug("%s: Timer started for %ums\n", KBUILD_MODNAME,
  1864. wakeup_ms);
  1865. } else {
  1866. ret = hrtimer_cancel(&thermal_rtc_hrtimer);
  1867. if (ret)
  1868. pr_debug("%s: Timer canceled\n", KBUILD_MODNAME);
  1869. else
  1870. pr_debug("%s: No active timer present to cancel\n",
  1871. KBUILD_MODNAME);
  1872. }
  1873. return count;
  1874. }
  1875. static __refdata struct kobj_attribute timer_attr =
  1876. __ATTR(wakeup_ms, 0644, show_wakeup_ms, store_wakeup_ms);
  1877. static __refdata struct attribute *tt_attrs[] = {
  1878. &timer_attr.attr,
  1879. NULL,
  1880. };
  1881. static __refdata struct attribute_group tt_attr_group = {
  1882. .attrs = tt_attrs,
  1883. };
  1884. static __init int msm_thermal_add_cc_nodes(void)
  1885. {
  1886. struct kobject *module_kobj = NULL;
  1887. int ret = 0;
  1888. module_kobj = kset_find_obj(module_kset, KBUILD_MODNAME);
  1889. if (!module_kobj) {
  1890. pr_err("cannot find kobject\n");
  1891. ret = -ENOENT;
  1892. goto done_cc_nodes;
  1893. }
  1894. cc_kobj = kobject_create_and_add("core_control", module_kobj);
  1895. if (!cc_kobj) {
  1896. pr_err("cannot create core control kobj\n");
  1897. ret = -ENOMEM;
  1898. goto done_cc_nodes;
  1899. }
  1900. ret = sysfs_create_group(cc_kobj, &cc_attr_group);
  1901. if (ret) {
  1902. pr_err("cannot create sysfs group. err:%d\n", ret);
  1903. goto done_cc_nodes;
  1904. }
  1905. return 0;
  1906. done_cc_nodes:
  1907. if (cc_kobj)
  1908. kobject_del(cc_kobj);
  1909. return ret;
  1910. }
  1911. static __init int msm_thermal_add_timer_nodes(void)
  1912. {
  1913. struct kobject *module_kobj = NULL;
  1914. int ret = 0;
  1915. module_kobj = kset_find_obj(module_kset, KBUILD_MODNAME);
  1916. if (!module_kobj) {
  1917. pr_err("%s: cannot find kobject for module\n",
  1918. KBUILD_MODNAME);
  1919. ret = -ENOENT;
  1920. goto failed;
  1921. }
  1922. tt_kobj = kobject_create_and_add("thermal_timer", module_kobj);
  1923. if (!tt_kobj) {
  1924. pr_err("%s: cannot create timer kobj\n",
  1925. KBUILD_MODNAME);
  1926. ret = -ENOMEM;
  1927. goto failed;
  1928. }
  1929. ret = sysfs_create_group(tt_kobj, &tt_attr_group);
  1930. if (ret) {
  1931. pr_err("%s: cannot create group\n", KBUILD_MODNAME);
  1932. goto failed;
  1933. }
  1934. return 0;
  1935. failed:
  1936. if (tt_kobj)
  1937. kobject_del(tt_kobj);
  1938. return ret;
  1939. }
  1940. int msm_thermal_pre_init(void)
  1941. {
  1942. int ret = 0;
  1943. tsens_get_max_sensor_num(&max_tsens_num);
  1944. if (create_sensor_id_map()) {
  1945. pr_err("Creating sensor id map failed\n");
  1946. ret = -EINVAL;
  1947. goto pre_init_exit;
  1948. }
  1949. if (!thresh) {
  1950. thresh = kzalloc(
  1951. sizeof(struct threshold_info) * MSM_LIST_MAX_NR,
  1952. GFP_KERNEL);
  1953. if (!thresh) {
  1954. pr_err("kzalloc failed\n");
  1955. ret = -ENOMEM;
  1956. goto pre_init_exit;
  1957. }
  1958. memset(thresh, 0, sizeof(struct threshold_info) *
  1959. MSM_LIST_MAX_NR);
  1960. }
  1961. pre_init_exit:
  1962. return ret;
  1963. }
  1964. int msm_thermal_init(struct msm_thermal_data *pdata)
  1965. {
  1966. int ret = 0;
  1967. uint32_t cpu;
  1968. for_each_possible_cpu(cpu) {
  1969. cpus[cpu].cpu = cpu;
  1970. cpus[cpu].offline = 0;
  1971. cpus[cpu].user_offline = 0;
  1972. cpus[cpu].hotplug_thresh_clear = false;
  1973. cpus[cpu].max_freq = false;
  1974. cpus[cpu].user_max_freq = UINT_MAX;
  1975. cpus[cpu].user_min_freq = 0;
  1976. cpus[cpu].limited_max_freq = UINT_MAX;
  1977. cpus[cpu].limited_min_freq = 0;
  1978. cpus[cpu].freq_thresh_clear = false;
  1979. }
  1980. BUG_ON(!pdata);
  1981. memcpy(&msm_thermal_info, pdata, sizeof(struct msm_thermal_data));
  1982. if (check_sensor_id(msm_thermal_info.sensor_id)) {
  1983. pr_err("Invalid sensor:%d for polling\n",
  1984. msm_thermal_info.sensor_id);
  1985. return -EINVAL;
  1986. }
  1987. enabled = 1;
  1988. polling_enabled = 1;
  1989. ret = cpufreq_register_notifier(&msm_thermal_cpufreq_notifier,
  1990. CPUFREQ_POLICY_NOTIFIER);
  1991. if (ret)
  1992. pr_err("cannot register cpufreq notifier. err:%d\n", ret);
  1993. INIT_DELAYED_WORK(&check_temp_work, check_temp);
  1994. schedule_delayed_work(&check_temp_work, 0);
  1995. if (num_possible_cpus() > 1)
  1996. register_cpu_notifier(&msm_thermal_cpu_notifier);
  1997. return ret;
  1998. }
  1999. static int ocr_reg_init(struct platform_device *pdev)
  2000. {
  2001. int ret = 0;
  2002. int i, j;
  2003. for (i = 0; i < ocr_rail_cnt; i++) {
  2004. /* Check if vdd_restriction has already initialized any
  2005. * regualtor handle. If so use the same handle.*/
  2006. for (j = 0; j < rails_cnt; j++) {
  2007. if (!strcmp(ocr_rails[i].name, rails[j].name)) {
  2008. if (rails[j].reg == NULL)
  2009. break;
  2010. ocr_rails[i].phase_reg = rails[j].reg;
  2011. goto reg_init;
  2012. }
  2013. }
  2014. ocr_rails[i].phase_reg = devm_regulator_get(&pdev->dev,
  2015. ocr_rails[i].name);
  2016. if (IS_ERR_OR_NULL(ocr_rails[i].phase_reg)) {
  2017. ret = PTR_ERR(ocr_rails[i].phase_reg);
  2018. if (ret != -EPROBE_DEFER) {
  2019. pr_err("%s, could not get regulator: %s\n",
  2020. __func__, ocr_rails[i].name);
  2021. ocr_rails[i].phase_reg = NULL;
  2022. ocr_rails[i].mode = 0;
  2023. ocr_rails[i].init = 0;
  2024. }
  2025. return ret;
  2026. }
  2027. reg_init:
  2028. ocr_rails[i].mode = OPTIMUM_CURRENT_MIN;
  2029. }
  2030. return ret;
  2031. }
  2032. static int vdd_restriction_reg_init(struct platform_device *pdev)
  2033. {
  2034. int ret = 0;
  2035. int i;
  2036. for (i = 0; i < rails_cnt; i++) {
  2037. if (rails[i].freq_req == 1) {
  2038. usefreq |= BIT(i);
  2039. check_freq_table();
  2040. /*
  2041. * Restrict frequency by default until we have made
  2042. * our first temp reading
  2043. */
  2044. if (freq_table_get)
  2045. ret = vdd_restriction_apply_freq(&rails[i], 0);
  2046. else
  2047. pr_info("Defer vdd rstr freq init.\n");
  2048. } else {
  2049. rails[i].reg = devm_regulator_get(&pdev->dev,
  2050. rails[i].name);
  2051. if (IS_ERR_OR_NULL(rails[i].reg)) {
  2052. ret = PTR_ERR(rails[i].reg);
  2053. if (ret != -EPROBE_DEFER) {
  2054. pr_err( \
  2055. "could not get regulator: %s. err:%d\n",
  2056. rails[i].name, ret);
  2057. rails[i].reg = NULL;
  2058. rails[i].curr_level = -2;
  2059. return ret;
  2060. }
  2061. pr_info("Defer regulator %s probe\n",
  2062. rails[i].name);
  2063. return ret;
  2064. }
  2065. /*
  2066. * Restrict votlage by default until we have made
  2067. * our first temp reading
  2068. */
  2069. ret = vdd_restriction_apply_voltage(&rails[i], 0);
  2070. }
  2071. }
  2072. return ret;
  2073. }
  2074. static int psm_reg_init(struct platform_device *pdev)
  2075. {
  2076. int ret = 0;
  2077. int i = 0;
  2078. int j = 0;
  2079. for (i = 0; i < psm_rails_cnt; i++) {
  2080. psm_rails[i].reg = rpm_regulator_get(&pdev->dev,
  2081. psm_rails[i].name);
  2082. if (IS_ERR_OR_NULL(psm_rails[i].reg)) {
  2083. ret = PTR_ERR(psm_rails[i].reg);
  2084. if (ret != -EPROBE_DEFER) {
  2085. pr_err("couldn't get rpm regulator %s. err%d\n",
  2086. psm_rails[i].name, ret);
  2087. psm_rails[i].reg = NULL;
  2088. goto psm_reg_exit;
  2089. }
  2090. pr_info("Defer regulator %s probe\n",
  2091. psm_rails[i].name);
  2092. return ret;
  2093. }
  2094. /* Apps default vote for PWM mode */
  2095. psm_rails[i].init = PMIC_PWM_MODE;
  2096. ret = rpm_regulator_set_mode(psm_rails[i].reg,
  2097. psm_rails[i].init);
  2098. if (ret) {
  2099. pr_err("Cannot set PMIC PWM mode. err:%d\n", ret);
  2100. return ret;
  2101. } else
  2102. psm_rails[i].mode = PMIC_PWM_MODE;
  2103. }
  2104. return ret;
  2105. psm_reg_exit:
  2106. if (ret) {
  2107. for (j = 0; j < i; j++) {
  2108. if (psm_rails[j].reg != NULL)
  2109. rpm_regulator_put(psm_rails[j].reg);
  2110. }
  2111. }
  2112. return ret;
  2113. }
  2114. static struct kobj_attribute default_cpu_temp_limit_attr =
  2115. __ATTR_RO(default_cpu_temp_limit);
  2116. static int msm_thermal_add_default_temp_limit_nodes(void)
  2117. {
  2118. struct kobject *module_kobj = NULL;
  2119. int ret = 0;
  2120. if (!default_temp_limit_probed) {
  2121. default_temp_limit_nodes_called = true;
  2122. return ret;
  2123. }
  2124. if (!default_temp_limit_enabled)
  2125. return ret;
  2126. module_kobj = kset_find_obj(module_kset, KBUILD_MODNAME);
  2127. if (!module_kobj) {
  2128. pr_err("cannot find kobject\n");
  2129. return -ENOENT;
  2130. }
  2131. sysfs_attr_init(&default_cpu_temp_limit_attr.attr);
  2132. ret = sysfs_create_file(module_kobj, &default_cpu_temp_limit_attr.attr);
  2133. if (ret) {
  2134. pr_err(
  2135. "cannot create default_cpu_temp_limit attribute. err:%d\n",
  2136. ret);
  2137. return ret;
  2138. }
  2139. return ret;
  2140. }
  2141. static int msm_thermal_add_vdd_rstr_nodes(void)
  2142. {
  2143. struct kobject *module_kobj = NULL;
  2144. struct kobject *vdd_rstr_kobj = NULL;
  2145. struct kobject *vdd_rstr_reg_kobj[MAX_RAILS] = {0};
  2146. int rc = 0;
  2147. int i = 0;
  2148. if (!vdd_rstr_probed) {
  2149. vdd_rstr_nodes_called = true;
  2150. return rc;
  2151. }
  2152. if (vdd_rstr_probed && rails_cnt == 0)
  2153. return rc;
  2154. module_kobj = kset_find_obj(module_kset, KBUILD_MODNAME);
  2155. if (!module_kobj) {
  2156. pr_err("cannot find kobject\n");
  2157. rc = -ENOENT;
  2158. goto thermal_sysfs_add_exit;
  2159. }
  2160. vdd_rstr_kobj = kobject_create_and_add("vdd_restriction", module_kobj);
  2161. if (!vdd_rstr_kobj) {
  2162. pr_err("cannot create vdd_restriction kobject\n");
  2163. rc = -ENOMEM;
  2164. goto thermal_sysfs_add_exit;
  2165. }
  2166. rc = sysfs_create_group(vdd_rstr_kobj, &vdd_rstr_en_attribs_gp);
  2167. if (rc) {
  2168. pr_err("cannot create kobject attribute group. err:%d\n", rc);
  2169. rc = -ENOMEM;
  2170. goto thermal_sysfs_add_exit;
  2171. }
  2172. for (i = 0; i < rails_cnt; i++) {
  2173. vdd_rstr_reg_kobj[i] = kobject_create_and_add(rails[i].name,
  2174. vdd_rstr_kobj);
  2175. if (!vdd_rstr_reg_kobj[i]) {
  2176. pr_err("cannot create kobject for %s\n",
  2177. rails[i].name);
  2178. rc = -ENOMEM;
  2179. goto thermal_sysfs_add_exit;
  2180. }
  2181. rails[i].attr_gp.attrs = kzalloc(sizeof(struct attribute *) * 3,
  2182. GFP_KERNEL);
  2183. if (!rails[i].attr_gp.attrs) {
  2184. pr_err("kzalloc failed\n");
  2185. rc = -ENOMEM;
  2186. goto thermal_sysfs_add_exit;
  2187. }
  2188. VDD_RES_RW_ATTRIB(rails[i], rails[i].level_attr, 0, level);
  2189. VDD_RES_RO_ATTRIB(rails[i], rails[i].value_attr, 1, value);
  2190. rails[i].attr_gp.attrs[2] = NULL;
  2191. rc = sysfs_create_group(vdd_rstr_reg_kobj[i],
  2192. &rails[i].attr_gp);
  2193. if (rc) {
  2194. pr_err("cannot create attribute group for %s. err:%d\n",
  2195. rails[i].name, rc);
  2196. goto thermal_sysfs_add_exit;
  2197. }
  2198. }
  2199. return rc;
  2200. thermal_sysfs_add_exit:
  2201. if (rc) {
  2202. for (i = 0; i < rails_cnt; i++) {
  2203. kobject_del(vdd_rstr_reg_kobj[i]);
  2204. kfree(rails[i].attr_gp.attrs);
  2205. }
  2206. if (vdd_rstr_kobj)
  2207. kobject_del(vdd_rstr_kobj);
  2208. }
  2209. return rc;
  2210. }
  2211. static int msm_thermal_add_ocr_nodes(void)
  2212. {
  2213. struct kobject *module_kobj = NULL;
  2214. struct kobject *ocr_kobj = NULL;
  2215. struct kobject *ocr_reg_kobj[MAX_RAILS] = {0};
  2216. int rc = 0;
  2217. int i = 0;
  2218. if (!ocr_probed) {
  2219. ocr_nodes_called = true;
  2220. return rc;
  2221. }
  2222. if (ocr_probed && ocr_rail_cnt == 0)
  2223. return rc;
  2224. module_kobj = kset_find_obj(module_kset, KBUILD_MODNAME);
  2225. if (!module_kobj) {
  2226. pr_err("%s: cannot find kobject for module %s\n",
  2227. __func__, KBUILD_MODNAME);
  2228. rc = -ENOENT;
  2229. goto ocr_node_exit;
  2230. }
  2231. ocr_kobj = kobject_create_and_add("opt_curr_req", module_kobj);
  2232. if (!ocr_kobj) {
  2233. pr_err("%s: cannot create ocr kobject\n", KBUILD_MODNAME);
  2234. rc = -ENOMEM;
  2235. goto ocr_node_exit;
  2236. }
  2237. for (i = 0; i < ocr_rail_cnt; i++) {
  2238. ocr_reg_kobj[i] = kobject_create_and_add(ocr_rails[i].name,
  2239. ocr_kobj);
  2240. if (!ocr_reg_kobj[i]) {
  2241. pr_err("%s: cannot create for kobject for %s\n",
  2242. KBUILD_MODNAME, ocr_rails[i].name);
  2243. rc = -ENOMEM;
  2244. goto ocr_node_exit;
  2245. }
  2246. ocr_rails[i].attr_gp.attrs = kzalloc( \
  2247. sizeof(struct attribute *) * 2, GFP_KERNEL);
  2248. if (!ocr_rails[i].attr_gp.attrs) {
  2249. rc = -ENOMEM;
  2250. goto ocr_node_exit;
  2251. }
  2252. OCR_RW_ATTRIB(ocr_rails[i], ocr_rails[i].mode_attr, 0, mode);
  2253. ocr_rails[i].attr_gp.attrs[1] = NULL;
  2254. rc = sysfs_create_group(ocr_reg_kobj[i], &ocr_rails[i].attr_gp);
  2255. if (rc) {
  2256. pr_err("%s: cannot create attribute group for %s\n",
  2257. KBUILD_MODNAME, ocr_rails[i].name);
  2258. goto ocr_node_exit;
  2259. }
  2260. }
  2261. ocr_node_exit:
  2262. if (rc) {
  2263. for (i = 0; i < ocr_rail_cnt; i++) {
  2264. if (ocr_reg_kobj[i])
  2265. kobject_del(ocr_reg_kobj[i]);
  2266. if (ocr_rails[i].attr_gp.attrs) {
  2267. kfree(ocr_rails[i].attr_gp.attrs);
  2268. ocr_rails[i].attr_gp.attrs = NULL;
  2269. }
  2270. }
  2271. if (ocr_kobj)
  2272. kobject_del(ocr_kobj);
  2273. }
  2274. return rc;
  2275. }
  2276. static int msm_thermal_add_psm_nodes(void)
  2277. {
  2278. struct kobject *module_kobj = NULL;
  2279. struct kobject *psm_kobj = NULL;
  2280. struct kobject *psm_reg_kobj[MAX_RAILS] = {0};
  2281. int rc = 0;
  2282. int i = 0;
  2283. if (!psm_probed) {
  2284. psm_nodes_called = true;
  2285. return rc;
  2286. }
  2287. if (psm_probed && psm_rails_cnt == 0)
  2288. return rc;
  2289. module_kobj = kset_find_obj(module_kset, KBUILD_MODNAME);
  2290. if (!module_kobj) {
  2291. pr_err("cannot find kobject\n");
  2292. rc = -ENOENT;
  2293. goto psm_node_exit;
  2294. }
  2295. psm_kobj = kobject_create_and_add("pmic_sw_mode", module_kobj);
  2296. if (!psm_kobj) {
  2297. pr_err("cannot create psm kobject\n");
  2298. rc = -ENOMEM;
  2299. goto psm_node_exit;
  2300. }
  2301. for (i = 0; i < psm_rails_cnt; i++) {
  2302. psm_reg_kobj[i] = kobject_create_and_add(psm_rails[i].name,
  2303. psm_kobj);
  2304. if (!psm_reg_kobj[i]) {
  2305. pr_err("cannot create kobject for %s\n",
  2306. psm_rails[i].name);
  2307. rc = -ENOMEM;
  2308. goto psm_node_exit;
  2309. }
  2310. psm_rails[i].attr_gp.attrs = kzalloc( \
  2311. sizeof(struct attribute *) * 2, GFP_KERNEL);
  2312. if (!psm_rails[i].attr_gp.attrs) {
  2313. pr_err("kzalloc failed\n");
  2314. rc = -ENOMEM;
  2315. goto psm_node_exit;
  2316. }
  2317. PSM_RW_ATTRIB(psm_rails[i], psm_rails[i].mode_attr, 0, mode);
  2318. psm_rails[i].attr_gp.attrs[1] = NULL;
  2319. rc = sysfs_create_group(psm_reg_kobj[i], &psm_rails[i].attr_gp);
  2320. if (rc) {
  2321. pr_err("cannot create attribute group for %s. err:%d\n",
  2322. psm_rails[i].name, rc);
  2323. goto psm_node_exit;
  2324. }
  2325. }
  2326. return rc;
  2327. psm_node_exit:
  2328. if (rc) {
  2329. for (i = 0; i < psm_rails_cnt; i++) {
  2330. kobject_del(psm_reg_kobj[i]);
  2331. kfree(psm_rails[i].attr_gp.attrs);
  2332. }
  2333. if (psm_kobj)
  2334. kobject_del(psm_kobj);
  2335. }
  2336. return rc;
  2337. }
  2338. static int probe_vdd_rstr(struct device_node *node,
  2339. struct msm_thermal_data *data, struct platform_device *pdev)
  2340. {
  2341. int ret = 0;
  2342. int i = 0;
  2343. int arr_size;
  2344. char *key = NULL;
  2345. struct device_node *child_node = NULL;
  2346. rails = NULL;
  2347. key = "qcom,vdd-restriction-temp";
  2348. ret = of_property_read_u32(node, key, &data->vdd_rstr_temp_degC);
  2349. if (ret)
  2350. goto read_node_fail;
  2351. key = "qcom,vdd-restriction-temp-hysteresis";
  2352. ret = of_property_read_u32(node, key, &data->vdd_rstr_temp_hyst_degC);
  2353. if (ret)
  2354. goto read_node_fail;
  2355. for_each_child_of_node(node, child_node) {
  2356. rails_cnt++;
  2357. }
  2358. if (rails_cnt == 0)
  2359. goto read_node_fail;
  2360. if (rails_cnt >= MAX_RAILS) {
  2361. pr_err("Too many rails:%d.\n", rails_cnt);
  2362. return -EFAULT;
  2363. }
  2364. rails = kzalloc(sizeof(struct rail) * rails_cnt,
  2365. GFP_KERNEL);
  2366. if (!rails) {
  2367. pr_err("Fail to allocate memory for rails.\n");
  2368. return -ENOMEM;
  2369. }
  2370. i = 0;
  2371. for_each_child_of_node(node, child_node) {
  2372. key = "qcom,vdd-rstr-reg";
  2373. ret = of_property_read_string(child_node, key, &rails[i].name);
  2374. if (ret)
  2375. goto read_node_fail;
  2376. key = "qcom,levels";
  2377. if (!of_get_property(child_node, key, &arr_size))
  2378. goto read_node_fail;
  2379. rails[i].num_levels = arr_size/sizeof(__be32);
  2380. if (rails[i].num_levels >
  2381. sizeof(rails[i].levels)/sizeof(uint32_t)) {
  2382. pr_err("Array size:%d too large for index:%d\n",
  2383. rails[i].num_levels, i);
  2384. return -EFAULT;
  2385. }
  2386. ret = of_property_read_u32_array(child_node, key,
  2387. rails[i].levels, rails[i].num_levels);
  2388. if (ret)
  2389. goto read_node_fail;
  2390. key = "qcom,freq-req";
  2391. rails[i].freq_req = of_property_read_bool(child_node, key);
  2392. if (rails[i].freq_req)
  2393. rails[i].min_level = 0;
  2394. else {
  2395. key = "qcom,min-level";
  2396. ret = of_property_read_u32(child_node, key,
  2397. &rails[i].min_level);
  2398. if (ret)
  2399. goto read_node_fail;
  2400. }
  2401. rails[i].curr_level = -1;
  2402. rails[i].reg = NULL;
  2403. i++;
  2404. }
  2405. if (rails_cnt) {
  2406. ret = vdd_restriction_reg_init(pdev);
  2407. if (ret) {
  2408. pr_err("Err regulator init. err:%d. KTM continues.\n",
  2409. ret);
  2410. goto read_node_fail;
  2411. }
  2412. ret = init_threshold(MSM_VDD_RESTRICTION, MONITOR_ALL_TSENS,
  2413. data->vdd_rstr_temp_hyst_degC, data->vdd_rstr_temp_degC,
  2414. vdd_restriction_notify);
  2415. if (ret) {
  2416. pr_err("Error in initializing thresholds. err:%d\n",
  2417. ret);
  2418. goto read_node_fail;
  2419. }
  2420. vdd_rstr_enabled = true;
  2421. }
  2422. read_node_fail:
  2423. vdd_rstr_probed = true;
  2424. if (ret) {
  2425. dev_info(&pdev->dev,
  2426. "%s:Failed reading node=%s, key=%s. err=%d. KTM continues\n",
  2427. __func__, node->full_name, key, ret);
  2428. kfree(rails);
  2429. rails_cnt = 0;
  2430. }
  2431. if (ret == -EPROBE_DEFER)
  2432. vdd_rstr_probed = false;
  2433. return ret;
  2434. }
  2435. static int get_efuse_temp_map(struct device_node *node,
  2436. int *efuse_values,
  2437. int *efuse_temp)
  2438. {
  2439. uint32_t i, j, efuse_arr_cnt = 0;
  2440. int ret = 0, efuse_map_cnt = 0;
  2441. uint32_t data[2 * MAX_EFUSE_VALUE];
  2442. char *key = "qcom,efuse-temperature-map";
  2443. if (!of_get_property(node, key, &efuse_map_cnt)
  2444. || efuse_map_cnt <= 0) {
  2445. pr_debug("Property %s not defined.\n", key);
  2446. return -ENODEV;
  2447. }
  2448. if (efuse_map_cnt % (sizeof(__be32) * 2)) {
  2449. pr_err("Invalid number(%d) of entry for %s\n",
  2450. efuse_map_cnt, key);
  2451. return -EINVAL;
  2452. }
  2453. efuse_arr_cnt = efuse_map_cnt / sizeof(__be32);
  2454. ret = of_property_read_u32_array(node, key, data, efuse_arr_cnt);
  2455. if (ret)
  2456. return -EINVAL;
  2457. efuse_map_cnt /= (sizeof(__be32) * 2);
  2458. j = 0;
  2459. for (i = 0; i < efuse_map_cnt; i++) {
  2460. efuse_values[i] = data[j++];
  2461. efuse_temp[i] = data[j++];
  2462. }
  2463. return efuse_map_cnt;
  2464. }
  2465. static int probe_thermal_efuse_read(struct device_node *node,
  2466. struct msm_thermal_data *data,
  2467. struct platform_device *pdev)
  2468. {
  2469. u64 efuse_bits;
  2470. int ret = 0;
  2471. int i = 0;
  2472. int efuse_map_cnt = 0;
  2473. int efuse_data_cnt = 0;
  2474. char *key = NULL;
  2475. void __iomem *efuse_base = NULL;
  2476. uint32_t efuse_data[EFUSE_DATA_MAX] = {0};
  2477. uint32_t efuse_values[MAX_EFUSE_VALUE] = {0};
  2478. uint32_t efuse_temp[MAX_EFUSE_VALUE] = {0};
  2479. uint32_t default_temp = 0;
  2480. uint8_t thermal_efuse_data = 0;
  2481. if (default_temp_limit_probed)
  2482. goto read_efuse_exit;
  2483. key = "qcom,default-temp";
  2484. if (of_property_read_u32(node, key, &default_temp))
  2485. default_temp = 0;
  2486. default_cpu_temp_limit = default_temp;
  2487. key = "qcom,efuse-data";
  2488. if (!of_get_property(node, key, &efuse_data_cnt) ||
  2489. efuse_data_cnt <= 0) {
  2490. ret = -ENODEV;
  2491. goto read_efuse_fail;
  2492. }
  2493. efuse_data_cnt /= sizeof(__be32);
  2494. if (efuse_data_cnt != EFUSE_DATA_MAX) {
  2495. pr_err("Invalid number of efuse data. data cnt %d\n",
  2496. efuse_data_cnt);
  2497. ret = -EINVAL;
  2498. goto read_efuse_fail;
  2499. }
  2500. ret = of_property_read_u32_array(node, key, efuse_data,
  2501. efuse_data_cnt);
  2502. if (ret)
  2503. goto read_efuse_fail;
  2504. if (efuse_data[EFUSE_ADDRESS] == 0 ||
  2505. efuse_data[EFUSE_SIZE] == 0 ||
  2506. efuse_data[EFUSE_BIT_MASK] == 0) {
  2507. pr_err("Invalid efuse data: address:%x len:%d bitmask%x\n",
  2508. efuse_data[EFUSE_ADDRESS], efuse_data[EFUSE_SIZE],
  2509. efuse_data[EFUSE_BIT_MASK]);
  2510. ret = -EINVAL;
  2511. goto read_efuse_fail;
  2512. }
  2513. efuse_map_cnt = get_efuse_temp_map(node, efuse_values,
  2514. efuse_temp);
  2515. if (efuse_map_cnt <= 0 ||
  2516. efuse_map_cnt > (efuse_data[EFUSE_BIT_MASK] + 1)) {
  2517. pr_err("Invalid efuse-temperature-map. cnt%d\n",
  2518. efuse_map_cnt);
  2519. ret = -EINVAL;
  2520. goto read_efuse_fail;
  2521. }
  2522. efuse_base = ioremap(efuse_data[EFUSE_ADDRESS], efuse_data[EFUSE_SIZE]);
  2523. if (!efuse_base) {
  2524. pr_err("Unable to map efuse_addr:%x with size%d\n",
  2525. efuse_data[EFUSE_ADDRESS],
  2526. efuse_data[EFUSE_SIZE]);
  2527. ret = -EINVAL;
  2528. goto read_efuse_fail;
  2529. }
  2530. efuse_bits = readll_relaxed(efuse_base
  2531. + efuse_data[EFUSE_ROW] * BYTES_PER_FUSE_ROW);
  2532. thermal_efuse_data = (efuse_bits >> efuse_data[EFUSE_START_BIT]) &
  2533. efuse_data[EFUSE_BIT_MASK];
  2534. /* Get cpu limit temp from efuse truth table */
  2535. for (; i < efuse_map_cnt; i++) {
  2536. if (efuse_values[i] == thermal_efuse_data) {
  2537. default_cpu_temp_limit = efuse_temp[i];
  2538. break;
  2539. }
  2540. }
  2541. if (i >= efuse_map_cnt) {
  2542. if (!default_temp) {
  2543. pr_err("No matching efuse value. value:%d\n",
  2544. thermal_efuse_data);
  2545. ret = -EINVAL;
  2546. goto read_efuse_fail;
  2547. }
  2548. }
  2549. pr_debug(
  2550. "Efuse address:0x%x [row:%d] = 0x%llx @%d:mask:0x%x = 0x%x temp:%d\n",
  2551. efuse_data[EFUSE_ADDRESS], efuse_data[EFUSE_ROW], efuse_bits,
  2552. efuse_data[EFUSE_START_BIT], efuse_data[EFUSE_BIT_MASK],
  2553. thermal_efuse_data, default_cpu_temp_limit);
  2554. default_temp_limit_enabled = true;
  2555. read_efuse_fail:
  2556. if (efuse_base)
  2557. iounmap(efuse_base);
  2558. default_temp_limit_probed = true;
  2559. if (ret) {
  2560. if (!default_temp) {
  2561. dev_info(&pdev->dev,
  2562. "%s:Failed reading node=%s, key=%s. KTM continues\n",
  2563. __func__, node->full_name, key);
  2564. } else {
  2565. default_temp_limit_enabled = true;
  2566. pr_debug("Default cpu temp limit is %d\n",
  2567. default_cpu_temp_limit);
  2568. ret = 0;
  2569. }
  2570. }
  2571. read_efuse_exit:
  2572. return ret;
  2573. }
  2574. static int probe_ocr(struct device_node *node, struct msm_thermal_data *data,
  2575. struct platform_device *pdev)
  2576. {
  2577. int ret = 0;
  2578. int j = 0;
  2579. char *key = NULL;
  2580. if (ocr_probed) {
  2581. pr_info("%s: Nodes already probed\n",
  2582. __func__);
  2583. goto read_ocr_exit;
  2584. }
  2585. ocr_rails = NULL;
  2586. key = "qti,pmic-opt-curr-temp";
  2587. ret = of_property_read_u32(node, key, &data->ocr_temp_degC);
  2588. if (ret)
  2589. goto read_ocr_fail;
  2590. key = "qti,pmic-opt-curr-temp-hysteresis";
  2591. ret = of_property_read_u32(node, key, &data->ocr_temp_hyst_degC);
  2592. if (ret)
  2593. goto read_ocr_fail;
  2594. key = "qti,pmic-opt-curr-regs";
  2595. ocr_rail_cnt = of_property_count_strings(node, key);
  2596. ocr_rails = kzalloc(sizeof(struct psm_rail) * ocr_rail_cnt,
  2597. GFP_KERNEL);
  2598. if (!ocr_rails) {
  2599. pr_err("%s: Fail to allocate memory for ocr rails\n", __func__);
  2600. ocr_rail_cnt = 0;
  2601. return -ENOMEM;
  2602. }
  2603. for (j = 0; j < ocr_rail_cnt; j++) {
  2604. ret = of_property_read_string_index(node, key, j,
  2605. &ocr_rails[j].name);
  2606. if (ret)
  2607. goto read_ocr_fail;
  2608. ocr_rails[j].phase_reg = NULL;
  2609. ocr_rails[j].init = OPTIMUM_CURRENT_MAX;
  2610. }
  2611. if (ocr_rail_cnt) {
  2612. ret = ocr_reg_init(pdev);
  2613. if (ret) {
  2614. pr_info("%s:Failed to get regulators. KTM continues.\n",
  2615. __func__);
  2616. goto read_ocr_fail;
  2617. }
  2618. ocr_enabled = true;
  2619. ocr_nodes_called = false;
  2620. /*
  2621. * Vote for max optimum current by default until we have made
  2622. * our first temp reading
  2623. */
  2624. if (ocr_set_mode_all(OPTIMUM_CURRENT_MAX))
  2625. pr_err("Set max optimum current failed\n");
  2626. }
  2627. read_ocr_fail:
  2628. ocr_probed = true;
  2629. if (ret) {
  2630. dev_info(&pdev->dev,
  2631. "%s:Failed reading node=%s, key=%s. KTM continues\n",
  2632. __func__, node->full_name, key);
  2633. if (ocr_rails)
  2634. kfree(ocr_rails);
  2635. ocr_rails = NULL;
  2636. ocr_rail_cnt = 0;
  2637. }
  2638. if (ret == -EPROBE_DEFER)
  2639. ocr_probed = false;
  2640. read_ocr_exit:
  2641. return ret;
  2642. }
  2643. static int probe_psm(struct device_node *node, struct msm_thermal_data *data,
  2644. struct platform_device *pdev)
  2645. {
  2646. int ret = 0;
  2647. int j = 0;
  2648. char *key = NULL;
  2649. psm_rails = NULL;
  2650. key = "qcom,pmic-sw-mode-temp";
  2651. ret = of_property_read_u32(node, key, &data->psm_temp_degC);
  2652. if (ret)
  2653. goto read_node_fail;
  2654. key = "qcom,pmic-sw-mode-temp-hysteresis";
  2655. ret = of_property_read_u32(node, key, &data->psm_temp_hyst_degC);
  2656. if (ret)
  2657. goto read_node_fail;
  2658. key = "qcom,pmic-sw-mode-regs";
  2659. psm_rails_cnt = of_property_count_strings(node, key);
  2660. psm_rails = kzalloc(sizeof(struct psm_rail) * psm_rails_cnt,
  2661. GFP_KERNEL);
  2662. if (!psm_rails) {
  2663. pr_err("Fail to allocate memory for psm rails\n");
  2664. psm_rails_cnt = 0;
  2665. return -ENOMEM;
  2666. }
  2667. for (j = 0; j < psm_rails_cnt; j++) {
  2668. ret = of_property_read_string_index(node, key, j,
  2669. &psm_rails[j].name);
  2670. if (ret)
  2671. goto read_node_fail;
  2672. }
  2673. if (psm_rails_cnt) {
  2674. ret = psm_reg_init(pdev);
  2675. if (ret) {
  2676. pr_err("Err regulator init. err:%d. KTM continues.\n",
  2677. ret);
  2678. goto read_node_fail;
  2679. }
  2680. psm_enabled = true;
  2681. }
  2682. read_node_fail:
  2683. psm_probed = true;
  2684. if (ret) {
  2685. dev_info(&pdev->dev,
  2686. "%s:Failed reading node=%s, key=%s. err=%d. KTM continues\n",
  2687. __func__, node->full_name, key, ret);
  2688. kfree(psm_rails);
  2689. psm_rails_cnt = 0;
  2690. }
  2691. if (ret == -EPROBE_DEFER)
  2692. psm_probed = false;
  2693. return ret;
  2694. }
  2695. static int probe_cc(struct device_node *node, struct msm_thermal_data *data,
  2696. struct platform_device *pdev)
  2697. {
  2698. char *key = NULL;
  2699. uint32_t cpu_cnt = 0;
  2700. int ret = 0;
  2701. uint32_t cpu = 0;
  2702. if (num_possible_cpus() > 1) {
  2703. core_control_enabled = 1;
  2704. hotplug_enabled = 1;
  2705. }
  2706. key = "qcom,core-limit-temp";
  2707. ret = of_property_read_u32(node, key, &data->core_limit_temp_degC);
  2708. if (ret)
  2709. goto read_node_fail;
  2710. key = "qcom,core-temp-hysteresis";
  2711. ret = of_property_read_u32(node, key, &data->core_temp_hysteresis_degC);
  2712. if (ret)
  2713. goto read_node_fail;
  2714. key = "qcom,core-control-mask";
  2715. ret = of_property_read_u32(node, key, &data->core_control_mask);
  2716. if (ret)
  2717. goto read_node_fail;
  2718. key = "qcom,hotplug-temp";
  2719. ret = of_property_read_u32(node, key, &data->hotplug_temp_degC);
  2720. if (ret)
  2721. goto hotplug_node_fail;
  2722. key = "qcom,hotplug-temp-hysteresis";
  2723. ret = of_property_read_u32(node, key,
  2724. &data->hotplug_temp_hysteresis_degC);
  2725. if (ret)
  2726. goto hotplug_node_fail;
  2727. key = "qcom,cpu-sensors";
  2728. cpu_cnt = of_property_count_strings(node, key);
  2729. if (cpu_cnt < num_possible_cpus()) {
  2730. pr_err("Wrong number of cpu sensors:%d\n", cpu_cnt);
  2731. ret = -EINVAL;
  2732. goto hotplug_node_fail;
  2733. }
  2734. for_each_possible_cpu(cpu) {
  2735. ret = of_property_read_string_index(node, key, cpu,
  2736. &cpus[cpu].sensor_type);
  2737. if (ret)
  2738. goto hotplug_node_fail;
  2739. }
  2740. read_node_fail:
  2741. if (ret) {
  2742. dev_info(&pdev->dev,
  2743. "%s:Failed reading node=%s, key=%s. err=%d. KTM continues\n",
  2744. KBUILD_MODNAME, node->full_name, key, ret);
  2745. core_control_enabled = 0;
  2746. }
  2747. return ret;
  2748. hotplug_node_fail:
  2749. if (ret) {
  2750. dev_info(&pdev->dev,
  2751. "%s:Failed reading node=%s, key=%s. err=%d. KTM continues\n",
  2752. KBUILD_MODNAME, node->full_name, key, ret);
  2753. hotplug_enabled = 0;
  2754. }
  2755. return ret;
  2756. }
  2757. static int probe_therm_reset(struct device_node *node,
  2758. struct msm_thermal_data *data,
  2759. struct platform_device *pdev)
  2760. {
  2761. char *key = NULL;
  2762. int ret = 0;
  2763. key = "qcom,therm-reset-temp";
  2764. ret = of_property_read_u32(node, key, &data->therm_reset_temp_degC);
  2765. if (ret)
  2766. goto PROBE_RESET_EXIT;
  2767. ret = init_threshold(MSM_THERM_RESET, MONITOR_ALL_TSENS,
  2768. data->therm_reset_temp_degC, data->therm_reset_temp_degC - 10,
  2769. therm_reset_notify);
  2770. if (ret) {
  2771. pr_err("Therm reset data structure init failed\n");
  2772. goto PROBE_RESET_EXIT;
  2773. }
  2774. therm_reset_enabled = true;
  2775. PROBE_RESET_EXIT:
  2776. if (ret) {
  2777. dev_info(&pdev->dev,
  2778. "%s:Failed reading node=%s, key=%s err=%d. KTM continues\n",
  2779. __func__, node->full_name, key, ret);
  2780. therm_reset_enabled = false;
  2781. }
  2782. return ret;
  2783. }
  2784. static int probe_freq_mitigation(struct device_node *node,
  2785. struct msm_thermal_data *data,
  2786. struct platform_device *pdev)
  2787. {
  2788. char *key = NULL;
  2789. int ret = 0;
  2790. key = "qcom,freq-mitigation-temp";
  2791. ret = of_property_read_u32(node, key, &data->freq_mitig_temp_degc);
  2792. if (ret)
  2793. goto PROBE_FREQ_EXIT;
  2794. key = "qcom,freq-mitigation-temp-hysteresis";
  2795. ret = of_property_read_u32(node, key,
  2796. &data->freq_mitig_temp_hysteresis_degc);
  2797. if (ret)
  2798. goto PROBE_FREQ_EXIT;
  2799. key = "qcom,freq-mitigation-value";
  2800. ret = of_property_read_u32(node, key, &data->freq_limit);
  2801. if (ret)
  2802. goto PROBE_FREQ_EXIT;
  2803. key = "qcom,freq-mitigation-control-mask";
  2804. ret = of_property_read_u32(node, key, &data->freq_mitig_control_mask);
  2805. if (ret)
  2806. goto PROBE_FREQ_EXIT;
  2807. freq_mitigation_enabled = 1;
  2808. PROBE_FREQ_EXIT:
  2809. if (ret) {
  2810. dev_info(&pdev->dev,
  2811. "%s:Failed reading node=%s, key=%s. err=%d. KTM continues\n",
  2812. __func__, node->full_name, key, ret);
  2813. freq_mitigation_enabled = 0;
  2814. }
  2815. return ret;
  2816. }
  2817. static int __devinit msm_thermal_dev_probe(struct platform_device *pdev)
  2818. {
  2819. int ret = 0;
  2820. char *key = NULL;
  2821. struct device_node *node = pdev->dev.of_node;
  2822. struct msm_thermal_data data;
  2823. memset(&data, 0, sizeof(struct msm_thermal_data));
  2824. ret = msm_thermal_pre_init();
  2825. if (ret) {
  2826. pr_err("thermal pre init failed. err:%d\n", ret);
  2827. goto fail;
  2828. }
  2829. key = "qcom,sensor-id";
  2830. ret = of_property_read_u32(node, key, &data.sensor_id);
  2831. if (ret)
  2832. goto fail;
  2833. key = "qcom,poll-ms";
  2834. ret = of_property_read_u32(node, key, &data.poll_ms);
  2835. if (ret)
  2836. goto fail;
  2837. key = "qcom,limit-temp";
  2838. ret = of_property_read_u32(node, key, &data.limit_temp_degC);
  2839. if (ret)
  2840. goto fail;
  2841. key = "qcom,temp-hysteresis";
  2842. ret = of_property_read_u32(node, key, &data.temp_hysteresis_degC);
  2843. if (ret)
  2844. goto fail;
  2845. key = "qcom,freq-step";
  2846. ret = of_property_read_u32(node, key, &data.bootup_freq_step);
  2847. if (ret)
  2848. goto fail;
  2849. key = "qcom,freq-control-mask";
  2850. ret = of_property_read_u32(node, key, &data.bootup_freq_control_mask);
  2851. ret = probe_cc(node, &data, pdev);
  2852. ret = probe_freq_mitigation(node, &data, pdev);
  2853. ret = probe_therm_reset(node, &data, pdev);
  2854. /*
  2855. * Probe optional properties below. Call probe_psm before
  2856. * probe_vdd_rstr because rpm_regulator_get has to be called
  2857. * before devm_regulator_get
  2858. * probe_ocr should be called after probe_vdd_rstr to reuse the
  2859. * regualtor handle. calling devm_regulator_get more than once
  2860. * will fail.
  2861. */
  2862. ret = probe_psm(node, &data, pdev);
  2863. if (ret == -EPROBE_DEFER)
  2864. goto fail;
  2865. ret = probe_vdd_rstr(node, &data, pdev);
  2866. if (ret == -EPROBE_DEFER)
  2867. goto fail;
  2868. ret = probe_ocr(node, &data, pdev);
  2869. if (ret == -EPROBE_DEFER)
  2870. goto fail;
  2871. probe_thermal_efuse_read(node, &data, pdev);
  2872. /*
  2873. * In case sysfs add nodes get called before probe function.
  2874. * Need to make sure sysfs node is created again
  2875. */
  2876. if (psm_nodes_called) {
  2877. ret = msm_thermal_add_psm_nodes();
  2878. if (ret)
  2879. pr_err("%s:%d msm_thermal_add_psm_nodes err",
  2880. __func__, __LINE__);
  2881. psm_nodes_called = false;
  2882. }
  2883. if (vdd_rstr_nodes_called) {
  2884. ret = msm_thermal_add_vdd_rstr_nodes();
  2885. if (ret)
  2886. pr_err("%s:%d msm_thermal_add_vdd_rstr_nodes err",
  2887. __func__, __LINE__);
  2888. vdd_rstr_nodes_called = false;
  2889. }
  2890. if (ocr_nodes_called) {
  2891. msm_thermal_add_ocr_nodes();
  2892. ocr_nodes_called = false;
  2893. }
  2894. if (default_temp_limit_nodes_called) {
  2895. msm_thermal_add_default_temp_limit_nodes();
  2896. default_temp_limit_nodes_called = false;
  2897. }
  2898. msm_thermal_ioctl_init();
  2899. ret = msm_thermal_init(&data);
  2900. msm_thermal_probed = true;
  2901. if (interrupt_mode_enable) {
  2902. interrupt_mode_init();
  2903. interrupt_mode_enable = false;
  2904. }
  2905. return ret;
  2906. fail:
  2907. if (ret)
  2908. pr_err("Failed reading node=%s, key=%s. err:%d\n",
  2909. node->full_name, key, ret);
  2910. return ret;
  2911. }
  2912. static int msm_thermal_dev_exit(struct platform_device *inp_dev)
  2913. {
  2914. msm_thermal_ioctl_cleanup();
  2915. if (thresh) {
  2916. if (vdd_rstr_enabled)
  2917. kfree(thresh[MSM_VDD_RESTRICTION].thresh_list);
  2918. kfree(thresh);
  2919. thresh = NULL;
  2920. }
  2921. cancel_delayed_work_sync(&temp_log_work);
  2922. return 0;
  2923. }
  2924. static struct of_device_id msm_thermal_match_table[] = {
  2925. {.compatible = "qcom,msm-thermal"},
  2926. {},
  2927. };
  2928. static struct platform_driver msm_thermal_device_driver = {
  2929. .probe = msm_thermal_dev_probe,
  2930. .driver = {
  2931. .name = "msm-thermal",
  2932. .owner = THIS_MODULE,
  2933. .of_match_table = msm_thermal_match_table,
  2934. },
  2935. .remove = msm_thermal_dev_exit,
  2936. };
  2937. int __init msm_thermal_device_init(void)
  2938. {
  2939. INIT_DELAYED_WORK(&temp_log_work, msm_therm_temp_log);
  2940. schedule_delayed_work(&temp_log_work, HZ*2);
  2941. return platform_driver_register(&msm_thermal_device_driver);
  2942. }
  2943. int __init msm_thermal_late_init(void)
  2944. {
  2945. if (num_possible_cpus() > 1)
  2946. msm_thermal_add_cc_nodes();
  2947. msm_thermal_add_psm_nodes();
  2948. msm_thermal_add_vdd_rstr_nodes();
  2949. msm_thermal_add_ocr_nodes();
  2950. msm_thermal_add_default_temp_limit_nodes();
  2951. hrtimer_init(&thermal_rtc_hrtimer,
  2952. CLOCK_BOOTTIME,
  2953. HRTIMER_MODE_ABS);
  2954. thermal_rtc_hrtimer.function=
  2955. &thermal_rtc_callback;
  2956. INIT_WORK(&timer_work, timer_work_fn);
  2957. msm_thermal_add_timer_nodes();
  2958. interrupt_mode_init();
  2959. return 0;
  2960. }
  2961. late_initcall(msm_thermal_late_init);