msm8960_tsens.c 31 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. /*
  14. * Qualcomm MSM8960 TSENS driver
  15. *
  16. */
  17. #include <linux/module.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/thermal.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/delay.h>
  22. #include <linux/slab.h>
  23. #include <linux/msm_tsens.h>
  24. #include <linux/io.h>
  25. #include <linux/err.h>
  26. #include <linux/pm.h>
  27. #include <mach/msm_iomap.h>
  28. #include <mach/socinfo.h>
  29. /* Trips: from very hot to very cold */
  30. enum tsens_trip_type {
  31. TSENS_TRIP_STAGE3 = 0,
  32. TSENS_TRIP_STAGE2,
  33. TSENS_TRIP_STAGE1,
  34. TSENS_TRIP_STAGE0,
  35. TSENS_TRIP_NUM,
  36. };
  37. /* MSM8960 TSENS register info */
  38. #define TSENS_CAL_DEGC 30
  39. #define TSENS_MAIN_SENSOR 0
  40. #define TSENS_8960_QFPROM_ADDR0 (MSM_QFPROM_BASE + 0x00000404)
  41. #define TSENS_8960_QFPROM_SPARE_ADDR0 (MSM_QFPROM_BASE + 0x00000414)
  42. #define TSENS_8960_CONFIG 0x9b
  43. #define TSENS_8960_CONFIG_SHIFT 0
  44. #define TSENS_8960_CONFIG_MASK (0xf << TSENS_8960_CONFIG_SHIFT)
  45. #define TSENS_CNTL_ADDR (MSM_CLK_CTL_BASE + 0x00003620)
  46. #define TSENS_EN BIT(0)
  47. #define TSENS_SW_RST BIT(1)
  48. #define TSENS_ADC_CLK_SEL BIT(2)
  49. #define SENSOR0_EN BIT(3)
  50. #define SENSOR1_EN BIT(4)
  51. #define SENSOR2_EN BIT(5)
  52. #define SENSOR3_EN BIT(6)
  53. #define SENSOR4_EN BIT(7)
  54. #define SENSORS_EN (SENSOR0_EN | SENSOR1_EN | \
  55. SENSOR2_EN | SENSOR3_EN | SENSOR4_EN)
  56. #define TSENS_STATUS_CNTL_OFFSET 8
  57. #define TSENS_MIN_STATUS_MASK BIT((tsens_status_cntl_start))
  58. #define TSENS_LOWER_STATUS_CLR BIT((tsens_status_cntl_start + 1))
  59. #define TSENS_UPPER_STATUS_CLR BIT((tsens_status_cntl_start + 2))
  60. #define TSENS_MAX_STATUS_MASK BIT((tsens_status_cntl_start + 3))
  61. #define TSENS_MEASURE_PERIOD 1
  62. #define TSENS_8960_SLP_CLK_ENA BIT(26)
  63. #define TSENS_THRESHOLD_ADDR (MSM_CLK_CTL_BASE + 0x00003624)
  64. #define TSENS_THRESHOLD_MAX_CODE 0xff
  65. #define TSENS_THRESHOLD_MIN_CODE 0
  66. #define TSENS_THRESHOLD_MAX_LIMIT_SHIFT 24
  67. #define TSENS_THRESHOLD_MIN_LIMIT_SHIFT 16
  68. #define TSENS_THRESHOLD_UPPER_LIMIT_SHIFT 8
  69. #define TSENS_THRESHOLD_LOWER_LIMIT_SHIFT 0
  70. #define TSENS_THRESHOLD_MAX_LIMIT_MASK (TSENS_THRESHOLD_MAX_CODE << \
  71. TSENS_THRESHOLD_MAX_LIMIT_SHIFT)
  72. #define TSENS_THRESHOLD_MIN_LIMIT_MASK (TSENS_THRESHOLD_MAX_CODE << \
  73. TSENS_THRESHOLD_MIN_LIMIT_SHIFT)
  74. #define TSENS_THRESHOLD_UPPER_LIMIT_MASK (TSENS_THRESHOLD_MAX_CODE << \
  75. TSENS_THRESHOLD_UPPER_LIMIT_SHIFT)
  76. #define TSENS_THRESHOLD_LOWER_LIMIT_MASK (TSENS_THRESHOLD_MAX_CODE << \
  77. TSENS_THRESHOLD_LOWER_LIMIT_SHIFT)
  78. /* Initial temperature threshold values */
  79. #define TSENS_LOWER_LIMIT_TH 0x50
  80. #define TSENS_UPPER_LIMIT_TH 0xdf
  81. #define TSENS_MIN_LIMIT_TH 0x0
  82. #define TSENS_MAX_LIMIT_TH 0xff
  83. #define TSENS_S0_STATUS_ADDR (MSM_CLK_CTL_BASE + 0x00003628)
  84. #define TSENS_STATUS_ADDR_OFFSET 2
  85. #define TSENS_SENSOR_STATUS_SIZE 4
  86. #define TSENS_INT_STATUS_ADDR (MSM_CLK_CTL_BASE + 0x0000363c)
  87. #define TSENS_LOWER_INT_MASK BIT(1)
  88. #define TSENS_UPPER_INT_MASK BIT(2)
  89. #define TSENS_MAX_INT_MASK BIT(3)
  90. #define TSENS_TRDY_MASK BIT(7)
  91. #define TSENS_8960_CONFIG_ADDR (MSM_CLK_CTL_BASE + 0x00003640)
  92. #define TSENS_TRDY_RDY_MIN_TIME 1000
  93. #define TSENS_TRDY_RDY_MAX_TIME 1100
  94. #define TSENS_SENSOR_SHIFT 16
  95. #define TSENS_RED_SHIFT 8
  96. #define TSENS_8960_QFPROM_SHIFT 4
  97. #define TSENS_SENSOR_QFPROM_SHIFT 2
  98. #define TSENS_SENSOR0_SHIFT 3
  99. #define TSENS_MASK1 1
  100. #define TSENS_8660_QFPROM_ADDR (MSM_QFPROM_BASE + 0x000000bc)
  101. #define TSENS_8660_QFPROM_RED_TEMP_SENSOR0_SHIFT 24
  102. #define TSENS_8660_QFPROM_TEMP_SENSOR0_SHIFT 16
  103. #define TSENS_8660_QFPROM_TEMP_SENSOR0_MASK (255 \
  104. << TSENS_8660_QFPROM_TEMP_SENSOR0_SHIFT)
  105. #define TSENS_8660_CONFIG 01
  106. #define TSENS_8660_CONFIG_SHIFT 28
  107. #define TSENS_8660_CONFIG_MASK (3 << TSENS_8660_CONFIG_SHIFT)
  108. #define TSENS_8660_SLP_CLK_ENA BIT(24)
  109. #define TSENS_8064_SENSOR5_EN BIT(8)
  110. #define TSENS_8064_SENSOR6_EN BIT(9)
  111. #define TSENS_8064_SENSOR7_EN BIT(10)
  112. #define TSENS_8064_SENSOR8_EN BIT(11)
  113. #define TSENS_8064_SENSOR9_EN BIT(12)
  114. #define TSENS_8064_SENSOR10_EN BIT(13)
  115. #define TSENS_8064_SENSORS_EN (SENSORS_EN | \
  116. TSENS_8064_SENSOR5_EN | \
  117. TSENS_8064_SENSOR6_EN | \
  118. TSENS_8064_SENSOR7_EN | \
  119. TSENS_8064_SENSOR8_EN | \
  120. TSENS_8064_SENSOR9_EN | \
  121. TSENS_8064_SENSOR10_EN)
  122. #define TSENS_8064_STATUS_CNTL (MSM_CLK_CTL_BASE + 0x00003660)
  123. #define TSENS_8064_S5_STATUS_ADDR (MSM_CLK_CTL_BASE + 0x00003664)
  124. #define TSENS_8064_SEQ_SENSORS 5
  125. #define TSENS_8064_S4_S5_OFFSET 40
  126. #define TSENS_CNTL_RESUME_MASK 0xfffffff9
  127. #define TSENS_8960_SENSOR_MASK 0xf8
  128. #define TSENS_8064_SENSOR_MASK 0x3ff8
  129. static int tsens_status_cntl_start;
  130. struct tsens_tm_device_sensor {
  131. struct thermal_zone_device *tz_dev;
  132. enum thermal_device_mode mode;
  133. unsigned int sensor_num;
  134. struct work_struct work;
  135. int offset;
  136. int calib_data;
  137. int calib_data_backup;
  138. uint32_t slope_mul_tsens_factor;
  139. };
  140. struct tsens_tm_device {
  141. bool prev_reading_avail;
  142. int tsens_factor;
  143. uint32_t tsens_num_sensor;
  144. enum platform_type hw_type;
  145. int pm_tsens_thr_data;
  146. int pm_tsens_cntl;
  147. struct work_struct tsens_work;
  148. struct tsens_tm_device_sensor sensor[0];
  149. };
  150. struct tsens_tm_device *tmdev;
  151. /* Temperature on y axis and ADC-code on x-axis */
  152. static int tsens_tz_code_to_degC(int adc_code, int sensor_num)
  153. {
  154. int degcbeforefactor, degc;
  155. degcbeforefactor = (adc_code *
  156. tmdev->sensor[sensor_num].slope_mul_tsens_factor
  157. + tmdev->sensor[sensor_num].offset);
  158. if (degcbeforefactor == 0)
  159. degc = degcbeforefactor;
  160. else if (degcbeforefactor > 0)
  161. degc = (degcbeforefactor + tmdev->tsens_factor/2)
  162. / tmdev->tsens_factor;
  163. else
  164. degc = (degcbeforefactor - tmdev->tsens_factor/2)
  165. / tmdev->tsens_factor;
  166. return degc;
  167. }
  168. static int tsens_tz_degC_to_code(int degC, int sensor_num)
  169. {
  170. int code = (degC * tmdev->tsens_factor -
  171. tmdev->sensor[sensor_num].offset
  172. + tmdev->sensor[sensor_num].slope_mul_tsens_factor/2)
  173. / tmdev->sensor[sensor_num].slope_mul_tsens_factor;
  174. if (code > TSENS_THRESHOLD_MAX_CODE)
  175. code = TSENS_THRESHOLD_MAX_CODE;
  176. else if (code < TSENS_THRESHOLD_MIN_CODE)
  177. code = TSENS_THRESHOLD_MIN_CODE;
  178. return code;
  179. }
  180. static void tsens8960_get_temp(int sensor_num, unsigned long *temp)
  181. {
  182. unsigned int code, offset = 0, sensor_addr;
  183. if (!tmdev->prev_reading_avail) {
  184. while (!(readl_relaxed(TSENS_INT_STATUS_ADDR)
  185. & TSENS_TRDY_MASK))
  186. usleep_range(TSENS_TRDY_RDY_MIN_TIME,
  187. TSENS_TRDY_RDY_MAX_TIME);
  188. tmdev->prev_reading_avail = true;
  189. }
  190. sensor_addr = (unsigned int)TSENS_S0_STATUS_ADDR;
  191. if (tmdev->hw_type == APQ_8064 &&
  192. sensor_num >= TSENS_8064_SEQ_SENSORS)
  193. offset = TSENS_8064_S4_S5_OFFSET;
  194. code = readl_relaxed(sensor_addr + offset +
  195. (sensor_num << TSENS_STATUS_ADDR_OFFSET));
  196. *temp = tsens_tz_code_to_degC(code, sensor_num);
  197. }
  198. static int tsens_tz_get_temp(struct thermal_zone_device *thermal,
  199. unsigned long *temp)
  200. {
  201. struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
  202. if (!tm_sensor || tm_sensor->mode != THERMAL_DEVICE_ENABLED || !temp)
  203. return -EINVAL;
  204. tsens8960_get_temp(tm_sensor->sensor_num, temp);
  205. return 0;
  206. }
  207. int tsens_get_temp(struct tsens_device *device, unsigned long *temp)
  208. {
  209. if (!tmdev)
  210. return -ENODEV;
  211. tsens8960_get_temp(device->sensor_num, temp);
  212. return 0;
  213. }
  214. EXPORT_SYMBOL(tsens_get_temp);
  215. int tsens_get_max_sensor_num(uint32_t *tsens_num_sensors)
  216. {
  217. if (!tmdev)
  218. return -ENODEV;
  219. *tsens_num_sensors = tmdev->tsens_num_sensor;
  220. return 0;
  221. }
  222. EXPORT_SYMBOL(tsens_get_max_sensor_num);
  223. static int tsens_tz_get_mode(struct thermal_zone_device *thermal,
  224. enum thermal_device_mode *mode)
  225. {
  226. struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
  227. if (!tm_sensor || !mode)
  228. return -EINVAL;
  229. *mode = tm_sensor->mode;
  230. return 0;
  231. }
  232. /* Function to enable the mode.
  233. * If the main sensor is disabled all the sensors are disable and
  234. * the clock is disabled.
  235. * If the main sensor is not enabled and sub sensor is enabled
  236. * returns with an error stating the main sensor is not enabled.
  237. */
  238. static int tsens_tz_set_mode(struct thermal_zone_device *thermal,
  239. enum thermal_device_mode mode)
  240. {
  241. struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
  242. unsigned int reg, mask, i;
  243. if (!tm_sensor)
  244. return -EINVAL;
  245. if (mode != tm_sensor->mode) {
  246. reg = readl_relaxed(TSENS_CNTL_ADDR);
  247. mask = 1 << (tm_sensor->sensor_num + TSENS_SENSOR0_SHIFT);
  248. if (mode == THERMAL_DEVICE_ENABLED) {
  249. if ((mask != SENSOR0_EN) && !(reg & SENSOR0_EN)) {
  250. pr_info("Main sensor not enabled\n");
  251. return -EINVAL;
  252. }
  253. writel_relaxed(reg | TSENS_SW_RST, TSENS_CNTL_ADDR);
  254. if (tmdev->hw_type == MSM_8960 ||
  255. tmdev->hw_type == MDM_9615 ||
  256. tmdev->hw_type == APQ_8064)
  257. reg |= mask | TSENS_8960_SLP_CLK_ENA
  258. | TSENS_EN;
  259. else
  260. reg |= mask | TSENS_8660_SLP_CLK_ENA
  261. | TSENS_EN;
  262. tmdev->prev_reading_avail = false;
  263. } else {
  264. reg &= ~mask;
  265. if (!(reg & SENSOR0_EN)) {
  266. if (tmdev->hw_type == APQ_8064)
  267. reg &= ~(TSENS_8064_SENSORS_EN |
  268. TSENS_8960_SLP_CLK_ENA |
  269. TSENS_EN);
  270. else if (tmdev->hw_type == MSM_8960 ||
  271. tmdev->hw_type == MDM_9615)
  272. reg &= ~(SENSORS_EN |
  273. TSENS_8960_SLP_CLK_ENA |
  274. TSENS_EN);
  275. else
  276. reg &= ~(SENSORS_EN |
  277. TSENS_8660_SLP_CLK_ENA |
  278. TSENS_EN);
  279. for (i = 1; i < tmdev->tsens_num_sensor; i++)
  280. tmdev->sensor[i].mode = mode;
  281. }
  282. }
  283. writel_relaxed(reg, TSENS_CNTL_ADDR);
  284. }
  285. tm_sensor->mode = mode;
  286. return 0;
  287. }
  288. static int tsens_tz_get_trip_type(struct thermal_zone_device *thermal,
  289. int trip, enum thermal_trip_type *type)
  290. {
  291. struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
  292. if (!tm_sensor || trip < 0 || !type)
  293. return -EINVAL;
  294. switch (trip) {
  295. case TSENS_TRIP_STAGE3:
  296. *type = THERMAL_TRIP_CRITICAL;
  297. break;
  298. case TSENS_TRIP_STAGE2:
  299. *type = THERMAL_TRIP_CONFIGURABLE_HI;
  300. break;
  301. case TSENS_TRIP_STAGE1:
  302. *type = THERMAL_TRIP_CONFIGURABLE_LOW;
  303. break;
  304. case TSENS_TRIP_STAGE0:
  305. *type = THERMAL_TRIP_CRITICAL_LOW;
  306. break;
  307. default:
  308. return -EINVAL;
  309. }
  310. return 0;
  311. }
  312. static int tsens_tz_activate_trip_type(struct thermal_zone_device *thermal,
  313. int trip, enum thermal_trip_activation_mode mode)
  314. {
  315. struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
  316. unsigned int reg_cntl, reg_th, code, hi_code, lo_code, mask;
  317. if (!tm_sensor || trip < 0)
  318. return -EINVAL;
  319. lo_code = TSENS_THRESHOLD_MIN_CODE;
  320. hi_code = TSENS_THRESHOLD_MAX_CODE;
  321. if (tmdev->hw_type == APQ_8064)
  322. reg_cntl = readl_relaxed(TSENS_8064_STATUS_CNTL);
  323. else
  324. reg_cntl = readl_relaxed(TSENS_CNTL_ADDR);
  325. reg_th = readl_relaxed(TSENS_THRESHOLD_ADDR);
  326. switch (trip) {
  327. case TSENS_TRIP_STAGE3:
  328. code = (reg_th & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  329. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  330. mask = TSENS_MAX_STATUS_MASK;
  331. if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
  332. lo_code = (reg_th & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  333. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  334. else if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
  335. lo_code = (reg_th & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  336. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  337. else if (!(reg_cntl & TSENS_MIN_STATUS_MASK))
  338. lo_code = (reg_th & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  339. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  340. break;
  341. case TSENS_TRIP_STAGE2:
  342. code = (reg_th & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  343. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  344. mask = TSENS_UPPER_STATUS_CLR;
  345. if (!(reg_cntl & TSENS_MAX_STATUS_MASK))
  346. hi_code = (reg_th & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  347. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  348. if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
  349. lo_code = (reg_th & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  350. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  351. else if (!(reg_cntl & TSENS_MIN_STATUS_MASK))
  352. lo_code = (reg_th & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  353. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  354. break;
  355. case TSENS_TRIP_STAGE1:
  356. code = (reg_th & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  357. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  358. mask = TSENS_LOWER_STATUS_CLR;
  359. if (!(reg_cntl & TSENS_MIN_STATUS_MASK))
  360. lo_code = (reg_th & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  361. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  362. if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
  363. hi_code = (reg_th & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  364. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  365. else if (!(reg_cntl & TSENS_MAX_STATUS_MASK))
  366. hi_code = (reg_th & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  367. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  368. break;
  369. case TSENS_TRIP_STAGE0:
  370. code = (reg_th & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  371. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  372. mask = TSENS_MIN_STATUS_MASK;
  373. if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
  374. hi_code = (reg_th & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  375. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  376. else if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
  377. hi_code = (reg_th & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  378. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  379. else if (!(reg_cntl & TSENS_MAX_STATUS_MASK))
  380. hi_code = (reg_th & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  381. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  382. break;
  383. default:
  384. return -EINVAL;
  385. }
  386. if (mode == THERMAL_TRIP_ACTIVATION_DISABLED) {
  387. if (tmdev->hw_type == APQ_8064)
  388. writel_relaxed(reg_cntl | mask, TSENS_8064_STATUS_CNTL);
  389. else
  390. writel_relaxed(reg_cntl | mask, TSENS_CNTL_ADDR);
  391. } else {
  392. if (code < lo_code || code > hi_code) {
  393. pr_info("%s with invalid code %x\n", __func__, code);
  394. return -EINVAL;
  395. }
  396. if (tmdev->hw_type == APQ_8064)
  397. writel_relaxed(reg_cntl & ~mask,
  398. TSENS_8064_STATUS_CNTL);
  399. else
  400. writel_relaxed(reg_cntl & ~mask, TSENS_CNTL_ADDR);
  401. }
  402. mb();
  403. return 0;
  404. }
  405. static int tsens_tz_get_trip_temp(struct thermal_zone_device *thermal,
  406. int trip, unsigned long *temp)
  407. {
  408. struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
  409. unsigned int reg;
  410. if (!tm_sensor || trip < 0 || !temp)
  411. return -EINVAL;
  412. reg = readl_relaxed(TSENS_THRESHOLD_ADDR);
  413. switch (trip) {
  414. case TSENS_TRIP_STAGE3:
  415. reg = (reg & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  416. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  417. break;
  418. case TSENS_TRIP_STAGE2:
  419. reg = (reg & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  420. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  421. break;
  422. case TSENS_TRIP_STAGE1:
  423. reg = (reg & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  424. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  425. break;
  426. case TSENS_TRIP_STAGE0:
  427. reg = (reg & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  428. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  429. break;
  430. default:
  431. return -EINVAL;
  432. }
  433. *temp = tsens_tz_code_to_degC(reg, tm_sensor->sensor_num);
  434. return 0;
  435. }
  436. static int tsens_tz_get_crit_temp(struct thermal_zone_device *thermal,
  437. unsigned long *temp)
  438. {
  439. return tsens_tz_get_trip_temp(thermal, TSENS_TRIP_STAGE3, temp);
  440. }
  441. static int tsens_tz_notify(struct thermal_zone_device *thermal,
  442. int count, enum thermal_trip_type type)
  443. {
  444. /* TSENS driver does not shutdown the device.
  445. All Thermal notification are sent to the
  446. thermal daemon to take appropriate action */
  447. return 1;
  448. }
  449. static int tsens_tz_set_trip_temp(struct thermal_zone_device *thermal,
  450. int trip, long temp)
  451. {
  452. struct tsens_tm_device_sensor *tm_sensor = thermal->devdata;
  453. unsigned int reg_th, reg_cntl;
  454. int code, hi_code, lo_code, code_err_chk;
  455. code_err_chk = code = tsens_tz_degC_to_code(temp,
  456. tm_sensor->sensor_num);
  457. if (!tm_sensor || trip < 0)
  458. return -EINVAL;
  459. lo_code = TSENS_THRESHOLD_MIN_CODE;
  460. hi_code = TSENS_THRESHOLD_MAX_CODE;
  461. if (tmdev->hw_type == APQ_8064)
  462. reg_cntl = readl_relaxed(TSENS_8064_STATUS_CNTL);
  463. else
  464. reg_cntl = readl_relaxed(TSENS_CNTL_ADDR);
  465. reg_th = readl_relaxed(TSENS_THRESHOLD_ADDR);
  466. switch (trip) {
  467. case TSENS_TRIP_STAGE3:
  468. code <<= TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  469. reg_th &= ~TSENS_THRESHOLD_MAX_LIMIT_MASK;
  470. if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
  471. lo_code = (reg_th & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  472. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  473. else if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
  474. lo_code = (reg_th & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  475. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  476. else if (!(reg_cntl & TSENS_MIN_STATUS_MASK))
  477. lo_code = (reg_th & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  478. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  479. break;
  480. case TSENS_TRIP_STAGE2:
  481. code <<= TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  482. reg_th &= ~TSENS_THRESHOLD_UPPER_LIMIT_MASK;
  483. if (!(reg_cntl & TSENS_MAX_STATUS_MASK))
  484. hi_code = (reg_th & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  485. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  486. if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
  487. lo_code = (reg_th & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  488. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  489. else if (!(reg_cntl & TSENS_MIN_STATUS_MASK))
  490. lo_code = (reg_th & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  491. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  492. break;
  493. case TSENS_TRIP_STAGE1:
  494. code <<= TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  495. reg_th &= ~TSENS_THRESHOLD_LOWER_LIMIT_MASK;
  496. if (!(reg_cntl & TSENS_MIN_STATUS_MASK))
  497. lo_code = (reg_th & TSENS_THRESHOLD_MIN_LIMIT_MASK)
  498. >> TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  499. if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
  500. hi_code = (reg_th & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  501. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  502. else if (!(reg_cntl & TSENS_MAX_STATUS_MASK))
  503. hi_code = (reg_th & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  504. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  505. break;
  506. case TSENS_TRIP_STAGE0:
  507. code <<= TSENS_THRESHOLD_MIN_LIMIT_SHIFT;
  508. reg_th &= ~TSENS_THRESHOLD_MIN_LIMIT_MASK;
  509. if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
  510. hi_code = (reg_th & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  511. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  512. else if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
  513. hi_code = (reg_th & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  514. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  515. else if (!(reg_cntl & TSENS_MAX_STATUS_MASK))
  516. hi_code = (reg_th & TSENS_THRESHOLD_MAX_LIMIT_MASK)
  517. >> TSENS_THRESHOLD_MAX_LIMIT_SHIFT;
  518. break;
  519. default:
  520. return -EINVAL;
  521. }
  522. if (code_err_chk < lo_code || code_err_chk > hi_code)
  523. return -EINVAL;
  524. writel_relaxed(reg_th | code, TSENS_THRESHOLD_ADDR);
  525. return 0;
  526. }
  527. static struct thermal_zone_device_ops tsens_thermal_zone_ops = {
  528. .get_temp = tsens_tz_get_temp,
  529. .get_mode = tsens_tz_get_mode,
  530. .set_mode = tsens_tz_set_mode,
  531. .get_trip_type = tsens_tz_get_trip_type,
  532. .activate_trip_type = tsens_tz_activate_trip_type,
  533. .get_trip_temp = tsens_tz_get_trip_temp,
  534. .set_trip_temp = tsens_tz_set_trip_temp,
  535. .get_crit_temp = tsens_tz_get_crit_temp,
  536. .notify = tsens_tz_notify,
  537. };
  538. static void notify_uspace_tsens_fn(struct work_struct *work)
  539. {
  540. struct tsens_tm_device_sensor *tm = container_of(work,
  541. struct tsens_tm_device_sensor, work);
  542. sysfs_notify(&tm->tz_dev->device.kobj,
  543. NULL, "type");
  544. }
  545. static void tsens_scheduler_fn(struct work_struct *work)
  546. {
  547. struct tsens_tm_device *tm = container_of(work, struct tsens_tm_device,
  548. tsens_work);
  549. unsigned int threshold, threshold_low, i, code, reg, sensor, mask;
  550. unsigned int sensor_addr;
  551. bool upper_th_x, lower_th_x;
  552. int adc_code;
  553. if (tmdev->hw_type == APQ_8064) {
  554. reg = readl_relaxed(TSENS_8064_STATUS_CNTL);
  555. writel_relaxed(reg | TSENS_LOWER_STATUS_CLR |
  556. TSENS_UPPER_STATUS_CLR, TSENS_8064_STATUS_CNTL);
  557. } else {
  558. reg = readl_relaxed(TSENS_CNTL_ADDR);
  559. writel_relaxed(reg | TSENS_LOWER_STATUS_CLR |
  560. TSENS_UPPER_STATUS_CLR, TSENS_CNTL_ADDR);
  561. }
  562. mask = ~(TSENS_LOWER_STATUS_CLR | TSENS_UPPER_STATUS_CLR);
  563. threshold = readl_relaxed(TSENS_THRESHOLD_ADDR);
  564. threshold_low = (threshold & TSENS_THRESHOLD_LOWER_LIMIT_MASK)
  565. >> TSENS_THRESHOLD_LOWER_LIMIT_SHIFT;
  566. threshold = (threshold & TSENS_THRESHOLD_UPPER_LIMIT_MASK)
  567. >> TSENS_THRESHOLD_UPPER_LIMIT_SHIFT;
  568. sensor = readl_relaxed(TSENS_CNTL_ADDR);
  569. if (tmdev->hw_type == APQ_8064) {
  570. reg = readl_relaxed(TSENS_8064_STATUS_CNTL);
  571. sensor &= (uint32_t) TSENS_8064_SENSORS_EN;
  572. } else {
  573. reg = sensor;
  574. sensor &= (uint32_t) SENSORS_EN;
  575. }
  576. sensor >>= TSENS_SENSOR0_SHIFT;
  577. sensor_addr = (unsigned int)TSENS_S0_STATUS_ADDR;
  578. for (i = 0; i < tmdev->tsens_num_sensor; i++) {
  579. if (i == TSENS_8064_SEQ_SENSORS)
  580. sensor_addr += TSENS_8064_S4_S5_OFFSET;
  581. if (sensor & TSENS_MASK1) {
  582. code = readl_relaxed(sensor_addr);
  583. upper_th_x = code >= threshold;
  584. lower_th_x = code <= threshold_low;
  585. if (upper_th_x)
  586. mask |= TSENS_UPPER_STATUS_CLR;
  587. if (lower_th_x)
  588. mask |= TSENS_LOWER_STATUS_CLR;
  589. if (upper_th_x || lower_th_x) {
  590. /* Notify user space */
  591. schedule_work(&tm->sensor[i].work);
  592. adc_code = readl_relaxed(sensor_addr);
  593. pr_debug("Trigger (%d degrees) for sensor %d\n",
  594. tsens_tz_code_to_degC(adc_code, i), i);
  595. }
  596. }
  597. sensor >>= 1;
  598. sensor_addr += TSENS_SENSOR_STATUS_SIZE;
  599. }
  600. if (tmdev->hw_type == APQ_8064)
  601. writel_relaxed(reg & mask, TSENS_8064_STATUS_CNTL);
  602. else
  603. writel_relaxed(reg & mask, TSENS_CNTL_ADDR);
  604. mb();
  605. }
  606. static irqreturn_t tsens_isr(int irq, void *data)
  607. {
  608. schedule_work(&tmdev->tsens_work);
  609. return IRQ_HANDLED;
  610. }
  611. #ifdef CONFIG_PM
  612. static int tsens_suspend(struct device *dev)
  613. {
  614. int i = 0;
  615. tmdev->pm_tsens_thr_data = readl_relaxed(TSENS_THRESHOLD_ADDR);
  616. tmdev->pm_tsens_cntl = readl_relaxed(TSENS_CNTL_ADDR);
  617. writel_relaxed(tmdev->pm_tsens_cntl &
  618. ~(TSENS_8960_SLP_CLK_ENA | TSENS_EN), TSENS_CNTL_ADDR);
  619. tmdev->prev_reading_avail = 0;
  620. for (i = 0; i < tmdev->tsens_num_sensor; i++)
  621. tmdev->sensor[i].mode = THERMAL_DEVICE_DISABLED;
  622. disable_irq_nosync(TSENS_UPPER_LOWER_INT);
  623. mb();
  624. return 0;
  625. }
  626. static int tsens_resume(struct device *dev)
  627. {
  628. unsigned int reg_cntl = 0, reg_cfg = 0, reg_sensor_mask = 0;
  629. unsigned int reg_status_cntl = 0, reg_thr_data = 0, i = 0;
  630. reg_cntl = readl_relaxed(TSENS_CNTL_ADDR);
  631. writel_relaxed(reg_cntl | TSENS_SW_RST, TSENS_CNTL_ADDR);
  632. if (tmdev->hw_type == MSM_8960 || tmdev->hw_type == MDM_9615) {
  633. reg_cntl |= TSENS_8960_SLP_CLK_ENA |
  634. (TSENS_MEASURE_PERIOD << 18) |
  635. TSENS_MIN_STATUS_MASK | TSENS_MAX_STATUS_MASK |
  636. SENSORS_EN;
  637. writel_relaxed(reg_cntl, TSENS_CNTL_ADDR);
  638. } else if (tmdev->hw_type == APQ_8064) {
  639. reg_cntl |= TSENS_8960_SLP_CLK_ENA |
  640. (TSENS_MEASURE_PERIOD << 18) |
  641. (((1 << tmdev->tsens_num_sensor) - 1)
  642. << TSENS_SENSOR0_SHIFT);
  643. writel_relaxed(reg_cntl, TSENS_CNTL_ADDR);
  644. reg_status_cntl = readl_relaxed(TSENS_8064_STATUS_CNTL);
  645. reg_status_cntl |= TSENS_MIN_STATUS_MASK |
  646. TSENS_MAX_STATUS_MASK;
  647. writel_relaxed(reg_status_cntl, TSENS_8064_STATUS_CNTL);
  648. }
  649. reg_cfg = readl_relaxed(TSENS_8960_CONFIG_ADDR);
  650. reg_cfg = (reg_cfg & ~TSENS_8960_CONFIG_MASK) |
  651. (TSENS_8960_CONFIG << TSENS_8960_CONFIG_SHIFT);
  652. writel_relaxed(reg_cfg, TSENS_8960_CONFIG_ADDR);
  653. writel_relaxed((tmdev->pm_tsens_cntl & TSENS_CNTL_RESUME_MASK),
  654. TSENS_CNTL_ADDR);
  655. reg_cntl = readl_relaxed(TSENS_CNTL_ADDR);
  656. writel_relaxed(tmdev->pm_tsens_thr_data, TSENS_THRESHOLD_ADDR);
  657. reg_thr_data = readl_relaxed(TSENS_THRESHOLD_ADDR);
  658. if (tmdev->hw_type == MSM_8960 || tmdev->hw_type == MDM_9615)
  659. reg_sensor_mask = ((reg_cntl & TSENS_8960_SENSOR_MASK)
  660. >> TSENS_SENSOR0_SHIFT);
  661. else {
  662. reg_sensor_mask = ((reg_cntl & TSENS_8064_SENSOR_MASK)
  663. >> TSENS_SENSOR0_SHIFT);
  664. }
  665. for (i = 0; i < tmdev->tsens_num_sensor; i++) {
  666. if (reg_sensor_mask & TSENS_MASK1)
  667. tmdev->sensor[i].mode = THERMAL_DEVICE_ENABLED;
  668. reg_sensor_mask >>= 1;
  669. }
  670. enable_irq(TSENS_UPPER_LOWER_INT);
  671. mb();
  672. return 0;
  673. }
  674. static const struct dev_pm_ops tsens_pm_ops = {
  675. .suspend = tsens_suspend,
  676. .resume = tsens_resume,
  677. };
  678. #endif
  679. static void tsens_disable_mode(void)
  680. {
  681. unsigned int reg_cntl = 0;
  682. reg_cntl = readl_relaxed(TSENS_CNTL_ADDR);
  683. if (tmdev->hw_type == MSM_8960 || tmdev->hw_type == MDM_9615 ||
  684. tmdev->hw_type == APQ_8064)
  685. writel_relaxed(reg_cntl &
  686. ~((((1 << tmdev->tsens_num_sensor) - 1) <<
  687. TSENS_SENSOR0_SHIFT) | TSENS_8960_SLP_CLK_ENA
  688. | TSENS_EN), TSENS_CNTL_ADDR);
  689. else if (tmdev->hw_type == MSM_8660)
  690. writel_relaxed(reg_cntl &
  691. ~((((1 << tmdev->tsens_num_sensor) - 1) <<
  692. TSENS_SENSOR0_SHIFT) | TSENS_8660_SLP_CLK_ENA
  693. | TSENS_EN), TSENS_CNTL_ADDR);
  694. }
  695. static void tsens_hw_init(void)
  696. {
  697. unsigned int reg_cntl = 0, reg_cfg = 0, reg_thr = 0;
  698. unsigned int reg_status_cntl = 0;
  699. reg_cntl = readl_relaxed(TSENS_CNTL_ADDR);
  700. writel_relaxed(reg_cntl | TSENS_SW_RST, TSENS_CNTL_ADDR);
  701. if (tmdev->hw_type == MSM_8960 || tmdev->hw_type == MDM_9615) {
  702. reg_cntl |= TSENS_8960_SLP_CLK_ENA |
  703. (TSENS_MEASURE_PERIOD << 18) |
  704. TSENS_LOWER_STATUS_CLR | TSENS_UPPER_STATUS_CLR |
  705. TSENS_MIN_STATUS_MASK | TSENS_MAX_STATUS_MASK |
  706. SENSORS_EN;
  707. writel_relaxed(reg_cntl, TSENS_CNTL_ADDR);
  708. reg_cntl |= TSENS_EN;
  709. writel_relaxed(reg_cntl, TSENS_CNTL_ADDR);
  710. reg_cfg = readl_relaxed(TSENS_8960_CONFIG_ADDR);
  711. reg_cfg = (reg_cfg & ~TSENS_8960_CONFIG_MASK) |
  712. (TSENS_8960_CONFIG << TSENS_8960_CONFIG_SHIFT);
  713. writel_relaxed(reg_cfg, TSENS_8960_CONFIG_ADDR);
  714. } else if (tmdev->hw_type == MSM_8660) {
  715. reg_cntl |= TSENS_8660_SLP_CLK_ENA | TSENS_EN |
  716. (TSENS_MEASURE_PERIOD << 16) |
  717. TSENS_LOWER_STATUS_CLR | TSENS_UPPER_STATUS_CLR |
  718. TSENS_MIN_STATUS_MASK | TSENS_MAX_STATUS_MASK |
  719. (((1 << tmdev->tsens_num_sensor) - 1) <<
  720. TSENS_SENSOR0_SHIFT);
  721. /* set TSENS_CONFIG bits (bits 29:28 of TSENS_CNTL) to '01';
  722. this setting found to be optimal. */
  723. reg_cntl = (reg_cntl & ~TSENS_8660_CONFIG_MASK) |
  724. (TSENS_8660_CONFIG << TSENS_8660_CONFIG_SHIFT);
  725. writel_relaxed(reg_cntl, TSENS_CNTL_ADDR);
  726. } else if (tmdev->hw_type == APQ_8064) {
  727. reg_cntl |= TSENS_8960_SLP_CLK_ENA |
  728. (TSENS_MEASURE_PERIOD << 18) |
  729. (((1 << tmdev->tsens_num_sensor) - 1)
  730. << TSENS_SENSOR0_SHIFT);
  731. writel_relaxed(reg_cntl, TSENS_CNTL_ADDR);
  732. reg_status_cntl = readl_relaxed(TSENS_8064_STATUS_CNTL);
  733. reg_status_cntl |= TSENS_LOWER_STATUS_CLR |
  734. TSENS_UPPER_STATUS_CLR |
  735. TSENS_MIN_STATUS_MASK |
  736. TSENS_MAX_STATUS_MASK;
  737. writel_relaxed(reg_status_cntl, TSENS_8064_STATUS_CNTL);
  738. reg_cntl |= TSENS_EN;
  739. writel_relaxed(reg_cntl, TSENS_CNTL_ADDR);
  740. reg_cfg = readl_relaxed(TSENS_8960_CONFIG_ADDR);
  741. reg_cfg = (reg_cfg & ~TSENS_8960_CONFIG_MASK) |
  742. (TSENS_8960_CONFIG << TSENS_8960_CONFIG_SHIFT);
  743. writel_relaxed(reg_cfg, TSENS_8960_CONFIG_ADDR);
  744. }
  745. reg_thr |= (TSENS_LOWER_LIMIT_TH << TSENS_THRESHOLD_LOWER_LIMIT_SHIFT) |
  746. (TSENS_UPPER_LIMIT_TH << TSENS_THRESHOLD_UPPER_LIMIT_SHIFT) |
  747. (TSENS_MIN_LIMIT_TH << TSENS_THRESHOLD_MIN_LIMIT_SHIFT) |
  748. (TSENS_MAX_LIMIT_TH << TSENS_THRESHOLD_MAX_LIMIT_SHIFT);
  749. writel_relaxed(reg_thr, TSENS_THRESHOLD_ADDR);
  750. }
  751. static int tsens_calib_sensors8660(void)
  752. {
  753. uint32_t *main_sensor_addr, sensor_shift, red_sensor_shift;
  754. uint32_t sensor_mask, red_sensor_mask;
  755. main_sensor_addr = TSENS_8660_QFPROM_ADDR;
  756. sensor_shift = TSENS_SENSOR_SHIFT;
  757. red_sensor_shift = sensor_shift + TSENS_RED_SHIFT;
  758. sensor_mask = TSENS_THRESHOLD_MAX_CODE << sensor_shift;
  759. red_sensor_mask = TSENS_THRESHOLD_MAX_CODE << red_sensor_shift;
  760. tmdev->sensor[TSENS_MAIN_SENSOR].calib_data =
  761. (readl_relaxed(main_sensor_addr) & sensor_mask)
  762. >> sensor_shift;
  763. tmdev->sensor[TSENS_MAIN_SENSOR].calib_data_backup =
  764. (readl_relaxed(main_sensor_addr)
  765. & red_sensor_mask) >> red_sensor_shift;
  766. if (tmdev->sensor[TSENS_MAIN_SENSOR].calib_data_backup)
  767. tmdev->sensor[TSENS_MAIN_SENSOR].calib_data =
  768. tmdev->sensor[TSENS_MAIN_SENSOR].calib_data_backup;
  769. if (!tmdev->sensor[TSENS_MAIN_SENSOR].calib_data) {
  770. pr_err("QFPROM TSENS calibration data not present\n");
  771. return -ENODEV;
  772. }
  773. tmdev->sensor[TSENS_MAIN_SENSOR].offset = tmdev->tsens_factor *
  774. TSENS_CAL_DEGC -
  775. tmdev->sensor[TSENS_MAIN_SENSOR].slope_mul_tsens_factor *
  776. tmdev->sensor[TSENS_MAIN_SENSOR].calib_data;
  777. tmdev->prev_reading_avail = false;
  778. INIT_WORK(&tmdev->sensor[TSENS_MAIN_SENSOR].work,
  779. notify_uspace_tsens_fn);
  780. return 0;
  781. }
  782. static int tsens_calib_sensors8960(void)
  783. {
  784. uint32_t i;
  785. uint8_t *main_sensor_addr, *backup_sensor_addr;
  786. for (i = 0; i < tmdev->tsens_num_sensor; i++) {
  787. main_sensor_addr = TSENS_8960_QFPROM_ADDR0 + i;
  788. backup_sensor_addr = TSENS_8960_QFPROM_SPARE_ADDR0 + i;
  789. tmdev->sensor[i].calib_data = readb_relaxed(main_sensor_addr);
  790. tmdev->sensor[i].calib_data_backup =
  791. readb_relaxed(backup_sensor_addr);
  792. if (tmdev->sensor[i].calib_data_backup)
  793. tmdev->sensor[i].calib_data =
  794. tmdev->sensor[i].calib_data_backup;
  795. if (!tmdev->sensor[i].calib_data) {
  796. pr_err("QFPROM TSENS calibration data not present\n");
  797. return -ENODEV;
  798. }
  799. tmdev->sensor[i].offset = (TSENS_CAL_DEGC *
  800. tmdev->tsens_factor)
  801. - (tmdev->sensor[i].calib_data *
  802. tmdev->sensor[i].slope_mul_tsens_factor);
  803. tmdev->prev_reading_avail = false;
  804. INIT_WORK(&tmdev->sensor[i].work, notify_uspace_tsens_fn);
  805. }
  806. return 0;
  807. }
  808. static int tsens_calib_sensors(void)
  809. {
  810. int rc = -ENODEV;
  811. if (tmdev->hw_type == MSM_8660)
  812. rc = tsens_calib_sensors8660();
  813. else if (tmdev->hw_type == MSM_8960 || tmdev->hw_type == MDM_9615 ||
  814. tmdev->hw_type == APQ_8064)
  815. rc = tsens_calib_sensors8960();
  816. return rc;
  817. }
  818. int msm_tsens_early_init(struct tsens_platform_data *pdata)
  819. {
  820. int rc = 0, i;
  821. if (!pdata) {
  822. pr_err("No TSENS Platform data\n");
  823. return -EINVAL;
  824. }
  825. tmdev = kzalloc(sizeof(struct tsens_tm_device) +
  826. pdata->tsens_num_sensor *
  827. sizeof(struct tsens_tm_device_sensor),
  828. GFP_ATOMIC);
  829. if (tmdev == NULL) {
  830. pr_err("%s: kzalloc() failed.\n", __func__);
  831. return -ENOMEM;
  832. }
  833. for (i = 0; i < pdata->tsens_num_sensor; i++)
  834. tmdev->sensor[i].slope_mul_tsens_factor = pdata->slope[i];
  835. tmdev->tsens_factor = pdata->tsens_factor;
  836. tmdev->tsens_num_sensor = pdata->tsens_num_sensor;
  837. tmdev->hw_type = pdata->hw_type;
  838. rc = tsens_calib_sensors();
  839. if (rc < 0) {
  840. kfree(tmdev);
  841. tmdev = NULL;
  842. return rc;
  843. }
  844. if (tmdev->hw_type == APQ_8064)
  845. tsens_status_cntl_start = 0;
  846. else
  847. tsens_status_cntl_start = TSENS_STATUS_CNTL_OFFSET;
  848. tsens_hw_init();
  849. pr_debug("msm_tsens_early_init: done\n");
  850. return rc;
  851. }
  852. static int __devinit tsens_tm_probe(struct platform_device *pdev)
  853. {
  854. int rc, i;
  855. if (!tmdev) {
  856. pr_info("%s : TSENS early init not done.\n", __func__);
  857. return -EFAULT;
  858. }
  859. for (i = 0; i < tmdev->tsens_num_sensor; i++) {
  860. char name[18];
  861. snprintf(name, sizeof(name), "tsens_tz_sensor%d", i);
  862. tmdev->sensor[i].mode = THERMAL_DEVICE_ENABLED;
  863. tmdev->sensor[i].sensor_num = i;
  864. tmdev->sensor[i].tz_dev = thermal_zone_device_register(name,
  865. TSENS_TRIP_NUM, &tmdev->sensor[i],
  866. &tsens_thermal_zone_ops, 0, 0, 0, 0);
  867. if (IS_ERR(tmdev->sensor[i].tz_dev)) {
  868. pr_err("%s: thermal_zone_device_register() failed.\n",
  869. __func__);
  870. rc = -ENODEV;
  871. goto fail;
  872. }
  873. }
  874. rc = request_irq(TSENS_UPPER_LOWER_INT, tsens_isr,
  875. IRQF_TRIGGER_RISING, "tsens_interrupt", tmdev);
  876. if (rc < 0) {
  877. pr_err("%s: request_irq FAIL: %d\n", __func__, rc);
  878. for (i = 0; i < tmdev->tsens_num_sensor; i++)
  879. thermal_zone_device_unregister(tmdev->sensor[i].tz_dev);
  880. goto fail;
  881. }
  882. INIT_WORK(&tmdev->tsens_work, tsens_scheduler_fn);
  883. pr_debug("%s: OK\n", __func__);
  884. mb();
  885. return 0;
  886. fail:
  887. tsens_disable_mode();
  888. kfree(tmdev);
  889. tmdev = NULL;
  890. mb();
  891. return rc;
  892. }
  893. static int __devexit tsens_tm_remove(struct platform_device *pdev)
  894. {
  895. int i;
  896. tsens_disable_mode();
  897. mb();
  898. free_irq(TSENS_UPPER_LOWER_INT, tmdev);
  899. for (i = 0; i < tmdev->tsens_num_sensor; i++)
  900. thermal_zone_device_unregister(tmdev->sensor[i].tz_dev);
  901. kfree(tmdev);
  902. tmdev = NULL;
  903. return 0;
  904. }
  905. static struct platform_driver tsens_tm_driver = {
  906. .probe = tsens_tm_probe,
  907. .remove = tsens_tm_remove,
  908. .driver = {
  909. .name = "tsens8960-tm",
  910. .owner = THIS_MODULE,
  911. #ifdef CONFIG_PM
  912. .pm = &tsens_pm_ops,
  913. #endif
  914. },
  915. };
  916. static int __init _tsens_tm_init(void)
  917. {
  918. return platform_driver_register(&tsens_tm_driver);
  919. }
  920. module_init(_tsens_tm_init);
  921. static void __exit _tsens_tm_remove(void)
  922. {
  923. platform_driver_unregister(&tsens_tm_driver);
  924. }
  925. module_exit(_tsens_tm_remove);
  926. MODULE_LICENSE("GPL v2");
  927. MODULE_DESCRIPTION("MSM8960 Temperature Sensor driver");
  928. MODULE_VERSION("1.0");
  929. MODULE_ALIAS("platform:tsens8960-tm");