be.h 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191
  1. /**
  2. * Copyright (C) 2005 - 2011 Emulex
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@emulex.com
  12. *
  13. * Emulex
  14. * 3333 Susan Street
  15. * Costa Mesa, CA 92626
  16. */
  17. #ifndef BEISCSI_H
  18. #define BEISCSI_H
  19. #include <linux/pci.h>
  20. #include <linux/if_vlan.h>
  21. #include <linux/blk-iopoll.h>
  22. #define FW_VER_LEN 32
  23. #define MCC_Q_LEN 128
  24. #define MCC_CQ_LEN 256
  25. #define MAX_MCC_CMD 16
  26. /* BladeEngine Generation numbers */
  27. #define BE_GEN2 2
  28. #define BE_GEN3 3
  29. struct be_dma_mem {
  30. void *va;
  31. dma_addr_t dma;
  32. u32 size;
  33. };
  34. struct be_queue_info {
  35. struct be_dma_mem dma_mem;
  36. u16 len;
  37. u16 entry_size; /* Size of an element in the queue */
  38. u16 id;
  39. u16 tail, head;
  40. bool created;
  41. atomic_t used; /* Number of valid elements in the queue */
  42. };
  43. static inline u32 MODULO(u16 val, u16 limit)
  44. {
  45. WARN_ON(limit & (limit - 1));
  46. return val & (limit - 1);
  47. }
  48. static inline void index_inc(u16 *index, u16 limit)
  49. {
  50. *index = MODULO((*index + 1), limit);
  51. }
  52. static inline void *queue_head_node(struct be_queue_info *q)
  53. {
  54. return q->dma_mem.va + q->head * q->entry_size;
  55. }
  56. static inline void *queue_get_wrb(struct be_queue_info *q, unsigned int wrb_num)
  57. {
  58. return q->dma_mem.va + wrb_num * q->entry_size;
  59. }
  60. static inline void *queue_tail_node(struct be_queue_info *q)
  61. {
  62. return q->dma_mem.va + q->tail * q->entry_size;
  63. }
  64. static inline void queue_head_inc(struct be_queue_info *q)
  65. {
  66. index_inc(&q->head, q->len);
  67. }
  68. static inline void queue_tail_inc(struct be_queue_info *q)
  69. {
  70. index_inc(&q->tail, q->len);
  71. }
  72. /*ISCSI */
  73. struct be_eq_obj {
  74. struct be_queue_info q;
  75. struct beiscsi_hba *phba;
  76. struct be_queue_info *cq;
  77. struct blk_iopoll iopoll;
  78. };
  79. struct be_mcc_obj {
  80. struct be_queue_info q;
  81. struct be_queue_info cq;
  82. };
  83. struct be_ctrl_info {
  84. u8 __iomem *csr;
  85. u8 __iomem *db; /* Door Bell */
  86. u8 __iomem *pcicfg; /* PCI config space */
  87. struct pci_dev *pdev;
  88. /* Mbox used for cmd request/response */
  89. spinlock_t mbox_lock; /* For serializing mbox cmds to BE card */
  90. struct be_dma_mem mbox_mem;
  91. /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
  92. * is stored for freeing purpose */
  93. struct be_dma_mem mbox_mem_alloced;
  94. /* MCC Rings */
  95. struct be_mcc_obj mcc_obj;
  96. spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
  97. spinlock_t mcc_cq_lock;
  98. wait_queue_head_t mcc_wait[MAX_MCC_CMD + 1];
  99. unsigned int mcc_tag[MAX_MCC_CMD];
  100. unsigned int mcc_numtag[MAX_MCC_CMD + 1];
  101. unsigned short mcc_alloc_index;
  102. unsigned short mcc_free_index;
  103. unsigned int mcc_tag_available;
  104. };
  105. #include "be_cmds.h"
  106. #define PAGE_SHIFT_4K 12
  107. #define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
  108. #define mcc_timeout 120000 /* 5s timeout */
  109. /* Returns number of pages spanned by the data starting at the given addr */
  110. #define PAGES_4K_SPANNED(_address, size) \
  111. ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
  112. (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
  113. /* Byte offset into the page corresponding to given address */
  114. #define OFFSET_IN_PAGE(addr) \
  115. ((size_t)(addr) & (PAGE_SIZE_4K-1))
  116. /* Returns bit offset within a DWORD of a bitfield */
  117. #define AMAP_BIT_OFFSET(_struct, field) \
  118. (((size_t)&(((_struct *)0)->field))%32)
  119. /* Returns the bit mask of the field that is NOT shifted into location. */
  120. static inline u32 amap_mask(u32 bitsize)
  121. {
  122. return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
  123. }
  124. static inline void amap_set(void *ptr, u32 dw_offset, u32 mask,
  125. u32 offset, u32 value)
  126. {
  127. u32 *dw = (u32 *) ptr + dw_offset;
  128. *dw &= ~(mask << offset);
  129. *dw |= (mask & value) << offset;
  130. }
  131. #define AMAP_SET_BITS(_struct, field, ptr, val) \
  132. amap_set(ptr, \
  133. offsetof(_struct, field)/32, \
  134. amap_mask(sizeof(((_struct *)0)->field)), \
  135. AMAP_BIT_OFFSET(_struct, field), \
  136. val)
  137. static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
  138. {
  139. u32 *dw = ptr;
  140. return mask & (*(dw + dw_offset) >> offset);
  141. }
  142. #define AMAP_GET_BITS(_struct, field, ptr) \
  143. amap_get(ptr, \
  144. offsetof(_struct, field)/32, \
  145. amap_mask(sizeof(((_struct *)0)->field)), \
  146. AMAP_BIT_OFFSET(_struct, field))
  147. #define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
  148. #define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
  149. static inline void swap_dws(void *wrb, int len)
  150. {
  151. #ifdef __BIG_ENDIAN
  152. u32 *dw = wrb;
  153. WARN_ON(len % 4);
  154. do {
  155. *dw = cpu_to_le32(*dw);
  156. dw++;
  157. len -= 4;
  158. } while (len);
  159. #endif /* __BIG_ENDIAN */
  160. }
  161. #endif /* BEISCSI_H */