rtc-at32ap700x.c 7.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320
  1. /*
  2. * An RTC driver for the AVR32 AT32AP700x processor series.
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/slab.h>
  14. #include <linux/rtc.h>
  15. #include <linux/io.h>
  16. /*
  17. * This is a bare-bones RTC. It runs during most system sleep states, but has
  18. * no battery backup and gets reset during system restart. It must be
  19. * initialized from an external clock (network, I2C, etc) before it can be of
  20. * much use.
  21. *
  22. * The alarm functionality is limited by the hardware, not supporting
  23. * periodic interrupts.
  24. */
  25. #define RTC_CTRL 0x00
  26. #define RTC_CTRL_EN 0
  27. #define RTC_CTRL_PCLR 1
  28. #define RTC_CTRL_TOPEN 2
  29. #define RTC_CTRL_PSEL 8
  30. #define RTC_VAL 0x04
  31. #define RTC_TOP 0x08
  32. #define RTC_IER 0x10
  33. #define RTC_IER_TOPI 0
  34. #define RTC_IDR 0x14
  35. #define RTC_IDR_TOPI 0
  36. #define RTC_IMR 0x18
  37. #define RTC_IMR_TOPI 0
  38. #define RTC_ISR 0x1c
  39. #define RTC_ISR_TOPI 0
  40. #define RTC_ICR 0x20
  41. #define RTC_ICR_TOPI 0
  42. #define RTC_BIT(name) (1 << RTC_##name)
  43. #define RTC_BF(name, value) ((value) << RTC_##name)
  44. #define rtc_readl(dev, reg) \
  45. __raw_readl((dev)->regs + RTC_##reg)
  46. #define rtc_writel(dev, reg, value) \
  47. __raw_writel((value), (dev)->regs + RTC_##reg)
  48. struct rtc_at32ap700x {
  49. struct rtc_device *rtc;
  50. void __iomem *regs;
  51. unsigned long alarm_time;
  52. unsigned long irq;
  53. /* Protect against concurrent register access. */
  54. spinlock_t lock;
  55. };
  56. static int at32_rtc_readtime(struct device *dev, struct rtc_time *tm)
  57. {
  58. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  59. unsigned long now;
  60. now = rtc_readl(rtc, VAL);
  61. rtc_time_to_tm(now, tm);
  62. return 0;
  63. }
  64. static int at32_rtc_settime(struct device *dev, struct rtc_time *tm)
  65. {
  66. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  67. unsigned long now;
  68. int ret;
  69. ret = rtc_tm_to_time(tm, &now);
  70. if (ret == 0)
  71. rtc_writel(rtc, VAL, now);
  72. return ret;
  73. }
  74. static int at32_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
  75. {
  76. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  77. spin_lock_irq(&rtc->lock);
  78. rtc_time_to_tm(rtc->alarm_time, &alrm->time);
  79. alrm->enabled = rtc_readl(rtc, IMR) & RTC_BIT(IMR_TOPI) ? 1 : 0;
  80. alrm->pending = rtc_readl(rtc, ISR) & RTC_BIT(ISR_TOPI) ? 1 : 0;
  81. spin_unlock_irq(&rtc->lock);
  82. return 0;
  83. }
  84. static int at32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  85. {
  86. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  87. unsigned long rtc_unix_time;
  88. unsigned long alarm_unix_time;
  89. int ret;
  90. rtc_unix_time = rtc_readl(rtc, VAL);
  91. ret = rtc_tm_to_time(&alrm->time, &alarm_unix_time);
  92. if (ret)
  93. return ret;
  94. if (alarm_unix_time < rtc_unix_time)
  95. return -EINVAL;
  96. spin_lock_irq(&rtc->lock);
  97. rtc->alarm_time = alarm_unix_time;
  98. rtc_writel(rtc, TOP, rtc->alarm_time);
  99. if (alrm->enabled)
  100. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  101. | RTC_BIT(CTRL_TOPEN));
  102. else
  103. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  104. & ~RTC_BIT(CTRL_TOPEN));
  105. spin_unlock_irq(&rtc->lock);
  106. return ret;
  107. }
  108. static int at32_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  109. {
  110. struct rtc_at32ap700x *rtc = dev_get_drvdata(dev);
  111. int ret = 0;
  112. spin_lock_irq(&rtc->lock);
  113. if(enabled) {
  114. if (rtc_readl(rtc, VAL) > rtc->alarm_time) {
  115. ret = -EINVAL;
  116. goto out;
  117. }
  118. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  119. | RTC_BIT(CTRL_TOPEN));
  120. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  121. rtc_writel(rtc, IER, RTC_BIT(IER_TOPI));
  122. } else {
  123. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  124. & ~RTC_BIT(CTRL_TOPEN));
  125. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  126. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  127. }
  128. out:
  129. spin_unlock_irq(&rtc->lock);
  130. return ret;
  131. }
  132. static irqreturn_t at32_rtc_interrupt(int irq, void *dev_id)
  133. {
  134. struct rtc_at32ap700x *rtc = (struct rtc_at32ap700x *)dev_id;
  135. unsigned long isr = rtc_readl(rtc, ISR);
  136. unsigned long events = 0;
  137. int ret = IRQ_NONE;
  138. spin_lock(&rtc->lock);
  139. if (isr & RTC_BIT(ISR_TOPI)) {
  140. rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI));
  141. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  142. rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL)
  143. & ~RTC_BIT(CTRL_TOPEN));
  144. rtc_writel(rtc, VAL, rtc->alarm_time);
  145. events = RTC_AF | RTC_IRQF;
  146. rtc_update_irq(rtc->rtc, 1, events);
  147. ret = IRQ_HANDLED;
  148. }
  149. spin_unlock(&rtc->lock);
  150. return ret;
  151. }
  152. static struct rtc_class_ops at32_rtc_ops = {
  153. .read_time = at32_rtc_readtime,
  154. .set_time = at32_rtc_settime,
  155. .read_alarm = at32_rtc_readalarm,
  156. .set_alarm = at32_rtc_setalarm,
  157. .alarm_irq_enable = at32_rtc_alarm_irq_enable,
  158. };
  159. static int __init at32_rtc_probe(struct platform_device *pdev)
  160. {
  161. struct resource *regs;
  162. struct rtc_at32ap700x *rtc;
  163. int irq;
  164. int ret;
  165. rtc = kzalloc(sizeof(struct rtc_at32ap700x), GFP_KERNEL);
  166. if (!rtc) {
  167. dev_dbg(&pdev->dev, "out of memory\n");
  168. return -ENOMEM;
  169. }
  170. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  171. if (!regs) {
  172. dev_dbg(&pdev->dev, "no mmio resource defined\n");
  173. ret = -ENXIO;
  174. goto out;
  175. }
  176. irq = platform_get_irq(pdev, 0);
  177. if (irq <= 0) {
  178. dev_dbg(&pdev->dev, "could not get irq\n");
  179. ret = -ENXIO;
  180. goto out;
  181. }
  182. rtc->irq = irq;
  183. rtc->regs = ioremap(regs->start, resource_size(regs));
  184. if (!rtc->regs) {
  185. ret = -ENOMEM;
  186. dev_dbg(&pdev->dev, "could not map I/O memory\n");
  187. goto out;
  188. }
  189. spin_lock_init(&rtc->lock);
  190. /*
  191. * Maybe init RTC: count from zero at 1 Hz, disable wrap irq.
  192. *
  193. * Do not reset VAL register, as it can hold an old time
  194. * from last JTAG reset.
  195. */
  196. if (!(rtc_readl(rtc, CTRL) & RTC_BIT(CTRL_EN))) {
  197. rtc_writel(rtc, CTRL, RTC_BIT(CTRL_PCLR));
  198. rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI));
  199. rtc_writel(rtc, CTRL, RTC_BF(CTRL_PSEL, 0xe)
  200. | RTC_BIT(CTRL_EN));
  201. }
  202. ret = request_irq(irq, at32_rtc_interrupt, IRQF_SHARED, "rtc", rtc);
  203. if (ret) {
  204. dev_dbg(&pdev->dev, "could not request irq %d\n", irq);
  205. goto out_iounmap;
  206. }
  207. platform_set_drvdata(pdev, rtc);
  208. rtc->rtc = rtc_device_register(pdev->name, &pdev->dev,
  209. &at32_rtc_ops, THIS_MODULE);
  210. if (IS_ERR(rtc->rtc)) {
  211. dev_dbg(&pdev->dev, "could not register rtc device\n");
  212. ret = PTR_ERR(rtc->rtc);
  213. goto out_free_irq;
  214. }
  215. device_init_wakeup(&pdev->dev, 1);
  216. dev_info(&pdev->dev, "Atmel RTC for AT32AP700x at %08lx irq %ld\n",
  217. (unsigned long)rtc->regs, rtc->irq);
  218. return 0;
  219. out_free_irq:
  220. platform_set_drvdata(pdev, NULL);
  221. free_irq(irq, rtc);
  222. out_iounmap:
  223. iounmap(rtc->regs);
  224. out:
  225. kfree(rtc);
  226. return ret;
  227. }
  228. static int __exit at32_rtc_remove(struct platform_device *pdev)
  229. {
  230. struct rtc_at32ap700x *rtc = platform_get_drvdata(pdev);
  231. device_init_wakeup(&pdev->dev, 0);
  232. free_irq(rtc->irq, rtc);
  233. iounmap(rtc->regs);
  234. rtc_device_unregister(rtc->rtc);
  235. kfree(rtc);
  236. platform_set_drvdata(pdev, NULL);
  237. return 0;
  238. }
  239. MODULE_ALIAS("platform:at32ap700x_rtc");
  240. static struct platform_driver at32_rtc_driver = {
  241. .remove = __exit_p(at32_rtc_remove),
  242. .driver = {
  243. .name = "at32ap700x_rtc",
  244. .owner = THIS_MODULE,
  245. },
  246. };
  247. static int __init at32_rtc_init(void)
  248. {
  249. return platform_driver_probe(&at32_rtc_driver, at32_rtc_probe);
  250. }
  251. module_init(at32_rtc_init);
  252. static void __exit at32_rtc_exit(void)
  253. {
  254. platform_driver_unregister(&at32_rtc_driver);
  255. }
  256. module_exit(at32_rtc_exit);
  257. MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>");
  258. MODULE_DESCRIPTION("Real time clock for AVR32 AT32AP700x");
  259. MODULE_LICENSE("GPL");