at91_ether.h 3.1 KB

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  1. /*
  2. * Ethernet driver for the Atmel AT91RM9200 (Thunder)
  3. *
  4. * Copyright (C) SAN People (Pty) Ltd
  5. *
  6. * Based on an earlier Atmel EMAC macrocell driver by Atmel and Lineo Inc.
  7. * Initial version by Rick Bronson.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #ifndef AT91_ETHERNET
  15. #define AT91_ETHERNET
  16. /* Davicom 9161 PHY */
  17. #define MII_DM9161_ID 0x0181b880
  18. #define MII_DM9161A_ID 0x0181b8a0
  19. #define MII_DSCR_REG 16
  20. #define MII_DSCSR_REG 17
  21. #define MII_DSINTR_REG 21
  22. /* Intel LXT971A PHY */
  23. #define MII_LXT971A_ID 0x001378E0
  24. #define MII_ISINTE_REG 18
  25. #define MII_ISINTS_REG 19
  26. #define MII_LEDCTRL_REG 20
  27. /* Realtek RTL8201 PHY */
  28. #define MII_RTL8201_ID 0x00008200
  29. /* Broadcom BCM5221 PHY */
  30. #define MII_BCM5221_ID 0x004061e0
  31. #define MII_BCMINTR_REG 26
  32. /* National Semiconductor DP83847 */
  33. #define MII_DP83847_ID 0x20005c30
  34. /* National Semiconductor DP83848 */
  35. #define MII_DP83848_ID 0x20005c90
  36. #define MII_DPPHYSTS_REG 16
  37. #define MII_DPMICR_REG 17
  38. #define MII_DPMISR_REG 18
  39. /* Altima AC101L PHY */
  40. #define MII_AC101L_ID 0x00225520
  41. /* Micrel KS8721 PHY */
  42. #define MII_KS8721_ID 0x00221610
  43. /* Teridian 78Q2123/78Q2133 */
  44. #define MII_T78Q21x3_ID 0x000e7230
  45. #define MII_T78Q21INT_REG 17
  46. /* SMSC LAN83C185 */
  47. #define MII_LAN83C185_ID 0x0007C0A0
  48. /* ........................................................................ */
  49. #define MAX_RBUFF_SZ 0x600 /* 1518 rounded up */
  50. #define MAX_RX_DESCR 9 /* max number of receive buffers */
  51. #define EMAC_DESC_DONE 0x00000001 /* bit for if DMA is done */
  52. #define EMAC_DESC_WRAP 0x00000002 /* bit for wrap */
  53. #define EMAC_BROADCAST 0x80000000 /* broadcast address */
  54. #define EMAC_MULTICAST 0x40000000 /* multicast address */
  55. #define EMAC_UNICAST 0x20000000 /* unicast address */
  56. struct rbf_t
  57. {
  58. unsigned int addr;
  59. unsigned long size;
  60. };
  61. struct recv_desc_bufs
  62. {
  63. struct rbf_t descriptors[MAX_RX_DESCR]; /* must be on sizeof (rbf_t) boundary */
  64. char recv_buf[MAX_RX_DESCR][MAX_RBUFF_SZ]; /* must be on long boundary */
  65. };
  66. struct at91_private
  67. {
  68. struct mii_if_info mii; /* ethtool support */
  69. struct macb_platform_data board_data; /* board-specific
  70. * configuration (shared with
  71. * macb for common data */
  72. struct clk *ether_clk; /* clock */
  73. /* PHY */
  74. unsigned long phy_type; /* type of PHY (PHY_ID) */
  75. spinlock_t lock; /* lock for MDI interface */
  76. short phy_media; /* media interface type */
  77. unsigned short phy_address; /* 5-bit MDI address of PHY (0..31) */
  78. struct timer_list check_timer; /* Poll link status */
  79. /* Transmit */
  80. struct sk_buff *skb; /* holds skb until xmit interrupt completes */
  81. dma_addr_t skb_physaddr; /* phys addr from pci_map_single */
  82. int skb_length; /* saved skb length for pci_unmap_single */
  83. /* Receive */
  84. int rxBuffIndex; /* index into receive descriptor list */
  85. struct recv_desc_bufs *dlist; /* descriptor list address */
  86. struct recv_desc_bufs *dlist_phys; /* descriptor list physical address */
  87. };
  88. #endif