sunlance.c 40 KB

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  1. /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char lancestr[] = "LANCE";
  71. #include <linux/module.h>
  72. #include <linux/kernel.h>
  73. #include <linux/types.h>
  74. #include <linux/fcntl.h>
  75. #include <linux/interrupt.h>
  76. #include <linux/ioport.h>
  77. #include <linux/in.h>
  78. #include <linux/string.h>
  79. #include <linux/delay.h>
  80. #include <linux/init.h>
  81. #include <linux/crc32.h>
  82. #include <linux/errno.h>
  83. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  84. #include <linux/route.h>
  85. #include <linux/netdevice.h>
  86. #include <linux/etherdevice.h>
  87. #include <linux/skbuff.h>
  88. #include <linux/ethtool.h>
  89. #include <linux/bitops.h>
  90. #include <linux/dma-mapping.h>
  91. #include <linux/of.h>
  92. #include <linux/of_device.h>
  93. #include <linux/gfp.h>
  94. #include <asm/io.h>
  95. #include <asm/dma.h>
  96. #include <asm/pgtable.h>
  97. #include <asm/byteorder.h> /* Used by the checksum routines */
  98. #include <asm/idprom.h>
  99. #include <asm/prom.h>
  100. #include <asm/auxio.h> /* For tpe-link-test? setting */
  101. #include <asm/irq.h>
  102. #define DRV_NAME "sunlance"
  103. #define DRV_VERSION "2.02"
  104. #define DRV_RELDATE "8/24/03"
  105. #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
  106. static char version[] =
  107. DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  108. MODULE_VERSION(DRV_VERSION);
  109. MODULE_AUTHOR(DRV_AUTHOR);
  110. MODULE_DESCRIPTION("Sun Lance ethernet driver");
  111. MODULE_LICENSE("GPL");
  112. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  113. #ifndef LANCE_LOG_TX_BUFFERS
  114. #define LANCE_LOG_TX_BUFFERS 4
  115. #define LANCE_LOG_RX_BUFFERS 4
  116. #endif
  117. #define LE_CSR0 0
  118. #define LE_CSR1 1
  119. #define LE_CSR2 2
  120. #define LE_CSR3 3
  121. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  122. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  123. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  124. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  125. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  126. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  127. #define LE_C0_RINT 0x0400 /* Received interrupt */
  128. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  129. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  130. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  131. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  132. #define LE_C0_RXON 0x0020 /* Receiver on */
  133. #define LE_C0_TXON 0x0010 /* Transmitter on */
  134. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  135. #define LE_C0_STOP 0x0004 /* Stop the card */
  136. #define LE_C0_STRT 0x0002 /* Start the card */
  137. #define LE_C0_INIT 0x0001 /* Init the card */
  138. #define LE_C3_BSWP 0x4 /* SWAP */
  139. #define LE_C3_ACON 0x2 /* ALE Control */
  140. #define LE_C3_BCON 0x1 /* Byte control */
  141. /* Receive message descriptor 1 */
  142. #define LE_R1_OWN 0x80 /* Who owns the entry */
  143. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  144. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  145. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  146. #define LE_R1_CRC 0x08 /* CRC error */
  147. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  148. #define LE_R1_SOP 0x02 /* Start of packet */
  149. #define LE_R1_EOP 0x01 /* End of packet */
  150. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  151. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  152. #define LE_T1_ERR 0x40 /* Error summary */
  153. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  154. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  155. #define LE_T1_EDEF 0x04 /* Error: deferred */
  156. #define LE_T1_SOP 0x02 /* Start of packet */
  157. #define LE_T1_EOP 0x01 /* End of packet */
  158. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  159. #define LE_T3_BUF 0x8000 /* Buffer error */
  160. #define LE_T3_UFL 0x4000 /* Error underflow */
  161. #define LE_T3_LCOL 0x1000 /* Error late collision */
  162. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  163. #define LE_T3_RTY 0x0400 /* Error retry */
  164. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  165. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  166. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  167. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  168. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  169. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  170. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  171. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  172. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  173. #define PKT_BUF_SZ 1544
  174. #define RX_BUFF_SIZE PKT_BUF_SZ
  175. #define TX_BUFF_SIZE PKT_BUF_SZ
  176. struct lance_rx_desc {
  177. u16 rmd0; /* low address of packet */
  178. u8 rmd1_bits; /* descriptor bits */
  179. u8 rmd1_hadr; /* high address of packet */
  180. s16 length; /* This length is 2s complement (negative)!
  181. * Buffer length
  182. */
  183. u16 mblength; /* This is the actual number of bytes received */
  184. };
  185. struct lance_tx_desc {
  186. u16 tmd0; /* low address of packet */
  187. u8 tmd1_bits; /* descriptor bits */
  188. u8 tmd1_hadr; /* high address of packet */
  189. s16 length; /* Length is 2s complement (negative)! */
  190. u16 misc;
  191. };
  192. /* The LANCE initialization block, described in databook. */
  193. /* On the Sparc, this block should be on a DMA region */
  194. struct lance_init_block {
  195. u16 mode; /* Pre-set mode (reg. 15) */
  196. u8 phys_addr[6]; /* Physical ethernet address */
  197. u32 filter[2]; /* Multicast filter. */
  198. /* Receive and transmit ring base, along with extra bits. */
  199. u16 rx_ptr; /* receive descriptor addr */
  200. u16 rx_len; /* receive len and high addr */
  201. u16 tx_ptr; /* transmit descriptor addr */
  202. u16 tx_len; /* transmit len and high addr */
  203. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  204. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  205. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  206. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  207. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  208. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  209. };
  210. #define libdesc_offset(rt, elem) \
  211. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  212. #define libbuff_offset(rt, elem) \
  213. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  214. struct lance_private {
  215. void __iomem *lregs; /* Lance RAP/RDP regs. */
  216. void __iomem *dregs; /* DMA controller regs. */
  217. struct lance_init_block __iomem *init_block_iomem;
  218. struct lance_init_block *init_block_mem;
  219. spinlock_t lock;
  220. int rx_new, tx_new;
  221. int rx_old, tx_old;
  222. struct platform_device *ledma; /* If set this points to ledma */
  223. char tpe; /* cable-selection is TPE */
  224. char auto_select; /* cable-selection by carrier */
  225. char burst_sizes; /* ledma SBus burst sizes */
  226. char pio_buffer; /* init block in PIO space? */
  227. unsigned short busmaster_regval;
  228. void (*init_ring)(struct net_device *);
  229. void (*rx)(struct net_device *);
  230. void (*tx)(struct net_device *);
  231. char *name;
  232. dma_addr_t init_block_dvma;
  233. struct net_device *dev; /* Backpointer */
  234. struct platform_device *op;
  235. struct platform_device *lebuffer;
  236. struct timer_list multicast_timer;
  237. };
  238. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  239. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  240. lp->tx_old - lp->tx_new-1)
  241. /* Lance registers. */
  242. #define RDP 0x00UL /* register data port */
  243. #define RAP 0x02UL /* register address port */
  244. #define LANCE_REG_SIZE 0x04UL
  245. #define STOP_LANCE(__lp) \
  246. do { void __iomem *__base = (__lp)->lregs; \
  247. sbus_writew(LE_CSR0, __base + RAP); \
  248. sbus_writew(LE_C0_STOP, __base + RDP); \
  249. } while (0)
  250. int sparc_lance_debug = 2;
  251. /* The Lance uses 24 bit addresses */
  252. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  253. /* On the Sun4m we have to instruct the ledma to provide them */
  254. /* Even worse, on scsi/ether SBUS cards, the init block and the
  255. * transmit/receive buffers are addresses as offsets from absolute
  256. * zero on the lebuffer PIO area. -DaveM
  257. */
  258. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  259. /* Load the CSR registers */
  260. static void load_csrs(struct lance_private *lp)
  261. {
  262. u32 leptr;
  263. if (lp->pio_buffer)
  264. leptr = 0;
  265. else
  266. leptr = LANCE_ADDR(lp->init_block_dvma);
  267. sbus_writew(LE_CSR1, lp->lregs + RAP);
  268. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  269. sbus_writew(LE_CSR2, lp->lregs + RAP);
  270. sbus_writew(leptr >> 16, lp->lregs + RDP);
  271. sbus_writew(LE_CSR3, lp->lregs + RAP);
  272. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  273. /* Point back to csr0 */
  274. sbus_writew(LE_CSR0, lp->lregs + RAP);
  275. }
  276. /* Setup the Lance Rx and Tx rings */
  277. static void lance_init_ring_dvma(struct net_device *dev)
  278. {
  279. struct lance_private *lp = netdev_priv(dev);
  280. struct lance_init_block *ib = lp->init_block_mem;
  281. dma_addr_t aib = lp->init_block_dvma;
  282. __u32 leptr;
  283. int i;
  284. /* Lock out other processes while setting up hardware */
  285. netif_stop_queue(dev);
  286. lp->rx_new = lp->tx_new = 0;
  287. lp->rx_old = lp->tx_old = 0;
  288. /* Copy the ethernet address to the lance init block
  289. * Note that on the sparc you need to swap the ethernet address.
  290. */
  291. ib->phys_addr [0] = dev->dev_addr [1];
  292. ib->phys_addr [1] = dev->dev_addr [0];
  293. ib->phys_addr [2] = dev->dev_addr [3];
  294. ib->phys_addr [3] = dev->dev_addr [2];
  295. ib->phys_addr [4] = dev->dev_addr [5];
  296. ib->phys_addr [5] = dev->dev_addr [4];
  297. /* Setup the Tx ring entries */
  298. for (i = 0; i < TX_RING_SIZE; i++) {
  299. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  300. ib->btx_ring [i].tmd0 = leptr;
  301. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  302. ib->btx_ring [i].tmd1_bits = 0;
  303. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  304. ib->btx_ring [i].misc = 0;
  305. }
  306. /* Setup the Rx ring entries */
  307. for (i = 0; i < RX_RING_SIZE; i++) {
  308. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  309. ib->brx_ring [i].rmd0 = leptr;
  310. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  311. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  312. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  313. ib->brx_ring [i].mblength = 0;
  314. }
  315. /* Setup the initialization block */
  316. /* Setup rx descriptor pointer */
  317. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  318. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  319. ib->rx_ptr = leptr;
  320. /* Setup tx descriptor pointer */
  321. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  322. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  323. ib->tx_ptr = leptr;
  324. }
  325. static void lance_init_ring_pio(struct net_device *dev)
  326. {
  327. struct lance_private *lp = netdev_priv(dev);
  328. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  329. u32 leptr;
  330. int i;
  331. /* Lock out other processes while setting up hardware */
  332. netif_stop_queue(dev);
  333. lp->rx_new = lp->tx_new = 0;
  334. lp->rx_old = lp->tx_old = 0;
  335. /* Copy the ethernet address to the lance init block
  336. * Note that on the sparc you need to swap the ethernet address.
  337. */
  338. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  339. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  340. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  341. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  342. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  343. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  344. /* Setup the Tx ring entries */
  345. for (i = 0; i < TX_RING_SIZE; i++) {
  346. leptr = libbuff_offset(tx_buf, i);
  347. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  348. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  349. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  350. /* The ones required by tmd2 */
  351. sbus_writew(0xf000, &ib->btx_ring [i].length);
  352. sbus_writew(0, &ib->btx_ring [i].misc);
  353. }
  354. /* Setup the Rx ring entries */
  355. for (i = 0; i < RX_RING_SIZE; i++) {
  356. leptr = libbuff_offset(rx_buf, i);
  357. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  358. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  359. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  360. sbus_writew(-RX_BUFF_SIZE|0xf000,
  361. &ib->brx_ring [i].length);
  362. sbus_writew(0, &ib->brx_ring [i].mblength);
  363. }
  364. /* Setup the initialization block */
  365. /* Setup rx descriptor pointer */
  366. leptr = libdesc_offset(brx_ring, 0);
  367. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  368. &ib->rx_len);
  369. sbus_writew(leptr, &ib->rx_ptr);
  370. /* Setup tx descriptor pointer */
  371. leptr = libdesc_offset(btx_ring, 0);
  372. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  373. &ib->tx_len);
  374. sbus_writew(leptr, &ib->tx_ptr);
  375. }
  376. static void init_restart_ledma(struct lance_private *lp)
  377. {
  378. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  379. if (!(csr & DMA_HNDL_ERROR)) {
  380. /* E-Cache draining */
  381. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  382. barrier();
  383. }
  384. csr = sbus_readl(lp->dregs + DMA_CSR);
  385. csr &= ~DMA_E_BURSTS;
  386. if (lp->burst_sizes & DMA_BURST32)
  387. csr |= DMA_E_BURST32;
  388. else
  389. csr |= DMA_E_BURST16;
  390. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  391. if (lp->tpe)
  392. csr |= DMA_EN_ENETAUI;
  393. else
  394. csr &= ~DMA_EN_ENETAUI;
  395. udelay(20);
  396. sbus_writel(csr, lp->dregs + DMA_CSR);
  397. udelay(200);
  398. }
  399. static int init_restart_lance(struct lance_private *lp)
  400. {
  401. u16 regval = 0;
  402. int i;
  403. if (lp->dregs)
  404. init_restart_ledma(lp);
  405. sbus_writew(LE_CSR0, lp->lregs + RAP);
  406. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  407. /* Wait for the lance to complete initialization */
  408. for (i = 0; i < 100; i++) {
  409. regval = sbus_readw(lp->lregs + RDP);
  410. if (regval & (LE_C0_ERR | LE_C0_IDON))
  411. break;
  412. barrier();
  413. }
  414. if (i == 100 || (regval & LE_C0_ERR)) {
  415. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  416. i, regval);
  417. if (lp->dregs)
  418. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  419. return -1;
  420. }
  421. /* Clear IDON by writing a "1", enable interrupts and start lance */
  422. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  423. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  424. if (lp->dregs) {
  425. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  426. csr |= DMA_INT_ENAB;
  427. sbus_writel(csr, lp->dregs + DMA_CSR);
  428. }
  429. return 0;
  430. }
  431. static void lance_rx_dvma(struct net_device *dev)
  432. {
  433. struct lance_private *lp = netdev_priv(dev);
  434. struct lance_init_block *ib = lp->init_block_mem;
  435. struct lance_rx_desc *rd;
  436. u8 bits;
  437. int len, entry = lp->rx_new;
  438. struct sk_buff *skb;
  439. for (rd = &ib->brx_ring [entry];
  440. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  441. rd = &ib->brx_ring [entry]) {
  442. /* We got an incomplete frame? */
  443. if ((bits & LE_R1_POK) != LE_R1_POK) {
  444. dev->stats.rx_over_errors++;
  445. dev->stats.rx_errors++;
  446. } else if (bits & LE_R1_ERR) {
  447. /* Count only the end frame as a rx error,
  448. * not the beginning
  449. */
  450. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  451. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  452. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  453. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  454. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  455. } else {
  456. len = (rd->mblength & 0xfff) - 4;
  457. skb = netdev_alloc_skb(dev, len + 2);
  458. if (skb == NULL) {
  459. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  460. dev->name);
  461. dev->stats.rx_dropped++;
  462. rd->mblength = 0;
  463. rd->rmd1_bits = LE_R1_OWN;
  464. lp->rx_new = RX_NEXT(entry);
  465. return;
  466. }
  467. dev->stats.rx_bytes += len;
  468. skb_reserve(skb, 2); /* 16 byte align */
  469. skb_put(skb, len); /* make room */
  470. skb_copy_to_linear_data(skb,
  471. (unsigned char *)&(ib->rx_buf [entry][0]),
  472. len);
  473. skb->protocol = eth_type_trans(skb, dev);
  474. netif_rx(skb);
  475. dev->stats.rx_packets++;
  476. }
  477. /* Return the packet to the pool */
  478. rd->mblength = 0;
  479. rd->rmd1_bits = LE_R1_OWN;
  480. entry = RX_NEXT(entry);
  481. }
  482. lp->rx_new = entry;
  483. }
  484. static void lance_tx_dvma(struct net_device *dev)
  485. {
  486. struct lance_private *lp = netdev_priv(dev);
  487. struct lance_init_block *ib = lp->init_block_mem;
  488. int i, j;
  489. spin_lock(&lp->lock);
  490. j = lp->tx_old;
  491. for (i = j; i != lp->tx_new; i = j) {
  492. struct lance_tx_desc *td = &ib->btx_ring [i];
  493. u8 bits = td->tmd1_bits;
  494. /* If we hit a packet not owned by us, stop */
  495. if (bits & LE_T1_OWN)
  496. break;
  497. if (bits & LE_T1_ERR) {
  498. u16 status = td->misc;
  499. dev->stats.tx_errors++;
  500. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  501. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  502. if (status & LE_T3_CLOS) {
  503. dev->stats.tx_carrier_errors++;
  504. if (lp->auto_select) {
  505. lp->tpe = 1 - lp->tpe;
  506. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  507. dev->name, lp->tpe?"TPE":"AUI");
  508. STOP_LANCE(lp);
  509. lp->init_ring(dev);
  510. load_csrs(lp);
  511. init_restart_lance(lp);
  512. goto out;
  513. }
  514. }
  515. /* Buffer errors and underflows turn off the
  516. * transmitter, restart the adapter.
  517. */
  518. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  519. dev->stats.tx_fifo_errors++;
  520. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  521. dev->name);
  522. STOP_LANCE(lp);
  523. lp->init_ring(dev);
  524. load_csrs(lp);
  525. init_restart_lance(lp);
  526. goto out;
  527. }
  528. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  529. /*
  530. * So we don't count the packet more than once.
  531. */
  532. td->tmd1_bits = bits & ~(LE_T1_POK);
  533. /* One collision before packet was sent. */
  534. if (bits & LE_T1_EONE)
  535. dev->stats.collisions++;
  536. /* More than one collision, be optimistic. */
  537. if (bits & LE_T1_EMORE)
  538. dev->stats.collisions += 2;
  539. dev->stats.tx_packets++;
  540. }
  541. j = TX_NEXT(j);
  542. }
  543. lp->tx_old = j;
  544. out:
  545. if (netif_queue_stopped(dev) &&
  546. TX_BUFFS_AVAIL > 0)
  547. netif_wake_queue(dev);
  548. spin_unlock(&lp->lock);
  549. }
  550. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  551. {
  552. u16 *p16 = (u16 *) skb->data;
  553. u32 *p32;
  554. u8 *p8;
  555. void __iomem *pbuf = piobuf;
  556. /* We know here that both src and dest are on a 16bit boundary. */
  557. *p16++ = sbus_readw(pbuf);
  558. p32 = (u32 *) p16;
  559. pbuf += 2;
  560. len -= 2;
  561. while (len >= 4) {
  562. *p32++ = sbus_readl(pbuf);
  563. pbuf += 4;
  564. len -= 4;
  565. }
  566. p8 = (u8 *) p32;
  567. if (len >= 2) {
  568. p16 = (u16 *) p32;
  569. *p16++ = sbus_readw(pbuf);
  570. pbuf += 2;
  571. len -= 2;
  572. p8 = (u8 *) p16;
  573. }
  574. if (len >= 1)
  575. *p8 = sbus_readb(pbuf);
  576. }
  577. static void lance_rx_pio(struct net_device *dev)
  578. {
  579. struct lance_private *lp = netdev_priv(dev);
  580. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  581. struct lance_rx_desc __iomem *rd;
  582. unsigned char bits;
  583. int len, entry;
  584. struct sk_buff *skb;
  585. entry = lp->rx_new;
  586. for (rd = &ib->brx_ring [entry];
  587. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  588. rd = &ib->brx_ring [entry]) {
  589. /* We got an incomplete frame? */
  590. if ((bits & LE_R1_POK) != LE_R1_POK) {
  591. dev->stats.rx_over_errors++;
  592. dev->stats.rx_errors++;
  593. } else if (bits & LE_R1_ERR) {
  594. /* Count only the end frame as a rx error,
  595. * not the beginning
  596. */
  597. if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
  598. if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
  599. if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
  600. if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
  601. if (bits & LE_R1_EOP) dev->stats.rx_errors++;
  602. } else {
  603. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  604. skb = netdev_alloc_skb(dev, len + 2);
  605. if (skb == NULL) {
  606. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  607. dev->name);
  608. dev->stats.rx_dropped++;
  609. sbus_writew(0, &rd->mblength);
  610. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  611. lp->rx_new = RX_NEXT(entry);
  612. return;
  613. }
  614. dev->stats.rx_bytes += len;
  615. skb_reserve (skb, 2); /* 16 byte align */
  616. skb_put(skb, len); /* make room */
  617. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  618. skb->protocol = eth_type_trans(skb, dev);
  619. netif_rx(skb);
  620. dev->stats.rx_packets++;
  621. }
  622. /* Return the packet to the pool */
  623. sbus_writew(0, &rd->mblength);
  624. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  625. entry = RX_NEXT(entry);
  626. }
  627. lp->rx_new = entry;
  628. }
  629. static void lance_tx_pio(struct net_device *dev)
  630. {
  631. struct lance_private *lp = netdev_priv(dev);
  632. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  633. int i, j;
  634. spin_lock(&lp->lock);
  635. j = lp->tx_old;
  636. for (i = j; i != lp->tx_new; i = j) {
  637. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  638. u8 bits = sbus_readb(&td->tmd1_bits);
  639. /* If we hit a packet not owned by us, stop */
  640. if (bits & LE_T1_OWN)
  641. break;
  642. if (bits & LE_T1_ERR) {
  643. u16 status = sbus_readw(&td->misc);
  644. dev->stats.tx_errors++;
  645. if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
  646. if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
  647. if (status & LE_T3_CLOS) {
  648. dev->stats.tx_carrier_errors++;
  649. if (lp->auto_select) {
  650. lp->tpe = 1 - lp->tpe;
  651. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  652. dev->name, lp->tpe?"TPE":"AUI");
  653. STOP_LANCE(lp);
  654. lp->init_ring(dev);
  655. load_csrs(lp);
  656. init_restart_lance(lp);
  657. goto out;
  658. }
  659. }
  660. /* Buffer errors and underflows turn off the
  661. * transmitter, restart the adapter.
  662. */
  663. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  664. dev->stats.tx_fifo_errors++;
  665. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  666. dev->name);
  667. STOP_LANCE(lp);
  668. lp->init_ring(dev);
  669. load_csrs(lp);
  670. init_restart_lance(lp);
  671. goto out;
  672. }
  673. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  674. /*
  675. * So we don't count the packet more than once.
  676. */
  677. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  678. /* One collision before packet was sent. */
  679. if (bits & LE_T1_EONE)
  680. dev->stats.collisions++;
  681. /* More than one collision, be optimistic. */
  682. if (bits & LE_T1_EMORE)
  683. dev->stats.collisions += 2;
  684. dev->stats.tx_packets++;
  685. }
  686. j = TX_NEXT(j);
  687. }
  688. lp->tx_old = j;
  689. if (netif_queue_stopped(dev) &&
  690. TX_BUFFS_AVAIL > 0)
  691. netif_wake_queue(dev);
  692. out:
  693. spin_unlock(&lp->lock);
  694. }
  695. static irqreturn_t lance_interrupt(int irq, void *dev_id)
  696. {
  697. struct net_device *dev = dev_id;
  698. struct lance_private *lp = netdev_priv(dev);
  699. int csr0;
  700. sbus_writew(LE_CSR0, lp->lregs + RAP);
  701. csr0 = sbus_readw(lp->lregs + RDP);
  702. /* Acknowledge all the interrupt sources ASAP */
  703. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  704. lp->lregs + RDP);
  705. if ((csr0 & LE_C0_ERR) != 0) {
  706. /* Clear the error condition */
  707. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  708. LE_C0_CERR | LE_C0_MERR),
  709. lp->lregs + RDP);
  710. }
  711. if (csr0 & LE_C0_RINT)
  712. lp->rx(dev);
  713. if (csr0 & LE_C0_TINT)
  714. lp->tx(dev);
  715. if (csr0 & LE_C0_BABL)
  716. dev->stats.tx_errors++;
  717. if (csr0 & LE_C0_MISS)
  718. dev->stats.rx_errors++;
  719. if (csr0 & LE_C0_MERR) {
  720. if (lp->dregs) {
  721. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  722. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  723. dev->name, csr0, addr & 0xffffff);
  724. } else {
  725. printk(KERN_ERR "%s: Memory error, status %04x\n",
  726. dev->name, csr0);
  727. }
  728. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  729. if (lp->dregs) {
  730. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  731. dma_csr |= DMA_FIFO_INV;
  732. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  733. }
  734. lp->init_ring(dev);
  735. load_csrs(lp);
  736. init_restart_lance(lp);
  737. netif_wake_queue(dev);
  738. }
  739. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  740. return IRQ_HANDLED;
  741. }
  742. /* Build a fake network packet and send it to ourselves. */
  743. static void build_fake_packet(struct lance_private *lp)
  744. {
  745. struct net_device *dev = lp->dev;
  746. int i, entry;
  747. entry = lp->tx_new & TX_RING_MOD_MASK;
  748. if (lp->pio_buffer) {
  749. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  750. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  751. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  752. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  753. sbus_writew(0, &packet[i]);
  754. for (i = 0; i < 6; i++) {
  755. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  756. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  757. }
  758. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  759. sbus_writew(0, &ib->btx_ring[entry].misc);
  760. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  761. } else {
  762. struct lance_init_block *ib = lp->init_block_mem;
  763. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  764. struct ethhdr *eth = (struct ethhdr *) packet;
  765. memset(packet, 0, ETH_ZLEN);
  766. for (i = 0; i < 6; i++) {
  767. eth->h_dest[i] = dev->dev_addr[i];
  768. eth->h_source[i] = dev->dev_addr[i];
  769. }
  770. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  771. ib->btx_ring[entry].misc = 0;
  772. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  773. }
  774. lp->tx_new = TX_NEXT(entry);
  775. }
  776. static int lance_open(struct net_device *dev)
  777. {
  778. struct lance_private *lp = netdev_priv(dev);
  779. int status = 0;
  780. STOP_LANCE(lp);
  781. if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED,
  782. lancestr, (void *) dev)) {
  783. printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
  784. return -EAGAIN;
  785. }
  786. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  787. if (lp->dregs) {
  788. u32 regval = lp->init_block_dvma & 0xff000000;
  789. sbus_writel(regval, lp->dregs + DMA_TEST);
  790. }
  791. /* Set mode and clear multicast filter only at device open,
  792. * so that lance_init_ring() called at any error will not
  793. * forget multicast filters.
  794. *
  795. * BTW it is common bug in all lance drivers! --ANK
  796. */
  797. if (lp->pio_buffer) {
  798. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  799. sbus_writew(0, &ib->mode);
  800. sbus_writel(0, &ib->filter[0]);
  801. sbus_writel(0, &ib->filter[1]);
  802. } else {
  803. struct lance_init_block *ib = lp->init_block_mem;
  804. ib->mode = 0;
  805. ib->filter [0] = 0;
  806. ib->filter [1] = 0;
  807. }
  808. lp->init_ring(dev);
  809. load_csrs(lp);
  810. netif_start_queue(dev);
  811. status = init_restart_lance(lp);
  812. if (!status && lp->auto_select) {
  813. build_fake_packet(lp);
  814. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  815. }
  816. return status;
  817. }
  818. static int lance_close(struct net_device *dev)
  819. {
  820. struct lance_private *lp = netdev_priv(dev);
  821. netif_stop_queue(dev);
  822. del_timer_sync(&lp->multicast_timer);
  823. STOP_LANCE(lp);
  824. free_irq(dev->irq, (void *) dev);
  825. return 0;
  826. }
  827. static int lance_reset(struct net_device *dev)
  828. {
  829. struct lance_private *lp = netdev_priv(dev);
  830. int status;
  831. STOP_LANCE(lp);
  832. /* On the 4m, reset the dma too */
  833. if (lp->dregs) {
  834. u32 csr, addr;
  835. printk(KERN_ERR "resetting ledma\n");
  836. csr = sbus_readl(lp->dregs + DMA_CSR);
  837. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  838. udelay(200);
  839. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  840. addr = lp->init_block_dvma & 0xff000000;
  841. sbus_writel(addr, lp->dregs + DMA_TEST);
  842. }
  843. lp->init_ring(dev);
  844. load_csrs(lp);
  845. dev->trans_start = jiffies; /* prevent tx timeout */
  846. status = init_restart_lance(lp);
  847. return status;
  848. }
  849. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  850. {
  851. void __iomem *piobuf = dest;
  852. u32 *p32;
  853. u16 *p16;
  854. u8 *p8;
  855. switch ((unsigned long)src & 0x3) {
  856. case 0:
  857. p32 = (u32 *) src;
  858. while (len >= 4) {
  859. sbus_writel(*p32, piobuf);
  860. p32++;
  861. piobuf += 4;
  862. len -= 4;
  863. }
  864. src = (char *) p32;
  865. break;
  866. case 1:
  867. case 3:
  868. p8 = (u8 *) src;
  869. while (len >= 4) {
  870. u32 val;
  871. val = p8[0] << 24;
  872. val |= p8[1] << 16;
  873. val |= p8[2] << 8;
  874. val |= p8[3];
  875. sbus_writel(val, piobuf);
  876. p8 += 4;
  877. piobuf += 4;
  878. len -= 4;
  879. }
  880. src = (char *) p8;
  881. break;
  882. case 2:
  883. p16 = (u16 *) src;
  884. while (len >= 4) {
  885. u32 val = p16[0]<<16 | p16[1];
  886. sbus_writel(val, piobuf);
  887. p16 += 2;
  888. piobuf += 4;
  889. len -= 4;
  890. }
  891. src = (char *) p16;
  892. break;
  893. }
  894. if (len >= 2) {
  895. u16 val = src[0] << 8 | src[1];
  896. sbus_writew(val, piobuf);
  897. src += 2;
  898. piobuf += 2;
  899. len -= 2;
  900. }
  901. if (len >= 1)
  902. sbus_writeb(src[0], piobuf);
  903. }
  904. static void lance_piozero(void __iomem *dest, int len)
  905. {
  906. void __iomem *piobuf = dest;
  907. if ((unsigned long)piobuf & 1) {
  908. sbus_writeb(0, piobuf);
  909. piobuf += 1;
  910. len -= 1;
  911. if (len == 0)
  912. return;
  913. }
  914. if (len == 1) {
  915. sbus_writeb(0, piobuf);
  916. return;
  917. }
  918. if ((unsigned long)piobuf & 2) {
  919. sbus_writew(0, piobuf);
  920. piobuf += 2;
  921. len -= 2;
  922. if (len == 0)
  923. return;
  924. }
  925. while (len >= 4) {
  926. sbus_writel(0, piobuf);
  927. piobuf += 4;
  928. len -= 4;
  929. }
  930. if (len >= 2) {
  931. sbus_writew(0, piobuf);
  932. piobuf += 2;
  933. len -= 2;
  934. }
  935. if (len >= 1)
  936. sbus_writeb(0, piobuf);
  937. }
  938. static void lance_tx_timeout(struct net_device *dev)
  939. {
  940. struct lance_private *lp = netdev_priv(dev);
  941. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  942. dev->name, sbus_readw(lp->lregs + RDP));
  943. lance_reset(dev);
  944. netif_wake_queue(dev);
  945. }
  946. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  947. {
  948. struct lance_private *lp = netdev_priv(dev);
  949. int entry, skblen, len;
  950. skblen = skb->len;
  951. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  952. spin_lock_irq(&lp->lock);
  953. dev->stats.tx_bytes += len;
  954. entry = lp->tx_new & TX_RING_MOD_MASK;
  955. if (lp->pio_buffer) {
  956. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  957. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  958. sbus_writew(0, &ib->btx_ring[entry].misc);
  959. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  960. if (len != skblen)
  961. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  962. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  963. } else {
  964. struct lance_init_block *ib = lp->init_block_mem;
  965. ib->btx_ring [entry].length = (-len) | 0xf000;
  966. ib->btx_ring [entry].misc = 0;
  967. skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
  968. if (len != skblen)
  969. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  970. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  971. }
  972. lp->tx_new = TX_NEXT(entry);
  973. if (TX_BUFFS_AVAIL <= 0)
  974. netif_stop_queue(dev);
  975. /* Kick the lance: transmit now */
  976. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  977. /* Read back CSR to invalidate the E-Cache.
  978. * This is needed, because DMA_DSBL_WR_INV is set.
  979. */
  980. if (lp->dregs)
  981. sbus_readw(lp->lregs + RDP);
  982. spin_unlock_irq(&lp->lock);
  983. dev_kfree_skb(skb);
  984. return NETDEV_TX_OK;
  985. }
  986. /* taken from the depca driver */
  987. static void lance_load_multicast(struct net_device *dev)
  988. {
  989. struct lance_private *lp = netdev_priv(dev);
  990. struct netdev_hw_addr *ha;
  991. u32 crc;
  992. u32 val;
  993. /* set all multicast bits */
  994. if (dev->flags & IFF_ALLMULTI)
  995. val = ~0;
  996. else
  997. val = 0;
  998. if (lp->pio_buffer) {
  999. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1000. sbus_writel(val, &ib->filter[0]);
  1001. sbus_writel(val, &ib->filter[1]);
  1002. } else {
  1003. struct lance_init_block *ib = lp->init_block_mem;
  1004. ib->filter [0] = val;
  1005. ib->filter [1] = val;
  1006. }
  1007. if (dev->flags & IFF_ALLMULTI)
  1008. return;
  1009. /* Add addresses */
  1010. netdev_for_each_mc_addr(ha, dev) {
  1011. crc = ether_crc_le(6, ha->addr);
  1012. crc = crc >> 26;
  1013. if (lp->pio_buffer) {
  1014. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1015. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1016. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1017. tmp |= 1 << (crc & 0xf);
  1018. sbus_writew(tmp, &mcast_table[crc>>4]);
  1019. } else {
  1020. struct lance_init_block *ib = lp->init_block_mem;
  1021. u16 *mcast_table = (u16 *) &ib->filter;
  1022. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1023. }
  1024. }
  1025. }
  1026. static void lance_set_multicast(struct net_device *dev)
  1027. {
  1028. struct lance_private *lp = netdev_priv(dev);
  1029. struct lance_init_block *ib_mem = lp->init_block_mem;
  1030. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1031. u16 mode;
  1032. if (!netif_running(dev))
  1033. return;
  1034. if (lp->tx_old != lp->tx_new) {
  1035. mod_timer(&lp->multicast_timer, jiffies + 4);
  1036. netif_wake_queue(dev);
  1037. return;
  1038. }
  1039. netif_stop_queue(dev);
  1040. STOP_LANCE(lp);
  1041. lp->init_ring(dev);
  1042. if (lp->pio_buffer)
  1043. mode = sbus_readw(&ib_iomem->mode);
  1044. else
  1045. mode = ib_mem->mode;
  1046. if (dev->flags & IFF_PROMISC) {
  1047. mode |= LE_MO_PROM;
  1048. if (lp->pio_buffer)
  1049. sbus_writew(mode, &ib_iomem->mode);
  1050. else
  1051. ib_mem->mode = mode;
  1052. } else {
  1053. mode &= ~LE_MO_PROM;
  1054. if (lp->pio_buffer)
  1055. sbus_writew(mode, &ib_iomem->mode);
  1056. else
  1057. ib_mem->mode = mode;
  1058. lance_load_multicast(dev);
  1059. }
  1060. load_csrs(lp);
  1061. init_restart_lance(lp);
  1062. netif_wake_queue(dev);
  1063. }
  1064. static void lance_set_multicast_retry(unsigned long _opaque)
  1065. {
  1066. struct net_device *dev = (struct net_device *) _opaque;
  1067. lance_set_multicast(dev);
  1068. }
  1069. static void lance_free_hwresources(struct lance_private *lp)
  1070. {
  1071. if (lp->lregs)
  1072. of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE);
  1073. if (lp->dregs) {
  1074. struct platform_device *ledma = lp->ledma;
  1075. of_iounmap(&ledma->resource[0], lp->dregs,
  1076. resource_size(&ledma->resource[0]));
  1077. }
  1078. if (lp->init_block_iomem) {
  1079. of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem,
  1080. sizeof(struct lance_init_block));
  1081. } else if (lp->init_block_mem) {
  1082. dma_free_coherent(&lp->op->dev,
  1083. sizeof(struct lance_init_block),
  1084. lp->init_block_mem,
  1085. lp->init_block_dvma);
  1086. }
  1087. }
  1088. /* Ethtool support... */
  1089. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1090. {
  1091. strcpy(info->driver, "sunlance");
  1092. strcpy(info->version, "2.02");
  1093. }
  1094. static const struct ethtool_ops sparc_lance_ethtool_ops = {
  1095. .get_drvinfo = sparc_lance_get_drvinfo,
  1096. .get_link = ethtool_op_get_link,
  1097. };
  1098. static const struct net_device_ops sparc_lance_ops = {
  1099. .ndo_open = lance_open,
  1100. .ndo_stop = lance_close,
  1101. .ndo_start_xmit = lance_start_xmit,
  1102. .ndo_set_rx_mode = lance_set_multicast,
  1103. .ndo_tx_timeout = lance_tx_timeout,
  1104. .ndo_change_mtu = eth_change_mtu,
  1105. .ndo_set_mac_address = eth_mac_addr,
  1106. .ndo_validate_addr = eth_validate_addr,
  1107. };
  1108. static int __devinit sparc_lance_probe_one(struct platform_device *op,
  1109. struct platform_device *ledma,
  1110. struct platform_device *lebuffer)
  1111. {
  1112. struct device_node *dp = op->dev.of_node;
  1113. static unsigned version_printed;
  1114. struct lance_private *lp;
  1115. struct net_device *dev;
  1116. int i;
  1117. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1118. if (!dev)
  1119. return -ENOMEM;
  1120. lp = netdev_priv(dev);
  1121. if (sparc_lance_debug && version_printed++ == 0)
  1122. printk (KERN_INFO "%s", version);
  1123. spin_lock_init(&lp->lock);
  1124. /* Copy the IDPROM ethernet address to the device structure, later we
  1125. * will copy the address in the device structure to the lance
  1126. * initialization block.
  1127. */
  1128. for (i = 0; i < 6; i++)
  1129. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1130. /* Get the IO region */
  1131. lp->lregs = of_ioremap(&op->resource[0], 0,
  1132. LANCE_REG_SIZE, lancestr);
  1133. if (!lp->lregs) {
  1134. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1135. goto fail;
  1136. }
  1137. lp->ledma = ledma;
  1138. if (lp->ledma) {
  1139. lp->dregs = of_ioremap(&ledma->resource[0], 0,
  1140. resource_size(&ledma->resource[0]),
  1141. "ledma");
  1142. if (!lp->dregs) {
  1143. printk(KERN_ERR "SunLance: Cannot map "
  1144. "ledma registers.\n");
  1145. goto fail;
  1146. }
  1147. }
  1148. lp->op = op;
  1149. lp->lebuffer = lebuffer;
  1150. if (lebuffer) {
  1151. /* sanity check */
  1152. if (lebuffer->resource[0].start & 7) {
  1153. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1154. goto fail;
  1155. }
  1156. lp->init_block_iomem =
  1157. of_ioremap(&lebuffer->resource[0], 0,
  1158. sizeof(struct lance_init_block), "lebuffer");
  1159. if (!lp->init_block_iomem) {
  1160. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1161. goto fail;
  1162. }
  1163. lp->init_block_dvma = 0;
  1164. lp->pio_buffer = 1;
  1165. lp->init_ring = lance_init_ring_pio;
  1166. lp->rx = lance_rx_pio;
  1167. lp->tx = lance_tx_pio;
  1168. } else {
  1169. lp->init_block_mem =
  1170. dma_alloc_coherent(&op->dev,
  1171. sizeof(struct lance_init_block),
  1172. &lp->init_block_dvma, GFP_ATOMIC);
  1173. if (!lp->init_block_mem) {
  1174. printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
  1175. goto fail;
  1176. }
  1177. lp->pio_buffer = 0;
  1178. lp->init_ring = lance_init_ring_dvma;
  1179. lp->rx = lance_rx_dvma;
  1180. lp->tx = lance_tx_dvma;
  1181. }
  1182. lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
  1183. (LE_C3_BSWP |
  1184. LE_C3_ACON |
  1185. LE_C3_BCON));
  1186. lp->name = lancestr;
  1187. lp->burst_sizes = 0;
  1188. if (lp->ledma) {
  1189. struct device_node *ledma_dp = ledma->dev.of_node;
  1190. struct device_node *sbus_dp;
  1191. unsigned int sbmask;
  1192. const char *prop;
  1193. u32 csr;
  1194. /* Find burst-size property for ledma */
  1195. lp->burst_sizes = of_getintprop_default(ledma_dp,
  1196. "burst-sizes", 0);
  1197. /* ledma may be capable of fast bursts, but sbus may not. */
  1198. sbus_dp = ledma_dp->parent;
  1199. sbmask = of_getintprop_default(sbus_dp, "burst-sizes",
  1200. DMA_BURSTBITS);
  1201. lp->burst_sizes &= sbmask;
  1202. /* Get the cable-selection property */
  1203. prop = of_get_property(ledma_dp, "cable-selection", NULL);
  1204. if (!prop || prop[0] == '\0') {
  1205. struct device_node *nd;
  1206. printk(KERN_INFO "SunLance: using "
  1207. "auto-carrier-detection.\n");
  1208. nd = of_find_node_by_path("/options");
  1209. if (!nd)
  1210. goto no_link_test;
  1211. prop = of_get_property(nd, "tpe-link-test?", NULL);
  1212. if (!prop)
  1213. goto no_link_test;
  1214. if (strcmp(prop, "true")) {
  1215. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1216. "'tpe-link-test?'\n");
  1217. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1218. "to ecd@skynet.be\n");
  1219. auxio_set_lte(AUXIO_LTE_ON);
  1220. }
  1221. no_link_test:
  1222. lp->auto_select = 1;
  1223. lp->tpe = 0;
  1224. } else if (!strcmp(prop, "aui")) {
  1225. lp->auto_select = 0;
  1226. lp->tpe = 0;
  1227. } else {
  1228. lp->auto_select = 0;
  1229. lp->tpe = 1;
  1230. }
  1231. /* Reset ledma */
  1232. csr = sbus_readl(lp->dregs + DMA_CSR);
  1233. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1234. udelay(200);
  1235. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1236. } else
  1237. lp->dregs = NULL;
  1238. lp->dev = dev;
  1239. SET_NETDEV_DEV(dev, &op->dev);
  1240. dev->watchdog_timeo = 5*HZ;
  1241. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1242. dev->netdev_ops = &sparc_lance_ops;
  1243. dev->irq = op->archdata.irqs[0];
  1244. /* We cannot sleep if the chip is busy during a
  1245. * multicast list update event, because such events
  1246. * can occur from interrupts (ex. IPv6). So we
  1247. * use a timer to try again later when necessary. -DaveM
  1248. */
  1249. init_timer(&lp->multicast_timer);
  1250. lp->multicast_timer.data = (unsigned long) dev;
  1251. lp->multicast_timer.function = lance_set_multicast_retry;
  1252. if (register_netdev(dev)) {
  1253. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1254. goto fail;
  1255. }
  1256. dev_set_drvdata(&op->dev, lp);
  1257. printk(KERN_INFO "%s: LANCE %pM\n",
  1258. dev->name, dev->dev_addr);
  1259. return 0;
  1260. fail:
  1261. lance_free_hwresources(lp);
  1262. free_netdev(dev);
  1263. return -ENODEV;
  1264. }
  1265. static int __devinit sunlance_sbus_probe(struct platform_device *op)
  1266. {
  1267. struct platform_device *parent = to_platform_device(op->dev.parent);
  1268. struct device_node *parent_dp = parent->dev.of_node;
  1269. int err;
  1270. if (!strcmp(parent_dp->name, "ledma")) {
  1271. err = sparc_lance_probe_one(op, parent, NULL);
  1272. } else if (!strcmp(parent_dp->name, "lebuffer")) {
  1273. err = sparc_lance_probe_one(op, NULL, parent);
  1274. } else
  1275. err = sparc_lance_probe_one(op, NULL, NULL);
  1276. return err;
  1277. }
  1278. static int __devexit sunlance_sbus_remove(struct platform_device *op)
  1279. {
  1280. struct lance_private *lp = dev_get_drvdata(&op->dev);
  1281. struct net_device *net_dev = lp->dev;
  1282. unregister_netdev(net_dev);
  1283. lance_free_hwresources(lp);
  1284. free_netdev(net_dev);
  1285. dev_set_drvdata(&op->dev, NULL);
  1286. return 0;
  1287. }
  1288. static const struct of_device_id sunlance_sbus_match[] = {
  1289. {
  1290. .name = "le",
  1291. },
  1292. {},
  1293. };
  1294. MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
  1295. static struct platform_driver sunlance_sbus_driver = {
  1296. .driver = {
  1297. .name = "sunlance",
  1298. .owner = THIS_MODULE,
  1299. .of_match_table = sunlance_sbus_match,
  1300. },
  1301. .probe = sunlance_sbus_probe,
  1302. .remove = __devexit_p(sunlance_sbus_remove),
  1303. };
  1304. module_platform_driver(sunlance_sbus_driver);