via-pmu.c 62 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. * Copyright (C) 2006-2007 Johannes Berg
  14. *
  15. * THIS DRIVER IS BECOMING A TOTAL MESS !
  16. * - Cleanup atomically disabling reply to PMU events after
  17. * a sleep or a freq. switch
  18. *
  19. */
  20. #include <stdarg.h>
  21. #include <linux/mutex.h>
  22. #include <linux/types.h>
  23. #include <linux/errno.h>
  24. #include <linux/kernel.h>
  25. #include <linux/delay.h>
  26. #include <linux/sched.h>
  27. #include <linux/miscdevice.h>
  28. #include <linux/blkdev.h>
  29. #include <linux/pci.h>
  30. #include <linux/slab.h>
  31. #include <linux/poll.h>
  32. #include <linux/adb.h>
  33. #include <linux/pmu.h>
  34. #include <linux/cuda.h>
  35. #include <linux/module.h>
  36. #include <linux/spinlock.h>
  37. #include <linux/pm.h>
  38. #include <linux/proc_fs.h>
  39. #include <linux/seq_file.h>
  40. #include <linux/init.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/device.h>
  43. #include <linux/syscore_ops.h>
  44. #include <linux/freezer.h>
  45. #include <linux/syscalls.h>
  46. #include <linux/suspend.h>
  47. #include <linux/cpu.h>
  48. #include <linux/compat.h>
  49. #include <asm/prom.h>
  50. #include <asm/machdep.h>
  51. #include <asm/io.h>
  52. #include <asm/pgtable.h>
  53. #include <asm/sections.h>
  54. #include <asm/irq.h>
  55. #include <asm/pmac_feature.h>
  56. #include <asm/pmac_pfunc.h>
  57. #include <asm/pmac_low_i2c.h>
  58. #include <asm/uaccess.h>
  59. #include <asm/mmu_context.h>
  60. #include <asm/cputable.h>
  61. #include <asm/time.h>
  62. #include <asm/backlight.h>
  63. #include "via-pmu-event.h"
  64. /* Some compile options */
  65. #undef DEBUG_SLEEP
  66. /* Misc minor number allocated for /dev/pmu */
  67. #define PMU_MINOR 154
  68. /* How many iterations between battery polls */
  69. #define BATTERY_POLLING_COUNT 2
  70. static DEFINE_MUTEX(pmu_info_proc_mutex);
  71. static volatile unsigned char __iomem *via;
  72. /* VIA registers - spaced 0x200 bytes apart */
  73. #define RS 0x200 /* skip between registers */
  74. #define B 0 /* B-side data */
  75. #define A RS /* A-side data */
  76. #define DIRB (2*RS) /* B-side direction (1=output) */
  77. #define DIRA (3*RS) /* A-side direction (1=output) */
  78. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  79. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  80. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  81. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  82. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  83. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  84. #define SR (10*RS) /* Shift register */
  85. #define ACR (11*RS) /* Auxiliary control register */
  86. #define PCR (12*RS) /* Peripheral control register */
  87. #define IFR (13*RS) /* Interrupt flag register */
  88. #define IER (14*RS) /* Interrupt enable register */
  89. #define ANH (15*RS) /* A-side data, no handshake */
  90. /* Bits in B data register: both active low */
  91. #define TACK 0x08 /* Transfer acknowledge (input) */
  92. #define TREQ 0x10 /* Transfer request (output) */
  93. /* Bits in ACR */
  94. #define SR_CTRL 0x1c /* Shift register control bits */
  95. #define SR_EXT 0x0c /* Shift on external clock */
  96. #define SR_OUT 0x10 /* Shift out if 1 */
  97. /* Bits in IFR and IER */
  98. #define IER_SET 0x80 /* set bits in IER */
  99. #define IER_CLR 0 /* clear bits in IER */
  100. #define SR_INT 0x04 /* Shift register full/empty */
  101. #define CB2_INT 0x08
  102. #define CB1_INT 0x10 /* transition on CB1 input */
  103. static volatile enum pmu_state {
  104. idle,
  105. sending,
  106. intack,
  107. reading,
  108. reading_intr,
  109. locked,
  110. } pmu_state;
  111. static volatile enum int_data_state {
  112. int_data_empty,
  113. int_data_fill,
  114. int_data_ready,
  115. int_data_flush
  116. } int_data_state[2] = { int_data_empty, int_data_empty };
  117. static struct adb_request *current_req;
  118. static struct adb_request *last_req;
  119. static struct adb_request *req_awaiting_reply;
  120. static unsigned char interrupt_data[2][32];
  121. static int interrupt_data_len[2];
  122. static int int_data_last;
  123. static unsigned char *reply_ptr;
  124. static int data_index;
  125. static int data_len;
  126. static volatile int adb_int_pending;
  127. static volatile int disable_poll;
  128. static struct device_node *vias;
  129. static int pmu_kind = PMU_UNKNOWN;
  130. static int pmu_fully_inited;
  131. static int pmu_has_adb;
  132. static struct device_node *gpio_node;
  133. static unsigned char __iomem *gpio_reg;
  134. static int gpio_irq = NO_IRQ;
  135. static int gpio_irq_enabled = -1;
  136. static volatile int pmu_suspended;
  137. static spinlock_t pmu_lock;
  138. static u8 pmu_intr_mask;
  139. static int pmu_version;
  140. static int drop_interrupts;
  141. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  142. static int option_lid_wakeup = 1;
  143. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  144. static unsigned long async_req_locks;
  145. static unsigned int pmu_irq_stats[11];
  146. static struct proc_dir_entry *proc_pmu_root;
  147. static struct proc_dir_entry *proc_pmu_info;
  148. static struct proc_dir_entry *proc_pmu_irqstats;
  149. static struct proc_dir_entry *proc_pmu_options;
  150. static int option_server_mode;
  151. int pmu_battery_count;
  152. int pmu_cur_battery;
  153. unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
  154. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  155. static int query_batt_timer = BATTERY_POLLING_COUNT;
  156. static struct adb_request batt_req;
  157. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  158. int __fake_sleep;
  159. int asleep;
  160. #ifdef CONFIG_ADB
  161. static int adb_dev_map;
  162. static int pmu_adb_flags;
  163. static int pmu_probe(void);
  164. static int pmu_init(void);
  165. static int pmu_send_request(struct adb_request *req, int sync);
  166. static int pmu_adb_autopoll(int devs);
  167. static int pmu_adb_reset_bus(void);
  168. #endif /* CONFIG_ADB */
  169. static int init_pmu(void);
  170. static void pmu_start(void);
  171. static irqreturn_t via_pmu_interrupt(int irq, void *arg);
  172. static irqreturn_t gpio1_interrupt(int irq, void *arg);
  173. static const struct file_operations pmu_info_proc_fops;
  174. static const struct file_operations pmu_irqstats_proc_fops;
  175. static void pmu_pass_intr(unsigned char *data, int len);
  176. static const struct file_operations pmu_battery_proc_fops;
  177. static const struct file_operations pmu_options_proc_fops;
  178. #ifdef CONFIG_ADB
  179. struct adb_driver via_pmu_driver = {
  180. "PMU",
  181. pmu_probe,
  182. pmu_init,
  183. pmu_send_request,
  184. pmu_adb_autopoll,
  185. pmu_poll_adb,
  186. pmu_adb_reset_bus
  187. };
  188. #endif /* CONFIG_ADB */
  189. extern void low_sleep_handler(void);
  190. extern void enable_kernel_altivec(void);
  191. extern void enable_kernel_fp(void);
  192. #ifdef DEBUG_SLEEP
  193. int pmu_polled_request(struct adb_request *req);
  194. void pmu_blink(int n);
  195. #endif
  196. /*
  197. * This table indicates for each PMU opcode:
  198. * - the number of data bytes to be sent with the command, or -1
  199. * if a length byte should be sent,
  200. * - the number of response bytes which the PMU will return, or
  201. * -1 if it will send a length byte.
  202. */
  203. static const s8 pmu_data_len[256][2] = {
  204. /* 0 1 2 3 4 5 6 7 */
  205. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  206. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  207. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  208. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  209. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  210. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  211. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  212. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  213. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  214. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  215. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  216. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  217. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  218. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  219. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  220. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  221. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  222. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  223. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  224. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  225. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  226. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  227. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  228. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  229. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  230. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  231. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  232. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  233. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  234. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  235. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  236. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  237. };
  238. static char *pbook_type[] = {
  239. "Unknown PowerBook",
  240. "PowerBook 2400/3400/3500(G3)",
  241. "PowerBook G3 Series",
  242. "1999 PowerBook G3",
  243. "Core99"
  244. };
  245. int __init find_via_pmu(void)
  246. {
  247. u64 taddr;
  248. const u32 *reg;
  249. if (via != 0)
  250. return 1;
  251. vias = of_find_node_by_name(NULL, "via-pmu");
  252. if (vias == NULL)
  253. return 0;
  254. reg = of_get_property(vias, "reg", NULL);
  255. if (reg == NULL) {
  256. printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
  257. goto fail;
  258. }
  259. taddr = of_translate_address(vias, reg);
  260. if (taddr == OF_BAD_ADDR) {
  261. printk(KERN_ERR "via-pmu: Can't translate address !\n");
  262. goto fail;
  263. }
  264. spin_lock_init(&pmu_lock);
  265. pmu_has_adb = 1;
  266. pmu_intr_mask = PMU_INT_PCEJECT |
  267. PMU_INT_SNDBRT |
  268. PMU_INT_ADB |
  269. PMU_INT_TICK;
  270. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  271. || of_device_is_compatible(vias->parent, "ohare")))
  272. pmu_kind = PMU_OHARE_BASED;
  273. else if (of_device_is_compatible(vias->parent, "paddington"))
  274. pmu_kind = PMU_PADDINGTON_BASED;
  275. else if (of_device_is_compatible(vias->parent, "heathrow"))
  276. pmu_kind = PMU_HEATHROW_BASED;
  277. else if (of_device_is_compatible(vias->parent, "Keylargo")
  278. || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
  279. struct device_node *gpiop;
  280. struct device_node *adbp;
  281. u64 gaddr = OF_BAD_ADDR;
  282. pmu_kind = PMU_KEYLARGO_BASED;
  283. adbp = of_find_node_by_type(NULL, "adb");
  284. pmu_has_adb = (adbp != NULL);
  285. of_node_put(adbp);
  286. pmu_intr_mask = PMU_INT_PCEJECT |
  287. PMU_INT_SNDBRT |
  288. PMU_INT_ADB |
  289. PMU_INT_TICK |
  290. PMU_INT_ENVIRONMENT;
  291. gpiop = of_find_node_by_name(NULL, "gpio");
  292. if (gpiop) {
  293. reg = of_get_property(gpiop, "reg", NULL);
  294. if (reg)
  295. gaddr = of_translate_address(gpiop, reg);
  296. if (gaddr != OF_BAD_ADDR)
  297. gpio_reg = ioremap(gaddr, 0x10);
  298. }
  299. if (gpio_reg == NULL) {
  300. printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
  301. goto fail_gpio;
  302. }
  303. } else
  304. pmu_kind = PMU_UNKNOWN;
  305. via = ioremap(taddr, 0x2000);
  306. if (via == NULL) {
  307. printk(KERN_ERR "via-pmu: Can't map address !\n");
  308. goto fail;
  309. }
  310. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  311. out_8(&via[IFR], 0x7f); /* clear IFR */
  312. pmu_state = idle;
  313. if (!init_pmu()) {
  314. via = NULL;
  315. return 0;
  316. }
  317. printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
  318. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  319. sys_ctrler = SYS_CTRLER_PMU;
  320. return 1;
  321. fail:
  322. of_node_put(vias);
  323. iounmap(gpio_reg);
  324. gpio_reg = NULL;
  325. fail_gpio:
  326. vias = NULL;
  327. return 0;
  328. }
  329. #ifdef CONFIG_ADB
  330. static int pmu_probe(void)
  331. {
  332. return vias == NULL? -ENODEV: 0;
  333. }
  334. static int __init pmu_init(void)
  335. {
  336. if (vias == NULL)
  337. return -ENODEV;
  338. return 0;
  339. }
  340. #endif /* CONFIG_ADB */
  341. /*
  342. * We can't wait until pmu_init gets called, that happens too late.
  343. * It happens after IDE and SCSI initialization, which can take a few
  344. * seconds, and by that time the PMU could have given up on us and
  345. * turned us off.
  346. * Thus this is called with arch_initcall rather than device_initcall.
  347. */
  348. static int __init via_pmu_start(void)
  349. {
  350. unsigned int irq;
  351. if (vias == NULL)
  352. return -ENODEV;
  353. batt_req.complete = 1;
  354. irq = irq_of_parse_and_map(vias, 0);
  355. if (irq == NO_IRQ) {
  356. printk(KERN_ERR "via-pmu: can't map interrupt\n");
  357. return -ENODEV;
  358. }
  359. /* We set IRQF_NO_SUSPEND because we don't want the interrupt
  360. * to be disabled between the 2 passes of driver suspend, we
  361. * control our own disabling for that one
  362. */
  363. if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
  364. "VIA-PMU", (void *)0)) {
  365. printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
  366. return -ENODEV;
  367. }
  368. if (pmu_kind == PMU_KEYLARGO_BASED) {
  369. gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
  370. if (gpio_node == NULL)
  371. gpio_node = of_find_node_by_name(NULL,
  372. "pmu-interrupt");
  373. if (gpio_node)
  374. gpio_irq = irq_of_parse_and_map(gpio_node, 0);
  375. if (gpio_irq != NO_IRQ) {
  376. if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
  377. "GPIO1 ADB", (void *)0))
  378. printk(KERN_ERR "pmu: can't get irq %d"
  379. " (GPIO1)\n", gpio_irq);
  380. else
  381. gpio_irq_enabled = 1;
  382. }
  383. }
  384. /* Enable interrupts */
  385. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  386. pmu_fully_inited = 1;
  387. /* Make sure PMU settle down before continuing. This is _very_ important
  388. * since the IDE probe may shut interrupts down for quite a bit of time. If
  389. * a PMU communication is pending while this happens, the PMU may timeout
  390. * Not that on Core99 machines, the PMU keeps sending us environement
  391. * messages, we should find a way to either fix IDE or make it call
  392. * pmu_suspend() before masking interrupts. This can also happens while
  393. * scolling with some fbdevs.
  394. */
  395. do {
  396. pmu_poll();
  397. } while (pmu_state != idle);
  398. return 0;
  399. }
  400. arch_initcall(via_pmu_start);
  401. /*
  402. * This has to be done after pci_init, which is a subsys_initcall.
  403. */
  404. static int __init via_pmu_dev_init(void)
  405. {
  406. if (vias == NULL)
  407. return -ENODEV;
  408. #ifdef CONFIG_PMAC_BACKLIGHT
  409. /* Initialize backlight */
  410. pmu_backlight_init();
  411. #endif
  412. #ifdef CONFIG_PPC32
  413. if (of_machine_is_compatible("AAPL,3400/2400") ||
  414. of_machine_is_compatible("AAPL,3500")) {
  415. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  416. NULL, PMAC_MB_INFO_MODEL, 0);
  417. pmu_battery_count = 1;
  418. if (mb == PMAC_TYPE_COMET)
  419. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  420. else
  421. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  422. } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
  423. of_machine_is_compatible("PowerBook1,1")) {
  424. pmu_battery_count = 2;
  425. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  426. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  427. } else {
  428. struct device_node* prim =
  429. of_find_node_by_name(NULL, "power-mgt");
  430. const u32 *prim_info = NULL;
  431. if (prim)
  432. prim_info = of_get_property(prim, "prim-info", NULL);
  433. if (prim_info) {
  434. /* Other stuffs here yet unknown */
  435. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  436. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  437. if (pmu_battery_count > 1)
  438. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  439. }
  440. of_node_put(prim);
  441. }
  442. #endif /* CONFIG_PPC32 */
  443. /* Create /proc/pmu */
  444. proc_pmu_root = proc_mkdir("pmu", NULL);
  445. if (proc_pmu_root) {
  446. long i;
  447. for (i=0; i<pmu_battery_count; i++) {
  448. char title[16];
  449. sprintf(title, "battery_%ld", i);
  450. proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
  451. &pmu_battery_proc_fops, (void *)i);
  452. }
  453. proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
  454. proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
  455. &pmu_irqstats_proc_fops);
  456. proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
  457. &pmu_options_proc_fops);
  458. }
  459. return 0;
  460. }
  461. device_initcall(via_pmu_dev_init);
  462. static int
  463. init_pmu(void)
  464. {
  465. int timeout;
  466. struct adb_request req;
  467. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  468. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  469. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  470. timeout = 100000;
  471. while (!req.complete) {
  472. if (--timeout < 0) {
  473. printk(KERN_ERR "init_pmu: no response from PMU\n");
  474. return 0;
  475. }
  476. udelay(10);
  477. pmu_poll();
  478. }
  479. /* ack all pending interrupts */
  480. timeout = 100000;
  481. interrupt_data[0][0] = 1;
  482. while (interrupt_data[0][0] || pmu_state != idle) {
  483. if (--timeout < 0) {
  484. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  485. return 0;
  486. }
  487. if (pmu_state == idle)
  488. adb_int_pending = 1;
  489. via_pmu_interrupt(0, NULL);
  490. udelay(10);
  491. }
  492. /* Tell PMU we are ready. */
  493. if (pmu_kind == PMU_KEYLARGO_BASED) {
  494. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  495. while (!req.complete)
  496. pmu_poll();
  497. }
  498. /* Read PMU version */
  499. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  500. pmu_wait_complete(&req);
  501. if (req.reply_len > 0)
  502. pmu_version = req.reply[0];
  503. /* Read server mode setting */
  504. if (pmu_kind == PMU_KEYLARGO_BASED) {
  505. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  506. PMU_PWR_GET_POWERUP_EVENTS);
  507. pmu_wait_complete(&req);
  508. if (req.reply_len == 2) {
  509. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  510. option_server_mode = 1;
  511. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  512. option_server_mode ? "enabled" : "disabled");
  513. }
  514. }
  515. return 1;
  516. }
  517. int
  518. pmu_get_model(void)
  519. {
  520. return pmu_kind;
  521. }
  522. static void pmu_set_server_mode(int server_mode)
  523. {
  524. struct adb_request req;
  525. if (pmu_kind != PMU_KEYLARGO_BASED)
  526. return;
  527. option_server_mode = server_mode;
  528. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  529. pmu_wait_complete(&req);
  530. if (req.reply_len < 2)
  531. return;
  532. if (server_mode)
  533. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  534. PMU_PWR_SET_POWERUP_EVENTS,
  535. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  536. else
  537. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  538. PMU_PWR_CLR_POWERUP_EVENTS,
  539. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  540. pmu_wait_complete(&req);
  541. }
  542. /* This new version of the code for 2400/3400/3500 powerbooks
  543. * is inspired from the implementation in gkrellm-pmu
  544. */
  545. static void
  546. done_battery_state_ohare(struct adb_request* req)
  547. {
  548. /* format:
  549. * [0] : flags
  550. * 0x01 : AC indicator
  551. * 0x02 : charging
  552. * 0x04 : battery exist
  553. * 0x08 :
  554. * 0x10 :
  555. * 0x20 : full charged
  556. * 0x40 : pcharge reset
  557. * 0x80 : battery exist
  558. *
  559. * [1][2] : battery voltage
  560. * [3] : CPU temperature
  561. * [4] : battery temperature
  562. * [5] : current
  563. * [6][7] : pcharge
  564. * --tkoba
  565. */
  566. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  567. long pcharge, charge, vb, vmax, lmax;
  568. long vmax_charging, vmax_charged;
  569. long amperage, voltage, time, max;
  570. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  571. NULL, PMAC_MB_INFO_MODEL, 0);
  572. if (req->reply[0] & 0x01)
  573. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  574. else
  575. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  576. if (mb == PMAC_TYPE_COMET) {
  577. vmax_charged = 189;
  578. vmax_charging = 213;
  579. lmax = 6500;
  580. } else {
  581. vmax_charged = 330;
  582. vmax_charging = 330;
  583. lmax = 6500;
  584. }
  585. vmax = vmax_charged;
  586. /* If battery installed */
  587. if (req->reply[0] & 0x04) {
  588. bat_flags |= PMU_BATT_PRESENT;
  589. if (req->reply[0] & 0x02)
  590. bat_flags |= PMU_BATT_CHARGING;
  591. vb = (req->reply[1] << 8) | req->reply[2];
  592. voltage = (vb * 265 + 72665) / 10;
  593. amperage = req->reply[5];
  594. if ((req->reply[0] & 0x01) == 0) {
  595. if (amperage > 200)
  596. vb += ((amperage - 200) * 15)/100;
  597. } else if (req->reply[0] & 0x02) {
  598. vb = (vb * 97) / 100;
  599. vmax = vmax_charging;
  600. }
  601. charge = (100 * vb) / vmax;
  602. if (req->reply[0] & 0x40) {
  603. pcharge = (req->reply[6] << 8) + req->reply[7];
  604. if (pcharge > lmax)
  605. pcharge = lmax;
  606. pcharge *= 100;
  607. pcharge = 100 - pcharge / lmax;
  608. if (pcharge < charge)
  609. charge = pcharge;
  610. }
  611. if (amperage > 0)
  612. time = (charge * 16440) / amperage;
  613. else
  614. time = 0;
  615. max = 100;
  616. amperage = -amperage;
  617. } else
  618. charge = max = amperage = voltage = time = 0;
  619. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  620. pmu_batteries[pmu_cur_battery].charge = charge;
  621. pmu_batteries[pmu_cur_battery].max_charge = max;
  622. pmu_batteries[pmu_cur_battery].amperage = amperage;
  623. pmu_batteries[pmu_cur_battery].voltage = voltage;
  624. pmu_batteries[pmu_cur_battery].time_remaining = time;
  625. clear_bit(0, &async_req_locks);
  626. }
  627. static void
  628. done_battery_state_smart(struct adb_request* req)
  629. {
  630. /* format:
  631. * [0] : format of this structure (known: 3,4,5)
  632. * [1] : flags
  633. *
  634. * format 3 & 4:
  635. *
  636. * [2] : charge
  637. * [3] : max charge
  638. * [4] : current
  639. * [5] : voltage
  640. *
  641. * format 5:
  642. *
  643. * [2][3] : charge
  644. * [4][5] : max charge
  645. * [6][7] : current
  646. * [8][9] : voltage
  647. */
  648. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  649. int amperage;
  650. unsigned int capa, max, voltage;
  651. if (req->reply[1] & 0x01)
  652. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  653. else
  654. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  655. capa = max = amperage = voltage = 0;
  656. if (req->reply[1] & 0x04) {
  657. bat_flags |= PMU_BATT_PRESENT;
  658. switch(req->reply[0]) {
  659. case 3:
  660. case 4: capa = req->reply[2];
  661. max = req->reply[3];
  662. amperage = *((signed char *)&req->reply[4]);
  663. voltage = req->reply[5];
  664. break;
  665. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  666. max = (req->reply[4] << 8) | req->reply[5];
  667. amperage = *((signed short *)&req->reply[6]);
  668. voltage = (req->reply[8] << 8) | req->reply[9];
  669. break;
  670. default:
  671. printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
  672. req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
  673. break;
  674. }
  675. }
  676. if ((req->reply[1] & 0x01) && (amperage > 0))
  677. bat_flags |= PMU_BATT_CHARGING;
  678. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  679. pmu_batteries[pmu_cur_battery].charge = capa;
  680. pmu_batteries[pmu_cur_battery].max_charge = max;
  681. pmu_batteries[pmu_cur_battery].amperage = amperage;
  682. pmu_batteries[pmu_cur_battery].voltage = voltage;
  683. if (amperage) {
  684. if ((req->reply[1] & 0x01) && (amperage > 0))
  685. pmu_batteries[pmu_cur_battery].time_remaining
  686. = ((max-capa) * 3600) / amperage;
  687. else
  688. pmu_batteries[pmu_cur_battery].time_remaining
  689. = (capa * 3600) / (-amperage);
  690. } else
  691. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  692. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  693. clear_bit(0, &async_req_locks);
  694. }
  695. static void
  696. query_battery_state(void)
  697. {
  698. if (test_and_set_bit(0, &async_req_locks))
  699. return;
  700. if (pmu_kind == PMU_OHARE_BASED)
  701. pmu_request(&batt_req, done_battery_state_ohare,
  702. 1, PMU_BATTERY_STATE);
  703. else
  704. pmu_request(&batt_req, done_battery_state_smart,
  705. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  706. }
  707. static int pmu_info_proc_show(struct seq_file *m, void *v)
  708. {
  709. seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  710. seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
  711. seq_printf(m, "AC Power : %d\n",
  712. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
  713. seq_printf(m, "Battery count : %d\n", pmu_battery_count);
  714. return 0;
  715. }
  716. static int pmu_info_proc_open(struct inode *inode, struct file *file)
  717. {
  718. return single_open(file, pmu_info_proc_show, NULL);
  719. }
  720. static const struct file_operations pmu_info_proc_fops = {
  721. .owner = THIS_MODULE,
  722. .open = pmu_info_proc_open,
  723. .read = seq_read,
  724. .llseek = seq_lseek,
  725. .release = single_release,
  726. };
  727. static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
  728. {
  729. int i;
  730. static const char *irq_names[] = {
  731. "Total CB1 triggered events",
  732. "Total GPIO1 triggered events",
  733. "PC-Card eject button",
  734. "Sound/Brightness button",
  735. "ADB message",
  736. "Battery state change",
  737. "Environment interrupt",
  738. "Tick timer",
  739. "Ghost interrupt (zero len)",
  740. "Empty interrupt (empty mask)",
  741. "Max irqs in a row"
  742. };
  743. for (i=0; i<11; i++) {
  744. seq_printf(m, " %2u: %10u (%s)\n",
  745. i, pmu_irq_stats[i], irq_names[i]);
  746. }
  747. return 0;
  748. }
  749. static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
  750. {
  751. return single_open(file, pmu_irqstats_proc_show, NULL);
  752. }
  753. static const struct file_operations pmu_irqstats_proc_fops = {
  754. .owner = THIS_MODULE,
  755. .open = pmu_irqstats_proc_open,
  756. .read = seq_read,
  757. .llseek = seq_lseek,
  758. .release = single_release,
  759. };
  760. static int pmu_battery_proc_show(struct seq_file *m, void *v)
  761. {
  762. long batnum = (long)m->private;
  763. seq_putc(m, '\n');
  764. seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
  765. seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
  766. seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
  767. seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
  768. seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
  769. seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
  770. return 0;
  771. }
  772. static int pmu_battery_proc_open(struct inode *inode, struct file *file)
  773. {
  774. return single_open(file, pmu_battery_proc_show, PDE(inode)->data);
  775. }
  776. static const struct file_operations pmu_battery_proc_fops = {
  777. .owner = THIS_MODULE,
  778. .open = pmu_battery_proc_open,
  779. .read = seq_read,
  780. .llseek = seq_lseek,
  781. .release = single_release,
  782. };
  783. static int pmu_options_proc_show(struct seq_file *m, void *v)
  784. {
  785. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  786. if (pmu_kind == PMU_KEYLARGO_BASED &&
  787. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  788. seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
  789. #endif
  790. if (pmu_kind == PMU_KEYLARGO_BASED)
  791. seq_printf(m, "server_mode=%d\n", option_server_mode);
  792. return 0;
  793. }
  794. static int pmu_options_proc_open(struct inode *inode, struct file *file)
  795. {
  796. return single_open(file, pmu_options_proc_show, NULL);
  797. }
  798. static ssize_t pmu_options_proc_write(struct file *file,
  799. const char __user *buffer, size_t count, loff_t *pos)
  800. {
  801. char tmp[33];
  802. char *label, *val;
  803. size_t fcount = count;
  804. if (!count)
  805. return -EINVAL;
  806. if (count > 32)
  807. count = 32;
  808. if (copy_from_user(tmp, buffer, count))
  809. return -EFAULT;
  810. tmp[count] = 0;
  811. label = tmp;
  812. while(*label == ' ')
  813. label++;
  814. val = label;
  815. while(*val && (*val != '=')) {
  816. if (*val == ' ')
  817. *val = 0;
  818. val++;
  819. }
  820. if ((*val) == 0)
  821. return -EINVAL;
  822. *(val++) = 0;
  823. while(*val == ' ')
  824. val++;
  825. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  826. if (pmu_kind == PMU_KEYLARGO_BASED &&
  827. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  828. if (!strcmp(label, "lid_wakeup"))
  829. option_lid_wakeup = ((*val) == '1');
  830. #endif
  831. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  832. int new_value;
  833. new_value = ((*val) == '1');
  834. if (new_value != option_server_mode)
  835. pmu_set_server_mode(new_value);
  836. }
  837. return fcount;
  838. }
  839. static const struct file_operations pmu_options_proc_fops = {
  840. .owner = THIS_MODULE,
  841. .open = pmu_options_proc_open,
  842. .read = seq_read,
  843. .llseek = seq_lseek,
  844. .release = single_release,
  845. .write = pmu_options_proc_write,
  846. };
  847. #ifdef CONFIG_ADB
  848. /* Send an ADB command */
  849. static int pmu_send_request(struct adb_request *req, int sync)
  850. {
  851. int i, ret;
  852. if ((vias == NULL) || (!pmu_fully_inited)) {
  853. req->complete = 1;
  854. return -ENXIO;
  855. }
  856. ret = -EINVAL;
  857. switch (req->data[0]) {
  858. case PMU_PACKET:
  859. for (i = 0; i < req->nbytes - 1; ++i)
  860. req->data[i] = req->data[i+1];
  861. --req->nbytes;
  862. if (pmu_data_len[req->data[0]][1] != 0) {
  863. req->reply[0] = ADB_RET_OK;
  864. req->reply_len = 1;
  865. } else
  866. req->reply_len = 0;
  867. ret = pmu_queue_request(req);
  868. break;
  869. case CUDA_PACKET:
  870. switch (req->data[1]) {
  871. case CUDA_GET_TIME:
  872. if (req->nbytes != 2)
  873. break;
  874. req->data[0] = PMU_READ_RTC;
  875. req->nbytes = 1;
  876. req->reply_len = 3;
  877. req->reply[0] = CUDA_PACKET;
  878. req->reply[1] = 0;
  879. req->reply[2] = CUDA_GET_TIME;
  880. ret = pmu_queue_request(req);
  881. break;
  882. case CUDA_SET_TIME:
  883. if (req->nbytes != 6)
  884. break;
  885. req->data[0] = PMU_SET_RTC;
  886. req->nbytes = 5;
  887. for (i = 1; i <= 4; ++i)
  888. req->data[i] = req->data[i+1];
  889. req->reply_len = 3;
  890. req->reply[0] = CUDA_PACKET;
  891. req->reply[1] = 0;
  892. req->reply[2] = CUDA_SET_TIME;
  893. ret = pmu_queue_request(req);
  894. break;
  895. }
  896. break;
  897. case ADB_PACKET:
  898. if (!pmu_has_adb)
  899. return -ENXIO;
  900. for (i = req->nbytes - 1; i > 1; --i)
  901. req->data[i+2] = req->data[i];
  902. req->data[3] = req->nbytes - 2;
  903. req->data[2] = pmu_adb_flags;
  904. /*req->data[1] = req->data[1];*/
  905. req->data[0] = PMU_ADB_CMD;
  906. req->nbytes += 2;
  907. req->reply_expected = 1;
  908. req->reply_len = 0;
  909. ret = pmu_queue_request(req);
  910. break;
  911. }
  912. if (ret) {
  913. req->complete = 1;
  914. return ret;
  915. }
  916. if (sync)
  917. while (!req->complete)
  918. pmu_poll();
  919. return 0;
  920. }
  921. /* Enable/disable autopolling */
  922. static int __pmu_adb_autopoll(int devs)
  923. {
  924. struct adb_request req;
  925. if (devs) {
  926. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  927. adb_dev_map >> 8, adb_dev_map);
  928. pmu_adb_flags = 2;
  929. } else {
  930. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  931. pmu_adb_flags = 0;
  932. }
  933. while (!req.complete)
  934. pmu_poll();
  935. return 0;
  936. }
  937. static int pmu_adb_autopoll(int devs)
  938. {
  939. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  940. return -ENXIO;
  941. adb_dev_map = devs;
  942. return __pmu_adb_autopoll(devs);
  943. }
  944. /* Reset the ADB bus */
  945. static int pmu_adb_reset_bus(void)
  946. {
  947. struct adb_request req;
  948. int save_autopoll = adb_dev_map;
  949. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  950. return -ENXIO;
  951. /* anyone got a better idea?? */
  952. __pmu_adb_autopoll(0);
  953. req.nbytes = 4;
  954. req.done = NULL;
  955. req.data[0] = PMU_ADB_CMD;
  956. req.data[1] = ADB_BUSRESET;
  957. req.data[2] = 0;
  958. req.data[3] = 0;
  959. req.data[4] = 0;
  960. req.reply_len = 0;
  961. req.reply_expected = 1;
  962. if (pmu_queue_request(&req) != 0) {
  963. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  964. return -EIO;
  965. }
  966. pmu_wait_complete(&req);
  967. if (save_autopoll != 0)
  968. __pmu_adb_autopoll(save_autopoll);
  969. return 0;
  970. }
  971. #endif /* CONFIG_ADB */
  972. /* Construct and send a pmu request */
  973. int
  974. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  975. int nbytes, ...)
  976. {
  977. va_list list;
  978. int i;
  979. if (vias == NULL)
  980. return -ENXIO;
  981. if (nbytes < 0 || nbytes > 32) {
  982. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  983. req->complete = 1;
  984. return -EINVAL;
  985. }
  986. req->nbytes = nbytes;
  987. req->done = done;
  988. va_start(list, nbytes);
  989. for (i = 0; i < nbytes; ++i)
  990. req->data[i] = va_arg(list, int);
  991. va_end(list);
  992. req->reply_len = 0;
  993. req->reply_expected = 0;
  994. return pmu_queue_request(req);
  995. }
  996. int
  997. pmu_queue_request(struct adb_request *req)
  998. {
  999. unsigned long flags;
  1000. int nsend;
  1001. if (via == NULL) {
  1002. req->complete = 1;
  1003. return -ENXIO;
  1004. }
  1005. if (req->nbytes <= 0) {
  1006. req->complete = 1;
  1007. return 0;
  1008. }
  1009. nsend = pmu_data_len[req->data[0]][0];
  1010. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1011. req->complete = 1;
  1012. return -EINVAL;
  1013. }
  1014. req->next = NULL;
  1015. req->sent = 0;
  1016. req->complete = 0;
  1017. spin_lock_irqsave(&pmu_lock, flags);
  1018. if (current_req != 0) {
  1019. last_req->next = req;
  1020. last_req = req;
  1021. } else {
  1022. current_req = req;
  1023. last_req = req;
  1024. if (pmu_state == idle)
  1025. pmu_start();
  1026. }
  1027. spin_unlock_irqrestore(&pmu_lock, flags);
  1028. return 0;
  1029. }
  1030. static inline void
  1031. wait_for_ack(void)
  1032. {
  1033. /* Sightly increased the delay, I had one occurrence of the message
  1034. * reported
  1035. */
  1036. int timeout = 4000;
  1037. while ((in_8(&via[B]) & TACK) == 0) {
  1038. if (--timeout < 0) {
  1039. printk(KERN_ERR "PMU not responding (!ack)\n");
  1040. return;
  1041. }
  1042. udelay(10);
  1043. }
  1044. }
  1045. /* New PMU seems to be very sensitive to those timings, so we make sure
  1046. * PCI is flushed immediately */
  1047. static inline void
  1048. send_byte(int x)
  1049. {
  1050. volatile unsigned char __iomem *v = via;
  1051. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1052. out_8(&v[SR], x);
  1053. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1054. (void)in_8(&v[B]);
  1055. }
  1056. static inline void
  1057. recv_byte(void)
  1058. {
  1059. volatile unsigned char __iomem *v = via;
  1060. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1061. in_8(&v[SR]); /* resets SR */
  1062. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1063. (void)in_8(&v[B]);
  1064. }
  1065. static inline void
  1066. pmu_done(struct adb_request *req)
  1067. {
  1068. void (*done)(struct adb_request *) = req->done;
  1069. mb();
  1070. req->complete = 1;
  1071. /* Here, we assume that if the request has a done member, the
  1072. * struct request will survive to setting req->complete to 1
  1073. */
  1074. if (done)
  1075. (*done)(req);
  1076. }
  1077. static void
  1078. pmu_start(void)
  1079. {
  1080. struct adb_request *req;
  1081. /* assert pmu_state == idle */
  1082. /* get the packet to send */
  1083. req = current_req;
  1084. if (req == 0 || pmu_state != idle
  1085. || (/*req->reply_expected && */req_awaiting_reply))
  1086. return;
  1087. pmu_state = sending;
  1088. data_index = 1;
  1089. data_len = pmu_data_len[req->data[0]][0];
  1090. /* Sounds safer to make sure ACK is high before writing. This helped
  1091. * kill a problem with ADB and some iBooks
  1092. */
  1093. wait_for_ack();
  1094. /* set the shift register to shift out and send a byte */
  1095. send_byte(req->data[0]);
  1096. }
  1097. void
  1098. pmu_poll(void)
  1099. {
  1100. if (!via)
  1101. return;
  1102. if (disable_poll)
  1103. return;
  1104. via_pmu_interrupt(0, NULL);
  1105. }
  1106. void
  1107. pmu_poll_adb(void)
  1108. {
  1109. if (!via)
  1110. return;
  1111. if (disable_poll)
  1112. return;
  1113. /* Kicks ADB read when PMU is suspended */
  1114. adb_int_pending = 1;
  1115. do {
  1116. via_pmu_interrupt(0, NULL);
  1117. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1118. || req_awaiting_reply));
  1119. }
  1120. void
  1121. pmu_wait_complete(struct adb_request *req)
  1122. {
  1123. if (!via)
  1124. return;
  1125. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1126. via_pmu_interrupt(0, NULL);
  1127. }
  1128. /* This function loops until the PMU is idle and prevents it from
  1129. * anwsering to ADB interrupts. pmu_request can still be called.
  1130. * This is done to avoid spurrious shutdowns when we know we'll have
  1131. * interrupts switched off for a long time
  1132. */
  1133. void
  1134. pmu_suspend(void)
  1135. {
  1136. unsigned long flags;
  1137. if (!via)
  1138. return;
  1139. spin_lock_irqsave(&pmu_lock, flags);
  1140. pmu_suspended++;
  1141. if (pmu_suspended > 1) {
  1142. spin_unlock_irqrestore(&pmu_lock, flags);
  1143. return;
  1144. }
  1145. do {
  1146. spin_unlock_irqrestore(&pmu_lock, flags);
  1147. if (req_awaiting_reply)
  1148. adb_int_pending = 1;
  1149. via_pmu_interrupt(0, NULL);
  1150. spin_lock_irqsave(&pmu_lock, flags);
  1151. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1152. if (gpio_irq >= 0)
  1153. disable_irq_nosync(gpio_irq);
  1154. out_8(&via[IER], CB1_INT | IER_CLR);
  1155. spin_unlock_irqrestore(&pmu_lock, flags);
  1156. break;
  1157. }
  1158. } while (1);
  1159. }
  1160. void
  1161. pmu_resume(void)
  1162. {
  1163. unsigned long flags;
  1164. if (!via || (pmu_suspended < 1))
  1165. return;
  1166. spin_lock_irqsave(&pmu_lock, flags);
  1167. pmu_suspended--;
  1168. if (pmu_suspended > 0) {
  1169. spin_unlock_irqrestore(&pmu_lock, flags);
  1170. return;
  1171. }
  1172. adb_int_pending = 1;
  1173. if (gpio_irq >= 0)
  1174. enable_irq(gpio_irq);
  1175. out_8(&via[IER], CB1_INT | IER_SET);
  1176. spin_unlock_irqrestore(&pmu_lock, flags);
  1177. pmu_poll();
  1178. }
  1179. /* Interrupt data could be the result data from an ADB cmd */
  1180. static void
  1181. pmu_handle_data(unsigned char *data, int len)
  1182. {
  1183. unsigned char ints, pirq;
  1184. int i = 0;
  1185. asleep = 0;
  1186. if (drop_interrupts || len < 1) {
  1187. adb_int_pending = 0;
  1188. pmu_irq_stats[8]++;
  1189. return;
  1190. }
  1191. /* Get PMU interrupt mask */
  1192. ints = data[0];
  1193. /* Record zero interrupts for stats */
  1194. if (ints == 0)
  1195. pmu_irq_stats[9]++;
  1196. /* Hack to deal with ADB autopoll flag */
  1197. if (ints & PMU_INT_ADB)
  1198. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1199. next:
  1200. if (ints == 0) {
  1201. if (i > pmu_irq_stats[10])
  1202. pmu_irq_stats[10] = i;
  1203. return;
  1204. }
  1205. for (pirq = 0; pirq < 8; pirq++)
  1206. if (ints & (1 << pirq))
  1207. break;
  1208. pmu_irq_stats[pirq]++;
  1209. i++;
  1210. ints &= ~(1 << pirq);
  1211. /* Note: for some reason, we get an interrupt with len=1,
  1212. * data[0]==0 after each normal ADB interrupt, at least
  1213. * on the Pismo. Still investigating... --BenH
  1214. */
  1215. if ((1 << pirq) & PMU_INT_ADB) {
  1216. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1217. struct adb_request *req = req_awaiting_reply;
  1218. if (req == 0) {
  1219. printk(KERN_ERR "PMU: extra ADB reply\n");
  1220. return;
  1221. }
  1222. req_awaiting_reply = NULL;
  1223. if (len <= 2)
  1224. req->reply_len = 0;
  1225. else {
  1226. memcpy(req->reply, data + 1, len - 1);
  1227. req->reply_len = len - 1;
  1228. }
  1229. pmu_done(req);
  1230. } else {
  1231. if (len == 4 && data[1] == 0x2c) {
  1232. extern int xmon_wants_key, xmon_adb_keycode;
  1233. if (xmon_wants_key) {
  1234. xmon_adb_keycode = data[2];
  1235. return;
  1236. }
  1237. }
  1238. #ifdef CONFIG_ADB
  1239. /*
  1240. * XXX On the [23]400 the PMU gives us an up
  1241. * event for keycodes 0x74 or 0x75 when the PC
  1242. * card eject buttons are released, so we
  1243. * ignore those events.
  1244. */
  1245. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1246. && data[1] == 0x2c && data[3] == 0xff
  1247. && (data[2] & ~1) == 0xf4))
  1248. adb_input(data+1, len-1, 1);
  1249. #endif /* CONFIG_ADB */
  1250. }
  1251. }
  1252. /* Sound/brightness button pressed */
  1253. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1254. #ifdef CONFIG_PMAC_BACKLIGHT
  1255. if (len == 3)
  1256. pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
  1257. #endif
  1258. }
  1259. /* Tick interrupt */
  1260. else if ((1 << pirq) & PMU_INT_TICK) {
  1261. /* Environement or tick interrupt, query batteries */
  1262. if (pmu_battery_count) {
  1263. if ((--query_batt_timer) == 0) {
  1264. query_battery_state();
  1265. query_batt_timer = BATTERY_POLLING_COUNT;
  1266. }
  1267. }
  1268. }
  1269. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1270. if (pmu_battery_count)
  1271. query_battery_state();
  1272. pmu_pass_intr(data, len);
  1273. /* len == 6 is probably a bad check. But how do I
  1274. * know what PMU versions send what events here? */
  1275. if (len == 6) {
  1276. via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
  1277. via_pmu_event(PMU_EVT_LID, data[1]&1);
  1278. }
  1279. } else {
  1280. pmu_pass_intr(data, len);
  1281. }
  1282. goto next;
  1283. }
  1284. static struct adb_request*
  1285. pmu_sr_intr(void)
  1286. {
  1287. struct adb_request *req;
  1288. int bite = 0;
  1289. if (via[B] & TREQ) {
  1290. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1291. out_8(&via[IFR], SR_INT);
  1292. return NULL;
  1293. }
  1294. /* The ack may not yet be low when we get the interrupt */
  1295. while ((in_8(&via[B]) & TACK) != 0)
  1296. ;
  1297. /* if reading grab the byte, and reset the interrupt */
  1298. if (pmu_state == reading || pmu_state == reading_intr)
  1299. bite = in_8(&via[SR]);
  1300. /* reset TREQ and wait for TACK to go high */
  1301. out_8(&via[B], in_8(&via[B]) | TREQ);
  1302. wait_for_ack();
  1303. switch (pmu_state) {
  1304. case sending:
  1305. req = current_req;
  1306. if (data_len < 0) {
  1307. data_len = req->nbytes - 1;
  1308. send_byte(data_len);
  1309. break;
  1310. }
  1311. if (data_index <= data_len) {
  1312. send_byte(req->data[data_index++]);
  1313. break;
  1314. }
  1315. req->sent = 1;
  1316. data_len = pmu_data_len[req->data[0]][1];
  1317. if (data_len == 0) {
  1318. pmu_state = idle;
  1319. current_req = req->next;
  1320. if (req->reply_expected)
  1321. req_awaiting_reply = req;
  1322. else
  1323. return req;
  1324. } else {
  1325. pmu_state = reading;
  1326. data_index = 0;
  1327. reply_ptr = req->reply + req->reply_len;
  1328. recv_byte();
  1329. }
  1330. break;
  1331. case intack:
  1332. data_index = 0;
  1333. data_len = -1;
  1334. pmu_state = reading_intr;
  1335. reply_ptr = interrupt_data[int_data_last];
  1336. recv_byte();
  1337. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1338. enable_irq(gpio_irq);
  1339. gpio_irq_enabled = 1;
  1340. }
  1341. break;
  1342. case reading:
  1343. case reading_intr:
  1344. if (data_len == -1) {
  1345. data_len = bite;
  1346. if (bite > 32)
  1347. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1348. } else if (data_index < 32) {
  1349. reply_ptr[data_index++] = bite;
  1350. }
  1351. if (data_index < data_len) {
  1352. recv_byte();
  1353. break;
  1354. }
  1355. if (pmu_state == reading_intr) {
  1356. pmu_state = idle;
  1357. int_data_state[int_data_last] = int_data_ready;
  1358. interrupt_data_len[int_data_last] = data_len;
  1359. } else {
  1360. req = current_req;
  1361. /*
  1362. * For PMU sleep and freq change requests, we lock the
  1363. * PMU until it's explicitly unlocked. This avoids any
  1364. * spurrious event polling getting in
  1365. */
  1366. current_req = req->next;
  1367. req->reply_len += data_index;
  1368. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1369. pmu_state = locked;
  1370. else
  1371. pmu_state = idle;
  1372. return req;
  1373. }
  1374. break;
  1375. default:
  1376. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1377. pmu_state);
  1378. }
  1379. return NULL;
  1380. }
  1381. static irqreturn_t
  1382. via_pmu_interrupt(int irq, void *arg)
  1383. {
  1384. unsigned long flags;
  1385. int intr;
  1386. int nloop = 0;
  1387. int int_data = -1;
  1388. struct adb_request *req = NULL;
  1389. int handled = 0;
  1390. /* This is a bit brutal, we can probably do better */
  1391. spin_lock_irqsave(&pmu_lock, flags);
  1392. ++disable_poll;
  1393. for (;;) {
  1394. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1395. if (intr == 0)
  1396. break;
  1397. handled = 1;
  1398. if (++nloop > 1000) {
  1399. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1400. "intr=%x, ier=%x pmu_state=%d\n",
  1401. intr, in_8(&via[IER]), pmu_state);
  1402. break;
  1403. }
  1404. out_8(&via[IFR], intr);
  1405. if (intr & CB1_INT) {
  1406. adb_int_pending = 1;
  1407. pmu_irq_stats[0]++;
  1408. }
  1409. if (intr & SR_INT) {
  1410. req = pmu_sr_intr();
  1411. if (req)
  1412. break;
  1413. }
  1414. }
  1415. recheck:
  1416. if (pmu_state == idle) {
  1417. if (adb_int_pending) {
  1418. if (int_data_state[0] == int_data_empty)
  1419. int_data_last = 0;
  1420. else if (int_data_state[1] == int_data_empty)
  1421. int_data_last = 1;
  1422. else
  1423. goto no_free_slot;
  1424. pmu_state = intack;
  1425. int_data_state[int_data_last] = int_data_fill;
  1426. /* Sounds safer to make sure ACK is high before writing.
  1427. * This helped kill a problem with ADB and some iBooks
  1428. */
  1429. wait_for_ack();
  1430. send_byte(PMU_INT_ACK);
  1431. adb_int_pending = 0;
  1432. } else if (current_req)
  1433. pmu_start();
  1434. }
  1435. no_free_slot:
  1436. /* Mark the oldest buffer for flushing */
  1437. if (int_data_state[!int_data_last] == int_data_ready) {
  1438. int_data_state[!int_data_last] = int_data_flush;
  1439. int_data = !int_data_last;
  1440. } else if (int_data_state[int_data_last] == int_data_ready) {
  1441. int_data_state[int_data_last] = int_data_flush;
  1442. int_data = int_data_last;
  1443. }
  1444. --disable_poll;
  1445. spin_unlock_irqrestore(&pmu_lock, flags);
  1446. /* Deal with completed PMU requests outside of the lock */
  1447. if (req) {
  1448. pmu_done(req);
  1449. req = NULL;
  1450. }
  1451. /* Deal with interrupt datas outside of the lock */
  1452. if (int_data >= 0) {
  1453. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
  1454. spin_lock_irqsave(&pmu_lock, flags);
  1455. ++disable_poll;
  1456. int_data_state[int_data] = int_data_empty;
  1457. int_data = -1;
  1458. goto recheck;
  1459. }
  1460. return IRQ_RETVAL(handled);
  1461. }
  1462. void
  1463. pmu_unlock(void)
  1464. {
  1465. unsigned long flags;
  1466. spin_lock_irqsave(&pmu_lock, flags);
  1467. if (pmu_state == locked)
  1468. pmu_state = idle;
  1469. adb_int_pending = 1;
  1470. spin_unlock_irqrestore(&pmu_lock, flags);
  1471. }
  1472. static irqreturn_t
  1473. gpio1_interrupt(int irq, void *arg)
  1474. {
  1475. unsigned long flags;
  1476. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1477. spin_lock_irqsave(&pmu_lock, flags);
  1478. if (gpio_irq_enabled > 0) {
  1479. disable_irq_nosync(gpio_irq);
  1480. gpio_irq_enabled = 0;
  1481. }
  1482. pmu_irq_stats[1]++;
  1483. adb_int_pending = 1;
  1484. spin_unlock_irqrestore(&pmu_lock, flags);
  1485. via_pmu_interrupt(0, NULL);
  1486. return IRQ_HANDLED;
  1487. }
  1488. return IRQ_NONE;
  1489. }
  1490. void
  1491. pmu_enable_irled(int on)
  1492. {
  1493. struct adb_request req;
  1494. if (vias == NULL)
  1495. return ;
  1496. if (pmu_kind == PMU_KEYLARGO_BASED)
  1497. return ;
  1498. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1499. (on ? PMU_POW_ON : PMU_POW_OFF));
  1500. pmu_wait_complete(&req);
  1501. }
  1502. void
  1503. pmu_restart(void)
  1504. {
  1505. struct adb_request req;
  1506. if (via == NULL)
  1507. return;
  1508. local_irq_disable();
  1509. drop_interrupts = 1;
  1510. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1511. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1512. PMU_INT_TICK );
  1513. while(!req.complete)
  1514. pmu_poll();
  1515. }
  1516. pmu_request(&req, NULL, 1, PMU_RESET);
  1517. pmu_wait_complete(&req);
  1518. for (;;)
  1519. ;
  1520. }
  1521. void
  1522. pmu_shutdown(void)
  1523. {
  1524. struct adb_request req;
  1525. if (via == NULL)
  1526. return;
  1527. local_irq_disable();
  1528. drop_interrupts = 1;
  1529. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1530. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1531. PMU_INT_TICK );
  1532. pmu_wait_complete(&req);
  1533. } else {
  1534. /* Disable server mode on shutdown or we'll just
  1535. * wake up again
  1536. */
  1537. pmu_set_server_mode(0);
  1538. }
  1539. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1540. 'M', 'A', 'T', 'T');
  1541. pmu_wait_complete(&req);
  1542. for (;;)
  1543. ;
  1544. }
  1545. int
  1546. pmu_present(void)
  1547. {
  1548. return via != 0;
  1549. }
  1550. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1551. /*
  1552. * Put the powerbook to sleep.
  1553. */
  1554. static u32 save_via[8];
  1555. static void
  1556. save_via_state(void)
  1557. {
  1558. save_via[0] = in_8(&via[ANH]);
  1559. save_via[1] = in_8(&via[DIRA]);
  1560. save_via[2] = in_8(&via[B]);
  1561. save_via[3] = in_8(&via[DIRB]);
  1562. save_via[4] = in_8(&via[PCR]);
  1563. save_via[5] = in_8(&via[ACR]);
  1564. save_via[6] = in_8(&via[T1CL]);
  1565. save_via[7] = in_8(&via[T1CH]);
  1566. }
  1567. static void
  1568. restore_via_state(void)
  1569. {
  1570. out_8(&via[ANH], save_via[0]);
  1571. out_8(&via[DIRA], save_via[1]);
  1572. out_8(&via[B], save_via[2]);
  1573. out_8(&via[DIRB], save_via[3]);
  1574. out_8(&via[PCR], save_via[4]);
  1575. out_8(&via[ACR], save_via[5]);
  1576. out_8(&via[T1CL], save_via[6]);
  1577. out_8(&via[T1CH], save_via[7]);
  1578. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  1579. out_8(&via[IFR], 0x7f); /* clear IFR */
  1580. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  1581. }
  1582. #define GRACKLE_PM (1<<7)
  1583. #define GRACKLE_DOZE (1<<5)
  1584. #define GRACKLE_NAP (1<<4)
  1585. #define GRACKLE_SLEEP (1<<3)
  1586. static int powerbook_sleep_grackle(void)
  1587. {
  1588. unsigned long save_l2cr;
  1589. unsigned short pmcr1;
  1590. struct adb_request req;
  1591. struct pci_dev *grackle;
  1592. grackle = pci_get_bus_and_slot(0, 0);
  1593. if (!grackle)
  1594. return -ENODEV;
  1595. /* Turn off various things. Darwin does some retry tests here... */
  1596. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  1597. pmu_wait_complete(&req);
  1598. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1599. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1600. pmu_wait_complete(&req);
  1601. /* For 750, save backside cache setting and disable it */
  1602. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1603. if (!__fake_sleep) {
  1604. /* Ask the PMU to put us to sleep */
  1605. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1606. pmu_wait_complete(&req);
  1607. }
  1608. /* The VIA is supposed not to be restored correctly*/
  1609. save_via_state();
  1610. /* We shut down some HW */
  1611. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  1612. pci_read_config_word(grackle, 0x70, &pmcr1);
  1613. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  1614. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  1615. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  1616. pci_write_config_word(grackle, 0x70, pmcr1);
  1617. /* Call low-level ASM sleep handler */
  1618. if (__fake_sleep)
  1619. mdelay(5000);
  1620. else
  1621. low_sleep_handler();
  1622. /* We're awake again, stop grackle PM */
  1623. pci_read_config_word(grackle, 0x70, &pmcr1);
  1624. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  1625. pci_write_config_word(grackle, 0x70, pmcr1);
  1626. pci_dev_put(grackle);
  1627. /* Make sure the PMU is idle */
  1628. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  1629. restore_via_state();
  1630. /* Restore L2 cache */
  1631. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1632. _set_L2CR(save_l2cr);
  1633. /* Restore userland MMU context */
  1634. switch_mmu_context(NULL, current->active_mm);
  1635. /* Power things up */
  1636. pmu_unlock();
  1637. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1638. pmu_wait_complete(&req);
  1639. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  1640. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  1641. pmu_wait_complete(&req);
  1642. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1643. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  1644. pmu_wait_complete(&req);
  1645. return 0;
  1646. }
  1647. static int
  1648. powerbook_sleep_Core99(void)
  1649. {
  1650. unsigned long save_l2cr;
  1651. unsigned long save_l3cr;
  1652. struct adb_request req;
  1653. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  1654. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  1655. return -ENOSYS;
  1656. }
  1657. if (num_online_cpus() > 1 || cpu_is_offline(0))
  1658. return -EAGAIN;
  1659. /* Stop environment and ADB interrupts */
  1660. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1661. pmu_wait_complete(&req);
  1662. /* Tell PMU what events will wake us up */
  1663. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  1664. 0xff, 0xff);
  1665. pmu_wait_complete(&req);
  1666. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  1667. 0, PMU_PWR_WAKEUP_KEY |
  1668. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  1669. pmu_wait_complete(&req);
  1670. /* Save the state of the L2 and L3 caches */
  1671. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  1672. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  1673. if (!__fake_sleep) {
  1674. /* Ask the PMU to put us to sleep */
  1675. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1676. pmu_wait_complete(&req);
  1677. }
  1678. /* The VIA is supposed not to be restored correctly*/
  1679. save_via_state();
  1680. /* Shut down various ASICs. There's a chance that we can no longer
  1681. * talk to the PMU after this, so I moved it to _after_ sending the
  1682. * sleep command to it. Still need to be checked.
  1683. */
  1684. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1685. /* Call low-level ASM sleep handler */
  1686. if (__fake_sleep)
  1687. mdelay(5000);
  1688. else
  1689. low_sleep_handler();
  1690. /* Restore Apple core ASICs state */
  1691. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1692. /* Restore VIA */
  1693. restore_via_state();
  1694. /* tweak LPJ before cpufreq is there */
  1695. loops_per_jiffy *= 2;
  1696. /* Restore video */
  1697. pmac_call_early_video_resume();
  1698. /* Restore L2 cache */
  1699. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  1700. _set_L2CR(save_l2cr);
  1701. /* Restore L3 cache */
  1702. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  1703. _set_L3CR(save_l3cr);
  1704. /* Restore userland MMU context */
  1705. switch_mmu_context(NULL, current->active_mm);
  1706. /* Tell PMU we are ready */
  1707. pmu_unlock();
  1708. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  1709. pmu_wait_complete(&req);
  1710. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1711. pmu_wait_complete(&req);
  1712. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  1713. loops_per_jiffy /= 2;
  1714. return 0;
  1715. }
  1716. #define PB3400_MEM_CTRL 0xf8000000
  1717. #define PB3400_MEM_CTRL_SLEEP 0x70
  1718. static void __iomem *pb3400_mem_ctrl;
  1719. static void powerbook_sleep_init_3400(void)
  1720. {
  1721. /* map in the memory controller registers */
  1722. pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  1723. if (pb3400_mem_ctrl == NULL)
  1724. printk(KERN_WARNING "ioremap failed: sleep won't be possible");
  1725. }
  1726. static int powerbook_sleep_3400(void)
  1727. {
  1728. int i, x;
  1729. unsigned int hid0;
  1730. unsigned long msr;
  1731. struct adb_request sleep_req;
  1732. unsigned int __iomem *mem_ctrl_sleep;
  1733. if (pb3400_mem_ctrl == NULL)
  1734. return -ENOMEM;
  1735. mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  1736. /* Set the memory controller to keep the memory refreshed
  1737. while we're asleep */
  1738. for (i = 0x403f; i >= 0x4000; --i) {
  1739. out_be32(mem_ctrl_sleep, i);
  1740. do {
  1741. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  1742. } while (x == 0);
  1743. if (x >= 0x100)
  1744. break;
  1745. }
  1746. /* Ask the PMU to put us to sleep */
  1747. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  1748. pmu_wait_complete(&sleep_req);
  1749. pmu_unlock();
  1750. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  1751. asleep = 1;
  1752. /* Put the CPU into sleep mode */
  1753. hid0 = mfspr(SPRN_HID0);
  1754. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  1755. mtspr(SPRN_HID0, hid0);
  1756. local_irq_enable();
  1757. msr = mfmsr() | MSR_POW;
  1758. while (asleep) {
  1759. mb();
  1760. mtmsr(msr);
  1761. isync();
  1762. }
  1763. local_irq_disable();
  1764. /* OK, we're awake again, start restoring things */
  1765. out_be32(mem_ctrl_sleep, 0x3f);
  1766. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  1767. return 0;
  1768. }
  1769. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  1770. /*
  1771. * Support for /dev/pmu device
  1772. */
  1773. #define RB_SIZE 0x10
  1774. struct pmu_private {
  1775. struct list_head list;
  1776. int rb_get;
  1777. int rb_put;
  1778. struct rb_entry {
  1779. unsigned short len;
  1780. unsigned char data[16];
  1781. } rb_buf[RB_SIZE];
  1782. wait_queue_head_t wait;
  1783. spinlock_t lock;
  1784. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1785. int backlight_locker;
  1786. #endif
  1787. };
  1788. static LIST_HEAD(all_pmu_pvt);
  1789. static DEFINE_SPINLOCK(all_pvt_lock);
  1790. static void
  1791. pmu_pass_intr(unsigned char *data, int len)
  1792. {
  1793. struct pmu_private *pp;
  1794. struct list_head *list;
  1795. int i;
  1796. unsigned long flags;
  1797. if (len > sizeof(pp->rb_buf[0].data))
  1798. len = sizeof(pp->rb_buf[0].data);
  1799. spin_lock_irqsave(&all_pvt_lock, flags);
  1800. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  1801. pp = list_entry(list, struct pmu_private, list);
  1802. spin_lock(&pp->lock);
  1803. i = pp->rb_put + 1;
  1804. if (i >= RB_SIZE)
  1805. i = 0;
  1806. if (i != pp->rb_get) {
  1807. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  1808. rp->len = len;
  1809. memcpy(rp->data, data, len);
  1810. pp->rb_put = i;
  1811. wake_up_interruptible(&pp->wait);
  1812. }
  1813. spin_unlock(&pp->lock);
  1814. }
  1815. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1816. }
  1817. static int
  1818. pmu_open(struct inode *inode, struct file *file)
  1819. {
  1820. struct pmu_private *pp;
  1821. unsigned long flags;
  1822. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  1823. if (pp == 0)
  1824. return -ENOMEM;
  1825. pp->rb_get = pp->rb_put = 0;
  1826. spin_lock_init(&pp->lock);
  1827. init_waitqueue_head(&pp->wait);
  1828. mutex_lock(&pmu_info_proc_mutex);
  1829. spin_lock_irqsave(&all_pvt_lock, flags);
  1830. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1831. pp->backlight_locker = 0;
  1832. #endif
  1833. list_add(&pp->list, &all_pmu_pvt);
  1834. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1835. file->private_data = pp;
  1836. mutex_unlock(&pmu_info_proc_mutex);
  1837. return 0;
  1838. }
  1839. static ssize_t
  1840. pmu_read(struct file *file, char __user *buf,
  1841. size_t count, loff_t *ppos)
  1842. {
  1843. struct pmu_private *pp = file->private_data;
  1844. DECLARE_WAITQUEUE(wait, current);
  1845. unsigned long flags;
  1846. int ret = 0;
  1847. if (count < 1 || pp == 0)
  1848. return -EINVAL;
  1849. if (!access_ok(VERIFY_WRITE, buf, count))
  1850. return -EFAULT;
  1851. spin_lock_irqsave(&pp->lock, flags);
  1852. add_wait_queue(&pp->wait, &wait);
  1853. current->state = TASK_INTERRUPTIBLE;
  1854. for (;;) {
  1855. ret = -EAGAIN;
  1856. if (pp->rb_get != pp->rb_put) {
  1857. int i = pp->rb_get;
  1858. struct rb_entry *rp = &pp->rb_buf[i];
  1859. ret = rp->len;
  1860. spin_unlock_irqrestore(&pp->lock, flags);
  1861. if (ret > count)
  1862. ret = count;
  1863. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  1864. ret = -EFAULT;
  1865. if (++i >= RB_SIZE)
  1866. i = 0;
  1867. spin_lock_irqsave(&pp->lock, flags);
  1868. pp->rb_get = i;
  1869. }
  1870. if (ret >= 0)
  1871. break;
  1872. if (file->f_flags & O_NONBLOCK)
  1873. break;
  1874. ret = -ERESTARTSYS;
  1875. if (signal_pending(current))
  1876. break;
  1877. spin_unlock_irqrestore(&pp->lock, flags);
  1878. schedule();
  1879. spin_lock_irqsave(&pp->lock, flags);
  1880. }
  1881. current->state = TASK_RUNNING;
  1882. remove_wait_queue(&pp->wait, &wait);
  1883. spin_unlock_irqrestore(&pp->lock, flags);
  1884. return ret;
  1885. }
  1886. static ssize_t
  1887. pmu_write(struct file *file, const char __user *buf,
  1888. size_t count, loff_t *ppos)
  1889. {
  1890. return 0;
  1891. }
  1892. static unsigned int
  1893. pmu_fpoll(struct file *filp, poll_table *wait)
  1894. {
  1895. struct pmu_private *pp = filp->private_data;
  1896. unsigned int mask = 0;
  1897. unsigned long flags;
  1898. if (pp == 0)
  1899. return 0;
  1900. poll_wait(filp, &pp->wait, wait);
  1901. spin_lock_irqsave(&pp->lock, flags);
  1902. if (pp->rb_get != pp->rb_put)
  1903. mask |= POLLIN;
  1904. spin_unlock_irqrestore(&pp->lock, flags);
  1905. return mask;
  1906. }
  1907. static int
  1908. pmu_release(struct inode *inode, struct file *file)
  1909. {
  1910. struct pmu_private *pp = file->private_data;
  1911. unsigned long flags;
  1912. if (pp != 0) {
  1913. file->private_data = NULL;
  1914. spin_lock_irqsave(&all_pvt_lock, flags);
  1915. list_del(&pp->list);
  1916. spin_unlock_irqrestore(&all_pvt_lock, flags);
  1917. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  1918. if (pp->backlight_locker)
  1919. pmac_backlight_enable();
  1920. #endif
  1921. kfree(pp);
  1922. }
  1923. return 0;
  1924. }
  1925. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  1926. static void pmac_suspend_disable_irqs(void)
  1927. {
  1928. /* Call platform functions marked "on sleep" */
  1929. pmac_pfunc_i2c_suspend();
  1930. pmac_pfunc_base_suspend();
  1931. }
  1932. static int powerbook_sleep(suspend_state_t state)
  1933. {
  1934. int error = 0;
  1935. /* Wait for completion of async requests */
  1936. while (!batt_req.complete)
  1937. pmu_poll();
  1938. /* Giveup the lazy FPU & vec so we don't have to back them
  1939. * up from the low level code
  1940. */
  1941. enable_kernel_fp();
  1942. #ifdef CONFIG_ALTIVEC
  1943. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  1944. enable_kernel_altivec();
  1945. #endif /* CONFIG_ALTIVEC */
  1946. switch (pmu_kind) {
  1947. case PMU_OHARE_BASED:
  1948. error = powerbook_sleep_3400();
  1949. break;
  1950. case PMU_HEATHROW_BASED:
  1951. case PMU_PADDINGTON_BASED:
  1952. error = powerbook_sleep_grackle();
  1953. break;
  1954. case PMU_KEYLARGO_BASED:
  1955. error = powerbook_sleep_Core99();
  1956. break;
  1957. default:
  1958. return -ENOSYS;
  1959. }
  1960. if (error)
  1961. return error;
  1962. mdelay(100);
  1963. return 0;
  1964. }
  1965. static void pmac_suspend_enable_irqs(void)
  1966. {
  1967. /* Force a poll of ADB interrupts */
  1968. adb_int_pending = 1;
  1969. via_pmu_interrupt(0, NULL);
  1970. mdelay(10);
  1971. /* Call platform functions marked "on wake" */
  1972. pmac_pfunc_base_resume();
  1973. pmac_pfunc_i2c_resume();
  1974. }
  1975. static int pmu_sleep_valid(suspend_state_t state)
  1976. {
  1977. return state == PM_SUSPEND_MEM
  1978. && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
  1979. }
  1980. static const struct platform_suspend_ops pmu_pm_ops = {
  1981. .enter = powerbook_sleep,
  1982. .valid = pmu_sleep_valid,
  1983. };
  1984. static int register_pmu_pm_ops(void)
  1985. {
  1986. if (pmu_kind == PMU_OHARE_BASED)
  1987. powerbook_sleep_init_3400();
  1988. ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
  1989. ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
  1990. suspend_set_ops(&pmu_pm_ops);
  1991. return 0;
  1992. }
  1993. device_initcall(register_pmu_pm_ops);
  1994. #endif
  1995. static int pmu_ioctl(struct file *filp,
  1996. u_int cmd, u_long arg)
  1997. {
  1998. __u32 __user *argp = (__u32 __user *)arg;
  1999. int error = -EINVAL;
  2000. switch (cmd) {
  2001. case PMU_IOC_SLEEP:
  2002. if (!capable(CAP_SYS_ADMIN))
  2003. return -EACCES;
  2004. return pm_suspend(PM_SUSPEND_MEM);
  2005. case PMU_IOC_CAN_SLEEP:
  2006. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
  2007. return put_user(0, argp);
  2008. else
  2009. return put_user(1, argp);
  2010. #ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
  2011. /* Compatibility ioctl's for backlight */
  2012. case PMU_IOC_GET_BACKLIGHT:
  2013. {
  2014. int brightness;
  2015. brightness = pmac_backlight_get_legacy_brightness();
  2016. if (brightness < 0)
  2017. return brightness;
  2018. else
  2019. return put_user(brightness, argp);
  2020. }
  2021. case PMU_IOC_SET_BACKLIGHT:
  2022. {
  2023. int brightness;
  2024. error = get_user(brightness, argp);
  2025. if (error)
  2026. return error;
  2027. return pmac_backlight_set_legacy_brightness(brightness);
  2028. }
  2029. #ifdef CONFIG_INPUT_ADBHID
  2030. case PMU_IOC_GRAB_BACKLIGHT: {
  2031. struct pmu_private *pp = filp->private_data;
  2032. if (pp->backlight_locker)
  2033. return 0;
  2034. pp->backlight_locker = 1;
  2035. pmac_backlight_disable();
  2036. return 0;
  2037. }
  2038. #endif /* CONFIG_INPUT_ADBHID */
  2039. #endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
  2040. case PMU_IOC_GET_MODEL:
  2041. return put_user(pmu_kind, argp);
  2042. case PMU_IOC_HAS_ADB:
  2043. return put_user(pmu_has_adb, argp);
  2044. }
  2045. return error;
  2046. }
  2047. static long pmu_unlocked_ioctl(struct file *filp,
  2048. u_int cmd, u_long arg)
  2049. {
  2050. int ret;
  2051. mutex_lock(&pmu_info_proc_mutex);
  2052. ret = pmu_ioctl(filp, cmd, arg);
  2053. mutex_unlock(&pmu_info_proc_mutex);
  2054. return ret;
  2055. }
  2056. #ifdef CONFIG_COMPAT
  2057. #define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
  2058. #define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
  2059. #define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
  2060. #define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
  2061. #define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
  2062. #define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
  2063. static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
  2064. {
  2065. switch (cmd) {
  2066. case PMU_IOC_SLEEP:
  2067. break;
  2068. case PMU_IOC_GET_BACKLIGHT32:
  2069. cmd = PMU_IOC_GET_BACKLIGHT;
  2070. break;
  2071. case PMU_IOC_SET_BACKLIGHT32:
  2072. cmd = PMU_IOC_SET_BACKLIGHT;
  2073. break;
  2074. case PMU_IOC_GET_MODEL32:
  2075. cmd = PMU_IOC_GET_MODEL;
  2076. break;
  2077. case PMU_IOC_HAS_ADB32:
  2078. cmd = PMU_IOC_HAS_ADB;
  2079. break;
  2080. case PMU_IOC_CAN_SLEEP32:
  2081. cmd = PMU_IOC_CAN_SLEEP;
  2082. break;
  2083. case PMU_IOC_GRAB_BACKLIGHT32:
  2084. cmd = PMU_IOC_GRAB_BACKLIGHT;
  2085. break;
  2086. default:
  2087. return -ENOIOCTLCMD;
  2088. }
  2089. return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  2090. }
  2091. #endif
  2092. static const struct file_operations pmu_device_fops = {
  2093. .read = pmu_read,
  2094. .write = pmu_write,
  2095. .poll = pmu_fpoll,
  2096. .unlocked_ioctl = pmu_unlocked_ioctl,
  2097. #ifdef CONFIG_COMPAT
  2098. .compat_ioctl = compat_pmu_ioctl,
  2099. #endif
  2100. .open = pmu_open,
  2101. .release = pmu_release,
  2102. .llseek = noop_llseek,
  2103. };
  2104. static struct miscdevice pmu_device = {
  2105. PMU_MINOR, "pmu", &pmu_device_fops
  2106. };
  2107. static int pmu_device_init(void)
  2108. {
  2109. if (!via)
  2110. return 0;
  2111. if (misc_register(&pmu_device) < 0)
  2112. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2113. return 0;
  2114. }
  2115. device_initcall(pmu_device_init);
  2116. #ifdef DEBUG_SLEEP
  2117. static inline void
  2118. polled_handshake(volatile unsigned char __iomem *via)
  2119. {
  2120. via[B] &= ~TREQ; eieio();
  2121. while ((via[B] & TACK) != 0)
  2122. ;
  2123. via[B] |= TREQ; eieio();
  2124. while ((via[B] & TACK) == 0)
  2125. ;
  2126. }
  2127. static inline void
  2128. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2129. {
  2130. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2131. via[SR] = x; eieio();
  2132. polled_handshake(via);
  2133. }
  2134. static inline int
  2135. polled_recv_byte(volatile unsigned char __iomem *via)
  2136. {
  2137. int x;
  2138. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2139. x = via[SR]; eieio();
  2140. polled_handshake(via);
  2141. x = via[SR]; eieio();
  2142. return x;
  2143. }
  2144. int
  2145. pmu_polled_request(struct adb_request *req)
  2146. {
  2147. unsigned long flags;
  2148. int i, l, c;
  2149. volatile unsigned char __iomem *v = via;
  2150. req->complete = 1;
  2151. c = req->data[0];
  2152. l = pmu_data_len[c][0];
  2153. if (l >= 0 && req->nbytes != l + 1)
  2154. return -EINVAL;
  2155. local_irq_save(flags);
  2156. while (pmu_state != idle)
  2157. pmu_poll();
  2158. while ((via[B] & TACK) == 0)
  2159. ;
  2160. polled_send_byte(v, c);
  2161. if (l < 0) {
  2162. l = req->nbytes - 1;
  2163. polled_send_byte(v, l);
  2164. }
  2165. for (i = 1; i <= l; ++i)
  2166. polled_send_byte(v, req->data[i]);
  2167. l = pmu_data_len[c][1];
  2168. if (l < 0)
  2169. l = polled_recv_byte(v);
  2170. for (i = 0; i < l; ++i)
  2171. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2172. if (req->done)
  2173. (*req->done)(req);
  2174. local_irq_restore(flags);
  2175. return 0;
  2176. }
  2177. /* N.B. This doesn't work on the 3400 */
  2178. void pmu_blink(int n)
  2179. {
  2180. struct adb_request req;
  2181. memset(&req, 0, sizeof(req));
  2182. for (; n > 0; --n) {
  2183. req.nbytes = 4;
  2184. req.done = NULL;
  2185. req.data[0] = 0xee;
  2186. req.data[1] = 4;
  2187. req.data[2] = 0;
  2188. req.data[3] = 1;
  2189. req.reply[0] = ADB_RET_OK;
  2190. req.reply_len = 1;
  2191. req.reply_expected = 0;
  2192. pmu_polled_request(&req);
  2193. mdelay(50);
  2194. req.nbytes = 4;
  2195. req.done = NULL;
  2196. req.data[0] = 0xee;
  2197. req.data[1] = 4;
  2198. req.data[2] = 0;
  2199. req.data[3] = 0;
  2200. req.reply[0] = ADB_RET_OK;
  2201. req.reply_len = 1;
  2202. req.reply_expected = 0;
  2203. pmu_polled_request(&req);
  2204. mdelay(50);
  2205. }
  2206. mdelay(50);
  2207. }
  2208. #endif /* DEBUG_SLEEP */
  2209. #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
  2210. int pmu_sys_suspended;
  2211. static int pmu_syscore_suspend(void)
  2212. {
  2213. /* Suspend PMU event interrupts */
  2214. pmu_suspend();
  2215. pmu_sys_suspended = 1;
  2216. #ifdef CONFIG_PMAC_BACKLIGHT
  2217. /* Tell backlight code not to muck around with the chip anymore */
  2218. pmu_backlight_set_sleep(1);
  2219. #endif
  2220. return 0;
  2221. }
  2222. static void pmu_syscore_resume(void)
  2223. {
  2224. struct adb_request req;
  2225. if (!pmu_sys_suspended)
  2226. return;
  2227. /* Tell PMU we are ready */
  2228. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2229. pmu_wait_complete(&req);
  2230. #ifdef CONFIG_PMAC_BACKLIGHT
  2231. /* Tell backlight code it can use the chip again */
  2232. pmu_backlight_set_sleep(0);
  2233. #endif
  2234. /* Resume PMU event interrupts */
  2235. pmu_resume();
  2236. pmu_sys_suspended = 0;
  2237. }
  2238. static struct syscore_ops pmu_syscore_ops = {
  2239. .suspend = pmu_syscore_suspend,
  2240. .resume = pmu_syscore_resume,
  2241. };
  2242. static int pmu_syscore_register(void)
  2243. {
  2244. register_syscore_ops(&pmu_syscore_ops);
  2245. return 0;
  2246. }
  2247. subsys_initcall(pmu_syscore_register);
  2248. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
  2249. EXPORT_SYMBOL(pmu_request);
  2250. EXPORT_SYMBOL(pmu_queue_request);
  2251. EXPORT_SYMBOL(pmu_poll);
  2252. EXPORT_SYMBOL(pmu_poll_adb);
  2253. EXPORT_SYMBOL(pmu_wait_complete);
  2254. EXPORT_SYMBOL(pmu_suspend);
  2255. EXPORT_SYMBOL(pmu_resume);
  2256. EXPORT_SYMBOL(pmu_unlock);
  2257. #if defined(CONFIG_PPC32)
  2258. EXPORT_SYMBOL(pmu_enable_irled);
  2259. EXPORT_SYMBOL(pmu_battery_count);
  2260. EXPORT_SYMBOL(pmu_batteries);
  2261. EXPORT_SYMBOL(pmu_power_flags);
  2262. #endif /* CONFIG_SUSPEND && CONFIG_PPC32 */