w83795.c 62 KB

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  1. /*
  2. * w83795.c - Linux kernel driver for hardware monitoring
  3. * Copyright (C) 2008 Nuvoton Technology Corp.
  4. * Wei Song
  5. * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation - version 2.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  19. * 02110-1301 USA.
  20. *
  21. * Supports following chips:
  22. *
  23. * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
  24. * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
  25. * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/slab.h>
  31. #include <linux/i2c.h>
  32. #include <linux/hwmon.h>
  33. #include <linux/hwmon-sysfs.h>
  34. #include <linux/err.h>
  35. #include <linux/mutex.h>
  36. #include <linux/delay.h>
  37. /* Addresses to scan */
  38. static const unsigned short normal_i2c[] = {
  39. 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
  40. };
  41. static bool reset;
  42. module_param(reset, bool, 0);
  43. MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
  44. #define W83795_REG_BANKSEL 0x00
  45. #define W83795_REG_VENDORID 0xfd
  46. #define W83795_REG_CHIPID 0xfe
  47. #define W83795_REG_DEVICEID 0xfb
  48. #define W83795_REG_DEVICEID_A 0xff
  49. #define W83795_REG_I2C_ADDR 0xfc
  50. #define W83795_REG_CONFIG 0x01
  51. #define W83795_REG_CONFIG_CONFIG48 0x04
  52. #define W83795_REG_CONFIG_START 0x01
  53. /* Multi-Function Pin Ctrl Registers */
  54. #define W83795_REG_VOLT_CTRL1 0x02
  55. #define W83795_REG_VOLT_CTRL2 0x03
  56. #define W83795_REG_TEMP_CTRL1 0x04
  57. #define W83795_REG_TEMP_CTRL2 0x05
  58. #define W83795_REG_FANIN_CTRL1 0x06
  59. #define W83795_REG_FANIN_CTRL2 0x07
  60. #define W83795_REG_VMIGB_CTRL 0x08
  61. #define TEMP_READ 0
  62. #define TEMP_CRIT 1
  63. #define TEMP_CRIT_HYST 2
  64. #define TEMP_WARN 3
  65. #define TEMP_WARN_HYST 4
  66. /*
  67. * only crit and crit_hyst affect real-time alarm status
  68. * current crit crit_hyst warn warn_hyst
  69. */
  70. static const u16 W83795_REG_TEMP[][5] = {
  71. {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
  72. {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
  73. {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
  74. {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
  75. {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
  76. {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
  77. };
  78. #define IN_READ 0
  79. #define IN_MAX 1
  80. #define IN_LOW 2
  81. static const u16 W83795_REG_IN[][3] = {
  82. /* Current, HL, LL */
  83. {0x10, 0x70, 0x71}, /* VSEN1 */
  84. {0x11, 0x72, 0x73}, /* VSEN2 */
  85. {0x12, 0x74, 0x75}, /* VSEN3 */
  86. {0x13, 0x76, 0x77}, /* VSEN4 */
  87. {0x14, 0x78, 0x79}, /* VSEN5 */
  88. {0x15, 0x7a, 0x7b}, /* VSEN6 */
  89. {0x16, 0x7c, 0x7d}, /* VSEN7 */
  90. {0x17, 0x7e, 0x7f}, /* VSEN8 */
  91. {0x18, 0x80, 0x81}, /* VSEN9 */
  92. {0x19, 0x82, 0x83}, /* VSEN10 */
  93. {0x1A, 0x84, 0x85}, /* VSEN11 */
  94. {0x1B, 0x86, 0x87}, /* VTT */
  95. {0x1C, 0x88, 0x89}, /* 3VDD */
  96. {0x1D, 0x8a, 0x8b}, /* 3VSB */
  97. {0x1E, 0x8c, 0x8d}, /* VBAT */
  98. {0x1F, 0xa6, 0xa7}, /* VSEN12 */
  99. {0x20, 0xaa, 0xab}, /* VSEN13 */
  100. {0x21, 0x96, 0x97}, /* VSEN14 */
  101. {0x22, 0x9a, 0x9b}, /* VSEN15 */
  102. {0x23, 0x9e, 0x9f}, /* VSEN16 */
  103. {0x24, 0xa2, 0xa3}, /* VSEN17 */
  104. };
  105. #define W83795_REG_VRLSB 0x3C
  106. static const u8 W83795_REG_IN_HL_LSB[] = {
  107. 0x8e, /* VSEN1-4 */
  108. 0x90, /* VSEN5-8 */
  109. 0x92, /* VSEN9-11 */
  110. 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
  111. 0xa8, /* VSEN12 */
  112. 0xac, /* VSEN13 */
  113. 0x98, /* VSEN14 */
  114. 0x9c, /* VSEN15 */
  115. 0xa0, /* VSEN16 */
  116. 0xa4, /* VSEN17 */
  117. };
  118. #define IN_LSB_REG(index, type) \
  119. (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
  120. : (W83795_REG_IN_HL_LSB[(index)] + 1))
  121. #define IN_LSB_SHIFT 0
  122. #define IN_LSB_IDX 1
  123. static const u8 IN_LSB_SHIFT_IDX[][2] = {
  124. /* High/Low LSB shift, LSB No. */
  125. {0x00, 0x00}, /* VSEN1 */
  126. {0x02, 0x00}, /* VSEN2 */
  127. {0x04, 0x00}, /* VSEN3 */
  128. {0x06, 0x00}, /* VSEN4 */
  129. {0x00, 0x01}, /* VSEN5 */
  130. {0x02, 0x01}, /* VSEN6 */
  131. {0x04, 0x01}, /* VSEN7 */
  132. {0x06, 0x01}, /* VSEN8 */
  133. {0x00, 0x02}, /* VSEN9 */
  134. {0x02, 0x02}, /* VSEN10 */
  135. {0x04, 0x02}, /* VSEN11 */
  136. {0x00, 0x03}, /* VTT */
  137. {0x02, 0x03}, /* 3VDD */
  138. {0x04, 0x03}, /* 3VSB */
  139. {0x06, 0x03}, /* VBAT */
  140. {0x06, 0x04}, /* VSEN12 */
  141. {0x06, 0x05}, /* VSEN13 */
  142. {0x06, 0x06}, /* VSEN14 */
  143. {0x06, 0x07}, /* VSEN15 */
  144. {0x06, 0x08}, /* VSEN16 */
  145. {0x06, 0x09}, /* VSEN17 */
  146. };
  147. #define W83795_REG_FAN(index) (0x2E + (index))
  148. #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
  149. #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
  150. #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
  151. (((index) & 1) ? 4 : 0)
  152. #define W83795_REG_VID_CTRL 0x6A
  153. #define W83795_REG_ALARM_CTRL 0x40
  154. #define ALARM_CTRL_RTSACS (1 << 7)
  155. #define W83795_REG_ALARM(index) (0x41 + (index))
  156. #define W83795_REG_CLR_CHASSIS 0x4D
  157. #define W83795_REG_BEEP(index) (0x50 + (index))
  158. #define W83795_REG_OVT_CFG 0x58
  159. #define OVT_CFG_SEL (1 << 7)
  160. #define W83795_REG_FCMS1 0x201
  161. #define W83795_REG_FCMS2 0x208
  162. #define W83795_REG_TFMR(index) (0x202 + (index))
  163. #define W83795_REG_FOMC 0x20F
  164. #define W83795_REG_TSS(index) (0x209 + (index))
  165. #define TSS_MAP_RESERVED 0xff
  166. static const u8 tss_map[4][6] = {
  167. { 0, 1, 2, 3, 4, 5},
  168. { 6, 7, 8, 9, 0, 1},
  169. {10, 11, 12, 13, 2, 3},
  170. { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED},
  171. };
  172. #define PWM_OUTPUT 0
  173. #define PWM_FREQ 1
  174. #define PWM_START 2
  175. #define PWM_NONSTOP 3
  176. #define PWM_STOP_TIME 4
  177. #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index))
  178. #define W83795_REG_FTSH(index) (0x240 + (index) * 2)
  179. #define W83795_REG_FTSL(index) (0x241 + (index) * 2)
  180. #define W83795_REG_TFTS 0x250
  181. #define TEMP_PWM_TTTI 0
  182. #define TEMP_PWM_CTFS 1
  183. #define TEMP_PWM_HCT 2
  184. #define TEMP_PWM_HOT 3
  185. #define W83795_REG_TTTI(index) (0x260 + (index))
  186. #define W83795_REG_CTFS(index) (0x268 + (index))
  187. #define W83795_REG_HT(index) (0x270 + (index))
  188. #define SF4_TEMP 0
  189. #define SF4_PWM 1
  190. #define W83795_REG_SF4_TEMP(temp_num, index) \
  191. (0x280 + 0x10 * (temp_num) + (index))
  192. #define W83795_REG_SF4_PWM(temp_num, index) \
  193. (0x288 + 0x10 * (temp_num) + (index))
  194. #define W83795_REG_DTSC 0x301
  195. #define W83795_REG_DTSE 0x302
  196. #define W83795_REG_DTS(index) (0x26 + (index))
  197. #define W83795_REG_PECI_TBASE(index) (0x320 + (index))
  198. #define DTS_CRIT 0
  199. #define DTS_CRIT_HYST 1
  200. #define DTS_WARN 2
  201. #define DTS_WARN_HYST 3
  202. #define W83795_REG_DTS_EXT(index) (0xB2 + (index))
  203. #define SETUP_PWM_DEFAULT 0
  204. #define SETUP_PWM_UPTIME 1
  205. #define SETUP_PWM_DOWNTIME 2
  206. #define W83795_REG_SETUP_PWM(index) (0x20C + (index))
  207. static inline u16 in_from_reg(u8 index, u16 val)
  208. {
  209. /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
  210. if (index >= 12 && index <= 14)
  211. return val * 6;
  212. else
  213. return val * 2;
  214. }
  215. static inline u16 in_to_reg(u8 index, u16 val)
  216. {
  217. if (index >= 12 && index <= 14)
  218. return val / 6;
  219. else
  220. return val / 2;
  221. }
  222. static inline unsigned long fan_from_reg(u16 val)
  223. {
  224. if ((val == 0xfff) || (val == 0))
  225. return 0;
  226. return 1350000UL / val;
  227. }
  228. static inline u16 fan_to_reg(long rpm)
  229. {
  230. if (rpm <= 0)
  231. return 0x0fff;
  232. return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
  233. }
  234. static inline unsigned long time_from_reg(u8 reg)
  235. {
  236. return reg * 100;
  237. }
  238. static inline u8 time_to_reg(unsigned long val)
  239. {
  240. return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
  241. }
  242. static inline long temp_from_reg(s8 reg)
  243. {
  244. return reg * 1000;
  245. }
  246. static inline s8 temp_to_reg(long val, s8 min, s8 max)
  247. {
  248. return SENSORS_LIMIT(val / 1000, min, max);
  249. }
  250. static const u16 pwm_freq_cksel0[16] = {
  251. 1024, 512, 341, 256, 205, 171, 146, 128,
  252. 85, 64, 32, 16, 8, 4, 2, 1
  253. };
  254. static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
  255. {
  256. unsigned long base_clock;
  257. if (reg & 0x80) {
  258. base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
  259. return base_clock / ((reg & 0x7f) + 1);
  260. } else
  261. return pwm_freq_cksel0[reg & 0x0f];
  262. }
  263. static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
  264. {
  265. unsigned long base_clock;
  266. u8 reg0, reg1;
  267. unsigned long best0, best1;
  268. /* Best fit for cksel = 0 */
  269. for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
  270. if (val > (pwm_freq_cksel0[reg0] +
  271. pwm_freq_cksel0[reg0 + 1]) / 2)
  272. break;
  273. }
  274. if (val < 375) /* cksel = 1 can't beat this */
  275. return reg0;
  276. best0 = pwm_freq_cksel0[reg0];
  277. /* Best fit for cksel = 1 */
  278. base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
  279. reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
  280. best1 = base_clock / reg1;
  281. reg1 = 0x80 | (reg1 - 1);
  282. /* Choose the closest one */
  283. if (abs(val - best0) > abs(val - best1))
  284. return reg1;
  285. else
  286. return reg0;
  287. }
  288. enum chip_types {w83795g, w83795adg};
  289. struct w83795_data {
  290. struct device *hwmon_dev;
  291. struct mutex update_lock;
  292. unsigned long last_updated; /* In jiffies */
  293. enum chip_types chip_type;
  294. u8 bank;
  295. u32 has_in; /* Enable monitor VIN or not */
  296. u8 has_dyn_in; /* Only in2-0 can have this */
  297. u16 in[21][3]; /* Register value, read/high/low */
  298. u8 in_lsb[10][3]; /* LSB Register value, high/low */
  299. u8 has_gain; /* has gain: in17-20 * 8 */
  300. u16 has_fan; /* Enable fan14-1 or not */
  301. u16 fan[14]; /* Register value combine */
  302. u16 fan_min[14]; /* Register value combine */
  303. u8 has_temp; /* Enable monitor temp6-1 or not */
  304. s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
  305. u8 temp_read_vrlsb[6];
  306. u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
  307. u8 temp_src[3]; /* Register value */
  308. u8 enable_dts; /*
  309. * Enable PECI and SB-TSI,
  310. * bit 0: =1 enable, =0 disable,
  311. * bit 1: =1 AMD SB-TSI, =0 Intel PECI
  312. */
  313. u8 has_dts; /* Enable monitor DTS temp */
  314. s8 dts[8]; /* Register value */
  315. u8 dts_read_vrlsb[8]; /* Register value */
  316. s8 dts_ext[4]; /* Register value */
  317. u8 has_pwm; /*
  318. * 795g supports 8 pwm, 795adg only supports 2,
  319. * no config register, only affected by chip
  320. * type
  321. */
  322. u8 pwm[8][5]; /*
  323. * Register value, output, freq, start,
  324. * non stop, stop time
  325. */
  326. u16 clkin; /* CLKIN frequency in kHz */
  327. u8 pwm_fcms[2]; /* Register value */
  328. u8 pwm_tfmr[6]; /* Register value */
  329. u8 pwm_fomc; /* Register value */
  330. u16 target_speed[8]; /*
  331. * Register value, target speed for speed
  332. * cruise
  333. */
  334. u8 tol_speed; /* tolerance of target speed */
  335. u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
  336. u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
  337. u8 setup_pwm[3]; /* Register value */
  338. u8 alarms[6]; /* Register value */
  339. u8 enable_beep;
  340. u8 beeps[6]; /* Register value */
  341. char valid;
  342. char valid_limits;
  343. char valid_pwm_config;
  344. };
  345. /*
  346. * Hardware access
  347. * We assume that nobdody can change the bank outside the driver.
  348. */
  349. /* Must be called with data->update_lock held, except during initialization */
  350. static int w83795_set_bank(struct i2c_client *client, u8 bank)
  351. {
  352. struct w83795_data *data = i2c_get_clientdata(client);
  353. int err;
  354. /* If the same bank is already set, nothing to do */
  355. if ((data->bank & 0x07) == bank)
  356. return 0;
  357. /* Change to new bank, preserve all other bits */
  358. bank |= data->bank & ~0x07;
  359. err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
  360. if (err < 0) {
  361. dev_err(&client->dev,
  362. "Failed to set bank to %d, err %d\n",
  363. (int)bank, err);
  364. return err;
  365. }
  366. data->bank = bank;
  367. return 0;
  368. }
  369. /* Must be called with data->update_lock held, except during initialization */
  370. static u8 w83795_read(struct i2c_client *client, u16 reg)
  371. {
  372. int err;
  373. err = w83795_set_bank(client, reg >> 8);
  374. if (err < 0)
  375. return 0x00; /* Arbitrary */
  376. err = i2c_smbus_read_byte_data(client, reg & 0xff);
  377. if (err < 0) {
  378. dev_err(&client->dev,
  379. "Failed to read from register 0x%03x, err %d\n",
  380. (int)reg, err);
  381. return 0x00; /* Arbitrary */
  382. }
  383. return err;
  384. }
  385. /* Must be called with data->update_lock held, except during initialization */
  386. static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
  387. {
  388. int err;
  389. err = w83795_set_bank(client, reg >> 8);
  390. if (err < 0)
  391. return err;
  392. err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
  393. if (err < 0)
  394. dev_err(&client->dev,
  395. "Failed to write to register 0x%03x, err %d\n",
  396. (int)reg, err);
  397. return err;
  398. }
  399. static void w83795_update_limits(struct i2c_client *client)
  400. {
  401. struct w83795_data *data = i2c_get_clientdata(client);
  402. int i, limit;
  403. u8 lsb;
  404. /* Read the voltage limits */
  405. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  406. if (!(data->has_in & (1 << i)))
  407. continue;
  408. data->in[i][IN_MAX] =
  409. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  410. data->in[i][IN_LOW] =
  411. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  412. }
  413. for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
  414. if ((i == 2 && data->chip_type == w83795adg) ||
  415. (i >= 4 && !(data->has_in & (1 << (i + 11)))))
  416. continue;
  417. data->in_lsb[i][IN_MAX] =
  418. w83795_read(client, IN_LSB_REG(i, IN_MAX));
  419. data->in_lsb[i][IN_LOW] =
  420. w83795_read(client, IN_LSB_REG(i, IN_LOW));
  421. }
  422. /* Read the fan limits */
  423. lsb = 0; /* Silent false gcc warning */
  424. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  425. /*
  426. * Each register contains LSB for 2 fans, but we want to
  427. * read it only once to save time
  428. */
  429. if ((i & 1) == 0 && (data->has_fan & (3 << i)))
  430. lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
  431. if (!(data->has_fan & (1 << i)))
  432. continue;
  433. data->fan_min[i] =
  434. w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
  435. data->fan_min[i] |=
  436. (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
  437. }
  438. /* Read the temperature limits */
  439. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  440. if (!(data->has_temp & (1 << i)))
  441. continue;
  442. for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++)
  443. data->temp[i][limit] =
  444. w83795_read(client, W83795_REG_TEMP[i][limit]);
  445. }
  446. /* Read the DTS limits */
  447. if (data->enable_dts) {
  448. for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++)
  449. data->dts_ext[limit] =
  450. w83795_read(client, W83795_REG_DTS_EXT(limit));
  451. }
  452. /* Read beep settings */
  453. if (data->enable_beep) {
  454. for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
  455. data->beeps[i] =
  456. w83795_read(client, W83795_REG_BEEP(i));
  457. }
  458. data->valid_limits = 1;
  459. }
  460. static struct w83795_data *w83795_update_pwm_config(struct device *dev)
  461. {
  462. struct i2c_client *client = to_i2c_client(dev);
  463. struct w83795_data *data = i2c_get_clientdata(client);
  464. int i, tmp;
  465. mutex_lock(&data->update_lock);
  466. if (data->valid_pwm_config)
  467. goto END;
  468. /* Read temperature source selection */
  469. for (i = 0; i < ARRAY_SIZE(data->temp_src); i++)
  470. data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
  471. /* Read automatic fan speed control settings */
  472. data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
  473. data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
  474. for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
  475. data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
  476. data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
  477. for (i = 0; i < data->has_pwm; i++) {
  478. for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++)
  479. data->pwm[i][tmp] =
  480. w83795_read(client, W83795_REG_PWM(i, tmp));
  481. }
  482. for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) {
  483. data->target_speed[i] =
  484. w83795_read(client, W83795_REG_FTSH(i)) << 4;
  485. data->target_speed[i] |=
  486. w83795_read(client, W83795_REG_FTSL(i)) >> 4;
  487. }
  488. data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
  489. for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
  490. data->pwm_temp[i][TEMP_PWM_TTTI] =
  491. w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
  492. data->pwm_temp[i][TEMP_PWM_CTFS] =
  493. w83795_read(client, W83795_REG_CTFS(i));
  494. tmp = w83795_read(client, W83795_REG_HT(i));
  495. data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4;
  496. data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
  497. }
  498. /* Read SmartFanIV trip points */
  499. for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
  500. for (tmp = 0; tmp < 7; tmp++) {
  501. data->sf4_reg[i][SF4_TEMP][tmp] =
  502. w83795_read(client,
  503. W83795_REG_SF4_TEMP(i, tmp));
  504. data->sf4_reg[i][SF4_PWM][tmp] =
  505. w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
  506. }
  507. }
  508. /* Read setup PWM */
  509. for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++)
  510. data->setup_pwm[i] =
  511. w83795_read(client, W83795_REG_SETUP_PWM(i));
  512. data->valid_pwm_config = 1;
  513. END:
  514. mutex_unlock(&data->update_lock);
  515. return data;
  516. }
  517. static struct w83795_data *w83795_update_device(struct device *dev)
  518. {
  519. struct i2c_client *client = to_i2c_client(dev);
  520. struct w83795_data *data = i2c_get_clientdata(client);
  521. u16 tmp;
  522. u8 intrusion;
  523. int i;
  524. mutex_lock(&data->update_lock);
  525. if (!data->valid_limits)
  526. w83795_update_limits(client);
  527. if (!(time_after(jiffies, data->last_updated + HZ * 2)
  528. || !data->valid))
  529. goto END;
  530. /* Update the voltages value */
  531. for (i = 0; i < ARRAY_SIZE(data->in); i++) {
  532. if (!(data->has_in & (1 << i)))
  533. continue;
  534. tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
  535. tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
  536. data->in[i][IN_READ] = tmp;
  537. }
  538. /* in0-2 can have dynamic limits (W83795G only) */
  539. if (data->has_dyn_in) {
  540. u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
  541. u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
  542. for (i = 0; i < 3; i++) {
  543. if (!(data->has_dyn_in & (1 << i)))
  544. continue;
  545. data->in[i][IN_MAX] =
  546. w83795_read(client, W83795_REG_IN[i][IN_MAX]);
  547. data->in[i][IN_LOW] =
  548. w83795_read(client, W83795_REG_IN[i][IN_LOW]);
  549. data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
  550. data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
  551. }
  552. }
  553. /* Update fan */
  554. for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
  555. if (!(data->has_fan & (1 << i)))
  556. continue;
  557. data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
  558. data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4;
  559. }
  560. /* Update temperature */
  561. for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
  562. data->temp[i][TEMP_READ] =
  563. w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
  564. data->temp_read_vrlsb[i] =
  565. w83795_read(client, W83795_REG_VRLSB);
  566. }
  567. /* Update dts temperature */
  568. if (data->enable_dts) {
  569. for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
  570. if (!(data->has_dts & (1 << i)))
  571. continue;
  572. data->dts[i] =
  573. w83795_read(client, W83795_REG_DTS(i));
  574. data->dts_read_vrlsb[i] =
  575. w83795_read(client, W83795_REG_VRLSB);
  576. }
  577. }
  578. /* Update pwm output */
  579. for (i = 0; i < data->has_pwm; i++) {
  580. data->pwm[i][PWM_OUTPUT] =
  581. w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
  582. }
  583. /*
  584. * Update intrusion and alarms
  585. * It is important to read intrusion first, because reading from
  586. * register SMI STS6 clears the interrupt status temporarily.
  587. */
  588. tmp = w83795_read(client, W83795_REG_ALARM_CTRL);
  589. /* Switch to interrupt status for intrusion if needed */
  590. if (tmp & ALARM_CTRL_RTSACS)
  591. w83795_write(client, W83795_REG_ALARM_CTRL,
  592. tmp & ~ALARM_CTRL_RTSACS);
  593. intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6);
  594. /* Switch to real-time alarms */
  595. w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS);
  596. for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
  597. data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
  598. data->alarms[5] |= intrusion;
  599. /* Restore original configuration if needed */
  600. if (!(tmp & ALARM_CTRL_RTSACS))
  601. w83795_write(client, W83795_REG_ALARM_CTRL,
  602. tmp & ~ALARM_CTRL_RTSACS);
  603. data->last_updated = jiffies;
  604. data->valid = 1;
  605. END:
  606. mutex_unlock(&data->update_lock);
  607. return data;
  608. }
  609. /*
  610. * Sysfs attributes
  611. */
  612. #define ALARM_STATUS 0
  613. #define BEEP_ENABLE 1
  614. static ssize_t
  615. show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
  616. {
  617. struct w83795_data *data = w83795_update_device(dev);
  618. struct sensor_device_attribute_2 *sensor_attr =
  619. to_sensor_dev_attr_2(attr);
  620. int nr = sensor_attr->nr;
  621. int index = sensor_attr->index >> 3;
  622. int bit = sensor_attr->index & 0x07;
  623. u8 val;
  624. if (nr == ALARM_STATUS)
  625. val = (data->alarms[index] >> bit) & 1;
  626. else /* BEEP_ENABLE */
  627. val = (data->beeps[index] >> bit) & 1;
  628. return sprintf(buf, "%u\n", val);
  629. }
  630. static ssize_t
  631. store_beep(struct device *dev, struct device_attribute *attr,
  632. const char *buf, size_t count)
  633. {
  634. struct i2c_client *client = to_i2c_client(dev);
  635. struct w83795_data *data = i2c_get_clientdata(client);
  636. struct sensor_device_attribute_2 *sensor_attr =
  637. to_sensor_dev_attr_2(attr);
  638. int index = sensor_attr->index >> 3;
  639. int shift = sensor_attr->index & 0x07;
  640. u8 beep_bit = 1 << shift;
  641. unsigned long val;
  642. if (kstrtoul(buf, 10, &val) < 0)
  643. return -EINVAL;
  644. if (val != 0 && val != 1)
  645. return -EINVAL;
  646. mutex_lock(&data->update_lock);
  647. data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
  648. data->beeps[index] &= ~beep_bit;
  649. data->beeps[index] |= val << shift;
  650. w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
  651. mutex_unlock(&data->update_lock);
  652. return count;
  653. }
  654. /* Write 0 to clear chassis alarm */
  655. static ssize_t
  656. store_chassis_clear(struct device *dev,
  657. struct device_attribute *attr, const char *buf,
  658. size_t count)
  659. {
  660. struct i2c_client *client = to_i2c_client(dev);
  661. struct w83795_data *data = i2c_get_clientdata(client);
  662. unsigned long val;
  663. if (kstrtoul(buf, 10, &val) < 0 || val != 0)
  664. return -EINVAL;
  665. mutex_lock(&data->update_lock);
  666. val = w83795_read(client, W83795_REG_CLR_CHASSIS);
  667. val |= 0x80;
  668. w83795_write(client, W83795_REG_CLR_CHASSIS, val);
  669. /* Clear status and force cache refresh */
  670. w83795_read(client, W83795_REG_ALARM(5));
  671. data->valid = 0;
  672. mutex_unlock(&data->update_lock);
  673. return count;
  674. }
  675. #define FAN_INPUT 0
  676. #define FAN_MIN 1
  677. static ssize_t
  678. show_fan(struct device *dev, struct device_attribute *attr, char *buf)
  679. {
  680. struct sensor_device_attribute_2 *sensor_attr =
  681. to_sensor_dev_attr_2(attr);
  682. int nr = sensor_attr->nr;
  683. int index = sensor_attr->index;
  684. struct w83795_data *data = w83795_update_device(dev);
  685. u16 val;
  686. if (nr == FAN_INPUT)
  687. val = data->fan[index] & 0x0fff;
  688. else
  689. val = data->fan_min[index] & 0x0fff;
  690. return sprintf(buf, "%lu\n", fan_from_reg(val));
  691. }
  692. static ssize_t
  693. store_fan_min(struct device *dev, struct device_attribute *attr,
  694. const char *buf, size_t count)
  695. {
  696. struct sensor_device_attribute_2 *sensor_attr =
  697. to_sensor_dev_attr_2(attr);
  698. int index = sensor_attr->index;
  699. struct i2c_client *client = to_i2c_client(dev);
  700. struct w83795_data *data = i2c_get_clientdata(client);
  701. unsigned long val;
  702. if (kstrtoul(buf, 10, &val))
  703. return -EINVAL;
  704. val = fan_to_reg(val);
  705. mutex_lock(&data->update_lock);
  706. data->fan_min[index] = val;
  707. w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
  708. val &= 0x0f;
  709. if (index & 1) {
  710. val <<= 4;
  711. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  712. & 0x0f;
  713. } else {
  714. val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
  715. & 0xf0;
  716. }
  717. w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
  718. mutex_unlock(&data->update_lock);
  719. return count;
  720. }
  721. static ssize_t
  722. show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  723. {
  724. struct w83795_data *data;
  725. struct sensor_device_attribute_2 *sensor_attr =
  726. to_sensor_dev_attr_2(attr);
  727. int nr = sensor_attr->nr;
  728. int index = sensor_attr->index;
  729. unsigned int val;
  730. data = nr == PWM_OUTPUT ? w83795_update_device(dev)
  731. : w83795_update_pwm_config(dev);
  732. switch (nr) {
  733. case PWM_STOP_TIME:
  734. val = time_from_reg(data->pwm[index][nr]);
  735. break;
  736. case PWM_FREQ:
  737. val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
  738. break;
  739. default:
  740. val = data->pwm[index][nr];
  741. break;
  742. }
  743. return sprintf(buf, "%u\n", val);
  744. }
  745. static ssize_t
  746. store_pwm(struct device *dev, struct device_attribute *attr,
  747. const char *buf, size_t count)
  748. {
  749. struct i2c_client *client = to_i2c_client(dev);
  750. struct w83795_data *data = i2c_get_clientdata(client);
  751. struct sensor_device_attribute_2 *sensor_attr =
  752. to_sensor_dev_attr_2(attr);
  753. int nr = sensor_attr->nr;
  754. int index = sensor_attr->index;
  755. unsigned long val;
  756. if (kstrtoul(buf, 10, &val) < 0)
  757. return -EINVAL;
  758. mutex_lock(&data->update_lock);
  759. switch (nr) {
  760. case PWM_STOP_TIME:
  761. val = time_to_reg(val);
  762. break;
  763. case PWM_FREQ:
  764. val = pwm_freq_to_reg(val, data->clkin);
  765. break;
  766. default:
  767. val = SENSORS_LIMIT(val, 0, 0xff);
  768. break;
  769. }
  770. w83795_write(client, W83795_REG_PWM(index, nr), val);
  771. data->pwm[index][nr] = val;
  772. mutex_unlock(&data->update_lock);
  773. return count;
  774. }
  775. static ssize_t
  776. show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
  777. {
  778. struct sensor_device_attribute_2 *sensor_attr =
  779. to_sensor_dev_attr_2(attr);
  780. struct w83795_data *data = w83795_update_pwm_config(dev);
  781. int index = sensor_attr->index;
  782. u8 tmp;
  783. /* Speed cruise mode */
  784. if (data->pwm_fcms[0] & (1 << index)) {
  785. tmp = 2;
  786. goto out;
  787. }
  788. /* Thermal cruise or SmartFan IV mode */
  789. for (tmp = 0; tmp < 6; tmp++) {
  790. if (data->pwm_tfmr[tmp] & (1 << index)) {
  791. tmp = 3;
  792. goto out;
  793. }
  794. }
  795. /* Manual mode */
  796. tmp = 1;
  797. out:
  798. return sprintf(buf, "%u\n", tmp);
  799. }
  800. static ssize_t
  801. store_pwm_enable(struct device *dev, struct device_attribute *attr,
  802. const char *buf, size_t count)
  803. {
  804. struct i2c_client *client = to_i2c_client(dev);
  805. struct w83795_data *data = w83795_update_pwm_config(dev);
  806. struct sensor_device_attribute_2 *sensor_attr =
  807. to_sensor_dev_attr_2(attr);
  808. int index = sensor_attr->index;
  809. unsigned long val;
  810. int i;
  811. if (kstrtoul(buf, 10, &val) < 0)
  812. return -EINVAL;
  813. if (val < 1 || val > 2)
  814. return -EINVAL;
  815. #ifndef CONFIG_SENSORS_W83795_FANCTRL
  816. if (val > 1) {
  817. dev_warn(dev, "Automatic fan speed control support disabled\n");
  818. dev_warn(dev, "Build with CONFIG_SENSORS_W83795_FANCTRL=y if you want it\n");
  819. return -EOPNOTSUPP;
  820. }
  821. #endif
  822. mutex_lock(&data->update_lock);
  823. switch (val) {
  824. case 1:
  825. /* Clear speed cruise mode bits */
  826. data->pwm_fcms[0] &= ~(1 << index);
  827. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  828. /* Clear thermal cruise mode bits */
  829. for (i = 0; i < 6; i++) {
  830. data->pwm_tfmr[i] &= ~(1 << index);
  831. w83795_write(client, W83795_REG_TFMR(i),
  832. data->pwm_tfmr[i]);
  833. }
  834. break;
  835. case 2:
  836. data->pwm_fcms[0] |= (1 << index);
  837. w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
  838. break;
  839. }
  840. mutex_unlock(&data->update_lock);
  841. return count;
  842. }
  843. static ssize_t
  844. show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf)
  845. {
  846. struct w83795_data *data = w83795_update_pwm_config(dev);
  847. int index = to_sensor_dev_attr_2(attr)->index;
  848. unsigned int mode;
  849. if (data->pwm_fomc & (1 << index))
  850. mode = 0; /* DC */
  851. else
  852. mode = 1; /* PWM */
  853. return sprintf(buf, "%u\n", mode);
  854. }
  855. /*
  856. * Check whether a given temperature source can ever be useful.
  857. * Returns the number of selectable temperature channels which are
  858. * enabled.
  859. */
  860. static int w83795_tss_useful(const struct w83795_data *data, int tsrc)
  861. {
  862. int useful = 0, i;
  863. for (i = 0; i < 4; i++) {
  864. if (tss_map[i][tsrc] == TSS_MAP_RESERVED)
  865. continue;
  866. if (tss_map[i][tsrc] < 6) /* Analog */
  867. useful += (data->has_temp >> tss_map[i][tsrc]) & 1;
  868. else /* Digital */
  869. useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1;
  870. }
  871. return useful;
  872. }
  873. static ssize_t
  874. show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
  875. {
  876. struct sensor_device_attribute_2 *sensor_attr =
  877. to_sensor_dev_attr_2(attr);
  878. struct w83795_data *data = w83795_update_pwm_config(dev);
  879. int index = sensor_attr->index;
  880. u8 tmp = data->temp_src[index / 2];
  881. if (index & 1)
  882. tmp >>= 4; /* Pick high nibble */
  883. else
  884. tmp &= 0x0f; /* Pick low nibble */
  885. /* Look-up the actual temperature channel number */
  886. if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED)
  887. return -EINVAL; /* Shouldn't happen */
  888. return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1);
  889. }
  890. static ssize_t
  891. store_temp_src(struct device *dev, struct device_attribute *attr,
  892. const char *buf, size_t count)
  893. {
  894. struct i2c_client *client = to_i2c_client(dev);
  895. struct w83795_data *data = w83795_update_pwm_config(dev);
  896. struct sensor_device_attribute_2 *sensor_attr =
  897. to_sensor_dev_attr_2(attr);
  898. int index = sensor_attr->index;
  899. int tmp;
  900. unsigned long channel;
  901. u8 val = index / 2;
  902. if (kstrtoul(buf, 10, &channel) < 0 ||
  903. channel < 1 || channel > 14)
  904. return -EINVAL;
  905. /* Check if request can be fulfilled */
  906. for (tmp = 0; tmp < 4; tmp++) {
  907. if (tss_map[tmp][index] == channel - 1)
  908. break;
  909. }
  910. if (tmp == 4) /* No match */
  911. return -EINVAL;
  912. mutex_lock(&data->update_lock);
  913. if (index & 1) {
  914. tmp <<= 4;
  915. data->temp_src[val] &= 0x0f;
  916. } else {
  917. data->temp_src[val] &= 0xf0;
  918. }
  919. data->temp_src[val] |= tmp;
  920. w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
  921. mutex_unlock(&data->update_lock);
  922. return count;
  923. }
  924. #define TEMP_PWM_ENABLE 0
  925. #define TEMP_PWM_FAN_MAP 1
  926. static ssize_t
  927. show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  928. char *buf)
  929. {
  930. struct w83795_data *data = w83795_update_pwm_config(dev);
  931. struct sensor_device_attribute_2 *sensor_attr =
  932. to_sensor_dev_attr_2(attr);
  933. int nr = sensor_attr->nr;
  934. int index = sensor_attr->index;
  935. u8 tmp = 0xff;
  936. switch (nr) {
  937. case TEMP_PWM_ENABLE:
  938. tmp = (data->pwm_fcms[1] >> index) & 1;
  939. if (tmp)
  940. tmp = 4;
  941. else
  942. tmp = 3;
  943. break;
  944. case TEMP_PWM_FAN_MAP:
  945. tmp = data->pwm_tfmr[index];
  946. break;
  947. }
  948. return sprintf(buf, "%u\n", tmp);
  949. }
  950. static ssize_t
  951. store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
  952. const char *buf, size_t count)
  953. {
  954. struct i2c_client *client = to_i2c_client(dev);
  955. struct w83795_data *data = w83795_update_pwm_config(dev);
  956. struct sensor_device_attribute_2 *sensor_attr =
  957. to_sensor_dev_attr_2(attr);
  958. int nr = sensor_attr->nr;
  959. int index = sensor_attr->index;
  960. unsigned long tmp;
  961. if (kstrtoul(buf, 10, &tmp) < 0)
  962. return -EINVAL;
  963. switch (nr) {
  964. case TEMP_PWM_ENABLE:
  965. if (tmp != 3 && tmp != 4)
  966. return -EINVAL;
  967. tmp -= 3;
  968. mutex_lock(&data->update_lock);
  969. data->pwm_fcms[1] &= ~(1 << index);
  970. data->pwm_fcms[1] |= tmp << index;
  971. w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
  972. mutex_unlock(&data->update_lock);
  973. break;
  974. case TEMP_PWM_FAN_MAP:
  975. mutex_lock(&data->update_lock);
  976. tmp = SENSORS_LIMIT(tmp, 0, 0xff);
  977. w83795_write(client, W83795_REG_TFMR(index), tmp);
  978. data->pwm_tfmr[index] = tmp;
  979. mutex_unlock(&data->update_lock);
  980. break;
  981. }
  982. return count;
  983. }
  984. #define FANIN_TARGET 0
  985. #define FANIN_TOL 1
  986. static ssize_t
  987. show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
  988. {
  989. struct w83795_data *data = w83795_update_pwm_config(dev);
  990. struct sensor_device_attribute_2 *sensor_attr =
  991. to_sensor_dev_attr_2(attr);
  992. int nr = sensor_attr->nr;
  993. int index = sensor_attr->index;
  994. u16 tmp = 0;
  995. switch (nr) {
  996. case FANIN_TARGET:
  997. tmp = fan_from_reg(data->target_speed[index]);
  998. break;
  999. case FANIN_TOL:
  1000. tmp = data->tol_speed;
  1001. break;
  1002. }
  1003. return sprintf(buf, "%u\n", tmp);
  1004. }
  1005. static ssize_t
  1006. store_fanin(struct device *dev, struct device_attribute *attr,
  1007. const char *buf, size_t count)
  1008. {
  1009. struct i2c_client *client = to_i2c_client(dev);
  1010. struct w83795_data *data = i2c_get_clientdata(client);
  1011. struct sensor_device_attribute_2 *sensor_attr =
  1012. to_sensor_dev_attr_2(attr);
  1013. int nr = sensor_attr->nr;
  1014. int index = sensor_attr->index;
  1015. unsigned long val;
  1016. if (kstrtoul(buf, 10, &val) < 0)
  1017. return -EINVAL;
  1018. mutex_lock(&data->update_lock);
  1019. switch (nr) {
  1020. case FANIN_TARGET:
  1021. val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
  1022. w83795_write(client, W83795_REG_FTSH(index), val >> 4);
  1023. w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
  1024. data->target_speed[index] = val;
  1025. break;
  1026. case FANIN_TOL:
  1027. val = SENSORS_LIMIT(val, 0, 0x3f);
  1028. w83795_write(client, W83795_REG_TFTS, val);
  1029. data->tol_speed = val;
  1030. break;
  1031. }
  1032. mutex_unlock(&data->update_lock);
  1033. return count;
  1034. }
  1035. static ssize_t
  1036. show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  1037. {
  1038. struct w83795_data *data = w83795_update_pwm_config(dev);
  1039. struct sensor_device_attribute_2 *sensor_attr =
  1040. to_sensor_dev_attr_2(attr);
  1041. int nr = sensor_attr->nr;
  1042. int index = sensor_attr->index;
  1043. long tmp = temp_from_reg(data->pwm_temp[index][nr]);
  1044. return sprintf(buf, "%ld\n", tmp);
  1045. }
  1046. static ssize_t
  1047. store_temp_pwm(struct device *dev, struct device_attribute *attr,
  1048. const char *buf, size_t count)
  1049. {
  1050. struct i2c_client *client = to_i2c_client(dev);
  1051. struct w83795_data *data = i2c_get_clientdata(client);
  1052. struct sensor_device_attribute_2 *sensor_attr =
  1053. to_sensor_dev_attr_2(attr);
  1054. int nr = sensor_attr->nr;
  1055. int index = sensor_attr->index;
  1056. unsigned long val;
  1057. u8 tmp;
  1058. if (kstrtoul(buf, 10, &val) < 0)
  1059. return -EINVAL;
  1060. val /= 1000;
  1061. mutex_lock(&data->update_lock);
  1062. switch (nr) {
  1063. case TEMP_PWM_TTTI:
  1064. val = SENSORS_LIMIT(val, 0, 0x7f);
  1065. w83795_write(client, W83795_REG_TTTI(index), val);
  1066. break;
  1067. case TEMP_PWM_CTFS:
  1068. val = SENSORS_LIMIT(val, 0, 0x7f);
  1069. w83795_write(client, W83795_REG_CTFS(index), val);
  1070. break;
  1071. case TEMP_PWM_HCT:
  1072. val = SENSORS_LIMIT(val, 0, 0x0f);
  1073. tmp = w83795_read(client, W83795_REG_HT(index));
  1074. tmp &= 0x0f;
  1075. tmp |= (val << 4) & 0xf0;
  1076. w83795_write(client, W83795_REG_HT(index), tmp);
  1077. break;
  1078. case TEMP_PWM_HOT:
  1079. val = SENSORS_LIMIT(val, 0, 0x0f);
  1080. tmp = w83795_read(client, W83795_REG_HT(index));
  1081. tmp &= 0xf0;
  1082. tmp |= val & 0x0f;
  1083. w83795_write(client, W83795_REG_HT(index), tmp);
  1084. break;
  1085. }
  1086. data->pwm_temp[index][nr] = val;
  1087. mutex_unlock(&data->update_lock);
  1088. return count;
  1089. }
  1090. static ssize_t
  1091. show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
  1092. {
  1093. struct w83795_data *data = w83795_update_pwm_config(dev);
  1094. struct sensor_device_attribute_2 *sensor_attr =
  1095. to_sensor_dev_attr_2(attr);
  1096. int nr = sensor_attr->nr;
  1097. int index = sensor_attr->index;
  1098. return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
  1099. }
  1100. static ssize_t
  1101. store_sf4_pwm(struct device *dev, struct device_attribute *attr,
  1102. const char *buf, size_t count)
  1103. {
  1104. struct i2c_client *client = to_i2c_client(dev);
  1105. struct w83795_data *data = i2c_get_clientdata(client);
  1106. struct sensor_device_attribute_2 *sensor_attr =
  1107. to_sensor_dev_attr_2(attr);
  1108. int nr = sensor_attr->nr;
  1109. int index = sensor_attr->index;
  1110. unsigned long val;
  1111. if (kstrtoul(buf, 10, &val) < 0)
  1112. return -EINVAL;
  1113. mutex_lock(&data->update_lock);
  1114. w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
  1115. data->sf4_reg[index][SF4_PWM][nr] = val;
  1116. mutex_unlock(&data->update_lock);
  1117. return count;
  1118. }
  1119. static ssize_t
  1120. show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
  1121. {
  1122. struct w83795_data *data = w83795_update_pwm_config(dev);
  1123. struct sensor_device_attribute_2 *sensor_attr =
  1124. to_sensor_dev_attr_2(attr);
  1125. int nr = sensor_attr->nr;
  1126. int index = sensor_attr->index;
  1127. return sprintf(buf, "%u\n",
  1128. (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
  1129. }
  1130. static ssize_t
  1131. store_sf4_temp(struct device *dev, struct device_attribute *attr,
  1132. const char *buf, size_t count)
  1133. {
  1134. struct i2c_client *client = to_i2c_client(dev);
  1135. struct w83795_data *data = i2c_get_clientdata(client);
  1136. struct sensor_device_attribute_2 *sensor_attr =
  1137. to_sensor_dev_attr_2(attr);
  1138. int nr = sensor_attr->nr;
  1139. int index = sensor_attr->index;
  1140. unsigned long val;
  1141. if (kstrtoul(buf, 10, &val) < 0)
  1142. return -EINVAL;
  1143. val /= 1000;
  1144. mutex_lock(&data->update_lock);
  1145. w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
  1146. data->sf4_reg[index][SF4_TEMP][nr] = val;
  1147. mutex_unlock(&data->update_lock);
  1148. return count;
  1149. }
  1150. static ssize_t
  1151. show_temp(struct device *dev, struct device_attribute *attr, char *buf)
  1152. {
  1153. struct sensor_device_attribute_2 *sensor_attr =
  1154. to_sensor_dev_attr_2(attr);
  1155. int nr = sensor_attr->nr;
  1156. int index = sensor_attr->index;
  1157. struct w83795_data *data = w83795_update_device(dev);
  1158. long temp = temp_from_reg(data->temp[index][nr]);
  1159. if (nr == TEMP_READ)
  1160. temp += (data->temp_read_vrlsb[index] >> 6) * 250;
  1161. return sprintf(buf, "%ld\n", temp);
  1162. }
  1163. static ssize_t
  1164. store_temp(struct device *dev, struct device_attribute *attr,
  1165. const char *buf, size_t count)
  1166. {
  1167. struct sensor_device_attribute_2 *sensor_attr =
  1168. to_sensor_dev_attr_2(attr);
  1169. int nr = sensor_attr->nr;
  1170. int index = sensor_attr->index;
  1171. struct i2c_client *client = to_i2c_client(dev);
  1172. struct w83795_data *data = i2c_get_clientdata(client);
  1173. long tmp;
  1174. if (kstrtol(buf, 10, &tmp) < 0)
  1175. return -EINVAL;
  1176. mutex_lock(&data->update_lock);
  1177. data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
  1178. w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
  1179. mutex_unlock(&data->update_lock);
  1180. return count;
  1181. }
  1182. static ssize_t
  1183. show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1184. {
  1185. struct w83795_data *data = dev_get_drvdata(dev);
  1186. int tmp;
  1187. if (data->enable_dts & 2)
  1188. tmp = 5;
  1189. else
  1190. tmp = 6;
  1191. return sprintf(buf, "%d\n", tmp);
  1192. }
  1193. static ssize_t
  1194. show_dts(struct device *dev, struct device_attribute *attr, char *buf)
  1195. {
  1196. struct sensor_device_attribute_2 *sensor_attr =
  1197. to_sensor_dev_attr_2(attr);
  1198. int index = sensor_attr->index;
  1199. struct w83795_data *data = w83795_update_device(dev);
  1200. long temp = temp_from_reg(data->dts[index]);
  1201. temp += (data->dts_read_vrlsb[index] >> 6) * 250;
  1202. return sprintf(buf, "%ld\n", temp);
  1203. }
  1204. static ssize_t
  1205. show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
  1206. {
  1207. struct sensor_device_attribute_2 *sensor_attr =
  1208. to_sensor_dev_attr_2(attr);
  1209. int nr = sensor_attr->nr;
  1210. struct w83795_data *data = dev_get_drvdata(dev);
  1211. long temp = temp_from_reg(data->dts_ext[nr]);
  1212. return sprintf(buf, "%ld\n", temp);
  1213. }
  1214. static ssize_t
  1215. store_dts_ext(struct device *dev, struct device_attribute *attr,
  1216. const char *buf, size_t count)
  1217. {
  1218. struct sensor_device_attribute_2 *sensor_attr =
  1219. to_sensor_dev_attr_2(attr);
  1220. int nr = sensor_attr->nr;
  1221. struct i2c_client *client = to_i2c_client(dev);
  1222. struct w83795_data *data = i2c_get_clientdata(client);
  1223. long tmp;
  1224. if (kstrtol(buf, 10, &tmp) < 0)
  1225. return -EINVAL;
  1226. mutex_lock(&data->update_lock);
  1227. data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
  1228. w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
  1229. mutex_unlock(&data->update_lock);
  1230. return count;
  1231. }
  1232. static ssize_t
  1233. show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
  1234. {
  1235. struct w83795_data *data = dev_get_drvdata(dev);
  1236. struct sensor_device_attribute_2 *sensor_attr =
  1237. to_sensor_dev_attr_2(attr);
  1238. int index = sensor_attr->index;
  1239. int tmp;
  1240. if (data->temp_mode & (1 << index))
  1241. tmp = 3; /* Thermal diode */
  1242. else
  1243. tmp = 4; /* Thermistor */
  1244. return sprintf(buf, "%d\n", tmp);
  1245. }
  1246. /* Only for temp1-4 (temp5-6 can only be thermistor) */
  1247. static ssize_t
  1248. store_temp_mode(struct device *dev, struct device_attribute *attr,
  1249. const char *buf, size_t count)
  1250. {
  1251. struct i2c_client *client = to_i2c_client(dev);
  1252. struct w83795_data *data = i2c_get_clientdata(client);
  1253. struct sensor_device_attribute_2 *sensor_attr =
  1254. to_sensor_dev_attr_2(attr);
  1255. int index = sensor_attr->index;
  1256. int reg_shift;
  1257. unsigned long val;
  1258. u8 tmp;
  1259. if (kstrtoul(buf, 10, &val) < 0)
  1260. return -EINVAL;
  1261. if ((val != 4) && (val != 3))
  1262. return -EINVAL;
  1263. mutex_lock(&data->update_lock);
  1264. if (val == 3) {
  1265. /* Thermal diode */
  1266. val = 0x01;
  1267. data->temp_mode |= 1 << index;
  1268. } else if (val == 4) {
  1269. /* Thermistor */
  1270. val = 0x03;
  1271. data->temp_mode &= ~(1 << index);
  1272. }
  1273. reg_shift = 2 * index;
  1274. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1275. tmp &= ~(0x03 << reg_shift);
  1276. tmp |= val << reg_shift;
  1277. w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
  1278. mutex_unlock(&data->update_lock);
  1279. return count;
  1280. }
  1281. /* show/store VIN */
  1282. static ssize_t
  1283. show_in(struct device *dev, struct device_attribute *attr, char *buf)
  1284. {
  1285. struct sensor_device_attribute_2 *sensor_attr =
  1286. to_sensor_dev_attr_2(attr);
  1287. int nr = sensor_attr->nr;
  1288. int index = sensor_attr->index;
  1289. struct w83795_data *data = w83795_update_device(dev);
  1290. u16 val = data->in[index][nr];
  1291. u8 lsb_idx;
  1292. switch (nr) {
  1293. case IN_READ:
  1294. /* calculate this value again by sensors as sensors3.conf */
  1295. if ((index >= 17) &&
  1296. !((data->has_gain >> (index - 17)) & 1))
  1297. val *= 8;
  1298. break;
  1299. case IN_MAX:
  1300. case IN_LOW:
  1301. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1302. val <<= 2;
  1303. val |= (data->in_lsb[lsb_idx][nr] >>
  1304. IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03;
  1305. if ((index >= 17) &&
  1306. !((data->has_gain >> (index - 17)) & 1))
  1307. val *= 8;
  1308. break;
  1309. }
  1310. val = in_from_reg(index, val);
  1311. return sprintf(buf, "%d\n", val);
  1312. }
  1313. static ssize_t
  1314. store_in(struct device *dev, struct device_attribute *attr,
  1315. const char *buf, size_t count)
  1316. {
  1317. struct sensor_device_attribute_2 *sensor_attr =
  1318. to_sensor_dev_attr_2(attr);
  1319. int nr = sensor_attr->nr;
  1320. int index = sensor_attr->index;
  1321. struct i2c_client *client = to_i2c_client(dev);
  1322. struct w83795_data *data = i2c_get_clientdata(client);
  1323. unsigned long val;
  1324. u8 tmp;
  1325. u8 lsb_idx;
  1326. if (kstrtoul(buf, 10, &val) < 0)
  1327. return -EINVAL;
  1328. val = in_to_reg(index, val);
  1329. if ((index >= 17) &&
  1330. !((data->has_gain >> (index - 17)) & 1))
  1331. val /= 8;
  1332. val = SENSORS_LIMIT(val, 0, 0x3FF);
  1333. mutex_lock(&data->update_lock);
  1334. lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
  1335. tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
  1336. tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
  1337. tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
  1338. w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
  1339. data->in_lsb[lsb_idx][nr] = tmp;
  1340. tmp = (val >> 2) & 0xff;
  1341. w83795_write(client, W83795_REG_IN[index][nr], tmp);
  1342. data->in[index][nr] = tmp;
  1343. mutex_unlock(&data->update_lock);
  1344. return count;
  1345. }
  1346. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1347. static ssize_t
  1348. show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
  1349. {
  1350. struct sensor_device_attribute_2 *sensor_attr =
  1351. to_sensor_dev_attr_2(attr);
  1352. int nr = sensor_attr->nr;
  1353. struct w83795_data *data = w83795_update_pwm_config(dev);
  1354. u16 val = data->setup_pwm[nr];
  1355. switch (nr) {
  1356. case SETUP_PWM_UPTIME:
  1357. case SETUP_PWM_DOWNTIME:
  1358. val = time_from_reg(val);
  1359. break;
  1360. }
  1361. return sprintf(buf, "%d\n", val);
  1362. }
  1363. static ssize_t
  1364. store_sf_setup(struct device *dev, struct device_attribute *attr,
  1365. const char *buf, size_t count)
  1366. {
  1367. struct sensor_device_attribute_2 *sensor_attr =
  1368. to_sensor_dev_attr_2(attr);
  1369. int nr = sensor_attr->nr;
  1370. struct i2c_client *client = to_i2c_client(dev);
  1371. struct w83795_data *data = i2c_get_clientdata(client);
  1372. unsigned long val;
  1373. if (kstrtoul(buf, 10, &val) < 0)
  1374. return -EINVAL;
  1375. switch (nr) {
  1376. case SETUP_PWM_DEFAULT:
  1377. val = SENSORS_LIMIT(val, 0, 0xff);
  1378. break;
  1379. case SETUP_PWM_UPTIME:
  1380. case SETUP_PWM_DOWNTIME:
  1381. val = time_to_reg(val);
  1382. if (val == 0)
  1383. return -EINVAL;
  1384. break;
  1385. }
  1386. mutex_lock(&data->update_lock);
  1387. data->setup_pwm[nr] = val;
  1388. w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
  1389. mutex_unlock(&data->update_lock);
  1390. return count;
  1391. }
  1392. #endif
  1393. #define NOT_USED -1
  1394. /*
  1395. * Don't change the attribute order, _max, _min and _beep are accessed by index
  1396. * somewhere else in the code
  1397. */
  1398. #define SENSOR_ATTR_IN(index) { \
  1399. SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
  1400. IN_READ, index), \
  1401. SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
  1402. store_in, IN_MAX, index), \
  1403. SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
  1404. store_in, IN_LOW, index), \
  1405. SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
  1406. NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
  1407. SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
  1408. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1409. index + ((index > 14) ? 1 : 0)) }
  1410. /*
  1411. * Don't change the attribute order, _beep is accessed by index
  1412. * somewhere else in the code
  1413. */
  1414. #define SENSOR_ATTR_FAN(index) { \
  1415. SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
  1416. NULL, FAN_INPUT, index - 1), \
  1417. SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
  1418. show_fan, store_fan_min, FAN_MIN, index - 1), \
  1419. SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
  1420. NULL, ALARM_STATUS, index + 31), \
  1421. SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
  1422. show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
  1423. #define SENSOR_ATTR_PWM(index) { \
  1424. SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
  1425. store_pwm, PWM_OUTPUT, index - 1), \
  1426. SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
  1427. show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
  1428. SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \
  1429. show_pwm_mode, NULL, NOT_USED, index - 1), \
  1430. SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
  1431. show_pwm, store_pwm, PWM_FREQ, index - 1), \
  1432. SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
  1433. show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
  1434. SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
  1435. show_pwm, store_pwm, PWM_START, index - 1), \
  1436. SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
  1437. show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
  1438. SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
  1439. show_fanin, store_fanin, FANIN_TARGET, index - 1) }
  1440. /*
  1441. * Don't change the attribute order, _beep is accessed by index
  1442. * somewhere else in the code
  1443. */
  1444. #define SENSOR_ATTR_DTS(index) { \
  1445. SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
  1446. show_dts_mode, NULL, NOT_USED, index - 7), \
  1447. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
  1448. NULL, NOT_USED, index - 7), \
  1449. SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
  1450. store_dts_ext, DTS_CRIT, NOT_USED), \
  1451. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
  1452. show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
  1453. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
  1454. store_dts_ext, DTS_WARN, NOT_USED), \
  1455. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1456. show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
  1457. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1458. show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
  1459. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1460. show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
  1461. /*
  1462. * Don't change the attribute order, _beep is accessed by index
  1463. * somewhere else in the code
  1464. */
  1465. #define SENSOR_ATTR_TEMP(index) { \
  1466. SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
  1467. show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
  1468. SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
  1469. NULL, TEMP_READ, index - 1), \
  1470. SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
  1471. store_temp, TEMP_CRIT, index - 1), \
  1472. SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
  1473. show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
  1474. SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
  1475. store_temp, TEMP_WARN, index - 1), \
  1476. SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
  1477. show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
  1478. SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
  1479. show_alarm_beep, NULL, ALARM_STATUS, \
  1480. index + (index > 4 ? 11 : 17)), \
  1481. SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
  1482. show_alarm_beep, store_beep, BEEP_ENABLE, \
  1483. index + (index > 4 ? 11 : 17)), \
  1484. SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
  1485. show_temp_pwm_enable, store_temp_pwm_enable, \
  1486. TEMP_PWM_ENABLE, index - 1), \
  1487. SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
  1488. show_temp_pwm_enable, store_temp_pwm_enable, \
  1489. TEMP_PWM_FAN_MAP, index - 1), \
  1490. SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
  1491. show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
  1492. SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
  1493. show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
  1494. SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
  1495. show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
  1496. SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
  1497. show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
  1498. SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
  1499. show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
  1500. SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
  1501. show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
  1502. SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
  1503. show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
  1504. SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
  1505. show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
  1506. SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
  1507. show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
  1508. SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
  1509. show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
  1510. SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
  1511. show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
  1512. SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
  1513. show_sf4_temp, store_sf4_temp, 0, index - 1), \
  1514. SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
  1515. show_sf4_temp, store_sf4_temp, 1, index - 1), \
  1516. SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
  1517. show_sf4_temp, store_sf4_temp, 2, index - 1), \
  1518. SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
  1519. show_sf4_temp, store_sf4_temp, 3, index - 1), \
  1520. SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
  1521. show_sf4_temp, store_sf4_temp, 4, index - 1), \
  1522. SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
  1523. show_sf4_temp, store_sf4_temp, 5, index - 1), \
  1524. SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
  1525. show_sf4_temp, store_sf4_temp, 6, index - 1) }
  1526. static struct sensor_device_attribute_2 w83795_in[][5] = {
  1527. SENSOR_ATTR_IN(0),
  1528. SENSOR_ATTR_IN(1),
  1529. SENSOR_ATTR_IN(2),
  1530. SENSOR_ATTR_IN(3),
  1531. SENSOR_ATTR_IN(4),
  1532. SENSOR_ATTR_IN(5),
  1533. SENSOR_ATTR_IN(6),
  1534. SENSOR_ATTR_IN(7),
  1535. SENSOR_ATTR_IN(8),
  1536. SENSOR_ATTR_IN(9),
  1537. SENSOR_ATTR_IN(10),
  1538. SENSOR_ATTR_IN(11),
  1539. SENSOR_ATTR_IN(12),
  1540. SENSOR_ATTR_IN(13),
  1541. SENSOR_ATTR_IN(14),
  1542. SENSOR_ATTR_IN(15),
  1543. SENSOR_ATTR_IN(16),
  1544. SENSOR_ATTR_IN(17),
  1545. SENSOR_ATTR_IN(18),
  1546. SENSOR_ATTR_IN(19),
  1547. SENSOR_ATTR_IN(20),
  1548. };
  1549. static const struct sensor_device_attribute_2 w83795_fan[][4] = {
  1550. SENSOR_ATTR_FAN(1),
  1551. SENSOR_ATTR_FAN(2),
  1552. SENSOR_ATTR_FAN(3),
  1553. SENSOR_ATTR_FAN(4),
  1554. SENSOR_ATTR_FAN(5),
  1555. SENSOR_ATTR_FAN(6),
  1556. SENSOR_ATTR_FAN(7),
  1557. SENSOR_ATTR_FAN(8),
  1558. SENSOR_ATTR_FAN(9),
  1559. SENSOR_ATTR_FAN(10),
  1560. SENSOR_ATTR_FAN(11),
  1561. SENSOR_ATTR_FAN(12),
  1562. SENSOR_ATTR_FAN(13),
  1563. SENSOR_ATTR_FAN(14),
  1564. };
  1565. static const struct sensor_device_attribute_2 w83795_temp[][28] = {
  1566. SENSOR_ATTR_TEMP(1),
  1567. SENSOR_ATTR_TEMP(2),
  1568. SENSOR_ATTR_TEMP(3),
  1569. SENSOR_ATTR_TEMP(4),
  1570. SENSOR_ATTR_TEMP(5),
  1571. SENSOR_ATTR_TEMP(6),
  1572. };
  1573. static const struct sensor_device_attribute_2 w83795_dts[][8] = {
  1574. SENSOR_ATTR_DTS(7),
  1575. SENSOR_ATTR_DTS(8),
  1576. SENSOR_ATTR_DTS(9),
  1577. SENSOR_ATTR_DTS(10),
  1578. SENSOR_ATTR_DTS(11),
  1579. SENSOR_ATTR_DTS(12),
  1580. SENSOR_ATTR_DTS(13),
  1581. SENSOR_ATTR_DTS(14),
  1582. };
  1583. static const struct sensor_device_attribute_2 w83795_pwm[][8] = {
  1584. SENSOR_ATTR_PWM(1),
  1585. SENSOR_ATTR_PWM(2),
  1586. SENSOR_ATTR_PWM(3),
  1587. SENSOR_ATTR_PWM(4),
  1588. SENSOR_ATTR_PWM(5),
  1589. SENSOR_ATTR_PWM(6),
  1590. SENSOR_ATTR_PWM(7),
  1591. SENSOR_ATTR_PWM(8),
  1592. };
  1593. static const struct sensor_device_attribute_2 w83795_tss[6] = {
  1594. SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO,
  1595. show_temp_src, store_temp_src, NOT_USED, 0),
  1596. SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO,
  1597. show_temp_src, store_temp_src, NOT_USED, 1),
  1598. SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO,
  1599. show_temp_src, store_temp_src, NOT_USED, 2),
  1600. SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO,
  1601. show_temp_src, store_temp_src, NOT_USED, 3),
  1602. SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO,
  1603. show_temp_src, store_temp_src, NOT_USED, 4),
  1604. SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO,
  1605. show_temp_src, store_temp_src, NOT_USED, 5),
  1606. };
  1607. static const struct sensor_device_attribute_2 sda_single_files[] = {
  1608. SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
  1609. store_chassis_clear, ALARM_STATUS, 46),
  1610. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1611. SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
  1612. store_fanin, FANIN_TOL, NOT_USED),
  1613. SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
  1614. store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
  1615. SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
  1616. store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
  1617. SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
  1618. store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
  1619. #endif
  1620. };
  1621. static const struct sensor_device_attribute_2 sda_beep_files[] = {
  1622. SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep,
  1623. store_beep, BEEP_ENABLE, 46),
  1624. SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
  1625. store_beep, BEEP_ENABLE, 47),
  1626. };
  1627. /*
  1628. * Driver interface
  1629. */
  1630. static void w83795_init_client(struct i2c_client *client)
  1631. {
  1632. struct w83795_data *data = i2c_get_clientdata(client);
  1633. static const u16 clkin[4] = { /* in kHz */
  1634. 14318, 24000, 33333, 48000
  1635. };
  1636. u8 config;
  1637. if (reset)
  1638. w83795_write(client, W83795_REG_CONFIG, 0x80);
  1639. /* Start monitoring if needed */
  1640. config = w83795_read(client, W83795_REG_CONFIG);
  1641. if (!(config & W83795_REG_CONFIG_START)) {
  1642. dev_info(&client->dev, "Enabling monitoring operations\n");
  1643. w83795_write(client, W83795_REG_CONFIG,
  1644. config | W83795_REG_CONFIG_START);
  1645. }
  1646. data->clkin = clkin[(config >> 3) & 0x3];
  1647. dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
  1648. }
  1649. static int w83795_get_device_id(struct i2c_client *client)
  1650. {
  1651. int device_id;
  1652. device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
  1653. /*
  1654. * Special case for rev. A chips; can't be checked first because later
  1655. * revisions emulate this for compatibility
  1656. */
  1657. if (device_id < 0 || (device_id & 0xf0) != 0x50) {
  1658. int alt_id;
  1659. alt_id = i2c_smbus_read_byte_data(client,
  1660. W83795_REG_DEVICEID_A);
  1661. if (alt_id == 0x50)
  1662. device_id = alt_id;
  1663. }
  1664. return device_id;
  1665. }
  1666. /* Return 0 if detection is successful, -ENODEV otherwise */
  1667. static int w83795_detect(struct i2c_client *client,
  1668. struct i2c_board_info *info)
  1669. {
  1670. int bank, vendor_id, device_id, expected, i2c_addr, config;
  1671. struct i2c_adapter *adapter = client->adapter;
  1672. unsigned short address = client->addr;
  1673. const char *chip_name;
  1674. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  1675. return -ENODEV;
  1676. bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1677. if (bank < 0 || (bank & 0x7c)) {
  1678. dev_dbg(&adapter->dev,
  1679. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1680. address, "bank");
  1681. return -ENODEV;
  1682. }
  1683. /* Check Nuvoton vendor ID */
  1684. vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
  1685. expected = bank & 0x80 ? 0x5c : 0xa3;
  1686. if (vendor_id != expected) {
  1687. dev_dbg(&adapter->dev,
  1688. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1689. address, "vendor id");
  1690. return -ENODEV;
  1691. }
  1692. /* Check device ID */
  1693. device_id = w83795_get_device_id(client) |
  1694. (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
  1695. if ((device_id >> 4) != 0x795) {
  1696. dev_dbg(&adapter->dev,
  1697. "w83795: Detection failed at addr 0x%02hx, check %s\n",
  1698. address, "device id\n");
  1699. return -ENODEV;
  1700. }
  1701. /*
  1702. * If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
  1703. * should match
  1704. */
  1705. if ((bank & 0x07) == 0) {
  1706. i2c_addr = i2c_smbus_read_byte_data(client,
  1707. W83795_REG_I2C_ADDR);
  1708. if ((i2c_addr & 0x7f) != address) {
  1709. dev_dbg(&adapter->dev,
  1710. "w83795: Detection failed at addr 0x%02hx, "
  1711. "check %s\n", address, "i2c addr");
  1712. return -ENODEV;
  1713. }
  1714. }
  1715. /*
  1716. * Check 795 chip type: 795G or 795ADG
  1717. * Usually we don't write to chips during detection, but here we don't
  1718. * quite have the choice; hopefully it's OK, we are about to return
  1719. * success anyway
  1720. */
  1721. if ((bank & 0x07) != 0)
  1722. i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
  1723. bank & ~0x07);
  1724. config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
  1725. if (config & W83795_REG_CONFIG_CONFIG48)
  1726. chip_name = "w83795adg";
  1727. else
  1728. chip_name = "w83795g";
  1729. strlcpy(info->type, chip_name, I2C_NAME_SIZE);
  1730. dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
  1731. 'A' + (device_id & 0xf), address);
  1732. return 0;
  1733. }
  1734. #ifdef CONFIG_SENSORS_W83795_FANCTRL
  1735. #define NUM_PWM_ATTRIBUTES ARRAY_SIZE(w83795_pwm[0])
  1736. #define NUM_TEMP_ATTRIBUTES ARRAY_SIZE(w83795_temp[0])
  1737. #else
  1738. #define NUM_PWM_ATTRIBUTES 4
  1739. #define NUM_TEMP_ATTRIBUTES 8
  1740. #endif
  1741. static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
  1742. const struct device_attribute *))
  1743. {
  1744. struct w83795_data *data = dev_get_drvdata(dev);
  1745. int err, i, j;
  1746. for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
  1747. if (!(data->has_in & (1 << i)))
  1748. continue;
  1749. for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
  1750. if (j == 4 && !data->enable_beep)
  1751. continue;
  1752. err = fn(dev, &w83795_in[i][j].dev_attr);
  1753. if (err)
  1754. return err;
  1755. }
  1756. }
  1757. for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
  1758. if (!(data->has_fan & (1 << i)))
  1759. continue;
  1760. for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
  1761. if (j == 3 && !data->enable_beep)
  1762. continue;
  1763. err = fn(dev, &w83795_fan[i][j].dev_attr);
  1764. if (err)
  1765. return err;
  1766. }
  1767. }
  1768. for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) {
  1769. j = w83795_tss_useful(data, i);
  1770. if (!j)
  1771. continue;
  1772. err = fn(dev, &w83795_tss[i].dev_attr);
  1773. if (err)
  1774. return err;
  1775. }
  1776. for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
  1777. err = fn(dev, &sda_single_files[i].dev_attr);
  1778. if (err)
  1779. return err;
  1780. }
  1781. if (data->enable_beep) {
  1782. for (i = 0; i < ARRAY_SIZE(sda_beep_files); i++) {
  1783. err = fn(dev, &sda_beep_files[i].dev_attr);
  1784. if (err)
  1785. return err;
  1786. }
  1787. }
  1788. for (i = 0; i < data->has_pwm; i++) {
  1789. for (j = 0; j < NUM_PWM_ATTRIBUTES; j++) {
  1790. err = fn(dev, &w83795_pwm[i][j].dev_attr);
  1791. if (err)
  1792. return err;
  1793. }
  1794. }
  1795. for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
  1796. if (!(data->has_temp & (1 << i)))
  1797. continue;
  1798. for (j = 0; j < NUM_TEMP_ATTRIBUTES; j++) {
  1799. if (j == 7 && !data->enable_beep)
  1800. continue;
  1801. err = fn(dev, &w83795_temp[i][j].dev_attr);
  1802. if (err)
  1803. return err;
  1804. }
  1805. }
  1806. if (data->enable_dts) {
  1807. for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
  1808. if (!(data->has_dts & (1 << i)))
  1809. continue;
  1810. for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
  1811. if (j == 7 && !data->enable_beep)
  1812. continue;
  1813. err = fn(dev, &w83795_dts[i][j].dev_attr);
  1814. if (err)
  1815. return err;
  1816. }
  1817. }
  1818. }
  1819. return 0;
  1820. }
  1821. /* We need a wrapper that fits in w83795_handle_files */
  1822. static int device_remove_file_wrapper(struct device *dev,
  1823. const struct device_attribute *attr)
  1824. {
  1825. device_remove_file(dev, attr);
  1826. return 0;
  1827. }
  1828. static void w83795_check_dynamic_in_limits(struct i2c_client *client)
  1829. {
  1830. struct w83795_data *data = i2c_get_clientdata(client);
  1831. u8 vid_ctl;
  1832. int i, err_max, err_min;
  1833. vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
  1834. /* Return immediately if VRM isn't configured */
  1835. if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
  1836. return;
  1837. data->has_dyn_in = (vid_ctl >> 3) & 0x07;
  1838. for (i = 0; i < 2; i++) {
  1839. if (!(data->has_dyn_in & (1 << i)))
  1840. continue;
  1841. /* Voltage limits in dynamic mode, switch to read-only */
  1842. err_max = sysfs_chmod_file(&client->dev.kobj,
  1843. &w83795_in[i][2].dev_attr.attr,
  1844. S_IRUGO);
  1845. err_min = sysfs_chmod_file(&client->dev.kobj,
  1846. &w83795_in[i][3].dev_attr.attr,
  1847. S_IRUGO);
  1848. if (err_max || err_min)
  1849. dev_warn(&client->dev, "Failed to set in%d limits "
  1850. "read-only (%d, %d)\n", i, err_max, err_min);
  1851. else
  1852. dev_info(&client->dev, "in%d limits set dynamically "
  1853. "from VID\n", i);
  1854. }
  1855. }
  1856. /* Check pins that can be used for either temperature or voltage monitoring */
  1857. static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
  1858. int temp_chan, int in_chan)
  1859. {
  1860. /* config is a 2-bit value */
  1861. switch (config) {
  1862. case 0x2: /* Voltage monitoring */
  1863. data->has_in |= 1 << in_chan;
  1864. break;
  1865. case 0x1: /* Thermal diode */
  1866. if (temp_chan >= 4)
  1867. break;
  1868. data->temp_mode |= 1 << temp_chan;
  1869. /* fall through */
  1870. case 0x3: /* Thermistor */
  1871. data->has_temp |= 1 << temp_chan;
  1872. break;
  1873. }
  1874. }
  1875. static int w83795_probe(struct i2c_client *client,
  1876. const struct i2c_device_id *id)
  1877. {
  1878. int i;
  1879. u8 tmp;
  1880. struct device *dev = &client->dev;
  1881. struct w83795_data *data;
  1882. int err;
  1883. data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
  1884. if (!data) {
  1885. err = -ENOMEM;
  1886. goto exit;
  1887. }
  1888. i2c_set_clientdata(client, data);
  1889. data->chip_type = id->driver_data;
  1890. data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
  1891. mutex_init(&data->update_lock);
  1892. /* Initialize the chip */
  1893. w83795_init_client(client);
  1894. /* Check which voltages and fans are present */
  1895. data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
  1896. | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
  1897. data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
  1898. | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
  1899. /* Check which analog temperatures and extra voltages are present */
  1900. tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
  1901. if (tmp & 0x20)
  1902. data->enable_dts = 1;
  1903. w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
  1904. w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
  1905. tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
  1906. w83795_apply_temp_config(data, tmp >> 6, 3, 20);
  1907. w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
  1908. w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
  1909. w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
  1910. /* Check DTS enable status */
  1911. if (data->enable_dts) {
  1912. if (1 & w83795_read(client, W83795_REG_DTSC))
  1913. data->enable_dts |= 2;
  1914. data->has_dts = w83795_read(client, W83795_REG_DTSE);
  1915. }
  1916. /* Report PECI Tbase values */
  1917. if (data->enable_dts == 1) {
  1918. for (i = 0; i < 8; i++) {
  1919. if (!(data->has_dts & (1 << i)))
  1920. continue;
  1921. tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
  1922. dev_info(&client->dev,
  1923. "PECI agent %d Tbase temperature: %u\n",
  1924. i + 1, (unsigned int)tmp & 0x7f);
  1925. }
  1926. }
  1927. data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
  1928. /* pwm and smart fan */
  1929. if (data->chip_type == w83795g)
  1930. data->has_pwm = 8;
  1931. else
  1932. data->has_pwm = 2;
  1933. /* Check if BEEP pin is available */
  1934. if (data->chip_type == w83795g) {
  1935. /* The W83795G has a dedicated BEEP pin */
  1936. data->enable_beep = 1;
  1937. } else {
  1938. /*
  1939. * The W83795ADG has a shared pin for OVT# and BEEP, so you
  1940. * can't have both
  1941. */
  1942. tmp = w83795_read(client, W83795_REG_OVT_CFG);
  1943. if ((tmp & OVT_CFG_SEL) == 0)
  1944. data->enable_beep = 1;
  1945. }
  1946. err = w83795_handle_files(dev, device_create_file);
  1947. if (err)
  1948. goto exit_remove;
  1949. if (data->chip_type == w83795g)
  1950. w83795_check_dynamic_in_limits(client);
  1951. data->hwmon_dev = hwmon_device_register(dev);
  1952. if (IS_ERR(data->hwmon_dev)) {
  1953. err = PTR_ERR(data->hwmon_dev);
  1954. goto exit_remove;
  1955. }
  1956. return 0;
  1957. exit_remove:
  1958. w83795_handle_files(dev, device_remove_file_wrapper);
  1959. kfree(data);
  1960. exit:
  1961. return err;
  1962. }
  1963. static int w83795_remove(struct i2c_client *client)
  1964. {
  1965. struct w83795_data *data = i2c_get_clientdata(client);
  1966. hwmon_device_unregister(data->hwmon_dev);
  1967. w83795_handle_files(&client->dev, device_remove_file_wrapper);
  1968. kfree(data);
  1969. return 0;
  1970. }
  1971. static const struct i2c_device_id w83795_id[] = {
  1972. { "w83795g", w83795g },
  1973. { "w83795adg", w83795adg },
  1974. { }
  1975. };
  1976. MODULE_DEVICE_TABLE(i2c, w83795_id);
  1977. static struct i2c_driver w83795_driver = {
  1978. .driver = {
  1979. .name = "w83795",
  1980. },
  1981. .probe = w83795_probe,
  1982. .remove = w83795_remove,
  1983. .id_table = w83795_id,
  1984. .class = I2C_CLASS_HWMON,
  1985. .detect = w83795_detect,
  1986. .address_list = normal_i2c,
  1987. };
  1988. module_i2c_driver(w83795_driver);
  1989. MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>");
  1990. MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
  1991. MODULE_LICENSE("GPL");