adreno_snapshot.c 28 KB

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  1. /* Copyright (c) 2012-2014,2019 The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #include "kgsl.h"
  13. #include "kgsl_sharedmem.h"
  14. #include "kgsl_snapshot.h"
  15. #include "adreno.h"
  16. #include "adreno_pm4types.h"
  17. #include "a2xx_reg.h"
  18. #include "a3xx_reg.h"
  19. /* Number of dwords of ringbuffer history to record */
  20. #define NUM_DWORDS_OF_RINGBUFFER_HISTORY 100
  21. /* Maintain a list of the objects we see during parsing */
  22. #define SNAPSHOT_OBJ_BUFSIZE 64
  23. #define SNAPSHOT_OBJ_TYPE_IB 0
  24. /* Keep track of how many bytes are frozen after a snapshot and tell the user */
  25. static int snapshot_frozen_objsize;
  26. static struct kgsl_snapshot_obj {
  27. int type;
  28. uint32_t gpuaddr;
  29. phys_addr_t ptbase;
  30. void *ptr;
  31. int dwords;
  32. struct kgsl_mem_entry *entry;
  33. } objbuf[SNAPSHOT_OBJ_BUFSIZE];
  34. /* Pointer to the next open entry in the object list */
  35. static int objbufptr;
  36. /* Push a new buffer object onto the list */
  37. static void push_object(struct kgsl_device *device, int type,
  38. phys_addr_t ptbase,
  39. uint32_t gpuaddr, int dwords)
  40. {
  41. int index;
  42. void *ptr;
  43. struct kgsl_mem_entry *entry = NULL;
  44. /*
  45. * Sometimes IBs can be reused in the same dump. Because we parse from
  46. * oldest to newest, if we come across an IB that has already been used,
  47. * assume that it has been reused and update the list with the newest
  48. * size.
  49. */
  50. for (index = 0; index < objbufptr; index++) {
  51. if (objbuf[index].gpuaddr == gpuaddr &&
  52. objbuf[index].ptbase == ptbase) {
  53. /*
  54. * Check if newly requested size is within the
  55. * allocated range or not, otherwise continue
  56. * with previous size.
  57. */
  58. if (!kgsl_gpuaddr_in_memdesc(
  59. &objbuf[index].entry->memdesc,
  60. gpuaddr, dwords << 2)) {
  61. KGSL_CORE_ERR(
  62. "snapshot: IB 0x%016x size is not within the memdesc range\n",
  63. gpuaddr);
  64. return;
  65. }
  66. objbuf[index].dwords = dwords;
  67. return;
  68. }
  69. }
  70. if (objbufptr == SNAPSHOT_OBJ_BUFSIZE) {
  71. KGSL_DRV_ERR(device, "snapshot: too many snapshot objects\n");
  72. return;
  73. }
  74. /*
  75. * adreno_convertaddr verifies that the IB size is valid - at least in
  76. * the context of it being smaller then the allocated memory space
  77. */
  78. ptr = adreno_convertaddr(device, ptbase, gpuaddr, dwords << 2, &entry);
  79. if (ptr == NULL) {
  80. KGSL_DRV_ERR(device,
  81. "snapshot: Can't find GPU address for %x\n", gpuaddr);
  82. return;
  83. }
  84. /* Put it on the list of things to parse */
  85. objbuf[objbufptr].type = type;
  86. objbuf[objbufptr].gpuaddr = gpuaddr;
  87. objbuf[objbufptr].ptbase = ptbase;
  88. objbuf[objbufptr].dwords = dwords;
  89. objbuf[objbufptr].entry = entry;
  90. objbuf[objbufptr++].ptr = ptr;
  91. }
  92. /*
  93. * Return a 1 if the specified object is already on the list of buffers
  94. * to be dumped
  95. */
  96. static int find_object(int type, unsigned int gpuaddr, phys_addr_t ptbase)
  97. {
  98. int index;
  99. for (index = 0; index < objbufptr; index++) {
  100. if (objbuf[index].gpuaddr == gpuaddr &&
  101. objbuf[index].ptbase == ptbase &&
  102. objbuf[index].type == type)
  103. return 1;
  104. }
  105. return 0;
  106. }
  107. /*
  108. * This structure keeps track of type0 writes to VSC_PIPE_DATA_ADDRESS_x and
  109. * VSC_PIPE_DATA_LENGTH_x. When a draw initator is called these registers
  110. * point to buffers that we need to freeze for a snapshot
  111. */
  112. static struct {
  113. unsigned int base;
  114. unsigned int size;
  115. } vsc_pipe[8];
  116. /*
  117. * This is the cached value of type0 writes to the VSC_SIZE_ADDRESS which
  118. * contains the buffer address of the visiblity stream size buffer during a
  119. * binning pass
  120. */
  121. static unsigned int vsc_size_address;
  122. /*
  123. * This struct keeps track of type0 writes to VFD_FETCH_INSTR_0_X and
  124. * VFD_FETCH_INSTR_1_X registers. When a draw initator is called the addresses
  125. * and sizes in these registers point to VBOs that we need to freeze for a
  126. * snapshot
  127. */
  128. static struct {
  129. unsigned int base;
  130. unsigned int stride;
  131. } vbo[16];
  132. /*
  133. * This is the cached value of type0 writes to VFD_INDEX_MAX. This will be used
  134. * to calculate the size of the VBOs when the draw initator is called
  135. */
  136. static unsigned int vfd_index_max;
  137. /*
  138. * This is the cached value of type0 writes to VFD_CONTROL_0 which tells us how
  139. * many VBOs are active when the draw initator is called
  140. */
  141. static unsigned int vfd_control_0;
  142. /*
  143. * Cached value of type0 writes to SP_VS_PVT_MEM_ADDR and SP_FS_PVT_MEM_ADDR.
  144. * This is a buffer that contains private stack information for the shader
  145. */
  146. static unsigned int sp_vs_pvt_mem_addr;
  147. static unsigned int sp_fs_pvt_mem_addr;
  148. /*
  149. * Cached value of SP_VS_OBJ_START_REG and SP_FS_OBJ_START_REG.
  150. */
  151. static unsigned int sp_vs_obj_start_reg;
  152. static unsigned int sp_fs_obj_start_reg;
  153. /*
  154. * Each load state block has two possible types. Each type has a different
  155. * number of dwords per unit. Use this handy lookup table to make sure
  156. * we dump the right amount of data from the indirect buffer
  157. */
  158. static int load_state_unit_sizes[7][2] = {
  159. { 2, 4 },
  160. { 0, 1 },
  161. { 2, 4 },
  162. { 0, 1 },
  163. { 8, 2 },
  164. { 8, 2 },
  165. { 8, 2 },
  166. };
  167. static int ib_parse_load_state(struct kgsl_device *device, unsigned int *pkt,
  168. phys_addr_t ptbase)
  169. {
  170. unsigned int block, source, type;
  171. int ret = 0;
  172. /*
  173. * The object here is to find indirect shaders i.e - shaders loaded from
  174. * GPU memory instead of directly in the command. These should be added
  175. * to the list of memory objects to dump. So look at the load state
  176. * if the block is indirect (source = 4). If so then add the memory
  177. * address to the list. The size of the object differs depending on the
  178. * type per the load_state_unit_sizes array above.
  179. */
  180. if (type3_pkt_size(pkt[0]) < 2)
  181. return 0;
  182. /*
  183. * pkt[1] 18:16 - source
  184. * pkt[1] 21:19 - state block
  185. * pkt[1] 31:22 - size in units
  186. * pkt[2] 0:1 - type
  187. * pkt[2] 31:2 - GPU memory address
  188. */
  189. block = (pkt[1] >> 19) & 0x07;
  190. source = (pkt[1] >> 16) & 0x07;
  191. type = pkt[2] & 0x03;
  192. if (source == 4) {
  193. int unitsize, ret;
  194. if (type == 0)
  195. unitsize = load_state_unit_sizes[block][0];
  196. else
  197. unitsize = load_state_unit_sizes[block][1];
  198. /* Freeze the GPU buffer containing the shader */
  199. ret = kgsl_snapshot_get_object(device, ptbase,
  200. pkt[2] & 0xFFFFFFFC,
  201. (((pkt[1] >> 22) & 0x03FF) * unitsize) << 2,
  202. SNAPSHOT_GPU_OBJECT_SHADER);
  203. if (ret < 0)
  204. return -EINVAL;
  205. snapshot_frozen_objsize += ret;
  206. }
  207. return ret;
  208. }
  209. /*
  210. * This opcode sets the base addresses for the visibilty stream buffer and the
  211. * visiblity stream size buffer.
  212. */
  213. static int ib_parse_set_bin_data(struct kgsl_device *device, unsigned int *pkt,
  214. phys_addr_t ptbase)
  215. {
  216. int ret;
  217. if (type3_pkt_size(pkt[0]) < 2)
  218. return 0;
  219. /* Visiblity stream buffer */
  220. ret = kgsl_snapshot_get_object(device, ptbase, pkt[1], 0,
  221. SNAPSHOT_GPU_OBJECT_GENERIC);
  222. if (ret < 0)
  223. return -EINVAL;
  224. snapshot_frozen_objsize += ret;
  225. /* visiblity stream size buffer (fixed size 8 dwords) */
  226. ret = kgsl_snapshot_get_object(device, ptbase, pkt[2], 32,
  227. SNAPSHOT_GPU_OBJECT_GENERIC);
  228. if (ret >= 0)
  229. snapshot_frozen_objsize += ret;
  230. return ret;
  231. }
  232. /*
  233. * This opcode writes to GPU memory - if the buffer is written to, there is a
  234. * good chance that it would be valuable to capture in the snapshot, so mark all
  235. * buffers that are written to as frozen
  236. */
  237. static int ib_parse_mem_write(struct kgsl_device *device, unsigned int *pkt,
  238. phys_addr_t ptbase)
  239. {
  240. int ret;
  241. if (type3_pkt_size(pkt[0]) < 1)
  242. return 0;
  243. /*
  244. * The address is where the data in the rest of this packet is written
  245. * to, but since that might be an offset into the larger buffer we need
  246. * to get the whole thing. Pass a size of 0 kgsl_snapshot_get_object to
  247. * capture the entire buffer.
  248. */
  249. ret = kgsl_snapshot_get_object(device, ptbase, pkt[1] & 0xFFFFFFFC, 0,
  250. SNAPSHOT_GPU_OBJECT_GENERIC);
  251. if (ret >= 0)
  252. snapshot_frozen_objsize += ret;
  253. return ret;
  254. }
  255. /*
  256. * The DRAW_INDX opcode sends a draw initator which starts a draw operation in
  257. * the GPU, so this is the point where all the registers and buffers become
  258. * "valid". The DRAW_INDX may also have an index buffer pointer that should be
  259. * frozen with the others
  260. */
  261. static int ib_parse_draw_indx(struct kgsl_device *device, unsigned int *pkt,
  262. phys_addr_t ptbase)
  263. {
  264. int ret = 0, i;
  265. if (type3_pkt_size(pkt[0]) < 3)
  266. return 0;
  267. /* DRAW_IDX may have a index buffer pointer */
  268. if (type3_pkt_size(pkt[0]) > 3) {
  269. ret = kgsl_snapshot_get_object(device, ptbase, pkt[4], pkt[5],
  270. SNAPSHOT_GPU_OBJECT_GENERIC);
  271. if (ret < 0)
  272. return -EINVAL;
  273. snapshot_frozen_objsize += ret;
  274. }
  275. /*
  276. * All of the type0 writes are valid at a draw initiator, so freeze
  277. * the various buffers that we are tracking
  278. */
  279. /* First up the visiblity stream buffer */
  280. for (i = 0; i < ARRAY_SIZE(vsc_pipe); i++) {
  281. if (vsc_pipe[i].base != 0 && vsc_pipe[i].size != 0) {
  282. ret = kgsl_snapshot_get_object(device, ptbase,
  283. vsc_pipe[i].base, vsc_pipe[i].size,
  284. SNAPSHOT_GPU_OBJECT_GENERIC);
  285. if (ret < 0)
  286. return -EINVAL;
  287. snapshot_frozen_objsize += ret;
  288. }
  289. }
  290. /* Next the visibility stream size buffer */
  291. if (vsc_size_address) {
  292. ret = kgsl_snapshot_get_object(device, ptbase,
  293. vsc_size_address, 32,
  294. SNAPSHOT_GPU_OBJECT_GENERIC);
  295. if (ret < 0)
  296. return -EINVAL;
  297. snapshot_frozen_objsize += ret;
  298. }
  299. /* Next private shader buffer memory */
  300. if (sp_vs_pvt_mem_addr) {
  301. ret = kgsl_snapshot_get_object(device, ptbase,
  302. sp_vs_pvt_mem_addr, 8192,
  303. SNAPSHOT_GPU_OBJECT_GENERIC);
  304. if (ret < 0)
  305. return -EINVAL;
  306. snapshot_frozen_objsize += ret;
  307. sp_vs_pvt_mem_addr = 0;
  308. }
  309. if (sp_fs_pvt_mem_addr) {
  310. ret = kgsl_snapshot_get_object(device, ptbase,
  311. sp_fs_pvt_mem_addr, 8192,
  312. SNAPSHOT_GPU_OBJECT_GENERIC);
  313. if (ret < 0)
  314. return -EINVAL;
  315. snapshot_frozen_objsize += ret;
  316. sp_fs_pvt_mem_addr = 0;
  317. }
  318. if (sp_vs_obj_start_reg) {
  319. ret = kgsl_snapshot_get_object(device, ptbase,
  320. sp_vs_obj_start_reg & 0xFFFFFFE0, 0,
  321. SNAPSHOT_GPU_OBJECT_GENERIC);
  322. if (ret < 0)
  323. return -EINVAL;
  324. snapshot_frozen_objsize += ret;
  325. sp_vs_obj_start_reg = 0;
  326. }
  327. if (sp_fs_obj_start_reg) {
  328. ret = kgsl_snapshot_get_object(device, ptbase,
  329. sp_fs_obj_start_reg & 0xFFFFFFE0, 0,
  330. SNAPSHOT_GPU_OBJECT_GENERIC);
  331. if (ret < 0)
  332. return -EINVAL;
  333. snapshot_frozen_objsize += ret;
  334. sp_fs_obj_start_reg = 0;
  335. }
  336. /* Finally: VBOs */
  337. /* The number of active VBOs is stored in VFD_CONTROL_O[31:27] */
  338. for (i = 0; i < (vfd_control_0) >> 27; i++) {
  339. int size;
  340. /*
  341. * The size of the VBO is the stride stored in
  342. * VFD_FETCH_INSTR_0_X.BUFSTRIDE * VFD_INDEX_MAX. The base
  343. * is stored in VFD_FETCH_INSTR_1_X
  344. */
  345. if (vbo[i].base != 0) {
  346. size = vbo[i].stride * vfd_index_max;
  347. ret = kgsl_snapshot_get_object(device, ptbase,
  348. vbo[i].base,
  349. 0, SNAPSHOT_GPU_OBJECT_GENERIC);
  350. if (ret < 0)
  351. return -EINVAL;
  352. snapshot_frozen_objsize += ret;
  353. }
  354. vbo[i].base = 0;
  355. vbo[i].stride = 0;
  356. }
  357. vfd_control_0 = 0;
  358. vfd_index_max = 0;
  359. return ret;
  360. }
  361. /*
  362. * Parse all the type3 opcode packets that may contain important information,
  363. * such as additional GPU buffers to grab or a draw initator
  364. */
  365. static int ib_parse_type3(struct kgsl_device *device, unsigned int *ptr,
  366. phys_addr_t ptbase)
  367. {
  368. int opcode = cp_type3_opcode(*ptr);
  369. if (opcode == CP_LOAD_STATE)
  370. return ib_parse_load_state(device, ptr, ptbase);
  371. else if (opcode == CP_SET_BIN_DATA)
  372. return ib_parse_set_bin_data(device, ptr, ptbase);
  373. else if (opcode == CP_MEM_WRITE)
  374. return ib_parse_mem_write(device, ptr, ptbase);
  375. else if (opcode == CP_DRAW_INDX)
  376. return ib_parse_draw_indx(device, ptr, ptbase);
  377. return 0;
  378. }
  379. /*
  380. * Parse type0 packets found in the stream. Some of the registers that are
  381. * written are clues for GPU buffers that we need to freeze. Register writes
  382. * are considred valid when a draw initator is called, so just cache the values
  383. * here and freeze them when a CP_DRAW_INDX is seen. This protects against
  384. * needlessly caching buffers that won't be used during a draw call
  385. */
  386. static void ib_parse_type0(struct kgsl_device *device, unsigned int *ptr,
  387. phys_addr_t ptbase)
  388. {
  389. struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
  390. int size = type0_pkt_size(*ptr);
  391. int offset = type0_pkt_offset(*ptr);
  392. int i;
  393. for (i = 0; i < size - 1; i++, offset++) {
  394. /* Visiblity stream buffer */
  395. if (offset >= adreno_getreg(adreno_dev,
  396. ADRENO_REG_VSC_PIPE_DATA_ADDRESS_0) &&
  397. offset <= adreno_getreg(adreno_dev,
  398. ADRENO_REG_VSC_PIPE_DATA_LENGTH_7)) {
  399. int index = offset - adreno_getreg(adreno_dev,
  400. ADRENO_REG_VSC_PIPE_DATA_ADDRESS_0);
  401. /* Each bank of address and length registers are
  402. * interleaved with an empty register:
  403. *
  404. * address 0
  405. * length 0
  406. * empty
  407. * address 1
  408. * length 1
  409. * empty
  410. * ...
  411. */
  412. if ((index % 3) == 0)
  413. vsc_pipe[index / 3].base = ptr[i + 1];
  414. else if ((index % 3) == 1)
  415. vsc_pipe[index / 3].size = ptr[i + 1];
  416. } else if ((offset >= adreno_getreg(adreno_dev,
  417. ADRENO_REG_VFD_FETCH_INSTR_0_0)) &&
  418. (offset <= adreno_getreg(adreno_dev,
  419. ADRENO_REG_VFD_FETCH_INSTR_1_F))) {
  420. int index = offset -
  421. adreno_getreg(adreno_dev,
  422. ADRENO_REG_VFD_FETCH_INSTR_0_0);
  423. /*
  424. * FETCH_INSTR_0_X and FETCH_INSTR_1_X banks are
  425. * interleaved as above but without the empty register
  426. * in between
  427. */
  428. if ((index % 2) == 0)
  429. vbo[index >> 1].stride =
  430. (ptr[i + 1] >> 7) & 0x1FF;
  431. else
  432. vbo[index >> 1].base = ptr[i + 1];
  433. } else {
  434. /*
  435. * Cache various support registers for calculating
  436. * buffer sizes
  437. */
  438. if (offset ==
  439. adreno_getreg(adreno_dev,
  440. ADRENO_REG_VFD_CONTROL_0))
  441. vfd_control_0 = ptr[i + 1];
  442. else if (offset ==
  443. adreno_getreg(adreno_dev,
  444. ADRENO_REG_VFD_INDEX_MAX))
  445. vfd_index_max = ptr[i + 1];
  446. else if (offset ==
  447. adreno_getreg(adreno_dev,
  448. ADRENO_REG_VSC_SIZE_ADDRESS))
  449. vsc_size_address = ptr[i + 1];
  450. else if (offset == adreno_getreg(adreno_dev,
  451. ADRENO_REG_SP_VS_PVT_MEM_ADDR_REG))
  452. sp_vs_pvt_mem_addr = ptr[i + 1];
  453. else if (offset == adreno_getreg(adreno_dev,
  454. ADRENO_REG_SP_FS_PVT_MEM_ADDR_REG))
  455. sp_fs_pvt_mem_addr = ptr[i + 1];
  456. else if (offset == adreno_getreg(adreno_dev,
  457. ADRENO_REG_SP_VS_OBJ_START_REG))
  458. sp_vs_obj_start_reg = ptr[i + 1];
  459. else if (offset == adreno_getreg(adreno_dev,
  460. ADRENO_REG_SP_FS_OBJ_START_REG))
  461. sp_fs_obj_start_reg = ptr[i + 1];
  462. }
  463. }
  464. }
  465. static inline int parse_ib(struct kgsl_device *device, phys_addr_t ptbase,
  466. unsigned int gpuaddr, unsigned int dwords);
  467. /* Add an IB as a GPU object, but first, parse it to find more goodies within */
  468. static int ib_add_gpu_object(struct kgsl_device *device, phys_addr_t ptbase,
  469. unsigned int gpuaddr, unsigned int dwords)
  470. {
  471. int i, ret, rem = dwords;
  472. unsigned int *src;
  473. struct kgsl_mem_entry *entry = NULL;
  474. /*
  475. * If the object is already in the list, we don't need to parse it again
  476. */
  477. if (kgsl_snapshot_have_object(device, ptbase, gpuaddr, dwords << 2))
  478. return 0;
  479. src = (unsigned int *) adreno_convertaddr(device, ptbase, gpuaddr,
  480. dwords << 2, &entry);
  481. if (src == NULL)
  482. return -EINVAL;
  483. for (i = 0; rem > 0; rem--, i++) {
  484. int pktsize;
  485. /* If the packet isn't a type 1 or a type 3, then don't bother
  486. * parsing it - it is likely corrupted */
  487. if (!pkt_is_type0(src[i]) && !pkt_is_type3(src[i]))
  488. break;
  489. pktsize = type3_pkt_size(src[i]);
  490. if (!pktsize || (pktsize + 1) > rem)
  491. break;
  492. if (pkt_is_type3(src[i])) {
  493. if (adreno_cmd_is_ib(src[i])) {
  494. unsigned int gpuaddr = src[i + 1];
  495. unsigned int size = src[i + 2];
  496. parse_ib(device, ptbase, gpuaddr, size);
  497. } else {
  498. ret = ib_parse_type3(device, &src[i], ptbase);
  499. /*
  500. * If the parse function failed (probably
  501. * because of a bad decode) then bail out and
  502. * just capture the binary IB data
  503. */
  504. if (ret < 0)
  505. goto done;
  506. }
  507. } else if (pkt_is_type0(src[i])) {
  508. ib_parse_type0(device, &src[i], ptbase);
  509. }
  510. i += pktsize;
  511. rem -= pktsize;
  512. }
  513. done:
  514. ret = kgsl_snapshot_get_object(device, ptbase, gpuaddr, dwords << 2,
  515. SNAPSHOT_GPU_OBJECT_IB);
  516. if (ret >= 0)
  517. snapshot_frozen_objsize += ret;
  518. if (entry) {
  519. kgsl_memdesc_unmap(&entry->memdesc);
  520. kgsl_mem_entry_put(entry);
  521. }
  522. return ret;
  523. }
  524. /*
  525. * We want to store the last executed IB1 and IB2 in the static region to ensure
  526. * that we get at least some information out of the snapshot even if we can't
  527. * access the dynamic data from the sysfs file. Push all other IBs on the
  528. * dynamic list
  529. */
  530. static inline int parse_ib(struct kgsl_device *device, phys_addr_t ptbase,
  531. unsigned int gpuaddr, unsigned int dwords)
  532. {
  533. struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
  534. unsigned int ib1base, ib2base;
  535. int ret = 0;
  536. /*
  537. * Check the IB address - if it is either the last executed IB1 or the
  538. * last executed IB2 then push it into the static blob otherwise put
  539. * it in the dynamic list
  540. */
  541. adreno_readreg(adreno_dev, ADRENO_REG_CP_IB1_BASE, &ib1base);
  542. adreno_readreg(adreno_dev, ADRENO_REG_CP_IB2_BASE, &ib2base);
  543. if (gpuaddr == ib1base || gpuaddr == ib2base)
  544. push_object(device, SNAPSHOT_OBJ_TYPE_IB, ptbase,
  545. gpuaddr, dwords);
  546. else
  547. ret = ib_add_gpu_object(device, ptbase, gpuaddr, dwords);
  548. return ret;
  549. }
  550. /* Snapshot the ringbuffer memory */
  551. static int snapshot_rb(struct kgsl_device *device, void *snapshot,
  552. int remain, void *priv)
  553. {
  554. struct kgsl_snapshot_rb *header = snapshot;
  555. unsigned int *data = snapshot + sizeof(*header);
  556. struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
  557. struct adreno_ringbuffer *rb = &adreno_dev->ringbuffer;
  558. unsigned int rptr, *rbptr, ibbase;
  559. phys_addr_t ptbase;
  560. int index, size, i;
  561. int parse_ibs = 0, ib_parse_start;
  562. /* Get the physical address of the MMU pagetable */
  563. ptbase = kgsl_mmu_get_current_ptbase(&device->mmu);
  564. /* Get the current read pointers for the RB */
  565. adreno_readreg(adreno_dev, ADRENO_REG_CP_RB_RPTR, &rptr);
  566. /* Address of the last processed IB */
  567. adreno_readreg(adreno_dev, ADRENO_REG_CP_IB1_BASE, &ibbase);
  568. /*
  569. * Figure out the window of ringbuffer data to dump. First we need to
  570. * find where the last processed IB ws submitted. Start walking back
  571. * from the rptr
  572. */
  573. index = rptr;
  574. rbptr = rb->buffer_desc.hostptr;
  575. do {
  576. index--;
  577. if (index < 0) {
  578. index = rb->sizedwords - 3;
  579. /* We wrapped without finding what we wanted */
  580. if (index < rb->wptr) {
  581. index = rb->wptr;
  582. break;
  583. }
  584. }
  585. if (adreno_cmd_is_ib(rbptr[index]) &&
  586. rbptr[index + 1] == ibbase)
  587. break;
  588. } while (index != rb->wptr);
  589. /*
  590. * index points at the last submitted IB. We can only trust that the
  591. * memory between the context switch and the hanging IB is valid, so
  592. * the next step is to find the context switch before the submission
  593. */
  594. while (index != rb->wptr) {
  595. index--;
  596. if (index < 0) {
  597. index = rb->sizedwords - 2;
  598. /*
  599. * Wrapped without finding the context switch. This is
  600. * harmless - we should still have enough data to dump a
  601. * valid state
  602. */
  603. if (index < rb->wptr) {
  604. index = rb->wptr;
  605. break;
  606. }
  607. }
  608. /* Break if the current packet is a context switch identifier */
  609. if ((rbptr[index] == cp_nop_packet(1)) &&
  610. (rbptr[index + 1] == KGSL_CONTEXT_TO_MEM_IDENTIFIER))
  611. break;
  612. }
  613. /*
  614. * Index represents the start of the window of interest. We will try
  615. * to dump all buffers between here and the rptr
  616. */
  617. ib_parse_start = index;
  618. /*
  619. * Dump the entire ringbuffer - the parser can choose how much of it to
  620. * process
  621. */
  622. size = (rb->sizedwords << 2);
  623. if (remain < size + sizeof(*header)) {
  624. KGSL_DRV_ERR(device,
  625. "snapshot: Not enough memory for the rb section");
  626. return 0;
  627. }
  628. /* Write the sub-header for the section */
  629. header->start = rb->wptr;
  630. header->end = rb->wptr;
  631. header->wptr = rb->wptr;
  632. header->rbsize = rb->sizedwords;
  633. header->count = rb->sizedwords;
  634. /*
  635. * Loop through the RB, copying the data and looking for indirect
  636. * buffers and MMU pagetable changes
  637. */
  638. index = rb->wptr;
  639. for (i = 0; i < rb->sizedwords; i++) {
  640. *data = rbptr[index];
  641. /*
  642. * Only parse IBs between the start and the rptr or the next
  643. * context switch, whichever comes first
  644. */
  645. if (parse_ibs == 0 && index == ib_parse_start)
  646. parse_ibs = 1;
  647. else if (index == rptr || adreno_rb_ctxtswitch(&rbptr[index]))
  648. parse_ibs = 0;
  649. if (parse_ibs && adreno_cmd_is_ib(rbptr[index])) {
  650. unsigned int ibaddr = rbptr[index + 1];
  651. unsigned int ibsize = rbptr[index + 2];
  652. /*
  653. * This will return non NULL if the IB happens to be
  654. * part of the context memory (i.e - context switch
  655. * command buffers)
  656. */
  657. struct kgsl_memdesc *memdesc =
  658. adreno_find_ctxtmem(device, ptbase, ibaddr,
  659. ibsize << 2);
  660. /* IOMMU uses a NOP IB placed in setsate memory */
  661. if (NULL == memdesc)
  662. if (kgsl_gpuaddr_in_memdesc(
  663. &device->mmu.setstate_memory,
  664. ibaddr, ibsize << 2))
  665. memdesc = &device->mmu.setstate_memory;
  666. /*
  667. * The IB from CP_IB1_BASE and the IBs for legacy
  668. * context switch go into the snapshot all
  669. * others get marked at GPU objects
  670. */
  671. if (memdesc != NULL)
  672. push_object(device, SNAPSHOT_OBJ_TYPE_IB,
  673. ptbase, ibaddr, ibsize);
  674. else
  675. parse_ib(device, ptbase, ibaddr, ibsize);
  676. }
  677. index = index + 1;
  678. if (index == rb->sizedwords)
  679. index = 0;
  680. data++;
  681. }
  682. /* Return the size of the section */
  683. return size + sizeof(*header);
  684. }
  685. static int snapshot_capture_mem_list(struct kgsl_device *device, void *snapshot,
  686. int remain, void *priv)
  687. {
  688. struct kgsl_snapshot_replay_mem_list *header = snapshot;
  689. struct kgsl_process_private *private = NULL;
  690. struct kgsl_process_private *tmp_private;
  691. phys_addr_t ptbase;
  692. struct rb_node *node;
  693. struct kgsl_mem_entry *entry = NULL;
  694. int num_mem;
  695. unsigned int *data = snapshot + sizeof(*header);
  696. ptbase = kgsl_mmu_get_current_ptbase(&device->mmu);
  697. mutex_lock(&kgsl_driver.process_mutex);
  698. list_for_each_entry(tmp_private, &kgsl_driver.process_list, list) {
  699. if (kgsl_mmu_pt_equal(&device->mmu, tmp_private->pagetable,
  700. ptbase)) {
  701. private = tmp_private;
  702. break;
  703. }
  704. }
  705. mutex_unlock(&kgsl_driver.process_mutex);
  706. if (!private) {
  707. KGSL_DRV_ERR(device,
  708. "Failed to get pointer to process private structure\n");
  709. return 0;
  710. }
  711. /* We need to know the number of memory objects that the process has */
  712. spin_lock(&private->mem_lock);
  713. for (node = rb_first(&private->mem_rb), num_mem = 0; node; ) {
  714. entry = rb_entry(node, struct kgsl_mem_entry, node);
  715. node = rb_next(&entry->node);
  716. num_mem++;
  717. }
  718. if (remain < ((num_mem * 3 * sizeof(unsigned int)) +
  719. sizeof(*header))) {
  720. KGSL_DRV_ERR(device,
  721. "snapshot: Not enough memory for the mem list section");
  722. spin_unlock(&private->mem_lock);
  723. return 0;
  724. }
  725. header->num_entries = num_mem;
  726. header->ptbase = (__u32)ptbase;
  727. /*
  728. * Walk throught the memory list and store the
  729. * tuples(gpuaddr, size, memtype) in snapshot
  730. */
  731. for (node = rb_first(&private->mem_rb); node; ) {
  732. entry = rb_entry(node, struct kgsl_mem_entry, node);
  733. node = rb_next(&entry->node);
  734. *data++ = entry->memdesc.gpuaddr;
  735. *data++ = entry->memdesc.size;
  736. *data++ = (entry->memdesc.priv & KGSL_MEMTYPE_MASK) >>
  737. KGSL_MEMTYPE_SHIFT;
  738. }
  739. spin_unlock(&private->mem_lock);
  740. return sizeof(*header) + (num_mem * 3 * sizeof(unsigned int));
  741. }
  742. /* Snapshot the memory for an indirect buffer */
  743. static int snapshot_ib(struct kgsl_device *device, void *snapshot,
  744. int remain, void *priv)
  745. {
  746. struct kgsl_snapshot_ib *header = snapshot;
  747. struct kgsl_snapshot_obj *obj = priv;
  748. unsigned int *src = obj->ptr;
  749. unsigned int *dst = snapshot + sizeof(*header);
  750. int i, ret;
  751. if (remain < (obj->dwords << 2) + sizeof(*header)) {
  752. KGSL_DRV_ERR(device,
  753. "snapshot: Not enough memory for the ib section");
  754. return 0;
  755. }
  756. /* Write the sub-header for the section */
  757. header->gpuaddr = obj->gpuaddr;
  758. header->ptbase = (__u32)obj->ptbase;
  759. header->size = obj->dwords;
  760. /* Write the contents of the ib */
  761. for (i = 0; i < obj->dwords; i++, src++, dst++) {
  762. *dst = *src;
  763. if (pkt_is_type3(*src)) {
  764. if ((obj->dwords - i) < type3_pkt_size(*src) + 1)
  765. continue;
  766. if (adreno_cmd_is_ib(*src)) {
  767. parse_ib(device, obj->ptbase, src[1],
  768. src[2]);
  769. } else {
  770. ret = ib_parse_type3(device, src, obj->ptbase);
  771. /* Stop parsing if the type3 decode fails */
  772. if (ret < 0)
  773. break;
  774. }
  775. }
  776. }
  777. return (obj->dwords << 2) + sizeof(*header);
  778. }
  779. /* Dump another item on the current pending list */
  780. static void *dump_object(struct kgsl_device *device, int obj, void *snapshot,
  781. int *remain)
  782. {
  783. switch (objbuf[obj].type) {
  784. case SNAPSHOT_OBJ_TYPE_IB:
  785. snapshot = kgsl_snapshot_add_section(device,
  786. KGSL_SNAPSHOT_SECTION_IB, snapshot, remain,
  787. snapshot_ib, &objbuf[obj]);
  788. if (objbuf[obj].entry) {
  789. kgsl_memdesc_unmap(&(objbuf[obj].entry->memdesc));
  790. kgsl_mem_entry_put(objbuf[obj].entry);
  791. }
  792. break;
  793. default:
  794. KGSL_DRV_ERR(device,
  795. "snapshot: Invalid snapshot object type: %d\n",
  796. objbuf[obj].type);
  797. break;
  798. }
  799. return snapshot;
  800. }
  801. /* adreno_snapshot - Snapshot the Adreno GPU state
  802. * @device - KGSL device to snapshot
  803. * @snapshot - Pointer to the start of memory to write into
  804. * @remain - A pointer to how many bytes of memory are remaining in the snapshot
  805. * @hang - set if this snapshot was automatically triggered by a GPU hang
  806. * This is a hook function called by kgsl_snapshot to snapshot the
  807. * Adreno specific information for the GPU snapshot. In turn, this function
  808. * calls the GPU specific snapshot function to get core specific information.
  809. */
  810. void *adreno_snapshot(struct kgsl_device *device, void *snapshot, int *remain,
  811. int hang)
  812. {
  813. int i;
  814. uint32_t ibbase, ibsize;
  815. struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
  816. phys_addr_t ptbase;
  817. /* Reset the list of objects */
  818. objbufptr = 0;
  819. snapshot_frozen_objsize = 0;
  820. /* Clear the caches for the visibilty stream and VBO parsing */
  821. vfd_control_0 = 0;
  822. vfd_index_max = 0;
  823. vsc_size_address = 0;
  824. memset(vsc_pipe, 0, sizeof(vsc_pipe));
  825. memset(vbo, 0, sizeof(vbo));
  826. /* Get the physical address of the MMU pagetable */
  827. ptbase = kgsl_mmu_get_current_ptbase(&device->mmu);
  828. /* Dump the ringbuffer */
  829. snapshot = kgsl_snapshot_add_section(device, KGSL_SNAPSHOT_SECTION_RB,
  830. snapshot, remain, snapshot_rb, NULL);
  831. /*
  832. * Add a section that lists (gpuaddr, size, memtype) tuples of the
  833. * hanging process
  834. */
  835. snapshot = kgsl_snapshot_add_section(device,
  836. KGSL_SNAPSHOT_SECTION_MEMLIST, snapshot, remain,
  837. snapshot_capture_mem_list, NULL);
  838. /*
  839. * Make sure that the last IB1 that was being executed is dumped.
  840. * Since this was the last IB1 that was processed, we should have
  841. * already added it to the list during the ringbuffer parse but we
  842. * want to be double plus sure.
  843. */
  844. adreno_readreg(adreno_dev, ADRENO_REG_CP_IB1_BASE, &ibbase);
  845. adreno_readreg(adreno_dev, ADRENO_REG_CP_IB1_BUFSZ, &ibsize);
  846. /*
  847. * The problem is that IB size from the register is the unprocessed size
  848. * of the buffer not the original size, so if we didn't catch this
  849. * buffer being directly used in the RB, then we might not be able to
  850. * dump the whle thing. Print a warning message so we can try to
  851. * figure how often this really happens.
  852. */
  853. if (!find_object(SNAPSHOT_OBJ_TYPE_IB, ibbase, ptbase) && ibsize) {
  854. push_object(device, SNAPSHOT_OBJ_TYPE_IB, ptbase,
  855. ibbase, ibsize);
  856. KGSL_DRV_ERR(device, "CP_IB1_BASE not found in the ringbuffer. "
  857. "Dumping %x dwords of the buffer.\n", ibsize);
  858. }
  859. adreno_readreg(adreno_dev, ADRENO_REG_CP_IB2_BASE, &ibbase);
  860. adreno_readreg(adreno_dev, ADRENO_REG_CP_IB2_BUFSZ, &ibsize);
  861. /*
  862. * Add the last parsed IB2 to the list. The IB2 should be found as we
  863. * parse the objects below, but we try to add it to the list first, so
  864. * it too can be parsed. Don't print an error message in this case - if
  865. * the IB2 is found during parsing, the list will be updated with the
  866. * correct size.
  867. */
  868. if (!find_object(SNAPSHOT_OBJ_TYPE_IB, ibbase, ptbase) && ibsize) {
  869. push_object(device, SNAPSHOT_OBJ_TYPE_IB, ptbase,
  870. ibbase, ibsize);
  871. }
  872. /*
  873. * Go through the list of found objects and dump each one. As the IBs
  874. * are parsed, more objects might be found, and objbufptr will increase
  875. */
  876. for (i = 0; i < objbufptr; i++)
  877. snapshot = dump_object(device, i, snapshot, remain);
  878. /* Add GPU specific sections - registers mainly, but other stuff too */
  879. if (adreno_dev->gpudev->snapshot)
  880. snapshot = adreno_dev->gpudev->snapshot(adreno_dev, snapshot,
  881. remain, hang);
  882. if (snapshot_frozen_objsize)
  883. KGSL_DRV_ERR(device, "GPU snapshot froze %dKb of GPU buffers\n",
  884. snapshot_frozen_objsize / 1024);
  885. return snapshot;
  886. }