edac_pci.c 12 KB

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  1. /*
  2. * EDAC PCI component
  3. *
  4. * Author: Dave Jiang <djiang@mvista.com>
  5. *
  6. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  7. * the terms of the GNU General Public License version 2. This program
  8. * is licensed "as is" without any warranty of any kind, whether express
  9. * or implied.
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <linux/types.h>
  14. #include <linux/smp.h>
  15. #include <linux/init.h>
  16. #include <linux/sysctl.h>
  17. #include <linux/highmem.h>
  18. #include <linux/timer.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/list.h>
  22. #include <linux/ctype.h>
  23. #include <linux/workqueue.h>
  24. #include <asm/uaccess.h>
  25. #include <asm/page.h>
  26. #include "edac_core.h"
  27. #include "edac_module.h"
  28. static DEFINE_MUTEX(edac_pci_ctls_mutex);
  29. static LIST_HEAD(edac_pci_list);
  30. static atomic_t pci_indexes = ATOMIC_INIT(0);
  31. /*
  32. * edac_pci_alloc_ctl_info
  33. *
  34. * The alloc() function for the 'edac_pci' control info
  35. * structure. The chip driver will allocate one of these for each
  36. * edac_pci it is going to control/register with the EDAC CORE.
  37. */
  38. struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
  39. const char *edac_pci_name)
  40. {
  41. struct edac_pci_ctl_info *pci;
  42. void *pvt;
  43. unsigned int size;
  44. debugf1("%s()\n", __func__);
  45. pci = (struct edac_pci_ctl_info *)0;
  46. pvt = edac_align_ptr(&pci[1], sz_pvt);
  47. size = ((unsigned long)pvt) + sz_pvt;
  48. /* Alloc the needed control struct memory */
  49. pci = kzalloc(size, GFP_KERNEL);
  50. if (pci == NULL)
  51. return NULL;
  52. /* Now much private space */
  53. pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
  54. pci->pvt_info = pvt;
  55. pci->op_state = OP_ALLOC;
  56. snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
  57. return pci;
  58. }
  59. EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
  60. /*
  61. * edac_pci_free_ctl_info()
  62. *
  63. * Last action on the pci control structure.
  64. *
  65. * call the remove sysfs information, which will unregister
  66. * this control struct's kobj. When that kobj's ref count
  67. * goes to zero, its release function will be call and then
  68. * kfree() the memory.
  69. */
  70. void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
  71. {
  72. debugf1("%s()\n", __func__);
  73. edac_pci_remove_sysfs(pci);
  74. }
  75. EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
  76. /*
  77. * find_edac_pci_by_dev()
  78. * scans the edac_pci list for a specific 'struct device *'
  79. *
  80. * return NULL if not found, or return control struct pointer
  81. */
  82. static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
  83. {
  84. struct edac_pci_ctl_info *pci;
  85. struct list_head *item;
  86. debugf1("%s()\n", __func__);
  87. list_for_each(item, &edac_pci_list) {
  88. pci = list_entry(item, struct edac_pci_ctl_info, link);
  89. if (pci->dev == dev)
  90. return pci;
  91. }
  92. return NULL;
  93. }
  94. /*
  95. * add_edac_pci_to_global_list
  96. * Before calling this function, caller must assign a unique value to
  97. * edac_dev->pci_idx.
  98. * Return:
  99. * 0 on success
  100. * 1 on failure
  101. */
  102. static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
  103. {
  104. struct list_head *item, *insert_before;
  105. struct edac_pci_ctl_info *rover;
  106. debugf1("%s()\n", __func__);
  107. insert_before = &edac_pci_list;
  108. /* Determine if already on the list */
  109. rover = find_edac_pci_by_dev(pci->dev);
  110. if (unlikely(rover != NULL))
  111. goto fail0;
  112. /* Insert in ascending order by 'pci_idx', so find position */
  113. list_for_each(item, &edac_pci_list) {
  114. rover = list_entry(item, struct edac_pci_ctl_info, link);
  115. if (rover->pci_idx >= pci->pci_idx) {
  116. if (unlikely(rover->pci_idx == pci->pci_idx))
  117. goto fail1;
  118. insert_before = item;
  119. break;
  120. }
  121. }
  122. list_add_tail_rcu(&pci->link, insert_before);
  123. return 0;
  124. fail0:
  125. edac_printk(KERN_WARNING, EDAC_PCI,
  126. "%s (%s) %s %s already assigned %d\n",
  127. dev_name(rover->dev), edac_dev_name(rover),
  128. rover->mod_name, rover->ctl_name, rover->pci_idx);
  129. return 1;
  130. fail1:
  131. edac_printk(KERN_WARNING, EDAC_PCI,
  132. "but in low-level driver: attempt to assign\n"
  133. "\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
  134. __func__);
  135. return 1;
  136. }
  137. /*
  138. * del_edac_pci_from_global_list
  139. *
  140. * remove the PCI control struct from the global list
  141. */
  142. static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
  143. {
  144. list_del_rcu(&pci->link);
  145. /* these are for safe removal of devices from global list while
  146. * NMI handlers may be traversing list
  147. */
  148. synchronize_rcu();
  149. INIT_LIST_HEAD(&pci->link);
  150. }
  151. #if 0
  152. /* Older code, but might use in the future */
  153. /*
  154. * edac_pci_find()
  155. * Search for an edac_pci_ctl_info structure whose index is 'idx'
  156. *
  157. * If found, return a pointer to the structure
  158. * Else return NULL.
  159. *
  160. * Caller must hold pci_ctls_mutex.
  161. */
  162. struct edac_pci_ctl_info *edac_pci_find(int idx)
  163. {
  164. struct list_head *item;
  165. struct edac_pci_ctl_info *pci;
  166. /* Iterage over list, looking for exact match of ID */
  167. list_for_each(item, &edac_pci_list) {
  168. pci = list_entry(item, struct edac_pci_ctl_info, link);
  169. if (pci->pci_idx >= idx) {
  170. if (pci->pci_idx == idx)
  171. return pci;
  172. /* not on list, so terminate early */
  173. break;
  174. }
  175. }
  176. return NULL;
  177. }
  178. EXPORT_SYMBOL_GPL(edac_pci_find);
  179. #endif
  180. /*
  181. * edac_pci_workq_function()
  182. *
  183. * periodic function that performs the operation
  184. * scheduled by a workq request, for a given PCI control struct
  185. */
  186. static void edac_pci_workq_function(struct work_struct *work_req)
  187. {
  188. struct delayed_work *d_work = to_delayed_work(work_req);
  189. struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
  190. int msec;
  191. unsigned long delay;
  192. debugf3("%s() checking\n", __func__);
  193. mutex_lock(&edac_pci_ctls_mutex);
  194. if (pci->op_state == OP_RUNNING_POLL) {
  195. /* we might be in POLL mode, but there may NOT be a poll func
  196. */
  197. if ((pci->edac_check != NULL) && edac_pci_get_check_errors())
  198. pci->edac_check(pci);
  199. /* if we are on a one second period, then use round */
  200. msec = edac_pci_get_poll_msec();
  201. if (msec == 1000)
  202. delay = round_jiffies_relative(msecs_to_jiffies(msec));
  203. else
  204. delay = msecs_to_jiffies(msec);
  205. /* Reschedule only if we are in POLL mode */
  206. queue_delayed_work(edac_workqueue, &pci->work, delay);
  207. }
  208. mutex_unlock(&edac_pci_ctls_mutex);
  209. }
  210. /*
  211. * edac_pci_workq_setup()
  212. * initialize a workq item for this edac_pci instance
  213. * passing in the new delay period in msec
  214. *
  215. * locking model:
  216. * called when 'edac_pci_ctls_mutex' is locked
  217. */
  218. static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
  219. unsigned int msec)
  220. {
  221. debugf0("%s()\n", __func__);
  222. INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
  223. queue_delayed_work(edac_workqueue, &pci->work,
  224. msecs_to_jiffies(edac_pci_get_poll_msec()));
  225. }
  226. /*
  227. * edac_pci_workq_teardown()
  228. * stop the workq processing on this edac_pci instance
  229. */
  230. static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
  231. {
  232. int status;
  233. debugf0("%s()\n", __func__);
  234. status = cancel_delayed_work(&pci->work);
  235. if (status == 0)
  236. flush_workqueue(edac_workqueue);
  237. }
  238. /*
  239. * edac_pci_reset_delay_period
  240. *
  241. * called with a new period value for the workq period
  242. * a) stop current workq timer
  243. * b) restart workq timer with new value
  244. */
  245. void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
  246. unsigned long value)
  247. {
  248. debugf0("%s()\n", __func__);
  249. edac_pci_workq_teardown(pci);
  250. /* need to lock for the setup */
  251. mutex_lock(&edac_pci_ctls_mutex);
  252. edac_pci_workq_setup(pci, value);
  253. mutex_unlock(&edac_pci_ctls_mutex);
  254. }
  255. EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period);
  256. /*
  257. * edac_pci_alloc_index: Allocate a unique PCI index number
  258. *
  259. * Return:
  260. * allocated index number
  261. *
  262. */
  263. int edac_pci_alloc_index(void)
  264. {
  265. return atomic_inc_return(&pci_indexes) - 1;
  266. }
  267. EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
  268. /*
  269. * edac_pci_add_device: Insert the 'edac_dev' structure into the
  270. * edac_pci global list and create sysfs entries associated with
  271. * edac_pci structure.
  272. * @pci: pointer to the edac_device structure to be added to the list
  273. * @edac_idx: A unique numeric identifier to be assigned to the
  274. * 'edac_pci' structure.
  275. *
  276. * Return:
  277. * 0 Success
  278. * !0 Failure
  279. */
  280. int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
  281. {
  282. debugf0("%s()\n", __func__);
  283. pci->pci_idx = edac_idx;
  284. pci->start_time = jiffies;
  285. mutex_lock(&edac_pci_ctls_mutex);
  286. if (add_edac_pci_to_global_list(pci))
  287. goto fail0;
  288. if (edac_pci_create_sysfs(pci)) {
  289. edac_pci_printk(pci, KERN_WARNING,
  290. "failed to create sysfs pci\n");
  291. goto fail1;
  292. }
  293. if (pci->edac_check != NULL) {
  294. pci->op_state = OP_RUNNING_POLL;
  295. edac_pci_workq_setup(pci, 1000);
  296. } else {
  297. pci->op_state = OP_RUNNING_INTERRUPT;
  298. }
  299. edac_pci_printk(pci, KERN_INFO,
  300. "Giving out device to module '%s' controller '%s':"
  301. " DEV '%s' (%s)\n",
  302. pci->mod_name,
  303. pci->ctl_name,
  304. edac_dev_name(pci), edac_op_state_to_string(pci->op_state));
  305. mutex_unlock(&edac_pci_ctls_mutex);
  306. return 0;
  307. /* error unwind stack */
  308. fail1:
  309. del_edac_pci_from_global_list(pci);
  310. fail0:
  311. mutex_unlock(&edac_pci_ctls_mutex);
  312. return 1;
  313. }
  314. EXPORT_SYMBOL_GPL(edac_pci_add_device);
  315. /*
  316. * edac_pci_del_device()
  317. * Remove sysfs entries for specified edac_pci structure and
  318. * then remove edac_pci structure from global list
  319. *
  320. * @dev:
  321. * Pointer to 'struct device' representing edac_pci structure
  322. * to remove
  323. *
  324. * Return:
  325. * Pointer to removed edac_pci structure,
  326. * or NULL if device not found
  327. */
  328. struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
  329. {
  330. struct edac_pci_ctl_info *pci;
  331. debugf0("%s()\n", __func__);
  332. mutex_lock(&edac_pci_ctls_mutex);
  333. /* ensure the control struct is on the global list
  334. * if not, then leave
  335. */
  336. pci = find_edac_pci_by_dev(dev);
  337. if (pci == NULL) {
  338. mutex_unlock(&edac_pci_ctls_mutex);
  339. return NULL;
  340. }
  341. pci->op_state = OP_OFFLINE;
  342. del_edac_pci_from_global_list(pci);
  343. mutex_unlock(&edac_pci_ctls_mutex);
  344. /* stop the workq timer */
  345. edac_pci_workq_teardown(pci);
  346. edac_printk(KERN_INFO, EDAC_PCI,
  347. "Removed device %d for %s %s: DEV %s\n",
  348. pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
  349. return pci;
  350. }
  351. EXPORT_SYMBOL_GPL(edac_pci_del_device);
  352. /*
  353. * edac_pci_generic_check
  354. *
  355. * a Generic parity check API
  356. */
  357. static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
  358. {
  359. debugf4("%s()\n", __func__);
  360. edac_pci_do_parity_check();
  361. }
  362. /* free running instance index counter */
  363. static int edac_pci_idx;
  364. #define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
  365. struct edac_pci_gen_data {
  366. int edac_idx;
  367. };
  368. /*
  369. * edac_pci_create_generic_ctl
  370. *
  371. * A generic constructor for a PCI parity polling device
  372. * Some systems have more than one domain of PCI busses.
  373. * For systems with one domain, then this API will
  374. * provide for a generic poller.
  375. *
  376. * This routine calls the edac_pci_alloc_ctl_info() for
  377. * the generic device, with default values
  378. */
  379. struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
  380. const char *mod_name)
  381. {
  382. struct edac_pci_ctl_info *pci;
  383. struct edac_pci_gen_data *pdata;
  384. pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
  385. if (!pci)
  386. return NULL;
  387. pdata = pci->pvt_info;
  388. pci->dev = dev;
  389. dev_set_drvdata(pci->dev, pci);
  390. pci->dev_name = pci_name(to_pci_dev(dev));
  391. pci->mod_name = mod_name;
  392. pci->ctl_name = EDAC_PCI_GENCTL_NAME;
  393. pci->edac_check = edac_pci_generic_check;
  394. pdata->edac_idx = edac_pci_idx++;
  395. if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
  396. debugf3("%s(): failed edac_pci_add_device()\n", __func__);
  397. edac_pci_free_ctl_info(pci);
  398. return NULL;
  399. }
  400. return pci;
  401. }
  402. EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
  403. /*
  404. * edac_pci_release_generic_ctl
  405. *
  406. * The release function of a generic EDAC PCI polling device
  407. */
  408. void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
  409. {
  410. debugf0("%s() pci mod=%s\n", __func__, pci->mod_name);
  411. edac_pci_del_device(pci->dev);
  412. edac_pci_free_ctl_info(pci);
  413. }
  414. EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);