umul.S 4.7 KB

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  1. /*
  2. * umul.S: This routine was taken from glibc-1.09 and is covered
  3. * by the GNU Library General Public License Version 2.
  4. */
  5. /*
  6. * Unsigned multiply. Returns %o0 * %o1 in %o1%o0 (i.e., %o1 holds the
  7. * upper 32 bits of the 64-bit product).
  8. *
  9. * This code optimizes short (less than 13-bit) multiplies. Short
  10. * multiplies require 25 instruction cycles, and long ones require
  11. * 45 instruction cycles.
  12. *
  13. * On return, overflow has occurred (%o1 is not zero) if and only if
  14. * the Z condition code is clear, allowing, e.g., the following:
  15. *
  16. * call .umul
  17. * nop
  18. * bnz overflow (or tnz)
  19. */
  20. .globl .umul
  21. .globl _Umul
  22. .umul:
  23. _Umul: /* needed for export */
  24. or %o0, %o1, %o4
  25. mov %o0, %y ! multiplier -> Y
  26. andncc %o4, 0xfff, %g0 ! test bits 12..31 of *both* args
  27. be Lmul_shortway ! if zero, can do it the short way
  28. andcc %g0, %g0, %o4 ! zero the partial product and clear N and V
  29. /*
  30. * Long multiply. 32 steps, followed by a final shift step.
  31. */
  32. mulscc %o4, %o1, %o4 ! 1
  33. mulscc %o4, %o1, %o4 ! 2
  34. mulscc %o4, %o1, %o4 ! 3
  35. mulscc %o4, %o1, %o4 ! 4
  36. mulscc %o4, %o1, %o4 ! 5
  37. mulscc %o4, %o1, %o4 ! 6
  38. mulscc %o4, %o1, %o4 ! 7
  39. mulscc %o4, %o1, %o4 ! 8
  40. mulscc %o4, %o1, %o4 ! 9
  41. mulscc %o4, %o1, %o4 ! 10
  42. mulscc %o4, %o1, %o4 ! 11
  43. mulscc %o4, %o1, %o4 ! 12
  44. mulscc %o4, %o1, %o4 ! 13
  45. mulscc %o4, %o1, %o4 ! 14
  46. mulscc %o4, %o1, %o4 ! 15
  47. mulscc %o4, %o1, %o4 ! 16
  48. mulscc %o4, %o1, %o4 ! 17
  49. mulscc %o4, %o1, %o4 ! 18
  50. mulscc %o4, %o1, %o4 ! 19
  51. mulscc %o4, %o1, %o4 ! 20
  52. mulscc %o4, %o1, %o4 ! 21
  53. mulscc %o4, %o1, %o4 ! 22
  54. mulscc %o4, %o1, %o4 ! 23
  55. mulscc %o4, %o1, %o4 ! 24
  56. mulscc %o4, %o1, %o4 ! 25
  57. mulscc %o4, %o1, %o4 ! 26
  58. mulscc %o4, %o1, %o4 ! 27
  59. mulscc %o4, %o1, %o4 ! 28
  60. mulscc %o4, %o1, %o4 ! 29
  61. mulscc %o4, %o1, %o4 ! 30
  62. mulscc %o4, %o1, %o4 ! 31
  63. mulscc %o4, %o1, %o4 ! 32
  64. mulscc %o4, %g0, %o4 ! final shift
  65. /*
  66. * Normally, with the shift-and-add approach, if both numbers are
  67. * positive you get the correct result. With 32-bit two's-complement
  68. * numbers, -x is represented as
  69. *
  70. * x 32
  71. * ( 2 - ------ ) mod 2 * 2
  72. * 32
  73. * 2
  74. *
  75. * (the `mod 2' subtracts 1 from 1.bbbb). To avoid lots of 2^32s,
  76. * we can treat this as if the radix point were just to the left
  77. * of the sign bit (multiply by 2^32), and get
  78. *
  79. * -x = (2 - x) mod 2
  80. *
  81. * Then, ignoring the `mod 2's for convenience:
  82. *
  83. * x * y = xy
  84. * -x * y = 2y - xy
  85. * x * -y = 2x - xy
  86. * -x * -y = 4 - 2x - 2y + xy
  87. *
  88. * For signed multiplies, we subtract (x << 32) from the partial
  89. * product to fix this problem for negative multipliers (see mul.s).
  90. * Because of the way the shift into the partial product is calculated
  91. * (N xor V), this term is automatically removed for the multiplicand,
  92. * so we don't have to adjust.
  93. *
  94. * But for unsigned multiplies, the high order bit wasn't a sign bit,
  95. * and the correction is wrong. So for unsigned multiplies where the
  96. * high order bit is one, we end up with xy - (y << 32). To fix it
  97. * we add y << 32.
  98. */
  99. #if 0
  100. tst %o1
  101. bl,a 1f ! if %o1 < 0 (high order bit = 1),
  102. add %o4, %o0, %o4 ! %o4 += %o0 (add y to upper half)
  103. 1:
  104. rd %y, %o0 ! get lower half of product
  105. retl
  106. addcc %o4, %g0, %o1 ! put upper half in place and set Z for %o1==0
  107. #else
  108. /* Faster code from tege@sics.se. */
  109. sra %o1, 31, %o2 ! make mask from sign bit
  110. and %o0, %o2, %o2 ! %o2 = 0 or %o0, depending on sign of %o1
  111. rd %y, %o0 ! get lower half of product
  112. retl
  113. addcc %o4, %o2, %o1 ! add compensation and put upper half in place
  114. #endif
  115. Lmul_shortway:
  116. /*
  117. * Short multiply. 12 steps, followed by a final shift step.
  118. * The resulting bits are off by 12 and (32-12) = 20 bit positions,
  119. * but there is no problem with %o0 being negative (unlike above),
  120. * and overflow is impossible (the answer is at most 24 bits long).
  121. */
  122. mulscc %o4, %o1, %o4 ! 1
  123. mulscc %o4, %o1, %o4 ! 2
  124. mulscc %o4, %o1, %o4 ! 3
  125. mulscc %o4, %o1, %o4 ! 4
  126. mulscc %o4, %o1, %o4 ! 5
  127. mulscc %o4, %o1, %o4 ! 6
  128. mulscc %o4, %o1, %o4 ! 7
  129. mulscc %o4, %o1, %o4 ! 8
  130. mulscc %o4, %o1, %o4 ! 9
  131. mulscc %o4, %o1, %o4 ! 10
  132. mulscc %o4, %o1, %o4 ! 11
  133. mulscc %o4, %o1, %o4 ! 12
  134. mulscc %o4, %g0, %o4 ! final shift
  135. /*
  136. * %o4 has 20 of the bits that should be in the result; %y has
  137. * the bottom 12 (as %y's top 12). That is:
  138. *
  139. * %o4 %y
  140. * +----------------+----------------+
  141. * | -12- | -20- | -12- | -20- |
  142. * +------(---------+------)---------+
  143. * -----result-----
  144. *
  145. * The 12 bits of %o4 left of the `result' area are all zero;
  146. * in fact, all top 20 bits of %o4 are zero.
  147. */
  148. rd %y, %o5
  149. sll %o4, 12, %o0 ! shift middle bits left 12
  150. srl %o5, 20, %o5 ! shift low bits right 20
  151. or %o5, %o0, %o0
  152. retl
  153. addcc %g0, %g0, %o1 ! %o1 = zero, and set Z
  154. .globl .umul_patch
  155. .umul_patch:
  156. umul %o0, %o1, %o0
  157. retl
  158. rd %y, %o1
  159. nop