drm.tmpl 32 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869
  1. <?xml version="1.0" encoding="UTF-8"?>
  2. <!DOCTYPE book PUBLIC "-//OASIS//DTD DocBook XML V4.1.2//EN"
  3. "http://www.oasis-open.org/docbook/xml/4.1.2/docbookx.dtd" []>
  4. <book id="drmDevelopersGuide">
  5. <bookinfo>
  6. <title>Linux DRM Developer's Guide</title>
  7. <copyright>
  8. <year>2008-2009</year>
  9. <holder>
  10. Intel Corporation (Jesse Barnes &lt;jesse.barnes@intel.com&gt;)
  11. </holder>
  12. </copyright>
  13. <legalnotice>
  14. <para>
  15. The contents of this file may be used under the terms of the GNU
  16. General Public License version 2 (the "GPL") as distributed in
  17. the kernel source COPYING file.
  18. </para>
  19. </legalnotice>
  20. </bookinfo>
  21. <toc></toc>
  22. <!-- Introduction -->
  23. <chapter id="drmIntroduction">
  24. <title>Introduction</title>
  25. <para>
  26. The Linux DRM layer contains code intended to support the needs
  27. of complex graphics devices, usually containing programmable
  28. pipelines well suited to 3D graphics acceleration. Graphics
  29. drivers in the kernel may make use of DRM functions to make
  30. tasks like memory management, interrupt handling and DMA easier,
  31. and provide a uniform interface to applications.
  32. </para>
  33. <para>
  34. A note on versions: this guide covers features found in the DRM
  35. tree, including the TTM memory manager, output configuration and
  36. mode setting, and the new vblank internals, in addition to all
  37. the regular features found in current kernels.
  38. </para>
  39. <para>
  40. [Insert diagram of typical DRM stack here]
  41. </para>
  42. </chapter>
  43. <!-- Internals -->
  44. <chapter id="drmInternals">
  45. <title>DRM Internals</title>
  46. <para>
  47. This chapter documents DRM internals relevant to driver authors
  48. and developers working to add support for the latest features to
  49. existing drivers.
  50. </para>
  51. <para>
  52. First, we go over some typical driver initialization
  53. requirements, like setting up command buffers, creating an
  54. initial output configuration, and initializing core services.
  55. Subsequent sections cover core internals in more detail,
  56. providing implementation notes and examples.
  57. </para>
  58. <para>
  59. The DRM layer provides several services to graphics drivers,
  60. many of them driven by the application interfaces it provides
  61. through libdrm, the library that wraps most of the DRM ioctls.
  62. These include vblank event handling, memory
  63. management, output management, framebuffer management, command
  64. submission &amp; fencing, suspend/resume support, and DMA
  65. services.
  66. </para>
  67. <para>
  68. The core of every DRM driver is struct drm_driver. Drivers
  69. typically statically initialize a drm_driver structure,
  70. then pass it to drm_init() at load time.
  71. </para>
  72. <!-- Internals: driver init -->
  73. <sect1>
  74. <title>Driver initialization</title>
  75. <para>
  76. Before calling the DRM initialization routines, the driver must
  77. first create and fill out a struct drm_driver structure.
  78. </para>
  79. <programlisting>
  80. static struct drm_driver driver = {
  81. /* Don't use MTRRs here; the Xserver or userspace app should
  82. * deal with them for Intel hardware.
  83. */
  84. .driver_features =
  85. DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
  86. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_MODESET,
  87. .load = i915_driver_load,
  88. .unload = i915_driver_unload,
  89. .firstopen = i915_driver_firstopen,
  90. .lastclose = i915_driver_lastclose,
  91. .preclose = i915_driver_preclose,
  92. .save = i915_save,
  93. .restore = i915_restore,
  94. .device_is_agp = i915_driver_device_is_agp,
  95. .get_vblank_counter = i915_get_vblank_counter,
  96. .enable_vblank = i915_enable_vblank,
  97. .disable_vblank = i915_disable_vblank,
  98. .irq_preinstall = i915_driver_irq_preinstall,
  99. .irq_postinstall = i915_driver_irq_postinstall,
  100. .irq_uninstall = i915_driver_irq_uninstall,
  101. .irq_handler = i915_driver_irq_handler,
  102. .reclaim_buffers = drm_core_reclaim_buffers,
  103. .get_map_ofs = drm_core_get_map_ofs,
  104. .get_reg_ofs = drm_core_get_reg_ofs,
  105. .fb_probe = intelfb_probe,
  106. .fb_remove = intelfb_remove,
  107. .fb_resize = intelfb_resize,
  108. .master_create = i915_master_create,
  109. .master_destroy = i915_master_destroy,
  110. #if defined(CONFIG_DEBUG_FS)
  111. .debugfs_init = i915_debugfs_init,
  112. .debugfs_cleanup = i915_debugfs_cleanup,
  113. #endif
  114. .gem_init_object = i915_gem_init_object,
  115. .gem_free_object = i915_gem_free_object,
  116. .gem_vm_ops = &amp;i915_gem_vm_ops,
  117. .ioctls = i915_ioctls,
  118. .fops = {
  119. .owner = THIS_MODULE,
  120. .open = drm_open,
  121. .release = drm_release,
  122. .ioctl = drm_ioctl,
  123. .mmap = drm_mmap,
  124. .poll = drm_poll,
  125. .fasync = drm_fasync,
  126. #ifdef CONFIG_COMPAT
  127. .compat_ioctl = i915_compat_ioctl,
  128. #endif
  129. .llseek = noop_llseek,
  130. },
  131. .pci_driver = {
  132. .name = DRIVER_NAME,
  133. .id_table = pciidlist,
  134. .probe = probe,
  135. .remove = __devexit_p(drm_cleanup_pci),
  136. },
  137. .name = DRIVER_NAME,
  138. .desc = DRIVER_DESC,
  139. .date = DRIVER_DATE,
  140. .major = DRIVER_MAJOR,
  141. .minor = DRIVER_MINOR,
  142. .patchlevel = DRIVER_PATCHLEVEL,
  143. };
  144. </programlisting>
  145. <para>
  146. In the example above, taken from the i915 DRM driver, the driver
  147. sets several flags indicating what core features it supports;
  148. we go over the individual callbacks in later sections. Since
  149. flags indicate which features your driver supports to the DRM
  150. core, you need to set most of them prior to calling drm_init(). Some,
  151. like DRIVER_MODESET can be set later based on user supplied parameters,
  152. but that's the exception rather than the rule.
  153. </para>
  154. <variablelist>
  155. <title>Driver flags</title>
  156. <varlistentry>
  157. <term>DRIVER_USE_AGP</term>
  158. <listitem><para>
  159. Driver uses AGP interface
  160. </para></listitem>
  161. </varlistentry>
  162. <varlistentry>
  163. <term>DRIVER_REQUIRE_AGP</term>
  164. <listitem><para>
  165. Driver needs AGP interface to function.
  166. </para></listitem>
  167. </varlistentry>
  168. <varlistentry>
  169. <term>DRIVER_USE_MTRR</term>
  170. <listitem>
  171. <para>
  172. Driver uses MTRR interface for mapping memory. Deprecated.
  173. </para>
  174. </listitem>
  175. </varlistentry>
  176. <varlistentry>
  177. <term>DRIVER_PCI_DMA</term>
  178. <listitem><para>
  179. Driver is capable of PCI DMA. Deprecated.
  180. </para></listitem>
  181. </varlistentry>
  182. <varlistentry>
  183. <term>DRIVER_SG</term>
  184. <listitem><para>
  185. Driver can perform scatter/gather DMA. Deprecated.
  186. </para></listitem>
  187. </varlistentry>
  188. <varlistentry>
  189. <term>DRIVER_HAVE_DMA</term>
  190. <listitem><para>Driver supports DMA. Deprecated.</para></listitem>
  191. </varlistentry>
  192. <varlistentry>
  193. <term>DRIVER_HAVE_IRQ</term><term>DRIVER_IRQ_SHARED</term>
  194. <listitem>
  195. <para>
  196. DRIVER_HAVE_IRQ indicates whether the driver has an IRQ
  197. handler. DRIVER_IRQ_SHARED indicates whether the device &amp;
  198. handler support shared IRQs (note that this is required of
  199. PCI drivers).
  200. </para>
  201. </listitem>
  202. </varlistentry>
  203. <varlistentry>
  204. <term>DRIVER_DMA_QUEUE</term>
  205. <listitem>
  206. <para>
  207. Should be set if the driver queues DMA requests and completes them
  208. asynchronously. Deprecated.
  209. </para>
  210. </listitem>
  211. </varlistentry>
  212. <varlistentry>
  213. <term>DRIVER_FB_DMA</term>
  214. <listitem>
  215. <para>
  216. Driver supports DMA to/from the framebuffer. Deprecated.
  217. </para>
  218. </listitem>
  219. </varlistentry>
  220. <varlistentry>
  221. <term>DRIVER_MODESET</term>
  222. <listitem>
  223. <para>
  224. Driver supports mode setting interfaces.
  225. </para>
  226. </listitem>
  227. </varlistentry>
  228. </variablelist>
  229. <para>
  230. In this specific case, the driver requires AGP and supports
  231. IRQs. DMA, as discussed later, is handled by device-specific ioctls
  232. in this case. It also supports the kernel mode setting APIs, though
  233. unlike in the actual i915 driver source, this example unconditionally
  234. exports KMS capability.
  235. </para>
  236. </sect1>
  237. <!-- Internals: driver load -->
  238. <sect1>
  239. <title>Driver load</title>
  240. <para>
  241. In the previous section, we saw what a typical drm_driver
  242. structure might look like. One of the more important fields in
  243. the structure is the hook for the load function.
  244. </para>
  245. <programlisting>
  246. static struct drm_driver driver = {
  247. ...
  248. .load = i915_driver_load,
  249. ...
  250. };
  251. </programlisting>
  252. <para>
  253. The load function has many responsibilities: allocating a driver
  254. private structure, specifying supported performance counters,
  255. configuring the device (e.g. mapping registers &amp; command
  256. buffers), initializing the memory manager, and setting up the
  257. initial output configuration.
  258. </para>
  259. <para>
  260. If compatibility is a concern (e.g. with drivers converted over
  261. to the new interfaces from the old ones), care must be taken to
  262. prevent device initialization and control that is incompatible with
  263. currently active userspace drivers. For instance, if user
  264. level mode setting drivers are in use, it would be problematic
  265. to perform output discovery &amp; configuration at load time.
  266. Likewise, if user-level drivers unaware of memory management are
  267. in use, memory management and command buffer setup may need to
  268. be omitted. These requirements are driver-specific, and care
  269. needs to be taken to keep both old and new applications and
  270. libraries working. The i915 driver supports the "modeset"
  271. module parameter to control whether advanced features are
  272. enabled at load time or in legacy fashion.
  273. </para>
  274. <sect2>
  275. <title>Driver private &amp; performance counters</title>
  276. <para>
  277. The driver private hangs off the main drm_device structure and
  278. can be used for tracking various device-specific bits of
  279. information, like register offsets, command buffer status,
  280. register state for suspend/resume, etc. At load time, a
  281. driver may simply allocate one and set drm_device.dev_priv
  282. appropriately; it should be freed and drm_device.dev_priv set
  283. to NULL when the driver is unloaded.
  284. </para>
  285. <para>
  286. The DRM supports several counters which may be used for rough
  287. performance characterization. Note that the DRM stat counter
  288. system is not often used by applications, and supporting
  289. additional counters is completely optional.
  290. </para>
  291. <para>
  292. These interfaces are deprecated and should not be used. If performance
  293. monitoring is desired, the developer should investigate and
  294. potentially enhance the kernel perf and tracing infrastructure to export
  295. GPU related performance information for consumption by performance
  296. monitoring tools and applications.
  297. </para>
  298. </sect2>
  299. <sect2>
  300. <title>Configuring the device</title>
  301. <para>
  302. Obviously, device configuration is device-specific.
  303. However, there are several common operations: finding a
  304. device's PCI resources, mapping them, and potentially setting
  305. up an IRQ handler.
  306. </para>
  307. <para>
  308. Finding &amp; mapping resources is fairly straightforward. The
  309. DRM wrapper functions, drm_get_resource_start() and
  310. drm_get_resource_len(), may be used to find BARs on the given
  311. drm_device struct. Once those values have been retrieved, the
  312. driver load function can call drm_addmap() to create a new
  313. mapping for the BAR in question. Note that you probably want a
  314. drm_local_map_t in your driver private structure to track any
  315. mappings you create.
  316. <!-- !Fdrivers/gpu/drm/drm_bufs.c drm_get_resource_* -->
  317. <!-- !Finclude/drm/drmP.h drm_local_map_t -->
  318. </para>
  319. <para>
  320. if compatibility with other operating systems isn't a concern
  321. (DRM drivers can run under various BSD variants and OpenSolaris),
  322. native Linux calls may be used for the above, e.g. pci_resource_*
  323. and iomap*/iounmap. See the Linux device driver book for more
  324. info.
  325. </para>
  326. <para>
  327. Once you have a register map, you may use the DRM_READn() and
  328. DRM_WRITEn() macros to access the registers on your device, or
  329. use driver-specific versions to offset into your MMIO space
  330. relative to a driver-specific base pointer (see I915_READ for
  331. an example).
  332. </para>
  333. <para>
  334. If your device supports interrupt generation, you may want to
  335. set up an interrupt handler when the driver is loaded. This
  336. is done using the drm_irq_install() function. If your device
  337. supports vertical blank interrupts, it should call
  338. drm_vblank_init() to initialize the core vblank handling code before
  339. enabling interrupts on your device. This ensures the vblank related
  340. structures are allocated and allows the core to handle vblank events.
  341. </para>
  342. <!--!Fdrivers/char/drm/drm_irq.c drm_irq_install-->
  343. <para>
  344. Once your interrupt handler is registered (it uses your
  345. drm_driver.irq_handler as the actual interrupt handling
  346. function), you can safely enable interrupts on your device,
  347. assuming any other state your interrupt handler uses is also
  348. initialized.
  349. </para>
  350. <para>
  351. Another task that may be necessary during configuration is
  352. mapping the video BIOS. On many devices, the VBIOS describes
  353. device configuration, LCD panel timings (if any), and contains
  354. flags indicating device state. Mapping the BIOS can be done
  355. using the pci_map_rom() call, a convenience function that
  356. takes care of mapping the actual ROM, whether it has been
  357. shadowed into memory (typically at address 0xc0000) or exists
  358. on the PCI device in the ROM BAR. Note that after the ROM
  359. has been mapped and any necessary information has been extracted,
  360. it should be unmapped; on many devices, the ROM address decoder is
  361. shared with other BARs, so leaving it mapped could cause
  362. undesired behavior like hangs or memory corruption.
  363. <!--!Fdrivers/pci/rom.c pci_map_rom-->
  364. </para>
  365. </sect2>
  366. <sect2>
  367. <title>Memory manager initialization</title>
  368. <para>
  369. In order to allocate command buffers, cursor memory, scanout
  370. buffers, etc., as well as support the latest features provided
  371. by packages like Mesa and the X.Org X server, your driver
  372. should support a memory manager.
  373. </para>
  374. <para>
  375. If your driver supports memory management (it should!), you
  376. need to set that up at load time as well. How you initialize
  377. it depends on which memory manager you're using: TTM or GEM.
  378. </para>
  379. <sect3>
  380. <title>TTM initialization</title>
  381. <para>
  382. TTM (for Translation Table Manager) manages video memory and
  383. aperture space for graphics devices. TTM supports both UMA devices
  384. and devices with dedicated video RAM (VRAM), i.e. most discrete
  385. graphics devices. If your device has dedicated RAM, supporting
  386. TTM is desirable. TTM also integrates tightly with your
  387. driver-specific buffer execution function. See the radeon
  388. driver for examples.
  389. </para>
  390. <para>
  391. The core TTM structure is the ttm_bo_driver struct. It contains
  392. several fields with function pointers for initializing the TTM,
  393. allocating and freeing memory, waiting for command completion
  394. and fence synchronization, and memory migration. See the
  395. radeon_ttm.c file for an example of usage.
  396. </para>
  397. <para>
  398. The ttm_global_reference structure is made up of several fields:
  399. </para>
  400. <programlisting>
  401. struct ttm_global_reference {
  402. enum ttm_global_types global_type;
  403. size_t size;
  404. void *object;
  405. int (*init) (struct ttm_global_reference *);
  406. void (*release) (struct ttm_global_reference *);
  407. };
  408. </programlisting>
  409. <para>
  410. There should be one global reference structure for your memory
  411. manager as a whole, and there will be others for each object
  412. created by the memory manager at runtime. Your global TTM should
  413. have a type of TTM_GLOBAL_TTM_MEM. The size field for the global
  414. object should be sizeof(struct ttm_mem_global), and the init and
  415. release hooks should point at your driver-specific init and
  416. release routines, which probably eventually call
  417. ttm_mem_global_init and ttm_mem_global_release, respectively.
  418. </para>
  419. <para>
  420. Once your global TTM accounting structure is set up and initialized
  421. by calling ttm_global_item_ref() on it,
  422. you need to create a buffer object TTM to
  423. provide a pool for buffer object allocation by clients and the
  424. kernel itself. The type of this object should be TTM_GLOBAL_TTM_BO,
  425. and its size should be sizeof(struct ttm_bo_global). Again,
  426. driver-specific init and release functions may be provided,
  427. likely eventually calling ttm_bo_global_init() and
  428. ttm_bo_global_release(), respectively. Also, like the previous
  429. object, ttm_global_item_ref() is used to create an initial reference
  430. count for the TTM, which will call your initialization function.
  431. </para>
  432. </sect3>
  433. <sect3>
  434. <title>GEM initialization</title>
  435. <para>
  436. GEM is an alternative to TTM, designed specifically for UMA
  437. devices. It has simpler initialization and execution requirements
  438. than TTM, but has no VRAM management capability. Core GEM
  439. is initialized by calling drm_mm_init() to create
  440. a GTT DRM MM object, which provides an address space pool for
  441. object allocation. In a KMS configuration, the driver
  442. needs to allocate and initialize a command ring buffer following
  443. core GEM initialization. A UMA device usually has what is called a
  444. "stolen" memory region, which provides space for the initial
  445. framebuffer and large, contiguous memory regions required by the
  446. device. This space is not typically managed by GEM, and it must
  447. be initialized separately into its own DRM MM object.
  448. </para>
  449. <para>
  450. Initialization is driver-specific. In the case of Intel
  451. integrated graphics chips like 965GM, GEM initialization can
  452. be done by calling the internal GEM init function,
  453. i915_gem_do_init(). Since the 965GM is a UMA device
  454. (i.e. it doesn't have dedicated VRAM), GEM manages
  455. making regular RAM available for GPU operations. Memory set
  456. aside by the BIOS (called "stolen" memory by the i915
  457. driver) is managed by the DRM memrange allocator; the
  458. rest of the aperture is managed by GEM.
  459. <programlisting>
  460. /* Basic memrange allocator for stolen space (aka vram) */
  461. drm_memrange_init(&amp;dev_priv->vram, 0, prealloc_size);
  462. /* Let GEM Manage from end of prealloc space to end of aperture */
  463. i915_gem_do_init(dev, prealloc_size, agp_size);
  464. </programlisting>
  465. <!--!Edrivers/char/drm/drm_memrange.c-->
  466. </para>
  467. <para>
  468. Once the memory manager has been set up, we may allocate the
  469. command buffer. In the i915 case, this is also done with a
  470. GEM function, i915_gem_init_ringbuffer().
  471. </para>
  472. </sect3>
  473. </sect2>
  474. <sect2>
  475. <title>Output configuration</title>
  476. <para>
  477. The final initialization task is output configuration. This involves:
  478. <itemizedlist>
  479. <listitem>
  480. Finding and initializing the CRTCs, encoders, and connectors
  481. for the device.
  482. </listitem>
  483. <listitem>
  484. Creating an initial configuration.
  485. </listitem>
  486. <listitem>
  487. Registering a framebuffer console driver.
  488. </listitem>
  489. </itemizedlist>
  490. </para>
  491. <sect3>
  492. <title>Output discovery and initialization</title>
  493. <para>
  494. Several core functions exist to create CRTCs, encoders, and
  495. connectors, namely: drm_crtc_init(), drm_connector_init(), and
  496. drm_encoder_init(), along with several "helper" functions to
  497. perform common tasks.
  498. </para>
  499. <para>
  500. Connectors should be registered with sysfs once they've been
  501. detected and initialized, using the
  502. drm_sysfs_connector_add() function. Likewise, when they're
  503. removed from the system, they should be destroyed with
  504. drm_sysfs_connector_remove().
  505. </para>
  506. <programlisting>
  507. <![CDATA[
  508. void intel_crt_init(struct drm_device *dev)
  509. {
  510. struct drm_connector *connector;
  511. struct intel_output *intel_output;
  512. intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
  513. if (!intel_output)
  514. return;
  515. connector = &intel_output->base;
  516. drm_connector_init(dev, &intel_output->base,
  517. &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  518. drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
  519. DRM_MODE_ENCODER_DAC);
  520. drm_mode_connector_attach_encoder(&intel_output->base,
  521. &intel_output->enc);
  522. /* Set up the DDC bus. */
  523. intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
  524. if (!intel_output->ddc_bus) {
  525. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  526. "failed.\n");
  527. return;
  528. }
  529. intel_output->type = INTEL_OUTPUT_ANALOG;
  530. connector->interlace_allowed = 0;
  531. connector->doublescan_allowed = 0;
  532. drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
  533. drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
  534. drm_sysfs_connector_add(connector);
  535. }
  536. ]]>
  537. </programlisting>
  538. <para>
  539. In the example above (again, taken from the i915 driver), a
  540. CRT connector and encoder combination is created. A device-specific
  541. i2c bus is also created for fetching EDID data and
  542. performing monitor detection. Once the process is complete,
  543. the new connector is registered with sysfs to make its
  544. properties available to applications.
  545. </para>
  546. <sect4>
  547. <title>Helper functions and core functions</title>
  548. <para>
  549. Since many PC-class graphics devices have similar display output
  550. designs, the DRM provides a set of helper functions to make
  551. output management easier. The core helper routines handle
  552. encoder re-routing and the disabling of unused functions following
  553. mode setting. Using the helpers is optional, but recommended for
  554. devices with PC-style architectures (i.e. a set of display planes
  555. for feeding pixels to encoders which are in turn routed to
  556. connectors). Devices with more complex requirements needing
  557. finer grained management may opt to use the core callbacks
  558. directly.
  559. </para>
  560. <para>
  561. [Insert typical diagram here.] [Insert OMAP style config here.]
  562. </para>
  563. </sect4>
  564. <para>
  565. Each encoder object needs to provide:
  566. <itemizedlist>
  567. <listitem>
  568. A DPMS (basically on/off) function.
  569. </listitem>
  570. <listitem>
  571. A mode-fixup function (for converting requested modes into
  572. native hardware timings).
  573. </listitem>
  574. <listitem>
  575. Functions (prepare, set, and commit) for use by the core DRM
  576. helper functions.
  577. </listitem>
  578. </itemizedlist>
  579. Connector helpers need to provide functions (mode-fetch, validity,
  580. and encoder-matching) for returning an ideal encoder for a given
  581. connector. The core connector functions include a DPMS callback,
  582. save/restore routines (deprecated), detection, mode probing,
  583. property handling, and cleanup functions.
  584. </para>
  585. <!--!Edrivers/char/drm/drm_crtc.h-->
  586. <!--!Edrivers/char/drm/drm_crtc.c-->
  587. <!--!Edrivers/char/drm/drm_crtc_helper.c-->
  588. </sect3>
  589. </sect2>
  590. </sect1>
  591. <!-- Internals: vblank handling -->
  592. <sect1>
  593. <title>VBlank event handling</title>
  594. <para>
  595. The DRM core exposes two vertical blank related ioctls:
  596. <variablelist>
  597. <varlistentry>
  598. <term>DRM_IOCTL_WAIT_VBLANK</term>
  599. <listitem>
  600. <para>
  601. This takes a struct drm_wait_vblank structure as its argument,
  602. and it is used to block or request a signal when a specified
  603. vblank event occurs.
  604. </para>
  605. </listitem>
  606. </varlistentry>
  607. <varlistentry>
  608. <term>DRM_IOCTL_MODESET_CTL</term>
  609. <listitem>
  610. <para>
  611. This should be called by application level drivers before and
  612. after mode setting, since on many devices the vertical blank
  613. counter is reset at that time. Internally, the DRM snapshots
  614. the last vblank count when the ioctl is called with the
  615. _DRM_PRE_MODESET command, so that the counter won't go backwards
  616. (which is dealt with when _DRM_POST_MODESET is used).
  617. </para>
  618. </listitem>
  619. </varlistentry>
  620. </variablelist>
  621. <!--!Edrivers/char/drm/drm_irq.c-->
  622. </para>
  623. <para>
  624. To support the functions above, the DRM core provides several
  625. helper functions for tracking vertical blank counters, and
  626. requires drivers to provide several callbacks:
  627. get_vblank_counter(), enable_vblank() and disable_vblank(). The
  628. core uses get_vblank_counter() to keep the counter accurate
  629. across interrupt disable periods. It should return the current
  630. vertical blank event count, which is often tracked in a device
  631. register. The enable and disable vblank callbacks should enable
  632. and disable vertical blank interrupts, respectively. In the
  633. absence of DRM clients waiting on vblank events, the core DRM
  634. code uses the disable_vblank() function to disable
  635. interrupts, which saves power. They are re-enabled again when
  636. a client calls the vblank wait ioctl above.
  637. </para>
  638. <para>
  639. A device that doesn't provide a count register may simply use an
  640. internal atomic counter incremented on every vertical blank
  641. interrupt (and then treat the enable_vblank() and disable_vblank()
  642. callbacks as no-ops).
  643. </para>
  644. </sect1>
  645. <sect1>
  646. <title>Memory management</title>
  647. <para>
  648. The memory manager lies at the heart of many DRM operations; it
  649. is required to support advanced client features like OpenGL
  650. pbuffers. The DRM currently contains two memory managers: TTM
  651. and GEM.
  652. </para>
  653. <sect2>
  654. <title>The Translation Table Manager (TTM)</title>
  655. <para>
  656. TTM was developed by Tungsten Graphics, primarily by Thomas
  657. Hellström, and is intended to be a flexible, high performance
  658. graphics memory manager.
  659. </para>
  660. <para>
  661. Drivers wishing to support TTM must fill out a drm_bo_driver
  662. structure.
  663. </para>
  664. <para>
  665. TTM design background and information belongs here.
  666. </para>
  667. </sect2>
  668. <sect2>
  669. <title>The Graphics Execution Manager (GEM)</title>
  670. <para>
  671. GEM is an Intel project, authored by Eric Anholt and Keith
  672. Packard. It provides simpler interfaces than TTM, and is well
  673. suited for UMA devices.
  674. </para>
  675. <para>
  676. GEM-enabled drivers must provide gem_init_object() and
  677. gem_free_object() callbacks to support the core memory
  678. allocation routines. They should also provide several driver-specific
  679. ioctls to support command execution, pinning, buffer
  680. read &amp; write, mapping, and domain ownership transfers.
  681. </para>
  682. <para>
  683. On a fundamental level, GEM involves several operations:
  684. <itemizedlist>
  685. <listitem>Memory allocation and freeing</listitem>
  686. <listitem>Command execution</listitem>
  687. <listitem>Aperture management at command execution time</listitem>
  688. </itemizedlist>
  689. Buffer object allocation is relatively
  690. straightforward and largely provided by Linux's shmem layer, which
  691. provides memory to back each object. When mapped into the GTT
  692. or used in a command buffer, the backing pages for an object are
  693. flushed to memory and marked write combined so as to be coherent
  694. with the GPU. Likewise, if the CPU accesses an object after the GPU
  695. has finished rendering to the object, then the object must be made
  696. coherent with the CPU's view
  697. of memory, usually involving GPU cache flushing of various kinds.
  698. This core CPU&lt;-&gt;GPU coherency management is provided by a
  699. device-specific ioctl, which evaluates an object's current domain and
  700. performs any necessary flushing or synchronization to put the object
  701. into the desired coherency domain (note that the object may be busy,
  702. i.e. an active render target; in that case, setting the domain
  703. blocks the client and waits for rendering to complete before
  704. performing any necessary flushing operations).
  705. </para>
  706. <para>
  707. Perhaps the most important GEM function is providing a command
  708. execution interface to clients. Client programs construct command
  709. buffers containing references to previously allocated memory objects,
  710. and then submit them to GEM. At that point, GEM takes care to bind
  711. all the objects into the GTT, execute the buffer, and provide
  712. necessary synchronization between clients accessing the same buffers.
  713. This often involves evicting some objects from the GTT and re-binding
  714. others (a fairly expensive operation), and providing relocation
  715. support which hides fixed GTT offsets from clients. Clients must
  716. take care not to submit command buffers that reference more objects
  717. than can fit in the GTT; otherwise, GEM will reject them and no rendering
  718. will occur. Similarly, if several objects in the buffer require
  719. fence registers to be allocated for correct rendering (e.g. 2D blits
  720. on pre-965 chips), care must be taken not to require more fence
  721. registers than are available to the client. Such resource management
  722. should be abstracted from the client in libdrm.
  723. </para>
  724. </sect2>
  725. </sect1>
  726. <!-- Output management -->
  727. <sect1>
  728. <title>Output management</title>
  729. <para>
  730. At the core of the DRM output management code is a set of
  731. structures representing CRTCs, encoders, and connectors.
  732. </para>
  733. <para>
  734. A CRTC is an abstraction representing a part of the chip that
  735. contains a pointer to a scanout buffer. Therefore, the number
  736. of CRTCs available determines how many independent scanout
  737. buffers can be active at any given time. The CRTC structure
  738. contains several fields to support this: a pointer to some video
  739. memory, a display mode, and an (x, y) offset into the video
  740. memory to support panning or configurations where one piece of
  741. video memory spans multiple CRTCs.
  742. </para>
  743. <para>
  744. An encoder takes pixel data from a CRTC and converts it to a
  745. format suitable for any attached connectors. On some devices,
  746. it may be possible to have a CRTC send data to more than one
  747. encoder. In that case, both encoders would receive data from
  748. the same scanout buffer, resulting in a "cloned" display
  749. configuration across the connectors attached to each encoder.
  750. </para>
  751. <para>
  752. A connector is the final destination for pixel data on a device,
  753. and usually connects directly to an external display device like
  754. a monitor or laptop panel. A connector can only be attached to
  755. one encoder at a time. The connector is also the structure
  756. where information about the attached display is kept, so it
  757. contains fields for display data, EDID data, DPMS &amp;
  758. connection status, and information about modes supported on the
  759. attached displays.
  760. </para>
  761. <!--!Edrivers/char/drm/drm_crtc.c-->
  762. </sect1>
  763. <sect1>
  764. <title>Framebuffer management</title>
  765. <para>
  766. Clients need to provide a framebuffer object which provides a source
  767. of pixels for a CRTC to deliver to the encoder(s) and ultimately the
  768. connector(s). A framebuffer is fundamentally a driver-specific memory
  769. object, made into an opaque handle by the DRM's addfb() function.
  770. Once a framebuffer has been created this way, it may be passed to the
  771. KMS mode setting routines for use in a completed configuration.
  772. </para>
  773. </sect1>
  774. <sect1>
  775. <title>Command submission &amp; fencing</title>
  776. <para>
  777. This should cover a few device-specific command submission
  778. implementations.
  779. </para>
  780. </sect1>
  781. <sect1>
  782. <title>Suspend/resume</title>
  783. <para>
  784. The DRM core provides some suspend/resume code, but drivers
  785. wanting full suspend/resume support should provide save() and
  786. restore() functions. These are called at suspend,
  787. hibernate, or resume time, and should perform any state save or
  788. restore required by your device across suspend or hibernate
  789. states.
  790. </para>
  791. </sect1>
  792. <sect1>
  793. <title>DMA services</title>
  794. <para>
  795. This should cover how DMA mapping etc. is supported by the core.
  796. These functions are deprecated and should not be used.
  797. </para>
  798. </sect1>
  799. </chapter>
  800. <!-- External interfaces -->
  801. <chapter id="drmExternals">
  802. <title>Userland interfaces</title>
  803. <para>
  804. The DRM core exports several interfaces to applications,
  805. generally intended to be used through corresponding libdrm
  806. wrapper functions. In addition, drivers export device-specific
  807. interfaces for use by userspace drivers &amp; device-aware
  808. applications through ioctls and sysfs files.
  809. </para>
  810. <para>
  811. External interfaces include: memory mapping, context management,
  812. DMA operations, AGP management, vblank control, fence
  813. management, memory management, and output management.
  814. </para>
  815. <para>
  816. Cover generic ioctls and sysfs layout here. We only need high-level
  817. info, since man pages should cover the rest.
  818. </para>
  819. </chapter>
  820. <!-- API reference -->
  821. <appendix id="drmDriverApi">
  822. <title>DRM Driver API</title>
  823. <para>
  824. Include auto-generated API reference here (need to reference it
  825. from paragraphs above too).
  826. </para>
  827. </appendix>
  828. </book>