davinci-pcm.c 25 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <asm/dma.h>
  23. #include <mach/edma.h>
  24. #include <mach/sram.h>
  25. #include "davinci-pcm.h"
  26. #ifdef DEBUG
  27. static void print_buf_info(int slot, char *name)
  28. {
  29. struct edmacc_param p;
  30. if (slot < 0)
  31. return;
  32. edma_read_slot(slot, &p);
  33. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  34. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  35. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  36. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  37. }
  38. #else
  39. static void print_buf_info(int slot, char *name)
  40. {
  41. }
  42. #endif
  43. #define DAVINCI_PCM_FMTBITS (\
  44. SNDRV_PCM_FMTBIT_S8 |\
  45. SNDRV_PCM_FMTBIT_U8 |\
  46. SNDRV_PCM_FMTBIT_S16_LE |\
  47. SNDRV_PCM_FMTBIT_S16_BE |\
  48. SNDRV_PCM_FMTBIT_U16_LE |\
  49. SNDRV_PCM_FMTBIT_U16_BE |\
  50. SNDRV_PCM_FMTBIT_S24_LE |\
  51. SNDRV_PCM_FMTBIT_S24_BE |\
  52. SNDRV_PCM_FMTBIT_U24_LE |\
  53. SNDRV_PCM_FMTBIT_U24_BE |\
  54. SNDRV_PCM_FMTBIT_S32_LE |\
  55. SNDRV_PCM_FMTBIT_S32_BE |\
  56. SNDRV_PCM_FMTBIT_U32_LE |\
  57. SNDRV_PCM_FMTBIT_U32_BE)
  58. static struct snd_pcm_hardware pcm_hardware_playback = {
  59. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  60. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  61. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME|
  62. SNDRV_PCM_INFO_BATCH),
  63. .formats = DAVINCI_PCM_FMTBITS,
  64. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  65. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
  66. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  67. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
  68. SNDRV_PCM_RATE_KNOT),
  69. .rate_min = 8000,
  70. .rate_max = 96000,
  71. .channels_min = 2,
  72. .channels_max = 384,
  73. .buffer_bytes_max = 128 * 1024,
  74. .period_bytes_min = 32,
  75. .period_bytes_max = 8 * 1024,
  76. .periods_min = 16,
  77. .periods_max = 255,
  78. .fifo_size = 0,
  79. };
  80. static struct snd_pcm_hardware pcm_hardware_capture = {
  81. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  82. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  83. SNDRV_PCM_INFO_PAUSE |
  84. SNDRV_PCM_INFO_BATCH),
  85. .formats = DAVINCI_PCM_FMTBITS,
  86. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  87. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
  88. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  89. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
  90. SNDRV_PCM_RATE_KNOT),
  91. .rate_min = 8000,
  92. .rate_max = 96000,
  93. .channels_min = 2,
  94. .channels_max = 384,
  95. .buffer_bytes_max = 128 * 1024,
  96. .period_bytes_min = 32,
  97. .period_bytes_max = 8 * 1024,
  98. .periods_min = 16,
  99. .periods_max = 255,
  100. .fifo_size = 0,
  101. };
  102. /*
  103. * How ping/pong works....
  104. *
  105. * Playback:
  106. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  107. * links to ram_link2
  108. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  109. * links to ram_link
  110. * ram_link - copys entire SDRAM to iram in ping_size uints,
  111. * links to self
  112. *
  113. * asp_params - same as asp_link[0]
  114. * asp_link[0] - copys from lower half of iram to asp port
  115. * links to asp_link[1], triggers iram copy event on completion
  116. * asp_link[1] - copys from upper half of iram to asp port
  117. * links to asp_link[0], triggers iram copy event on completion
  118. * triggers interrupt only needed to let upper SOC levels update position
  119. * in stream on completion
  120. *
  121. * When playback is started:
  122. * ram_params started
  123. * asp_params started
  124. *
  125. * Capture:
  126. * ram_params - same as ram_link,
  127. * links to ram_link
  128. * ram_link - same as playback
  129. * links to self
  130. *
  131. * asp_params - same as playback
  132. * asp_link[0] - same as playback
  133. * asp_link[1] - same as playback
  134. *
  135. * When capture is started:
  136. * asp_params started
  137. */
  138. struct davinci_runtime_data {
  139. spinlock_t lock;
  140. int period; /* current DMA period */
  141. int asp_channel; /* Master DMA channel */
  142. int asp_link[2]; /* asp parameter link channel, ping/pong */
  143. struct davinci_pcm_dma_params *params; /* DMA params */
  144. int ram_channel;
  145. int ram_link;
  146. int ram_link2;
  147. struct edmacc_param asp_params;
  148. struct edmacc_param ram_params;
  149. };
  150. static void davinci_pcm_period_elapsed(struct snd_pcm_substream *substream)
  151. {
  152. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  153. struct snd_pcm_runtime *runtime = substream->runtime;
  154. prtd->period++;
  155. if (unlikely(prtd->period >= runtime->periods))
  156. prtd->period = 0;
  157. }
  158. static void davinci_pcm_period_reset(struct snd_pcm_substream *substream)
  159. {
  160. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  161. prtd->period = 0;
  162. }
  163. /*
  164. * Not used with ping/pong
  165. */
  166. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  167. {
  168. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  169. struct snd_pcm_runtime *runtime = substream->runtime;
  170. unsigned int period_size;
  171. unsigned int dma_offset;
  172. dma_addr_t dma_pos;
  173. dma_addr_t src, dst;
  174. unsigned short src_bidx, dst_bidx;
  175. unsigned short src_cidx, dst_cidx;
  176. unsigned int data_type;
  177. unsigned short acnt;
  178. unsigned int count;
  179. unsigned int fifo_level;
  180. period_size = snd_pcm_lib_period_bytes(substream);
  181. dma_offset = prtd->period * period_size;
  182. dma_pos = runtime->dma_addr + dma_offset;
  183. fifo_level = prtd->params->fifo_level;
  184. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  185. "dma_ptr = %x period_size=%x\n", prtd->asp_link[0], dma_pos,
  186. period_size);
  187. data_type = prtd->params->data_type;
  188. count = period_size / data_type;
  189. if (fifo_level)
  190. count /= fifo_level;
  191. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  192. src = dma_pos;
  193. dst = prtd->params->dma_addr;
  194. src_bidx = data_type;
  195. dst_bidx = 0;
  196. src_cidx = data_type * fifo_level;
  197. dst_cidx = 0;
  198. } else {
  199. src = prtd->params->dma_addr;
  200. dst = dma_pos;
  201. src_bidx = 0;
  202. dst_bidx = data_type;
  203. src_cidx = 0;
  204. dst_cidx = data_type * fifo_level;
  205. }
  206. acnt = prtd->params->acnt;
  207. edma_set_src(prtd->asp_link[0], src, INCR, W8BIT);
  208. edma_set_dest(prtd->asp_link[0], dst, INCR, W8BIT);
  209. edma_set_src_index(prtd->asp_link[0], src_bidx, src_cidx);
  210. edma_set_dest_index(prtd->asp_link[0], dst_bidx, dst_cidx);
  211. if (!fifo_level)
  212. edma_set_transfer_params(prtd->asp_link[0], acnt, count, 1, 0,
  213. ASYNC);
  214. else
  215. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  216. count, fifo_level,
  217. ABSYNC);
  218. }
  219. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  220. {
  221. struct snd_pcm_substream *substream = data;
  222. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  223. print_buf_info(prtd->ram_channel, "i ram_channel");
  224. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  225. if (unlikely(ch_status != DMA_COMPLETE))
  226. return;
  227. if (snd_pcm_running(substream)) {
  228. spin_lock(&prtd->lock);
  229. if (prtd->ram_channel < 0) {
  230. /* No ping/pong must fix up link dma data*/
  231. davinci_pcm_enqueue_dma(substream);
  232. }
  233. davinci_pcm_period_elapsed(substream);
  234. spin_unlock(&prtd->lock);
  235. snd_pcm_period_elapsed(substream);
  236. }
  237. }
  238. static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
  239. struct snd_pcm_hardware *ppcm)
  240. {
  241. struct snd_dma_buffer *buf = &substream->dma_buffer;
  242. struct snd_dma_buffer *iram_dma = NULL;
  243. dma_addr_t iram_phys = 0;
  244. void *iram_virt = NULL;
  245. if (buf->private_data || !size)
  246. return 0;
  247. ppcm->period_bytes_max = size;
  248. iram_virt = sram_alloc(size, &iram_phys);
  249. if (!iram_virt)
  250. goto exit1;
  251. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  252. if (!iram_dma)
  253. goto exit2;
  254. iram_dma->area = iram_virt;
  255. iram_dma->addr = iram_phys;
  256. memset(iram_dma->area, 0, size);
  257. iram_dma->bytes = size;
  258. buf->private_data = iram_dma;
  259. return 0;
  260. exit2:
  261. if (iram_virt)
  262. sram_free(iram_virt, size);
  263. exit1:
  264. return -ENOMEM;
  265. }
  266. /*
  267. * Only used with ping/pong.
  268. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  269. */
  270. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  271. {
  272. unsigned short ram_src_cidx, ram_dst_cidx;
  273. struct snd_pcm_runtime *runtime = substream->runtime;
  274. struct davinci_runtime_data *prtd = runtime->private_data;
  275. struct snd_dma_buffer *iram_dma =
  276. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  277. struct davinci_pcm_dma_params *params = prtd->params;
  278. unsigned int data_type = params->data_type;
  279. unsigned int acnt = params->acnt;
  280. /* divide by 2 for ping/pong */
  281. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  282. unsigned int fifo_level = prtd->params->fifo_level;
  283. unsigned int count;
  284. if ((data_type == 0) || (data_type > 4)) {
  285. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  286. return -EINVAL;
  287. }
  288. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  289. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  290. ram_src_cidx = ping_size;
  291. ram_dst_cidx = -ping_size;
  292. edma_set_src(prtd->asp_link[1], asp_src_pong, INCR, W8BIT);
  293. edma_set_src_index(prtd->asp_link[0], data_type,
  294. data_type * fifo_level);
  295. edma_set_src_index(prtd->asp_link[1], data_type,
  296. data_type * fifo_level);
  297. edma_set_src(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  298. } else {
  299. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  300. ram_src_cidx = -ping_size;
  301. ram_dst_cidx = ping_size;
  302. edma_set_dest(prtd->asp_link[1], asp_dst_pong, INCR, W8BIT);
  303. edma_set_dest_index(prtd->asp_link[0], data_type,
  304. data_type * fifo_level);
  305. edma_set_dest_index(prtd->asp_link[1], data_type,
  306. data_type * fifo_level);
  307. edma_set_dest(prtd->ram_link, runtime->dma_addr, INCR, W32BIT);
  308. }
  309. if (!fifo_level) {
  310. count = ping_size / data_type;
  311. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  312. 1, 0, ASYNC);
  313. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  314. 1, 0, ASYNC);
  315. } else {
  316. count = ping_size / (data_type * fifo_level);
  317. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  318. count, fifo_level, ABSYNC);
  319. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  320. count, fifo_level, ABSYNC);
  321. }
  322. edma_set_src_index(prtd->ram_link, ping_size, ram_src_cidx);
  323. edma_set_dest_index(prtd->ram_link, ping_size, ram_dst_cidx);
  324. edma_set_transfer_params(prtd->ram_link, ping_size, 2,
  325. runtime->periods, 2, ASYNC);
  326. /* init master params */
  327. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  328. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  329. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  330. struct edmacc_param p_ram;
  331. /* Copy entire iram buffer before playback started */
  332. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  333. /* 0 dst_bidx */
  334. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  335. /* 0 dst_cidx */
  336. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  337. prtd->ram_params.ccnt = 1;
  338. /* Skip 1st period */
  339. edma_read_slot(prtd->ram_link, &p_ram);
  340. p_ram.src += (ping_size << 1);
  341. p_ram.ccnt -= 1;
  342. edma_write_slot(prtd->ram_link2, &p_ram);
  343. /*
  344. * When 1st started, ram -> iram dma channel will fill the
  345. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  346. * 1/2 iram will be filled.
  347. */
  348. prtd->ram_params.link_bcntrld =
  349. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  350. }
  351. return 0;
  352. }
  353. /* 1 asp tx or rx channel using 2 parameter channels
  354. * 1 ram to/from iram channel using 1 parameter channel
  355. *
  356. * Playback
  357. * ram copy channel kicks off first,
  358. * 1st ram copy of entire iram buffer completion kicks off asp channel
  359. * asp tcc always kicks off ram copy of 1/2 iram buffer
  360. *
  361. * Record
  362. * asp channel starts, tcc kicks off ram copy
  363. */
  364. static int request_ping_pong(struct snd_pcm_substream *substream,
  365. struct davinci_runtime_data *prtd,
  366. struct snd_dma_buffer *iram_dma)
  367. {
  368. dma_addr_t asp_src_ping;
  369. dma_addr_t asp_dst_ping;
  370. int ret;
  371. struct davinci_pcm_dma_params *params = prtd->params;
  372. /* Request ram master channel */
  373. ret = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  374. davinci_pcm_dma_irq, substream,
  375. prtd->params->ram_chan_q);
  376. if (ret < 0)
  377. goto exit1;
  378. /* Request ram link channel */
  379. ret = prtd->ram_link = edma_alloc_slot(
  380. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  381. if (ret < 0)
  382. goto exit2;
  383. ret = prtd->asp_link[1] = edma_alloc_slot(
  384. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  385. if (ret < 0)
  386. goto exit3;
  387. prtd->ram_link2 = -1;
  388. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  389. ret = prtd->ram_link2 = edma_alloc_slot(
  390. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  391. if (ret < 0)
  392. goto exit4;
  393. }
  394. /* circle ping-pong buffers */
  395. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  396. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  397. /* circle ram buffers */
  398. edma_link(prtd->ram_link, prtd->ram_link);
  399. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  400. asp_src_ping = iram_dma->addr;
  401. asp_dst_ping = params->dma_addr; /* fifo */
  402. } else {
  403. asp_src_ping = params->dma_addr; /* fifo */
  404. asp_dst_ping = iram_dma->addr;
  405. }
  406. /* ping */
  407. edma_set_src(prtd->asp_link[0], asp_src_ping, INCR, W16BIT);
  408. edma_set_dest(prtd->asp_link[0], asp_dst_ping, INCR, W16BIT);
  409. edma_set_src_index(prtd->asp_link[0], 0, 0);
  410. edma_set_dest_index(prtd->asp_link[0], 0, 0);
  411. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  412. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  413. prtd->asp_params.opt |= TCCHEN |
  414. EDMA_TCC(prtd->ram_channel & 0x3f);
  415. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  416. /* pong */
  417. edma_set_src(prtd->asp_link[1], asp_src_ping, INCR, W16BIT);
  418. edma_set_dest(prtd->asp_link[1], asp_dst_ping, INCR, W16BIT);
  419. edma_set_src_index(prtd->asp_link[1], 0, 0);
  420. edma_set_dest_index(prtd->asp_link[1], 0, 0);
  421. edma_read_slot(prtd->asp_link[1], &prtd->asp_params);
  422. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  423. /* interrupt after every pong completion */
  424. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  425. EDMA_TCC(prtd->ram_channel & 0x3f);
  426. edma_write_slot(prtd->asp_link[1], &prtd->asp_params);
  427. /* ram */
  428. edma_set_src(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  429. edma_set_dest(prtd->ram_link, iram_dma->addr, INCR, W32BIT);
  430. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  431. "for asp:%u %u %u\n", __func__,
  432. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  433. prtd->asp_channel, prtd->asp_link[0],
  434. prtd->asp_link[1]);
  435. return 0;
  436. exit4:
  437. edma_free_channel(prtd->asp_link[1]);
  438. prtd->asp_link[1] = -1;
  439. exit3:
  440. edma_free_channel(prtd->ram_link);
  441. prtd->ram_link = -1;
  442. exit2:
  443. edma_free_channel(prtd->ram_channel);
  444. prtd->ram_channel = -1;
  445. exit1:
  446. return ret;
  447. }
  448. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  449. {
  450. struct snd_dma_buffer *iram_dma;
  451. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  452. struct davinci_pcm_dma_params *params = prtd->params;
  453. int ret;
  454. if (!params)
  455. return -ENODEV;
  456. /* Request asp master DMA channel */
  457. ret = prtd->asp_channel = edma_alloc_channel(params->channel,
  458. davinci_pcm_dma_irq, substream,
  459. prtd->params->asp_chan_q);
  460. if (ret < 0)
  461. goto exit1;
  462. /* Request asp link channels */
  463. ret = prtd->asp_link[0] = edma_alloc_slot(
  464. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  465. if (ret < 0)
  466. goto exit2;
  467. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  468. if (iram_dma) {
  469. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  470. return 0;
  471. printk(KERN_WARNING "%s: dma channel allocation failed,"
  472. "not using sram\n", __func__);
  473. }
  474. /* Issue transfer completion IRQ when the channel completes a
  475. * transfer, then always reload from the same slot (by a kind
  476. * of loopback link). The completion IRQ handler will update
  477. * the reload slot with a new buffer.
  478. *
  479. * REVISIT save p_ram here after setting up everything except
  480. * the buffer and its length (ccnt) ... use it as a template
  481. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  482. */
  483. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  484. prtd->asp_params.opt |= TCINTEN |
  485. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  486. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(prtd->asp_link[0]) << 5;
  487. edma_write_slot(prtd->asp_link[0], &prtd->asp_params);
  488. return 0;
  489. exit2:
  490. edma_free_channel(prtd->asp_channel);
  491. prtd->asp_channel = -1;
  492. exit1:
  493. return ret;
  494. }
  495. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  496. {
  497. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  498. int ret = 0;
  499. spin_lock(&prtd->lock);
  500. switch (cmd) {
  501. case SNDRV_PCM_TRIGGER_START:
  502. edma_start(prtd->asp_channel);
  503. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
  504. prtd->ram_channel >= 0) {
  505. /* copy 1st iram buffer */
  506. edma_start(prtd->ram_channel);
  507. }
  508. break;
  509. case SNDRV_PCM_TRIGGER_RESUME:
  510. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  511. edma_resume(prtd->asp_channel);
  512. break;
  513. case SNDRV_PCM_TRIGGER_STOP:
  514. case SNDRV_PCM_TRIGGER_SUSPEND:
  515. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  516. edma_pause(prtd->asp_channel);
  517. break;
  518. default:
  519. ret = -EINVAL;
  520. break;
  521. }
  522. spin_unlock(&prtd->lock);
  523. return ret;
  524. }
  525. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  526. {
  527. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  528. davinci_pcm_period_reset(substream);
  529. if (prtd->ram_channel >= 0) {
  530. int ret = ping_pong_dma_setup(substream);
  531. if (ret < 0)
  532. return ret;
  533. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  534. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  535. print_buf_info(prtd->ram_channel, "ram_channel");
  536. print_buf_info(prtd->ram_link, "ram_link");
  537. print_buf_info(prtd->ram_link2, "ram_link2");
  538. print_buf_info(prtd->asp_channel, "asp_channel");
  539. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  540. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  541. /*
  542. * There is a phase offset of 2 periods between the position
  543. * used by dma setup and the position reported in the pointer
  544. * function.
  545. *
  546. * The phase offset, when not using ping-pong buffers, is due to
  547. * the two consecutive calls to davinci_pcm_enqueue_dma() below.
  548. *
  549. * Whereas here, with ping-pong buffers, the phase is due to
  550. * there being an entire buffer transfer complete before the
  551. * first dma completion event triggers davinci_pcm_dma_irq().
  552. */
  553. davinci_pcm_period_elapsed(substream);
  554. davinci_pcm_period_elapsed(substream);
  555. return 0;
  556. }
  557. davinci_pcm_enqueue_dma(substream);
  558. davinci_pcm_period_elapsed(substream);
  559. /* Copy self-linked parameter RAM entry into master channel */
  560. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  561. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  562. davinci_pcm_enqueue_dma(substream);
  563. davinci_pcm_period_elapsed(substream);
  564. return 0;
  565. }
  566. static snd_pcm_uframes_t
  567. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  568. {
  569. struct snd_pcm_runtime *runtime = substream->runtime;
  570. struct davinci_runtime_data *prtd = runtime->private_data;
  571. unsigned int offset;
  572. int asp_count;
  573. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  574. /*
  575. * There is a phase offset of 2 periods between the position used by dma
  576. * setup and the position reported in the pointer function. Either +2 in
  577. * the dma setup or -2 here in the pointer function (with wrapping,
  578. * both) accounts for this offset -- choose the latter since it makes
  579. * the first-time setup clearer.
  580. */
  581. spin_lock(&prtd->lock);
  582. asp_count = prtd->period - 2;
  583. spin_unlock(&prtd->lock);
  584. if (asp_count < 0)
  585. asp_count += runtime->periods;
  586. asp_count *= period_size;
  587. offset = bytes_to_frames(runtime, asp_count);
  588. if (offset >= runtime->buffer_size)
  589. offset = 0;
  590. return offset;
  591. }
  592. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  593. {
  594. struct snd_pcm_runtime *runtime = substream->runtime;
  595. struct davinci_runtime_data *prtd;
  596. struct snd_pcm_hardware *ppcm;
  597. int ret = 0;
  598. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  599. struct davinci_pcm_dma_params *pa;
  600. struct davinci_pcm_dma_params *params;
  601. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  602. if (!pa)
  603. return -ENODEV;
  604. params = &pa[substream->stream];
  605. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  606. &pcm_hardware_playback : &pcm_hardware_capture;
  607. allocate_sram(substream, params->sram_size, ppcm);
  608. snd_soc_set_runtime_hwparams(substream, ppcm);
  609. /* ensure that buffer size is a multiple of period size */
  610. ret = snd_pcm_hw_constraint_integer(runtime,
  611. SNDRV_PCM_HW_PARAM_PERIODS);
  612. if (ret < 0)
  613. return ret;
  614. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  615. if (prtd == NULL)
  616. return -ENOMEM;
  617. spin_lock_init(&prtd->lock);
  618. prtd->params = params;
  619. prtd->asp_channel = -1;
  620. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  621. prtd->ram_channel = -1;
  622. prtd->ram_link = -1;
  623. prtd->ram_link2 = -1;
  624. runtime->private_data = prtd;
  625. ret = davinci_pcm_dma_request(substream);
  626. if (ret) {
  627. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  628. kfree(prtd);
  629. }
  630. return ret;
  631. }
  632. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  633. {
  634. struct snd_pcm_runtime *runtime = substream->runtime;
  635. struct davinci_runtime_data *prtd = runtime->private_data;
  636. if (prtd->ram_channel >= 0)
  637. edma_stop(prtd->ram_channel);
  638. if (prtd->asp_channel >= 0)
  639. edma_stop(prtd->asp_channel);
  640. if (prtd->asp_link[0] >= 0)
  641. edma_unlink(prtd->asp_link[0]);
  642. if (prtd->asp_link[1] >= 0)
  643. edma_unlink(prtd->asp_link[1]);
  644. if (prtd->ram_link >= 0)
  645. edma_unlink(prtd->ram_link);
  646. if (prtd->asp_link[0] >= 0)
  647. edma_free_slot(prtd->asp_link[0]);
  648. if (prtd->asp_link[1] >= 0)
  649. edma_free_slot(prtd->asp_link[1]);
  650. if (prtd->asp_channel >= 0)
  651. edma_free_channel(prtd->asp_channel);
  652. if (prtd->ram_link >= 0)
  653. edma_free_slot(prtd->ram_link);
  654. if (prtd->ram_link2 >= 0)
  655. edma_free_slot(prtd->ram_link2);
  656. if (prtd->ram_channel >= 0)
  657. edma_free_channel(prtd->ram_channel);
  658. kfree(prtd);
  659. return 0;
  660. }
  661. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  662. struct snd_pcm_hw_params *hw_params)
  663. {
  664. return snd_pcm_lib_malloc_pages(substream,
  665. params_buffer_bytes(hw_params));
  666. }
  667. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  668. {
  669. return snd_pcm_lib_free_pages(substream);
  670. }
  671. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  672. struct vm_area_struct *vma)
  673. {
  674. struct snd_pcm_runtime *runtime = substream->runtime;
  675. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  676. runtime->dma_area,
  677. runtime->dma_addr,
  678. runtime->dma_bytes);
  679. }
  680. static struct snd_pcm_ops davinci_pcm_ops = {
  681. .open = davinci_pcm_open,
  682. .close = davinci_pcm_close,
  683. .ioctl = snd_pcm_lib_ioctl,
  684. .hw_params = davinci_pcm_hw_params,
  685. .hw_free = davinci_pcm_hw_free,
  686. .prepare = davinci_pcm_prepare,
  687. .trigger = davinci_pcm_trigger,
  688. .pointer = davinci_pcm_pointer,
  689. .mmap = davinci_pcm_mmap,
  690. };
  691. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  692. size_t size)
  693. {
  694. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  695. struct snd_dma_buffer *buf = &substream->dma_buffer;
  696. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  697. buf->dev.dev = pcm->card->dev;
  698. buf->private_data = NULL;
  699. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  700. &buf->addr, GFP_KERNEL);
  701. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  702. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  703. if (!buf->area)
  704. return -ENOMEM;
  705. buf->bytes = size;
  706. return 0;
  707. }
  708. static void davinci_pcm_free(struct snd_pcm *pcm)
  709. {
  710. struct snd_pcm_substream *substream;
  711. struct snd_dma_buffer *buf;
  712. int stream;
  713. for (stream = 0; stream < 2; stream++) {
  714. struct snd_dma_buffer *iram_dma;
  715. substream = pcm->streams[stream].substream;
  716. if (!substream)
  717. continue;
  718. buf = &substream->dma_buffer;
  719. if (!buf->area)
  720. continue;
  721. dma_free_writecombine(pcm->card->dev, buf->bytes,
  722. buf->area, buf->addr);
  723. buf->area = NULL;
  724. iram_dma = buf->private_data;
  725. if (iram_dma) {
  726. sram_free(iram_dma->area, iram_dma->bytes);
  727. kfree(iram_dma);
  728. }
  729. }
  730. }
  731. static u64 davinci_pcm_dmamask = DMA_BIT_MASK(32);
  732. static int davinci_pcm_new(struct snd_soc_pcm_runtime *rtd)
  733. {
  734. struct snd_card *card = rtd->card->snd_card;
  735. struct snd_pcm *pcm = rtd->pcm;
  736. int ret;
  737. if (!card->dev->dma_mask)
  738. card->dev->dma_mask = &davinci_pcm_dmamask;
  739. if (!card->dev->coherent_dma_mask)
  740. card->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  741. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  742. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  743. SNDRV_PCM_STREAM_PLAYBACK,
  744. pcm_hardware_playback.buffer_bytes_max);
  745. if (ret)
  746. return ret;
  747. }
  748. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  749. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  750. SNDRV_PCM_STREAM_CAPTURE,
  751. pcm_hardware_capture.buffer_bytes_max);
  752. if (ret)
  753. return ret;
  754. }
  755. return 0;
  756. }
  757. static struct snd_soc_platform_driver davinci_soc_platform = {
  758. .ops = &davinci_pcm_ops,
  759. .pcm_new = davinci_pcm_new,
  760. .pcm_free = davinci_pcm_free,
  761. };
  762. static int __devinit davinci_soc_platform_probe(struct platform_device *pdev)
  763. {
  764. return snd_soc_register_platform(&pdev->dev, &davinci_soc_platform);
  765. }
  766. static int __devexit davinci_soc_platform_remove(struct platform_device *pdev)
  767. {
  768. snd_soc_unregister_platform(&pdev->dev);
  769. return 0;
  770. }
  771. static struct platform_driver davinci_pcm_driver = {
  772. .driver = {
  773. .name = "davinci-pcm-audio",
  774. .owner = THIS_MODULE,
  775. },
  776. .probe = davinci_soc_platform_probe,
  777. .remove = __devexit_p(davinci_soc_platform_remove),
  778. };
  779. module_platform_driver(davinci_pcm_driver);
  780. MODULE_AUTHOR("Vladimir Barinov");
  781. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  782. MODULE_LICENSE("GPL");