pm8921-charger.c 126 KB

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  1. /* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. */
  13. #define pr_fmt(fmt) "%s: " fmt, __func__
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/errno.h>
  18. #include <linux/mfd/pm8xxx/pm8921-charger.h>
  19. #include <linux/mfd/pm8xxx/pm8921-bms.h>
  20. #include <linux/mfd/pm8xxx/pm8xxx-adc.h>
  21. #include <linux/mfd/pm8xxx/ccadc.h>
  22. #include <linux/mfd/pm8xxx/core.h>
  23. #include <linux/regulator/consumer.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/delay.h>
  26. #include <linux/bitops.h>
  27. #include <linux/workqueue.h>
  28. #include <linux/debugfs.h>
  29. #include <linux/slab.h>
  30. #include <linux/mfd/pm8xxx/batt-alarm.h>
  31. #include <linux/ratelimit.h>
  32. #include <mach/msm_xo.h>
  33. #include <mach/msm_hsusb.h>
  34. #define CHG_BUCK_CLOCK_CTRL 0x14
  35. #define CHG_BUCK_CLOCK_CTRL_8038 0xD
  36. #define PBL_ACCESS1 0x04
  37. #define PBL_ACCESS2 0x05
  38. #define SYS_CONFIG_1 0x06
  39. #define SYS_CONFIG_2 0x07
  40. #define CHG_CNTRL 0x204
  41. #define CHG_IBAT_MAX 0x205
  42. #define CHG_TEST 0x206
  43. #define CHG_BUCK_CTRL_TEST1 0x207
  44. #define CHG_BUCK_CTRL_TEST2 0x208
  45. #define CHG_BUCK_CTRL_TEST3 0x209
  46. #define COMPARATOR_OVERRIDE 0x20A
  47. #define PSI_TXRX_SAMPLE_DATA_0 0x20B
  48. #define PSI_TXRX_SAMPLE_DATA_1 0x20C
  49. #define PSI_TXRX_SAMPLE_DATA_2 0x20D
  50. #define PSI_TXRX_SAMPLE_DATA_3 0x20E
  51. #define PSI_CONFIG_STATUS 0x20F
  52. #define CHG_IBAT_SAFE 0x210
  53. #define CHG_ITRICKLE 0x211
  54. #define CHG_CNTRL_2 0x212
  55. #define CHG_VBAT_DET 0x213
  56. #define CHG_VTRICKLE 0x214
  57. #define CHG_ITERM 0x215
  58. #define CHG_CNTRL_3 0x216
  59. #define CHG_VIN_MIN 0x217
  60. #define CHG_TWDOG 0x218
  61. #define CHG_TTRKL_MAX 0x219
  62. #define CHG_TEMP_THRESH 0x21A
  63. #define CHG_TCHG_MAX 0x21B
  64. #define USB_OVP_CONTROL 0x21C
  65. #define DC_OVP_CONTROL 0x21D
  66. #define USB_OVP_TEST 0x21E
  67. #define DC_OVP_TEST 0x21F
  68. #define CHG_VDD_MAX 0x220
  69. #define CHG_VDD_SAFE 0x221
  70. #define CHG_VBAT_BOOT_THRESH 0x222
  71. #define USB_OVP_TRIM 0x355
  72. #define BUCK_CONTROL_TRIM1 0x356
  73. #define BUCK_CONTROL_TRIM2 0x357
  74. #define BUCK_CONTROL_TRIM3 0x358
  75. #define BUCK_CONTROL_TRIM4 0x359
  76. #define CHG_DEFAULTS_TRIM 0x35A
  77. #define CHG_ITRIM 0x35B
  78. #define CHG_TTRIM 0x35C
  79. #define CHG_COMP_OVR 0x20A
  80. #define IUSB_FINE_RES 0x2B6
  81. #define OVP_USB_UVD 0x2B7
  82. #define PM8921_USB_TRIM_SEL 0x339
  83. /* check EOC every 10 seconds */
  84. #define EOC_CHECK_PERIOD_MS 10000
  85. /* check for USB unplug every 200 msecs */
  86. #define UNPLUG_CHECK_WAIT_PERIOD_MS 200
  87. #define UNPLUG_CHECK_RAMP_MS 25
  88. #define USB_TRIM_ENTRIES 16
  89. enum chg_fsm_state {
  90. FSM_STATE_OFF_0 = 0,
  91. FSM_STATE_BATFETDET_START_12 = 12,
  92. FSM_STATE_BATFETDET_END_16 = 16,
  93. FSM_STATE_ON_CHG_HIGHI_1 = 1,
  94. FSM_STATE_ATC_2A = 2,
  95. FSM_STATE_ATC_2B = 18,
  96. FSM_STATE_ON_BAT_3 = 3,
  97. FSM_STATE_ATC_FAIL_4 = 4 ,
  98. FSM_STATE_DELAY_5 = 5,
  99. FSM_STATE_ON_CHG_AND_BAT_6 = 6,
  100. FSM_STATE_FAST_CHG_7 = 7,
  101. FSM_STATE_TRKL_CHG_8 = 8,
  102. FSM_STATE_CHG_FAIL_9 = 9,
  103. FSM_STATE_EOC_10 = 10,
  104. FSM_STATE_ON_CHG_VREGOK_11 = 11,
  105. FSM_STATE_ATC_PAUSE_13 = 13,
  106. FSM_STATE_FAST_CHG_PAUSE_14 = 14,
  107. FSM_STATE_TRKL_CHG_PAUSE_15 = 15,
  108. FSM_STATE_START_BOOT = 20,
  109. FSM_STATE_FLCB_VREGOK = 21,
  110. FSM_STATE_FLCB = 22,
  111. };
  112. struct fsm_state_to_batt_status {
  113. enum chg_fsm_state fsm_state;
  114. int batt_state;
  115. };
  116. static struct fsm_state_to_batt_status map[] = {
  117. {FSM_STATE_OFF_0, POWER_SUPPLY_STATUS_UNKNOWN},
  118. {FSM_STATE_BATFETDET_START_12, POWER_SUPPLY_STATUS_UNKNOWN},
  119. {FSM_STATE_BATFETDET_END_16, POWER_SUPPLY_STATUS_UNKNOWN},
  120. /*
  121. * for CHG_HIGHI_1 report NOT_CHARGING if battery missing,
  122. * too hot/cold, charger too hot
  123. */
  124. {FSM_STATE_ON_CHG_HIGHI_1, POWER_SUPPLY_STATUS_FULL},
  125. {FSM_STATE_ATC_2A, POWER_SUPPLY_STATUS_CHARGING},
  126. {FSM_STATE_ATC_2B, POWER_SUPPLY_STATUS_CHARGING},
  127. {FSM_STATE_ON_BAT_3, POWER_SUPPLY_STATUS_DISCHARGING},
  128. {FSM_STATE_ATC_FAIL_4, POWER_SUPPLY_STATUS_DISCHARGING},
  129. {FSM_STATE_DELAY_5, POWER_SUPPLY_STATUS_UNKNOWN },
  130. {FSM_STATE_ON_CHG_AND_BAT_6, POWER_SUPPLY_STATUS_CHARGING},
  131. {FSM_STATE_FAST_CHG_7, POWER_SUPPLY_STATUS_CHARGING},
  132. {FSM_STATE_TRKL_CHG_8, POWER_SUPPLY_STATUS_CHARGING},
  133. {FSM_STATE_CHG_FAIL_9, POWER_SUPPLY_STATUS_DISCHARGING},
  134. {FSM_STATE_EOC_10, POWER_SUPPLY_STATUS_FULL},
  135. {FSM_STATE_ON_CHG_VREGOK_11, POWER_SUPPLY_STATUS_NOT_CHARGING},
  136. {FSM_STATE_ATC_PAUSE_13, POWER_SUPPLY_STATUS_NOT_CHARGING},
  137. {FSM_STATE_FAST_CHG_PAUSE_14, POWER_SUPPLY_STATUS_NOT_CHARGING},
  138. {FSM_STATE_TRKL_CHG_PAUSE_15, POWER_SUPPLY_STATUS_NOT_CHARGING},
  139. {FSM_STATE_START_BOOT, POWER_SUPPLY_STATUS_NOT_CHARGING},
  140. {FSM_STATE_FLCB_VREGOK, POWER_SUPPLY_STATUS_NOT_CHARGING},
  141. {FSM_STATE_FLCB, POWER_SUPPLY_STATUS_NOT_CHARGING},
  142. };
  143. enum chg_regulation_loop {
  144. VDD_LOOP = BIT(3),
  145. BAT_CURRENT_LOOP = BIT(2),
  146. INPUT_CURRENT_LOOP = BIT(1),
  147. INPUT_VOLTAGE_LOOP = BIT(0),
  148. CHG_ALL_LOOPS = VDD_LOOP | BAT_CURRENT_LOOP
  149. | INPUT_CURRENT_LOOP | INPUT_VOLTAGE_LOOP,
  150. };
  151. enum pmic_chg_interrupts {
  152. USBIN_VALID_IRQ = 0,
  153. USBIN_OV_IRQ,
  154. BATT_INSERTED_IRQ,
  155. VBATDET_LOW_IRQ,
  156. USBIN_UV_IRQ,
  157. VBAT_OV_IRQ,
  158. CHGWDOG_IRQ,
  159. VCP_IRQ,
  160. ATCDONE_IRQ,
  161. ATCFAIL_IRQ,
  162. CHGDONE_IRQ,
  163. CHGFAIL_IRQ,
  164. CHGSTATE_IRQ,
  165. LOOP_CHANGE_IRQ,
  166. FASTCHG_IRQ,
  167. TRKLCHG_IRQ,
  168. BATT_REMOVED_IRQ,
  169. BATTTEMP_HOT_IRQ,
  170. CHGHOT_IRQ,
  171. BATTTEMP_COLD_IRQ,
  172. CHG_GONE_IRQ,
  173. BAT_TEMP_OK_IRQ,
  174. COARSE_DET_LOW_IRQ,
  175. VDD_LOOP_IRQ,
  176. VREG_OV_IRQ,
  177. VBATDET_IRQ,
  178. BATFET_IRQ,
  179. PSI_IRQ,
  180. DCIN_VALID_IRQ,
  181. DCIN_OV_IRQ,
  182. DCIN_UV_IRQ,
  183. PM_CHG_MAX_INTS,
  184. };
  185. struct bms_notify {
  186. int is_battery_full;
  187. int is_charging;
  188. struct work_struct work;
  189. };
  190. /**
  191. * struct pm8921_chg_chip -device information
  192. * @dev: device pointer to access the parent
  193. * @usb_present: present status of usb
  194. * @dc_present: present status of dc
  195. * @usb_charger_current: usb current to charge the battery with used when
  196. * the usb path is enabled or charging is resumed
  197. * @update_time: how frequently the userland needs to be updated
  198. * @max_voltage_mv: the max volts the batt should be charged up to
  199. * @min_voltage_mv: the min battery voltage before turning the FETon
  200. * @uvd_voltage_mv: (PM8917 only) the falling UVD threshold voltage
  201. * @alarm_low_mv: the battery alarm voltage low
  202. * @alarm_high_mv: the battery alarm voltage high
  203. * @cool_temp_dc: the cool temp threshold in deciCelcius
  204. * @warm_temp_dc: the warm temp threshold in deciCelcius
  205. * @hysteresis_temp_dc: the hysteresis between temp thresholds in
  206. * deciCelcius
  207. * @resume_voltage_delta: the voltage delta from vdd max at which the
  208. * battery should resume charging
  209. * @term_current: The charging based term current
  210. *
  211. */
  212. struct pm8921_chg_chip {
  213. struct device *dev;
  214. unsigned int usb_present;
  215. unsigned int dc_present;
  216. unsigned int usb_charger_current;
  217. unsigned int max_bat_chg_current;
  218. unsigned int pmic_chg_irq[PM_CHG_MAX_INTS];
  219. unsigned int ttrkl_time;
  220. unsigned int update_time;
  221. unsigned int max_voltage_mv;
  222. unsigned int min_voltage_mv;
  223. unsigned int uvd_voltage_mv;
  224. unsigned int safe_current_ma;
  225. unsigned int alarm_low_mv;
  226. unsigned int alarm_high_mv;
  227. int cool_temp_dc;
  228. int warm_temp_dc;
  229. int hysteresis_temp_dc;
  230. unsigned int temp_check_period;
  231. unsigned int cool_bat_chg_current;
  232. unsigned int warm_bat_chg_current;
  233. unsigned int cool_bat_voltage;
  234. unsigned int warm_bat_voltage;
  235. unsigned int is_bat_cool;
  236. unsigned int is_bat_warm;
  237. unsigned int resume_voltage_delta;
  238. int resume_charge_percent;
  239. unsigned int term_current;
  240. unsigned int vbat_channel;
  241. unsigned int batt_temp_channel;
  242. unsigned int batt_id_channel;
  243. struct power_supply usb_psy;
  244. struct power_supply dc_psy;
  245. struct power_supply *ext_psy;
  246. struct power_supply batt_psy;
  247. struct dentry *dent;
  248. struct bms_notify bms_notify;
  249. int *usb_trim_table;
  250. bool ext_charging;
  251. bool ext_charge_done;
  252. bool iusb_fine_res;
  253. DECLARE_BITMAP(enabled_irqs, PM_CHG_MAX_INTS);
  254. struct work_struct battery_id_valid_work;
  255. int64_t batt_id_min;
  256. int64_t batt_id_max;
  257. int trkl_voltage;
  258. int weak_voltage;
  259. int trkl_current;
  260. int weak_current;
  261. int vin_min;
  262. unsigned int *thermal_mitigation;
  263. int thermal_levels;
  264. struct delayed_work update_heartbeat_work;
  265. struct delayed_work eoc_work;
  266. struct delayed_work unplug_check_work;
  267. struct delayed_work vin_collapse_check_work;
  268. struct delayed_work btc_override_work;
  269. struct wake_lock eoc_wake_lock;
  270. enum pm8921_chg_cold_thr cold_thr;
  271. enum pm8921_chg_hot_thr hot_thr;
  272. int rconn_mohm;
  273. enum pm8921_chg_led_src_config led_src_config;
  274. bool host_mode;
  275. bool has_dc_supply;
  276. u8 active_path;
  277. int recent_reported_soc;
  278. int battery_less_hardware;
  279. int ibatmax_max_adj_ma;
  280. int btc_override;
  281. int btc_override_cold_decidegc;
  282. int btc_override_hot_decidegc;
  283. int btc_delay_ms;
  284. bool btc_panic_if_cant_stop_chg;
  285. int stop_chg_upon_expiry;
  286. bool disable_aicl;
  287. int usb_type;
  288. bool disable_chg_rmvl_wrkarnd;
  289. struct msm_xo_voter *voter;
  290. };
  291. /* user space parameter to limit usb current */
  292. static unsigned int usb_max_current;
  293. /*
  294. * usb_target_ma is used for wall charger
  295. * adaptive input current limiting only. Use
  296. * pm_iusbmax_get() to get current maximum usb current setting.
  297. */
  298. static int usb_target_ma;
  299. static int charging_disabled;
  300. static int thermal_mitigation;
  301. static struct pm8921_chg_chip *the_chip;
  302. static void check_temp_thresholds(struct pm8921_chg_chip *chip);
  303. #define LPM_ENABLE_BIT BIT(2)
  304. static int pm8921_chg_set_lpm(struct pm8921_chg_chip *chip, int enable)
  305. {
  306. int rc;
  307. u8 reg;
  308. rc = pm8xxx_readb(chip->dev->parent, CHG_CNTRL, &reg);
  309. if (rc) {
  310. pr_err("pm8xxx_readb failed: addr=%03X, rc=%d\n",
  311. CHG_CNTRL, rc);
  312. return rc;
  313. }
  314. reg &= ~LPM_ENABLE_BIT;
  315. reg |= (enable ? LPM_ENABLE_BIT : 0);
  316. rc = pm8xxx_writeb(chip->dev->parent, CHG_CNTRL, reg);
  317. if (rc) {
  318. pr_err("pm_chg_write failed: addr=%03X, rc=%d\n",
  319. CHG_CNTRL, rc);
  320. return rc;
  321. }
  322. return rc;
  323. }
  324. static int pm_chg_write(struct pm8921_chg_chip *chip, u16 addr, u8 reg)
  325. {
  326. int rc;
  327. rc = pm8xxx_writeb(chip->dev->parent, addr, reg);
  328. if (rc)
  329. pr_err("failed: addr=%03X, rc=%d\n", addr, rc);
  330. return rc;
  331. }
  332. static int pm_chg_masked_write(struct pm8921_chg_chip *chip, u16 addr,
  333. u8 mask, u8 val)
  334. {
  335. int rc;
  336. u8 reg;
  337. rc = pm8xxx_readb(chip->dev->parent, addr, &reg);
  338. if (rc) {
  339. pr_err("pm8xxx_readb failed: addr=%03X, rc=%d\n", addr, rc);
  340. return rc;
  341. }
  342. reg &= ~mask;
  343. reg |= val & mask;
  344. rc = pm_chg_write(chip, addr, reg);
  345. if (rc) {
  346. pr_err("pm_chg_write failed: addr=%03X, rc=%d\n", addr, rc);
  347. return rc;
  348. }
  349. return 0;
  350. }
  351. static int pm_chg_get_rt_status(struct pm8921_chg_chip *chip, int irq_id)
  352. {
  353. return pm8xxx_read_irq_stat(chip->dev->parent,
  354. chip->pmic_chg_irq[irq_id]);
  355. }
  356. /* Treat OverVoltage/UnderVoltage as source missing */
  357. static int is_usb_chg_plugged_in(struct pm8921_chg_chip *chip)
  358. {
  359. return pm_chg_get_rt_status(chip, USBIN_VALID_IRQ);
  360. }
  361. /* Treat OverVoltage/UnderVoltage as source missing */
  362. static int is_dc_chg_plugged_in(struct pm8921_chg_chip *chip)
  363. {
  364. return pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
  365. }
  366. static int is_batfet_closed(struct pm8921_chg_chip *chip)
  367. {
  368. return pm_chg_get_rt_status(chip, BATFET_IRQ);
  369. }
  370. #define CAPTURE_FSM_STATE_CMD 0xC2
  371. #define READ_BANK_7 0x70
  372. #define READ_BANK_4 0x40
  373. static int pm_chg_get_fsm_state(struct pm8921_chg_chip *chip)
  374. {
  375. u8 temp;
  376. int err = 0, ret = 0;
  377. temp = CAPTURE_FSM_STATE_CMD;
  378. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  379. if (err) {
  380. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  381. goto err_out;
  382. }
  383. temp = READ_BANK_7;
  384. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  385. if (err) {
  386. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  387. goto err_out;
  388. }
  389. err = pm8xxx_readb(chip->dev->parent, CHG_TEST, &temp);
  390. if (err) {
  391. pr_err("pm8xxx_readb fail: addr=%03X, rc=%d\n", CHG_TEST, err);
  392. goto err_out;
  393. }
  394. /* get the lower 4 bits */
  395. ret = temp & 0xF;
  396. temp = READ_BANK_4;
  397. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  398. if (err) {
  399. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  400. goto err_out;
  401. }
  402. err = pm8xxx_readb(chip->dev->parent, CHG_TEST, &temp);
  403. if (err) {
  404. pr_err("pm8xxx_readb fail: addr=%03X, rc=%d\n", CHG_TEST, err);
  405. goto err_out;
  406. }
  407. /* get the upper 1 bit */
  408. ret |= (temp & 0x1) << 4;
  409. err_out:
  410. if (err)
  411. return err;
  412. return ret;
  413. }
  414. #define READ_BANK_6 0x60
  415. static int pm_chg_get_regulation_loop(struct pm8921_chg_chip *chip)
  416. {
  417. u8 temp, data;
  418. int err = 0;
  419. temp = READ_BANK_6;
  420. err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
  421. if (err) {
  422. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  423. goto err_out;
  424. }
  425. err = pm8xxx_readb(chip->dev->parent, CHG_TEST, &data);
  426. if (err) {
  427. pr_err("pm8xxx_readb fail: addr=%03X, rc=%d\n", CHG_TEST, err);
  428. goto err_out;
  429. }
  430. err_out:
  431. if (err)
  432. return err;
  433. /* return the lower 4 bits */
  434. return data & CHG_ALL_LOOPS;
  435. }
  436. #define CHG_USB_SUSPEND_BIT BIT(2)
  437. static int pm_chg_usb_suspend_enable(struct pm8921_chg_chip *chip, int enable)
  438. {
  439. return pm_chg_masked_write(chip, CHG_CNTRL_3, CHG_USB_SUSPEND_BIT,
  440. enable ? CHG_USB_SUSPEND_BIT : 0);
  441. }
  442. #define CHG_EN_BIT BIT(7)
  443. static int pm_chg_auto_enable(struct pm8921_chg_chip *chip, int enable)
  444. {
  445. return pm_chg_masked_write(chip, CHG_CNTRL_3, CHG_EN_BIT,
  446. enable ? CHG_EN_BIT : 0);
  447. }
  448. #define CHG_FAILED_CLEAR BIT(0)
  449. #define ATC_FAILED_CLEAR BIT(1)
  450. static int pm_chg_failed_clear(struct pm8921_chg_chip *chip, int clear)
  451. {
  452. int rc;
  453. rc = pm_chg_masked_write(chip, CHG_CNTRL_3, ATC_FAILED_CLEAR,
  454. clear ? ATC_FAILED_CLEAR : 0);
  455. rc |= pm_chg_masked_write(chip, CHG_CNTRL_3, CHG_FAILED_CLEAR,
  456. clear ? CHG_FAILED_CLEAR : 0);
  457. return rc;
  458. }
  459. #define CHG_CHARGE_DIS_BIT BIT(1)
  460. static int pm_chg_charge_dis(struct pm8921_chg_chip *chip, int disable)
  461. {
  462. return pm_chg_masked_write(chip, CHG_CNTRL, CHG_CHARGE_DIS_BIT,
  463. disable ? CHG_CHARGE_DIS_BIT : 0);
  464. }
  465. static int pm_is_chg_charge_dis(struct pm8921_chg_chip *chip)
  466. {
  467. u8 temp;
  468. pm8xxx_readb(chip->dev->parent, CHG_CNTRL, &temp);
  469. return temp & CHG_CHARGE_DIS_BIT;
  470. }
  471. #define PM8921_CHG_V_MIN_MV 3240
  472. #define PM8921_CHG_V_STEP_MV 20
  473. #define PM8921_CHG_V_STEP_10MV_OFFSET_BIT BIT(7)
  474. #define PM8921_CHG_VDDMAX_MAX 4500
  475. #define PM8921_CHG_VDDMAX_MIN 3400
  476. #define PM8921_CHG_V_MASK 0x7F
  477. static int __pm_chg_vddmax_set(struct pm8921_chg_chip *chip, int voltage)
  478. {
  479. int remainder;
  480. u8 temp = 0;
  481. if (voltage < PM8921_CHG_VDDMAX_MIN
  482. || voltage > PM8921_CHG_VDDMAX_MAX) {
  483. pr_err("bad mV=%d asked to set\n", voltage);
  484. return -EINVAL;
  485. }
  486. temp = (voltage - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
  487. remainder = voltage % 20;
  488. if (remainder >= 10) {
  489. temp |= PM8921_CHG_V_STEP_10MV_OFFSET_BIT;
  490. }
  491. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  492. return pm_chg_write(chip, CHG_VDD_MAX, temp);
  493. }
  494. static int pm_chg_vddmax_get(struct pm8921_chg_chip *chip, int *voltage)
  495. {
  496. u8 temp;
  497. int rc;
  498. rc = pm8xxx_readb(chip->dev->parent, CHG_VDD_MAX, &temp);
  499. if (rc) {
  500. pr_err("rc = %d while reading vdd max\n", rc);
  501. *voltage = 0;
  502. return rc;
  503. }
  504. *voltage = (int)(temp & PM8921_CHG_V_MASK) * PM8921_CHG_V_STEP_MV
  505. + PM8921_CHG_V_MIN_MV;
  506. if (temp & PM8921_CHG_V_STEP_10MV_OFFSET_BIT)
  507. *voltage = *voltage + 10;
  508. return 0;
  509. }
  510. static int pm_chg_vddmax_set(struct pm8921_chg_chip *chip, int voltage)
  511. {
  512. int current_mv, ret, steps, i;
  513. bool increase;
  514. ret = 0;
  515. if (voltage < PM8921_CHG_VDDMAX_MIN
  516. || voltage > PM8921_CHG_VDDMAX_MAX) {
  517. pr_err("bad mV=%d asked to set\n", voltage);
  518. return -EINVAL;
  519. }
  520. ret = pm_chg_vddmax_get(chip, &current_mv);
  521. if (ret) {
  522. pr_err("Failed to read vddmax rc=%d\n", ret);
  523. return -EINVAL;
  524. }
  525. if (current_mv == voltage)
  526. return 0;
  527. /* Only change in increments when USB is present */
  528. if (is_usb_chg_plugged_in(chip)) {
  529. if (current_mv < voltage) {
  530. steps = (voltage - current_mv) / PM8921_CHG_V_STEP_MV;
  531. increase = true;
  532. } else {
  533. steps = (current_mv - voltage) / PM8921_CHG_V_STEP_MV;
  534. increase = false;
  535. }
  536. for (i = 0; i < steps; i++) {
  537. if (increase)
  538. current_mv += PM8921_CHG_V_STEP_MV;
  539. else
  540. current_mv -= PM8921_CHG_V_STEP_MV;
  541. ret |= __pm_chg_vddmax_set(chip, current_mv);
  542. }
  543. }
  544. ret |= __pm_chg_vddmax_set(chip, voltage);
  545. return ret;
  546. }
  547. #define PM8921_CHG_VDDSAFE_MIN 3400
  548. #define PM8921_CHG_VDDSAFE_MAX 4500
  549. static int pm_chg_vddsafe_set(struct pm8921_chg_chip *chip, int voltage)
  550. {
  551. u8 temp;
  552. if (voltage < PM8921_CHG_VDDSAFE_MIN
  553. || voltage > PM8921_CHG_VDDSAFE_MAX) {
  554. pr_err("bad mV=%d asked to set\n", voltage);
  555. return -EINVAL;
  556. }
  557. temp = (voltage - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
  558. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  559. return pm_chg_masked_write(chip, CHG_VDD_SAFE, PM8921_CHG_V_MASK, temp);
  560. }
  561. #define PM8921_CHG_VBATDET_MIN 3240
  562. #define PM8921_CHG_VBATDET_MAX 5780
  563. static int pm_chg_vbatdet_set(struct pm8921_chg_chip *chip, int voltage)
  564. {
  565. u8 temp;
  566. if (voltage < PM8921_CHG_VBATDET_MIN
  567. || voltage > PM8921_CHG_VBATDET_MAX) {
  568. pr_err("bad mV=%d asked to set\n", voltage);
  569. return -EINVAL;
  570. }
  571. temp = (voltage - PM8921_CHG_V_MIN_MV) / PM8921_CHG_V_STEP_MV;
  572. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  573. return pm_chg_masked_write(chip, CHG_VBAT_DET, PM8921_CHG_V_MASK, temp);
  574. }
  575. #define PM8921_CHG_VINMIN_MIN_MV 3800
  576. #define PM8921_CHG_VINMIN_STEP_MV 100
  577. #define PM8921_CHG_VINMIN_USABLE_MAX 6500
  578. #define PM8921_CHG_VINMIN_USABLE_MIN 4300
  579. #define PM8921_CHG_VINMIN_MASK 0x1F
  580. static int pm_chg_vinmin_set(struct pm8921_chg_chip *chip, int voltage)
  581. {
  582. u8 temp;
  583. if (voltage < PM8921_CHG_VINMIN_USABLE_MIN
  584. || voltage > PM8921_CHG_VINMIN_USABLE_MAX) {
  585. pr_err("bad mV=%d asked to set\n", voltage);
  586. return -EINVAL;
  587. }
  588. temp = (voltage - PM8921_CHG_VINMIN_MIN_MV) / PM8921_CHG_VINMIN_STEP_MV;
  589. pr_debug("voltage=%d setting %02x\n", voltage, temp);
  590. return pm_chg_masked_write(chip, CHG_VIN_MIN, PM8921_CHG_VINMIN_MASK,
  591. temp);
  592. }
  593. static int pm_chg_vinmin_get(struct pm8921_chg_chip *chip)
  594. {
  595. u8 temp;
  596. int rc, voltage_mv;
  597. rc = pm8xxx_readb(chip->dev->parent, CHG_VIN_MIN, &temp);
  598. temp &= PM8921_CHG_VINMIN_MASK;
  599. voltage_mv = PM8921_CHG_VINMIN_MIN_MV +
  600. (int)temp * PM8921_CHG_VINMIN_STEP_MV;
  601. return voltage_mv;
  602. }
  603. #define PM8917_USB_UVD_MIN_MV 3850
  604. #define PM8917_USB_UVD_MAX_MV 4350
  605. #define PM8917_USB_UVD_STEP_MV 100
  606. #define PM8917_USB_UVD_MASK 0x7
  607. static int pm_chg_uvd_threshold_set(struct pm8921_chg_chip *chip, int thresh_mv)
  608. {
  609. u8 temp;
  610. if (thresh_mv < PM8917_USB_UVD_MIN_MV
  611. || thresh_mv > PM8917_USB_UVD_MAX_MV) {
  612. pr_err("bad mV=%d asked to set\n", thresh_mv);
  613. return -EINVAL;
  614. }
  615. temp = (thresh_mv - PM8917_USB_UVD_MIN_MV) / PM8917_USB_UVD_STEP_MV;
  616. return pm_chg_masked_write(chip, OVP_USB_UVD,
  617. PM8917_USB_UVD_MASK, temp);
  618. }
  619. #define PM8921_CHG_IBATMAX_MIN 325
  620. #define PM8921_CHG_IBATMAX_MAX 3025
  621. #define PM8921_CHG_I_MIN_MA 225
  622. #define PM8921_CHG_I_STEP_MA 50
  623. #define PM8921_CHG_I_MASK 0x3F
  624. static int pm_chg_ibatmax_get(struct pm8921_chg_chip *chip, int *ibat_ma)
  625. {
  626. u8 temp;
  627. int rc;
  628. rc = pm8xxx_readb(chip->dev->parent, CHG_IBAT_MAX, &temp);
  629. if (rc) {
  630. pr_err("rc = %d while reading ibat max\n", rc);
  631. *ibat_ma = 0;
  632. return rc;
  633. }
  634. *ibat_ma = (int)(temp & PM8921_CHG_I_MASK) * PM8921_CHG_I_STEP_MA
  635. + PM8921_CHG_I_MIN_MA;
  636. return 0;
  637. }
  638. static int pm_chg_ibatmax_set(struct pm8921_chg_chip *chip, int chg_current)
  639. {
  640. u8 temp;
  641. if (chg_current < PM8921_CHG_IBATMAX_MIN
  642. || chg_current > PM8921_CHG_IBATMAX_MAX) {
  643. pr_err("bad mA=%d asked to set\n", chg_current);
  644. return -EINVAL;
  645. }
  646. temp = (chg_current - PM8921_CHG_I_MIN_MA) / PM8921_CHG_I_STEP_MA;
  647. return pm_chg_masked_write(chip, CHG_IBAT_MAX, PM8921_CHG_I_MASK, temp);
  648. }
  649. #define PM8921_CHG_IBATSAFE_MIN 225
  650. #define PM8921_CHG_IBATSAFE_MAX 3375
  651. static int pm_chg_ibatsafe_set(struct pm8921_chg_chip *chip, int chg_current)
  652. {
  653. u8 temp;
  654. if (chg_current < PM8921_CHG_IBATSAFE_MIN
  655. || chg_current > PM8921_CHG_IBATSAFE_MAX) {
  656. pr_err("bad mA=%d asked to set\n", chg_current);
  657. return -EINVAL;
  658. }
  659. temp = (chg_current - PM8921_CHG_I_MIN_MA) / PM8921_CHG_I_STEP_MA;
  660. return pm_chg_masked_write(chip, CHG_IBAT_SAFE,
  661. PM8921_CHG_I_MASK, temp);
  662. }
  663. #define PM8921_CHG_ITERM_MIN_MA 50
  664. #define PM8921_CHG_ITERM_MAX_MA 200
  665. #define PM8921_CHG_ITERM_STEP_MA 10
  666. #define PM8921_CHG_ITERM_MASK 0xF
  667. static int pm_chg_iterm_set(struct pm8921_chg_chip *chip, int chg_current)
  668. {
  669. u8 temp;
  670. if (chg_current < PM8921_CHG_ITERM_MIN_MA
  671. || chg_current > PM8921_CHG_ITERM_MAX_MA) {
  672. pr_err("bad mA=%d asked to set\n", chg_current);
  673. return -EINVAL;
  674. }
  675. temp = (chg_current - PM8921_CHG_ITERM_MIN_MA)
  676. / PM8921_CHG_ITERM_STEP_MA;
  677. return pm_chg_masked_write(chip, CHG_ITERM, PM8921_CHG_ITERM_MASK,
  678. temp);
  679. }
  680. static int pm_chg_iterm_get(struct pm8921_chg_chip *chip, int *chg_current)
  681. {
  682. u8 temp;
  683. int rc;
  684. rc = pm8xxx_readb(chip->dev->parent, CHG_ITERM, &temp);
  685. if (rc) {
  686. pr_err("err=%d reading CHG_ITEM\n", rc);
  687. *chg_current = 0;
  688. return rc;
  689. }
  690. temp &= PM8921_CHG_ITERM_MASK;
  691. *chg_current = (int)temp * PM8921_CHG_ITERM_STEP_MA
  692. + PM8921_CHG_ITERM_MIN_MA;
  693. return 0;
  694. }
  695. struct usb_ma_limit_entry {
  696. int usb_ma;
  697. u8 value;
  698. };
  699. /* USB Trim tables */
  700. static int usb_trim_pm8921_table_1[USB_TRIM_ENTRIES] = {
  701. 0x0,
  702. 0x0,
  703. -0x5,
  704. 0x0,
  705. -0x7,
  706. 0x0,
  707. -0x9,
  708. -0xA,
  709. 0x0,
  710. 0x0,
  711. -0xE,
  712. 0x0,
  713. -0xF,
  714. 0x0,
  715. -0x10,
  716. 0x0
  717. };
  718. static int usb_trim_pm8921_table_2[USB_TRIM_ENTRIES] = {
  719. 0x0,
  720. 0x0,
  721. -0x2,
  722. 0x0,
  723. -0x4,
  724. 0x0,
  725. -0x4,
  726. -0x5,
  727. 0x0,
  728. 0x0,
  729. -0x6,
  730. 0x0,
  731. -0x6,
  732. 0x0,
  733. -0x6,
  734. 0x0
  735. };
  736. static int usb_trim_8038_table[USB_TRIM_ENTRIES] = {
  737. 0x0,
  738. 0x0,
  739. -0x9,
  740. 0x0,
  741. -0xD,
  742. 0x0,
  743. -0x10,
  744. -0x11,
  745. 0x0,
  746. 0x0,
  747. -0x25,
  748. 0x0,
  749. -0x28,
  750. 0x0,
  751. -0x32,
  752. 0x0
  753. };
  754. static int usb_trim_8917_table[USB_TRIM_ENTRIES] = {
  755. 0x0,
  756. 0x0,
  757. 0xA,
  758. 0xC,
  759. 0x10,
  760. 0x10,
  761. 0x13,
  762. 0x14,
  763. 0x13,
  764. 0x3,
  765. 0x1A,
  766. 0x1D,
  767. 0x1D,
  768. 0x21,
  769. 0x24,
  770. 0x26
  771. };
  772. /* Maximum USB setting table */
  773. static struct usb_ma_limit_entry usb_ma_table[] = {
  774. {100, 0x0},
  775. {200, 0x1},
  776. {500, 0x2},
  777. {600, 0x3},
  778. {700, 0x4},
  779. {800, 0x5},
  780. {850, 0x6},
  781. {900, 0x8},
  782. {950, 0x7},
  783. {1000, 0x9},
  784. {1100, 0xA},
  785. {1200, 0xB},
  786. {1300, 0xC},
  787. {1400, 0xD},
  788. {1500, 0xE},
  789. {1600, 0xF},
  790. };
  791. #define REG_SBI_CONFIG 0x04F
  792. #define PAGE3_ENABLE_MASK 0x6
  793. #define USB_OVP_TRIM_MASK 0x3F
  794. #define USB_OVP_TRIM_PM8917_MASK 0x7F
  795. #define USB_OVP_TRIM_MIN 0x00
  796. #define REG_USB_OVP_TRIM_ORIG_LSB 0x10A
  797. #define REG_USB_OVP_TRIM_ORIG_MSB 0x09C
  798. #define REG_USB_OVP_TRIM_PM8917 0x2B5
  799. #define REG_USB_OVP_TRIM_PM8917_BIT BIT(0)
  800. #define USB_TRIM_MAX_DATA_PM8917 0x3F
  801. #define USB_TRIM_POLARITY_PM8917_BIT BIT(6)
  802. static int pm_chg_usb_trim(struct pm8921_chg_chip *chip, int index)
  803. {
  804. u8 temp, sbi_config, msb, lsb, mask;
  805. s8 trim;
  806. int rc = 0;
  807. static u8 usb_trim_reg_orig = 0xFF;
  808. /* No trim data for PM8921 */
  809. if (!chip->usb_trim_table)
  810. return 0;
  811. if (usb_trim_reg_orig == 0xFF) {
  812. rc = pm8xxx_readb(chip->dev->parent,
  813. REG_USB_OVP_TRIM_ORIG_MSB, &msb);
  814. if (rc) {
  815. pr_err("error = %d reading sbi config reg\n", rc);
  816. return rc;
  817. }
  818. rc = pm8xxx_readb(chip->dev->parent,
  819. REG_USB_OVP_TRIM_ORIG_LSB, &lsb);
  820. if (rc) {
  821. pr_err("error = %d reading sbi config reg\n", rc);
  822. return rc;
  823. }
  824. msb = msb >> 5;
  825. lsb = lsb >> 5;
  826. usb_trim_reg_orig = msb << 3 | lsb;
  827. if (pm8xxx_get_version(chip->dev->parent)
  828. == PM8XXX_VERSION_8917) {
  829. rc = pm8xxx_readb(chip->dev->parent,
  830. REG_USB_OVP_TRIM_PM8917, &msb);
  831. if (rc) {
  832. pr_err("error = %d reading config reg\n", rc);
  833. return rc;
  834. }
  835. msb = msb & REG_USB_OVP_TRIM_PM8917_BIT;
  836. usb_trim_reg_orig |= msb << 6;
  837. }
  838. }
  839. /* use the original trim value */
  840. trim = usb_trim_reg_orig;
  841. trim += chip->usb_trim_table[index];
  842. if (trim < 0)
  843. trim = 0;
  844. pr_debug("trim_orig %d write 0x%x index=%d value 0x%x to USB_OVP_TRIM\n",
  845. usb_trim_reg_orig, trim, index, chip->usb_trim_table[index]);
  846. rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, &sbi_config);
  847. if (rc) {
  848. pr_err("error = %d reading sbi config reg\n", rc);
  849. return rc;
  850. }
  851. temp = sbi_config | PAGE3_ENABLE_MASK;
  852. rc = pm_chg_write(chip, REG_SBI_CONFIG, temp);
  853. if (rc) {
  854. pr_err("error = %d writing sbi config reg\n", rc);
  855. return rc;
  856. }
  857. mask = USB_OVP_TRIM_MASK;
  858. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917)
  859. mask = USB_OVP_TRIM_PM8917_MASK;
  860. rc = pm_chg_masked_write(chip, USB_OVP_TRIM, mask, trim);
  861. if (rc) {
  862. pr_err("error = %d writing USB_OVP_TRIM\n", rc);
  863. return rc;
  864. }
  865. rc = pm_chg_write(chip, REG_SBI_CONFIG, sbi_config);
  866. if (rc) {
  867. pr_err("error = %d writing sbi config reg\n", rc);
  868. return rc;
  869. }
  870. return rc;
  871. }
  872. #define PM8921_CHG_IUSB_MASK 0x1C
  873. #define PM8921_CHG_IUSB_SHIFT 2
  874. #define PM8921_CHG_IUSB_MAX 7
  875. #define PM8921_CHG_IUSB_MIN 0
  876. #define PM8917_IUSB_FINE_RES BIT(0)
  877. static int pm_chg_iusbmax_set(struct pm8921_chg_chip *chip, int index)
  878. {
  879. u8 temp, fineres, reg_val;
  880. int rc;
  881. reg_val = usb_ma_table[index].value >> 1;
  882. fineres = PM8917_IUSB_FINE_RES & usb_ma_table[index].value;
  883. if (reg_val < PM8921_CHG_IUSB_MIN || reg_val > PM8921_CHG_IUSB_MAX) {
  884. pr_err("bad mA=%d asked to set\n", reg_val);
  885. return -EINVAL;
  886. }
  887. temp = reg_val << PM8921_CHG_IUSB_SHIFT;
  888. /* IUSB_FINE_RES */
  889. if (chip->iusb_fine_res) {
  890. /* Clear IUSB_FINE_RES bit to avoid overshoot */
  891. rc = pm_chg_masked_write(chip, IUSB_FINE_RES,
  892. PM8917_IUSB_FINE_RES, 0);
  893. rc |= pm_chg_masked_write(chip, PBL_ACCESS2,
  894. PM8921_CHG_IUSB_MASK, temp);
  895. if (rc) {
  896. pr_err("Failed to write PBL_ACCESS2 rc=%d\n", rc);
  897. return rc;
  898. }
  899. if (fineres) {
  900. rc = pm_chg_masked_write(chip, IUSB_FINE_RES,
  901. PM8917_IUSB_FINE_RES, fineres);
  902. if (rc) {
  903. pr_err("Failed to write ISUB_FINE_RES rc=%d\n",
  904. rc);
  905. return rc;
  906. }
  907. }
  908. } else {
  909. rc = pm_chg_masked_write(chip, PBL_ACCESS2,
  910. PM8921_CHG_IUSB_MASK, temp);
  911. if (rc) {
  912. pr_err("Failed to write PBL_ACCESS2 rc=%d\n", rc);
  913. return rc;
  914. }
  915. }
  916. rc = pm_chg_usb_trim(chip, index);
  917. if (rc)
  918. pr_err("unable to set usb trim rc = %d\n", rc);
  919. return rc;
  920. }
  921. static int pm_chg_iusbmax_get(struct pm8921_chg_chip *chip, int *mA)
  922. {
  923. u8 temp, fineres;
  924. int rc, i;
  925. fineres = 0;
  926. *mA = 0;
  927. rc = pm8xxx_readb(chip->dev->parent, PBL_ACCESS2, &temp);
  928. if (rc) {
  929. pr_err("err=%d reading PBL_ACCESS2\n", rc);
  930. return rc;
  931. }
  932. if (chip->iusb_fine_res) {
  933. rc = pm8xxx_readb(chip->dev->parent, IUSB_FINE_RES, &fineres);
  934. if (rc) {
  935. pr_err("err=%d reading IUSB_FINE_RES\n", rc);
  936. return rc;
  937. }
  938. }
  939. temp &= PM8921_CHG_IUSB_MASK;
  940. temp = temp >> PM8921_CHG_IUSB_SHIFT;
  941. temp = (temp << 1) | (fineres & PM8917_IUSB_FINE_RES);
  942. for (i = ARRAY_SIZE(usb_ma_table) - 1; i >= 0; i--) {
  943. if (usb_ma_table[i].value == temp)
  944. break;
  945. }
  946. if (i < 0) {
  947. pr_err("can't find %d in usb_ma_table. Use min.\n", temp);
  948. i = 0;
  949. }
  950. *mA = usb_ma_table[i].usb_ma;
  951. return rc;
  952. }
  953. #define PM8921_CHG_WD_MASK 0x1F
  954. static int pm_chg_disable_wd(struct pm8921_chg_chip *chip)
  955. {
  956. /* writing 0 to the wd timer disables it */
  957. return pm_chg_masked_write(chip, CHG_TWDOG, PM8921_CHG_WD_MASK, 0);
  958. }
  959. #define PM8921_CHG_TCHG_MASK 0x7F
  960. #define PM8921_CHG_TCHG_MIN 4
  961. #define PM8921_CHG_TCHG_MAX 512
  962. #define PM8921_CHG_TCHG_STEP 4
  963. static int pm_chg_tchg_max_set(struct pm8921_chg_chip *chip, int minutes)
  964. {
  965. u8 temp;
  966. if (minutes < PM8921_CHG_TCHG_MIN || minutes > PM8921_CHG_TCHG_MAX) {
  967. pr_err("bad max minutes =%d asked to set\n", minutes);
  968. return -EINVAL;
  969. }
  970. temp = (minutes - 1)/PM8921_CHG_TCHG_STEP;
  971. return pm_chg_masked_write(chip, CHG_TCHG_MAX, PM8921_CHG_TCHG_MASK,
  972. temp);
  973. }
  974. #define PM8921_CHG_TTRKL_MASK 0x3F
  975. #define PM8921_CHG_TTRKL_MIN 1
  976. #define PM8921_CHG_TTRKL_MAX 64
  977. static int pm_chg_ttrkl_max_set(struct pm8921_chg_chip *chip, int minutes)
  978. {
  979. u8 temp;
  980. if (minutes < PM8921_CHG_TTRKL_MIN || minutes > PM8921_CHG_TTRKL_MAX) {
  981. pr_err("bad max minutes =%d asked to set\n", minutes);
  982. return -EINVAL;
  983. }
  984. temp = minutes - 1;
  985. return pm_chg_masked_write(chip, CHG_TTRKL_MAX, PM8921_CHG_TTRKL_MASK,
  986. temp);
  987. }
  988. #define PM8921_CHG_VTRKL_MIN_MV 2050
  989. #define PM8921_CHG_VTRKL_MAX_MV 2800
  990. #define PM8921_CHG_VTRKL_STEP_MV 50
  991. #define PM8921_CHG_VTRKL_SHIFT 4
  992. #define PM8921_CHG_VTRKL_MASK 0xF0
  993. static int pm_chg_vtrkl_low_set(struct pm8921_chg_chip *chip, int millivolts)
  994. {
  995. u8 temp;
  996. if (millivolts < PM8921_CHG_VTRKL_MIN_MV
  997. || millivolts > PM8921_CHG_VTRKL_MAX_MV) {
  998. pr_err("bad voltage = %dmV asked to set\n", millivolts);
  999. return -EINVAL;
  1000. }
  1001. temp = (millivolts - PM8921_CHG_VTRKL_MIN_MV)/PM8921_CHG_VTRKL_STEP_MV;
  1002. temp = temp << PM8921_CHG_VTRKL_SHIFT;
  1003. return pm_chg_masked_write(chip, CHG_VTRICKLE, PM8921_CHG_VTRKL_MASK,
  1004. temp);
  1005. }
  1006. #define PM8921_CHG_VWEAK_MIN_MV 2100
  1007. #define PM8921_CHG_VWEAK_MAX_MV 3600
  1008. #define PM8921_CHG_VWEAK_STEP_MV 100
  1009. #define PM8921_CHG_VWEAK_MASK 0x0F
  1010. static int pm_chg_vweak_set(struct pm8921_chg_chip *chip, int millivolts)
  1011. {
  1012. u8 temp;
  1013. if (millivolts < PM8921_CHG_VWEAK_MIN_MV
  1014. || millivolts > PM8921_CHG_VWEAK_MAX_MV) {
  1015. pr_err("bad voltage = %dmV asked to set\n", millivolts);
  1016. return -EINVAL;
  1017. }
  1018. temp = (millivolts - PM8921_CHG_VWEAK_MIN_MV)/PM8921_CHG_VWEAK_STEP_MV;
  1019. return pm_chg_masked_write(chip, CHG_VTRICKLE, PM8921_CHG_VWEAK_MASK,
  1020. temp);
  1021. }
  1022. #define PM8921_CHG_ITRKL_MIN_MA 50
  1023. #define PM8921_CHG_ITRKL_MAX_MA 200
  1024. #define PM8921_CHG_ITRKL_MASK 0x0F
  1025. #define PM8921_CHG_ITRKL_STEP_MA 10
  1026. static int pm_chg_itrkl_set(struct pm8921_chg_chip *chip, int milliamps)
  1027. {
  1028. u8 temp;
  1029. if (milliamps < PM8921_CHG_ITRKL_MIN_MA
  1030. || milliamps > PM8921_CHG_ITRKL_MAX_MA) {
  1031. pr_err("bad current = %dmA asked to set\n", milliamps);
  1032. return -EINVAL;
  1033. }
  1034. temp = (milliamps - PM8921_CHG_ITRKL_MIN_MA)/PM8921_CHG_ITRKL_STEP_MA;
  1035. return pm_chg_masked_write(chip, CHG_ITRICKLE, PM8921_CHG_ITRKL_MASK,
  1036. temp);
  1037. }
  1038. #define PM8921_CHG_IWEAK_MIN_MA 325
  1039. #define PM8921_CHG_IWEAK_MAX_MA 525
  1040. #define PM8921_CHG_IWEAK_SHIFT 7
  1041. #define PM8921_CHG_IWEAK_MASK 0x80
  1042. static int pm_chg_iweak_set(struct pm8921_chg_chip *chip, int milliamps)
  1043. {
  1044. u8 temp;
  1045. if (milliamps < PM8921_CHG_IWEAK_MIN_MA
  1046. || milliamps > PM8921_CHG_IWEAK_MAX_MA) {
  1047. pr_err("bad current = %dmA asked to set\n", milliamps);
  1048. return -EINVAL;
  1049. }
  1050. if (milliamps < PM8921_CHG_IWEAK_MAX_MA)
  1051. temp = 0;
  1052. else
  1053. temp = 1;
  1054. temp = temp << PM8921_CHG_IWEAK_SHIFT;
  1055. return pm_chg_masked_write(chip, CHG_ITRICKLE, PM8921_CHG_IWEAK_MASK,
  1056. temp);
  1057. }
  1058. #define PM8921_CHG_BATT_TEMP_THR_COLD BIT(1)
  1059. #define PM8921_CHG_BATT_TEMP_THR_COLD_SHIFT 1
  1060. static int pm_chg_batt_cold_temp_config(struct pm8921_chg_chip *chip,
  1061. enum pm8921_chg_cold_thr cold_thr)
  1062. {
  1063. u8 temp;
  1064. temp = cold_thr << PM8921_CHG_BATT_TEMP_THR_COLD_SHIFT;
  1065. temp = temp & PM8921_CHG_BATT_TEMP_THR_COLD;
  1066. return pm_chg_masked_write(chip, CHG_CNTRL_2,
  1067. PM8921_CHG_BATT_TEMP_THR_COLD,
  1068. temp);
  1069. }
  1070. #define PM8921_CHG_BATT_TEMP_THR_HOT BIT(0)
  1071. #define PM8921_CHG_BATT_TEMP_THR_HOT_SHIFT 0
  1072. static int pm_chg_batt_hot_temp_config(struct pm8921_chg_chip *chip,
  1073. enum pm8921_chg_hot_thr hot_thr)
  1074. {
  1075. u8 temp;
  1076. temp = hot_thr << PM8921_CHG_BATT_TEMP_THR_HOT_SHIFT;
  1077. temp = temp & PM8921_CHG_BATT_TEMP_THR_HOT;
  1078. return pm_chg_masked_write(chip, CHG_CNTRL_2,
  1079. PM8921_CHG_BATT_TEMP_THR_HOT,
  1080. temp);
  1081. }
  1082. #define PM8921_CHG_LED_SRC_CONFIG_SHIFT 4
  1083. #define PM8921_CHG_LED_SRC_CONFIG_MASK 0x30
  1084. static int pm_chg_led_src_config(struct pm8921_chg_chip *chip,
  1085. enum pm8921_chg_led_src_config led_src_config)
  1086. {
  1087. u8 temp;
  1088. if (led_src_config < LED_SRC_GND ||
  1089. led_src_config > LED_SRC_BYPASS)
  1090. return -EINVAL;
  1091. if (led_src_config == LED_SRC_BYPASS)
  1092. return 0;
  1093. temp = led_src_config << PM8921_CHG_LED_SRC_CONFIG_SHIFT;
  1094. return pm_chg_masked_write(chip, CHG_CNTRL_3,
  1095. PM8921_CHG_LED_SRC_CONFIG_MASK, temp);
  1096. }
  1097. static int64_t read_battery_id(struct pm8921_chg_chip *chip)
  1098. {
  1099. int rc;
  1100. struct pm8xxx_adc_chan_result result;
  1101. rc = pm8xxx_adc_read(chip->batt_id_channel, &result);
  1102. if (rc) {
  1103. pr_err("error reading batt id channel = %d, rc = %d\n",
  1104. chip->vbat_channel, rc);
  1105. return rc;
  1106. }
  1107. pr_debug("batt_id phy = %lld meas = 0x%llx\n", result.physical,
  1108. result.measurement);
  1109. return result.physical;
  1110. }
  1111. static int is_battery_valid(struct pm8921_chg_chip *chip)
  1112. {
  1113. int64_t rc;
  1114. if (chip->batt_id_min == 0 && chip->batt_id_max == 0)
  1115. return 1;
  1116. rc = read_battery_id(chip);
  1117. if (rc < 0) {
  1118. pr_err("error reading batt id channel = %d, rc = %lld\n",
  1119. chip->vbat_channel, rc);
  1120. /* assume battery id is valid when adc error happens */
  1121. return 1;
  1122. }
  1123. if (rc < chip->batt_id_min || rc > chip->batt_id_max) {
  1124. pr_err("batt_id phy =%lld is not valid\n", rc);
  1125. return 0;
  1126. }
  1127. return 1;
  1128. }
  1129. static void check_battery_valid(struct pm8921_chg_chip *chip)
  1130. {
  1131. if (is_battery_valid(chip) == 0) {
  1132. pr_err("batt_id not valid, disbling charging\n");
  1133. pm_chg_auto_enable(chip, 0);
  1134. } else {
  1135. pm_chg_auto_enable(chip, !charging_disabled);
  1136. }
  1137. }
  1138. static void battery_id_valid(struct work_struct *work)
  1139. {
  1140. struct pm8921_chg_chip *chip = container_of(work,
  1141. struct pm8921_chg_chip, battery_id_valid_work);
  1142. check_battery_valid(chip);
  1143. }
  1144. static void pm8921_chg_enable_irq(struct pm8921_chg_chip *chip, int interrupt)
  1145. {
  1146. if (!__test_and_set_bit(interrupt, chip->enabled_irqs)) {
  1147. dev_dbg(chip->dev, "%d\n", chip->pmic_chg_irq[interrupt]);
  1148. enable_irq(chip->pmic_chg_irq[interrupt]);
  1149. }
  1150. }
  1151. static void pm8921_chg_disable_irq(struct pm8921_chg_chip *chip, int interrupt)
  1152. {
  1153. if (__test_and_clear_bit(interrupt, chip->enabled_irqs)) {
  1154. dev_dbg(chip->dev, "%d\n", chip->pmic_chg_irq[interrupt]);
  1155. disable_irq_nosync(chip->pmic_chg_irq[interrupt]);
  1156. }
  1157. }
  1158. static int pm8921_chg_is_enabled(struct pm8921_chg_chip *chip, int interrupt)
  1159. {
  1160. return test_bit(interrupt, chip->enabled_irqs);
  1161. }
  1162. static bool is_ext_charging(struct pm8921_chg_chip *chip)
  1163. {
  1164. union power_supply_propval ret = {0,};
  1165. if (!chip->ext_psy)
  1166. return false;
  1167. if (chip->ext_psy->get_property(chip->ext_psy,
  1168. POWER_SUPPLY_PROP_CHARGE_TYPE, &ret))
  1169. return false;
  1170. if (ret.intval > POWER_SUPPLY_CHARGE_TYPE_NONE)
  1171. return ret.intval;
  1172. return false;
  1173. }
  1174. static bool is_ext_trickle_charging(struct pm8921_chg_chip *chip)
  1175. {
  1176. union power_supply_propval ret = {0,};
  1177. if (!chip->ext_psy)
  1178. return false;
  1179. if (chip->ext_psy->get_property(chip->ext_psy,
  1180. POWER_SUPPLY_PROP_CHARGE_TYPE, &ret))
  1181. return false;
  1182. if (ret.intval == POWER_SUPPLY_CHARGE_TYPE_TRICKLE)
  1183. return true;
  1184. return false;
  1185. }
  1186. static int is_battery_charging(int fsm_state)
  1187. {
  1188. if (is_ext_charging(the_chip))
  1189. return 1;
  1190. switch (fsm_state) {
  1191. case FSM_STATE_ATC_2A:
  1192. case FSM_STATE_ATC_2B:
  1193. case FSM_STATE_ON_CHG_AND_BAT_6:
  1194. case FSM_STATE_FAST_CHG_7:
  1195. case FSM_STATE_TRKL_CHG_8:
  1196. return 1;
  1197. }
  1198. return 0;
  1199. }
  1200. static void bms_notify(struct work_struct *work)
  1201. {
  1202. struct bms_notify *n = container_of(work, struct bms_notify, work);
  1203. if (n->is_charging) {
  1204. pm8921_bms_charging_began();
  1205. } else {
  1206. pm8921_bms_charging_end(n->is_battery_full);
  1207. n->is_battery_full = 0;
  1208. }
  1209. }
  1210. static void bms_notify_check(struct pm8921_chg_chip *chip)
  1211. {
  1212. int fsm_state, new_is_charging;
  1213. fsm_state = pm_chg_get_fsm_state(chip);
  1214. new_is_charging = is_battery_charging(fsm_state);
  1215. if (chip->bms_notify.is_charging ^ new_is_charging) {
  1216. chip->bms_notify.is_charging = new_is_charging;
  1217. schedule_work(&(chip->bms_notify.work));
  1218. }
  1219. }
  1220. static enum power_supply_property pm_power_props_usb[] = {
  1221. POWER_SUPPLY_PROP_PRESENT,
  1222. POWER_SUPPLY_PROP_ONLINE,
  1223. POWER_SUPPLY_PROP_CURRENT_MAX,
  1224. POWER_SUPPLY_PROP_SCOPE,
  1225. POWER_SUPPLY_PROP_HEALTH,
  1226. };
  1227. static enum power_supply_property pm_power_props_mains[] = {
  1228. POWER_SUPPLY_PROP_PRESENT,
  1229. POWER_SUPPLY_PROP_ONLINE,
  1230. };
  1231. static char *pm_power_supplied_to[] = {
  1232. "battery",
  1233. };
  1234. #define USB_WALL_THRESHOLD_MA 500
  1235. static int pm_power_get_property_mains(struct power_supply *psy,
  1236. enum power_supply_property psp,
  1237. union power_supply_propval *val)
  1238. {
  1239. int type;
  1240. /* Check if called before init */
  1241. if (!the_chip)
  1242. return -EINVAL;
  1243. switch (psp) {
  1244. case POWER_SUPPLY_PROP_PRESENT:
  1245. case POWER_SUPPLY_PROP_ONLINE:
  1246. val->intval = 0;
  1247. if (the_chip->has_dc_supply) {
  1248. val->intval = 1;
  1249. return 0;
  1250. }
  1251. if (the_chip->dc_present) {
  1252. val->intval = 1;
  1253. return 0;
  1254. }
  1255. type = the_chip->usb_type;
  1256. if (type == POWER_SUPPLY_TYPE_USB_DCP ||
  1257. type == POWER_SUPPLY_TYPE_USB_ACA ||
  1258. type == POWER_SUPPLY_TYPE_USB_CDP)
  1259. val->intval = is_usb_chg_plugged_in(the_chip);
  1260. break;
  1261. default:
  1262. return -EINVAL;
  1263. }
  1264. return 0;
  1265. }
  1266. static int disable_aicl(int disable)
  1267. {
  1268. if (disable != POWER_SUPPLY_HEALTH_UNKNOWN
  1269. && disable != POWER_SUPPLY_HEALTH_GOOD) {
  1270. pr_err("called with invalid param :%d\n", disable);
  1271. return -EINVAL;
  1272. }
  1273. if (!the_chip) {
  1274. pr_err("%s called before init\n", __func__);
  1275. return -EINVAL;
  1276. }
  1277. pr_debug("Disable AICL = %d\n", disable);
  1278. the_chip->disable_aicl = disable;
  1279. return 0;
  1280. }
  1281. static int switch_usb_to_charge_mode(struct pm8921_chg_chip *chip)
  1282. {
  1283. int rc;
  1284. if (!chip->host_mode)
  1285. return 0;
  1286. /* enable usbin valid comparator and remove force usb ovp fet off */
  1287. rc = pm_chg_write(chip, USB_OVP_TEST, 0xB2);
  1288. if (rc < 0) {
  1289. pr_err("Failed to write 0xB2 to USB_OVP_TEST rc = %d\n", rc);
  1290. return rc;
  1291. }
  1292. chip->host_mode = 0;
  1293. return 0;
  1294. }
  1295. static int switch_usb_to_host_mode(struct pm8921_chg_chip *chip)
  1296. {
  1297. int rc;
  1298. if (chip->host_mode)
  1299. return 0;
  1300. /* disable usbin valid comparator and force usb ovp fet off */
  1301. rc = pm_chg_write(chip, USB_OVP_TEST, 0xB3);
  1302. if (rc < 0) {
  1303. pr_err("Failed to write 0xB3 to USB_OVP_TEST rc = %d\n", rc);
  1304. return rc;
  1305. }
  1306. chip->host_mode = 1;
  1307. return 0;
  1308. }
  1309. static int pm_power_set_property_usb(struct power_supply *psy,
  1310. enum power_supply_property psp,
  1311. const union power_supply_propval *val)
  1312. {
  1313. /* Check if called before init */
  1314. if (!the_chip)
  1315. return -EINVAL;
  1316. switch (psp) {
  1317. case POWER_SUPPLY_PROP_SCOPE:
  1318. if (val->intval == POWER_SUPPLY_SCOPE_SYSTEM)
  1319. return switch_usb_to_host_mode(the_chip);
  1320. if (val->intval == POWER_SUPPLY_SCOPE_DEVICE)
  1321. return switch_usb_to_charge_mode(the_chip);
  1322. else
  1323. return -EINVAL;
  1324. break;
  1325. case POWER_SUPPLY_PROP_TYPE:
  1326. return pm8921_set_usb_power_supply_type(val->intval);
  1327. case POWER_SUPPLY_PROP_HEALTH:
  1328. /* UNKNOWN(0) means enable aicl, GOOD(1) means disable aicl */
  1329. return disable_aicl(val->intval);
  1330. default:
  1331. return -EINVAL;
  1332. }
  1333. return 0;
  1334. }
  1335. static int usb_property_is_writeable(struct power_supply *psy,
  1336. enum power_supply_property psp)
  1337. {
  1338. switch (psp) {
  1339. case POWER_SUPPLY_PROP_HEALTH:
  1340. return 1;
  1341. default:
  1342. break;
  1343. }
  1344. return 0;
  1345. }
  1346. static int pm_power_get_property_usb(struct power_supply *psy,
  1347. enum power_supply_property psp,
  1348. union power_supply_propval *val)
  1349. {
  1350. int current_max;
  1351. /* Check if called before init */
  1352. if (!the_chip)
  1353. return -EINVAL;
  1354. switch (psp) {
  1355. case POWER_SUPPLY_PROP_CURRENT_MAX:
  1356. if (pm_is_chg_charge_dis(the_chip)) {
  1357. val->intval = 0;
  1358. } else {
  1359. pm_chg_iusbmax_get(the_chip, &current_max);
  1360. val->intval = current_max;
  1361. }
  1362. break;
  1363. case POWER_SUPPLY_PROP_PRESENT:
  1364. case POWER_SUPPLY_PROP_ONLINE:
  1365. val->intval = 0;
  1366. if (the_chip->usb_type == POWER_SUPPLY_TYPE_USB)
  1367. val->intval = is_usb_chg_plugged_in(the_chip);
  1368. break;
  1369. case POWER_SUPPLY_PROP_SCOPE:
  1370. if (the_chip->host_mode)
  1371. val->intval = POWER_SUPPLY_SCOPE_SYSTEM;
  1372. else
  1373. val->intval = POWER_SUPPLY_SCOPE_DEVICE;
  1374. break;
  1375. case POWER_SUPPLY_PROP_HEALTH:
  1376. /* UNKNOWN(0) means enable aicl, GOOD(1) means disable aicl */
  1377. val->intval = the_chip->disable_aicl;
  1378. break;
  1379. default:
  1380. return -EINVAL;
  1381. }
  1382. return 0;
  1383. }
  1384. static enum power_supply_property msm_batt_power_props[] = {
  1385. POWER_SUPPLY_PROP_STATUS,
  1386. POWER_SUPPLY_PROP_CHARGE_TYPE,
  1387. POWER_SUPPLY_PROP_HEALTH,
  1388. POWER_SUPPLY_PROP_PRESENT,
  1389. POWER_SUPPLY_PROP_TECHNOLOGY,
  1390. POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
  1391. POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
  1392. POWER_SUPPLY_PROP_VOLTAGE_NOW,
  1393. POWER_SUPPLY_PROP_CAPACITY,
  1394. POWER_SUPPLY_PROP_CURRENT_MAX,
  1395. POWER_SUPPLY_PROP_CURRENT_NOW,
  1396. POWER_SUPPLY_PROP_TEMP,
  1397. POWER_SUPPLY_PROP_CHARGE_FULL,
  1398. POWER_SUPPLY_PROP_CHARGE_NOW,
  1399. };
  1400. static int get_prop_battery_uvolts(struct pm8921_chg_chip *chip)
  1401. {
  1402. int rc;
  1403. struct pm8xxx_adc_chan_result result;
  1404. rc = pm8xxx_adc_read(chip->vbat_channel, &result);
  1405. if (rc) {
  1406. pr_err("error reading adc channel = %d, rc = %d\n",
  1407. chip->vbat_channel, rc);
  1408. return rc;
  1409. }
  1410. pr_debug("mvolts phy = %lld meas = 0x%llx\n", result.physical,
  1411. result.measurement);
  1412. return (int)result.physical;
  1413. }
  1414. static int voltage_based_capacity(struct pm8921_chg_chip *chip)
  1415. {
  1416. int current_voltage_uv = get_prop_battery_uvolts(chip);
  1417. int current_voltage_mv = current_voltage_uv / 1000;
  1418. unsigned int low_voltage = chip->min_voltage_mv;
  1419. unsigned int high_voltage = chip->max_voltage_mv;
  1420. if (current_voltage_uv < 0) {
  1421. pr_err("Error reading current voltage\n");
  1422. return -EIO;
  1423. }
  1424. if (current_voltage_mv <= low_voltage)
  1425. return 0;
  1426. else if (current_voltage_mv >= high_voltage)
  1427. return 100;
  1428. else
  1429. return (current_voltage_mv - low_voltage) * 100
  1430. / (high_voltage - low_voltage);
  1431. }
  1432. static int get_prop_batt_present(struct pm8921_chg_chip *chip)
  1433. {
  1434. return pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
  1435. }
  1436. static int get_prop_batt_status(struct pm8921_chg_chip *chip)
  1437. {
  1438. int batt_state = POWER_SUPPLY_STATUS_DISCHARGING;
  1439. int fsm_state = pm_chg_get_fsm_state(chip);
  1440. int i;
  1441. if (chip->ext_psy) {
  1442. if (chip->ext_charge_done)
  1443. return POWER_SUPPLY_STATUS_FULL;
  1444. if (chip->ext_charging)
  1445. return POWER_SUPPLY_STATUS_CHARGING;
  1446. }
  1447. for (i = 0; i < ARRAY_SIZE(map); i++)
  1448. if (map[i].fsm_state == fsm_state)
  1449. batt_state = map[i].batt_state;
  1450. if (fsm_state == FSM_STATE_ON_CHG_HIGHI_1) {
  1451. if (!pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ)
  1452. || !pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ)
  1453. || pm_chg_get_rt_status(chip, CHGHOT_IRQ)
  1454. || pm_chg_get_rt_status(chip, VBATDET_LOW_IRQ))
  1455. batt_state = POWER_SUPPLY_STATUS_NOT_CHARGING;
  1456. }
  1457. return batt_state;
  1458. }
  1459. static int get_prop_batt_capacity(struct pm8921_chg_chip *chip)
  1460. {
  1461. int percent_soc;
  1462. if (chip->battery_less_hardware)
  1463. return 100;
  1464. if (!get_prop_batt_present(chip))
  1465. percent_soc = voltage_based_capacity(chip);
  1466. else
  1467. percent_soc = pm8921_bms_get_percent_charge();
  1468. if (percent_soc == -ENXIO)
  1469. percent_soc = voltage_based_capacity(chip);
  1470. if (percent_soc < 0) {
  1471. pr_err("Unable to read battery voltage\n");
  1472. goto fail_voltage;
  1473. }
  1474. if (percent_soc <= 10)
  1475. pr_warn_ratelimited("low battery charge = %d%%\n",
  1476. percent_soc);
  1477. if (percent_soc <= chip->resume_charge_percent
  1478. && get_prop_batt_status(chip) == POWER_SUPPLY_STATUS_FULL) {
  1479. pr_debug("soc fell below %d. charging enabled.\n",
  1480. chip->resume_charge_percent);
  1481. if (chip->is_bat_warm)
  1482. pr_warn_ratelimited("battery is warm = %d, do not resume charging at %d%%.\n",
  1483. chip->is_bat_warm,
  1484. chip->resume_charge_percent);
  1485. else if (chip->is_bat_cool)
  1486. pr_warn_ratelimited("battery is cool = %d, do not resume charging at %d%%.\n",
  1487. chip->is_bat_cool,
  1488. chip->resume_charge_percent);
  1489. else
  1490. pm_chg_vbatdet_set(the_chip, PM8921_CHG_VBATDET_MAX);
  1491. }
  1492. fail_voltage:
  1493. chip->recent_reported_soc = percent_soc;
  1494. return percent_soc;
  1495. }
  1496. static int get_prop_batt_current_max(struct pm8921_chg_chip *chip, int *curr)
  1497. {
  1498. *curr = 0;
  1499. *curr = pm8921_bms_get_current_max();
  1500. if (*curr == -EINVAL)
  1501. return -EINVAL;
  1502. return 0;
  1503. }
  1504. static int get_prop_batt_current(struct pm8921_chg_chip *chip, int *curr)
  1505. {
  1506. int rc;
  1507. *curr = 0;
  1508. rc = pm8921_bms_get_battery_current(curr);
  1509. if (rc == -ENXIO) {
  1510. rc = pm8xxx_ccadc_get_battery_current(curr);
  1511. }
  1512. if (rc)
  1513. pr_err("unable to get batt current rc = %d\n", rc);
  1514. return rc;
  1515. }
  1516. static int get_prop_batt_fcc(struct pm8921_chg_chip *chip)
  1517. {
  1518. int rc;
  1519. rc = pm8921_bms_get_fcc();
  1520. if (rc < 0)
  1521. pr_err("unable to get batt fcc rc = %d\n", rc);
  1522. return rc;
  1523. }
  1524. static int get_prop_batt_charge_now(struct pm8921_chg_chip *chip, int *cc_uah)
  1525. {
  1526. int rc;
  1527. *cc_uah = 0;
  1528. rc = pm8921_bms_cc_uah(cc_uah);
  1529. if (rc)
  1530. pr_err("unable to get batt fcc rc = %d\n", rc);
  1531. return rc;
  1532. }
  1533. static int get_prop_batt_health(struct pm8921_chg_chip *chip)
  1534. {
  1535. int temp;
  1536. temp = pm_chg_get_rt_status(chip, BATTTEMP_HOT_IRQ);
  1537. if (temp)
  1538. return POWER_SUPPLY_HEALTH_OVERHEAT;
  1539. temp = pm_chg_get_rt_status(chip, BATTTEMP_COLD_IRQ);
  1540. if (temp)
  1541. return POWER_SUPPLY_HEALTH_COLD;
  1542. return POWER_SUPPLY_HEALTH_GOOD;
  1543. }
  1544. static int get_prop_charge_type(struct pm8921_chg_chip *chip)
  1545. {
  1546. int temp;
  1547. if (!get_prop_batt_present(chip))
  1548. return POWER_SUPPLY_CHARGE_TYPE_NONE;
  1549. if (is_ext_trickle_charging(chip))
  1550. return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
  1551. if (is_ext_charging(chip))
  1552. return POWER_SUPPLY_CHARGE_TYPE_FAST;
  1553. temp = pm_chg_get_rt_status(chip, TRKLCHG_IRQ);
  1554. if (temp)
  1555. return POWER_SUPPLY_CHARGE_TYPE_TRICKLE;
  1556. temp = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  1557. if (temp)
  1558. return POWER_SUPPLY_CHARGE_TYPE_FAST;
  1559. return POWER_SUPPLY_CHARGE_TYPE_NONE;
  1560. }
  1561. #define MAX_TOLERABLE_BATT_TEMP_DDC 680
  1562. static int get_prop_batt_temp(struct pm8921_chg_chip *chip, int *temp)
  1563. {
  1564. int rc;
  1565. struct pm8xxx_adc_chan_result result;
  1566. if (chip->battery_less_hardware) {
  1567. *temp = 300;
  1568. return 0;
  1569. }
  1570. rc = pm8xxx_adc_read(chip->batt_temp_channel, &result);
  1571. if (rc) {
  1572. pr_err("error reading adc channel = %d, rc = %d\n",
  1573. chip->vbat_channel, rc);
  1574. return rc;
  1575. }
  1576. pr_debug("batt_temp phy = %lld meas = 0x%llx\n", result.physical,
  1577. result.measurement);
  1578. if (result.physical > MAX_TOLERABLE_BATT_TEMP_DDC)
  1579. pr_err("BATT_TEMP= %d > 68degC, device will be shutdown\n",
  1580. (int) result.physical);
  1581. *temp = (int)result.physical;
  1582. return rc;
  1583. }
  1584. static int pm_batt_power_get_property(struct power_supply *psy,
  1585. enum power_supply_property psp,
  1586. union power_supply_propval *val)
  1587. {
  1588. int rc = 0;
  1589. int value;
  1590. struct pm8921_chg_chip *chip = container_of(psy, struct pm8921_chg_chip,
  1591. batt_psy);
  1592. switch (psp) {
  1593. case POWER_SUPPLY_PROP_STATUS:
  1594. val->intval = get_prop_batt_status(chip);
  1595. break;
  1596. case POWER_SUPPLY_PROP_CHARGE_TYPE:
  1597. val->intval = get_prop_charge_type(chip);
  1598. break;
  1599. case POWER_SUPPLY_PROP_HEALTH:
  1600. val->intval = get_prop_batt_health(chip);
  1601. break;
  1602. case POWER_SUPPLY_PROP_PRESENT:
  1603. rc = get_prop_batt_present(chip);
  1604. if (rc >= 0) {
  1605. val->intval = rc;
  1606. rc = 0;
  1607. }
  1608. break;
  1609. case POWER_SUPPLY_PROP_TECHNOLOGY:
  1610. val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
  1611. break;
  1612. case POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN:
  1613. val->intval = chip->max_voltage_mv * 1000;
  1614. break;
  1615. case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
  1616. val->intval = chip->min_voltage_mv * 1000;
  1617. break;
  1618. case POWER_SUPPLY_PROP_VOLTAGE_NOW:
  1619. rc = get_prop_battery_uvolts(chip);
  1620. if (rc >= 0) {
  1621. val->intval = rc;
  1622. rc = 0;
  1623. }
  1624. break;
  1625. case POWER_SUPPLY_PROP_CAPACITY:
  1626. rc = get_prop_batt_capacity(chip);
  1627. if (rc >= 0) {
  1628. val->intval = rc;
  1629. rc = 0;
  1630. }
  1631. break;
  1632. case POWER_SUPPLY_PROP_CURRENT_NOW:
  1633. rc = get_prop_batt_current(chip, &value);
  1634. if (!rc)
  1635. val->intval = value;
  1636. break;
  1637. case POWER_SUPPLY_PROP_CURRENT_MAX:
  1638. rc = get_prop_batt_current_max(chip, &value);
  1639. if (!rc)
  1640. val->intval = value;
  1641. break;
  1642. case POWER_SUPPLY_PROP_TEMP:
  1643. rc = get_prop_batt_temp(chip, &value);
  1644. if (!rc)
  1645. val->intval = value;
  1646. break;
  1647. case POWER_SUPPLY_PROP_CHARGE_FULL:
  1648. rc = get_prop_batt_fcc(chip);
  1649. if (rc >= 0) {
  1650. val->intval = rc;
  1651. rc = 0;
  1652. }
  1653. break;
  1654. case POWER_SUPPLY_PROP_CHARGE_NOW:
  1655. rc = get_prop_batt_charge_now(chip, &value);
  1656. if (!rc) {
  1657. val->intval = value;
  1658. rc = 0;
  1659. }
  1660. break;
  1661. default:
  1662. rc = -EINVAL;
  1663. }
  1664. return rc;
  1665. }
  1666. static void (*notify_vbus_state_func_ptr)(int);
  1667. static int usb_chg_current;
  1668. int pm8921_charger_register_vbus_sn(void (*callback)(int))
  1669. {
  1670. pr_debug("%p\n", callback);
  1671. notify_vbus_state_func_ptr = callback;
  1672. return 0;
  1673. }
  1674. EXPORT_SYMBOL_GPL(pm8921_charger_register_vbus_sn);
  1675. /* this is passed to the hsusb via platform_data msm_otg_pdata */
  1676. void pm8921_charger_unregister_vbus_sn(void (*callback)(int))
  1677. {
  1678. pr_debug("%p\n", callback);
  1679. notify_vbus_state_func_ptr = NULL;
  1680. }
  1681. EXPORT_SYMBOL_GPL(pm8921_charger_unregister_vbus_sn);
  1682. static void notify_usb_of_the_plugin_event(int plugin)
  1683. {
  1684. plugin = !!plugin;
  1685. if (notify_vbus_state_func_ptr) {
  1686. pr_debug("notifying plugin\n");
  1687. (*notify_vbus_state_func_ptr) (plugin);
  1688. } else {
  1689. pr_debug("unable to notify plugin\n");
  1690. }
  1691. }
  1692. static void __pm8921_charger_vbus_draw(unsigned int mA)
  1693. {
  1694. int i, rc;
  1695. if (!the_chip) {
  1696. pr_err("called before init\n");
  1697. return;
  1698. }
  1699. if (usb_max_current && mA > usb_max_current) {
  1700. pr_debug("restricting usb current to %d instead of %d\n",
  1701. usb_max_current, mA);
  1702. mA = usb_max_current;
  1703. }
  1704. if (mA <= 2) {
  1705. usb_chg_current = 0;
  1706. rc = pm_chg_iusbmax_set(the_chip, 0);
  1707. if (rc) {
  1708. pr_err("unable to set iusb to %d rc = %d\n", 0, rc);
  1709. }
  1710. rc = pm_chg_usb_suspend_enable(the_chip, 1);
  1711. if (rc)
  1712. pr_err("fail to set suspend bit rc=%d\n", rc);
  1713. } else {
  1714. rc = pm_chg_usb_suspend_enable(the_chip, 0);
  1715. if (rc)
  1716. pr_err("fail to reset suspend bit rc=%d\n", rc);
  1717. for (i = ARRAY_SIZE(usb_ma_table) - 1; i >= 0; i--) {
  1718. if (usb_ma_table[i].usb_ma <= mA)
  1719. break;
  1720. }
  1721. if (i < 0) {
  1722. pr_err("can't find %dmA in usb_ma_table. Use min.\n",
  1723. mA);
  1724. i = 0;
  1725. }
  1726. /* Check if IUSB_FINE_RES is available */
  1727. while ((usb_ma_table[i].value & PM8917_IUSB_FINE_RES)
  1728. && !the_chip->iusb_fine_res)
  1729. i--;
  1730. if (i < 0)
  1731. i = 0;
  1732. rc = pm_chg_iusbmax_set(the_chip, i);
  1733. if (rc)
  1734. pr_err("unable to set iusb to %d rc = %d\n", i, rc);
  1735. }
  1736. }
  1737. /* USB calls these to tell us how much max usb current the system can draw */
  1738. void pm8921_charger_vbus_draw(unsigned int mA)
  1739. {
  1740. int set_usb_now_ma;
  1741. pr_debug("Enter charge=%d\n", mA);
  1742. /*
  1743. * Reject VBUS requests if USB connection is the only available
  1744. * power source. This makes sure that if booting without
  1745. * battery the iusb_max value is not decreased avoiding potential
  1746. * brown_outs.
  1747. *
  1748. * This would also apply when the battery has been
  1749. * removed from the running system.
  1750. */
  1751. if (mA == 0 && the_chip && !get_prop_batt_present(the_chip)
  1752. && !is_dc_chg_plugged_in(the_chip)) {
  1753. if (!the_chip->has_dc_supply) {
  1754. pr_err("rejected: no other power source mA = %d\n", mA);
  1755. return;
  1756. }
  1757. }
  1758. if (usb_max_current && mA > usb_max_current) {
  1759. pr_warn("restricting usb current to %d instead of %d\n",
  1760. usb_max_current, mA);
  1761. mA = usb_max_current;
  1762. }
  1763. if (usb_target_ma == 0 && mA > USB_WALL_THRESHOLD_MA)
  1764. usb_target_ma = mA;
  1765. if (usb_target_ma)
  1766. usb_target_ma = mA;
  1767. if (mA > USB_WALL_THRESHOLD_MA)
  1768. set_usb_now_ma = USB_WALL_THRESHOLD_MA;
  1769. else
  1770. set_usb_now_ma = mA;
  1771. if (the_chip && the_chip->disable_aicl)
  1772. set_usb_now_ma = mA;
  1773. if (the_chip)
  1774. __pm8921_charger_vbus_draw(set_usb_now_ma);
  1775. else
  1776. /*
  1777. * called before pmic initialized,
  1778. * save this value and use it at probe
  1779. */
  1780. usb_chg_current = set_usb_now_ma;
  1781. }
  1782. EXPORT_SYMBOL_GPL(pm8921_charger_vbus_draw);
  1783. int pm8921_is_usb_chg_plugged_in(void)
  1784. {
  1785. if (!the_chip) {
  1786. pr_err("called before init\n");
  1787. return -EINVAL;
  1788. }
  1789. return is_usb_chg_plugged_in(the_chip);
  1790. }
  1791. EXPORT_SYMBOL(pm8921_is_usb_chg_plugged_in);
  1792. int pm8921_is_dc_chg_plugged_in(void)
  1793. {
  1794. if (!the_chip) {
  1795. pr_err("called before init\n");
  1796. return -EINVAL;
  1797. }
  1798. return is_dc_chg_plugged_in(the_chip);
  1799. }
  1800. EXPORT_SYMBOL(pm8921_is_dc_chg_plugged_in);
  1801. int pm8921_is_battery_present(void)
  1802. {
  1803. if (!the_chip) {
  1804. pr_err("called before init\n");
  1805. return -EINVAL;
  1806. }
  1807. return get_prop_batt_present(the_chip);
  1808. }
  1809. EXPORT_SYMBOL(pm8921_is_battery_present);
  1810. int pm8921_is_batfet_closed(void)
  1811. {
  1812. if (!the_chip) {
  1813. pr_err("called before init\n");
  1814. return -EINVAL;
  1815. }
  1816. return is_batfet_closed(the_chip);
  1817. }
  1818. EXPORT_SYMBOL(pm8921_is_batfet_closed);
  1819. /*
  1820. * Disabling the charge current limit causes current
  1821. * current limits to have no monitoring. An adequate charger
  1822. * capable of supplying high current while sustaining VIN_MIN
  1823. * is required if the limiting is disabled.
  1824. */
  1825. int pm8921_disable_input_current_limit(bool disable)
  1826. {
  1827. if (!the_chip) {
  1828. pr_err("called before init\n");
  1829. return -EINVAL;
  1830. }
  1831. if (disable) {
  1832. pr_warn("Disabling input current limit!\n");
  1833. return pm_chg_write(the_chip, CHG_BUCK_CTRL_TEST3, 0xF2);
  1834. }
  1835. return 0;
  1836. }
  1837. EXPORT_SYMBOL(pm8921_disable_input_current_limit);
  1838. int pm8917_set_under_voltage_detection_threshold(int mv)
  1839. {
  1840. if (!the_chip) {
  1841. pr_err("called before init\n");
  1842. return -EINVAL;
  1843. }
  1844. return pm_chg_uvd_threshold_set(the_chip, mv);
  1845. }
  1846. EXPORT_SYMBOL(pm8917_set_under_voltage_detection_threshold);
  1847. int pm8921_set_max_battery_charge_current(int ma)
  1848. {
  1849. if (!the_chip) {
  1850. pr_err("called before init\n");
  1851. return -EINVAL;
  1852. }
  1853. return pm_chg_ibatmax_set(the_chip, ma);
  1854. }
  1855. EXPORT_SYMBOL(pm8921_set_max_battery_charge_current);
  1856. int pm8921_disable_source_current(bool disable)
  1857. {
  1858. if (!the_chip) {
  1859. pr_err("called before init\n");
  1860. return -EINVAL;
  1861. }
  1862. if (disable)
  1863. pr_warn("current drawn from chg=0, battery provides current\n");
  1864. pm_chg_usb_suspend_enable(the_chip, disable);
  1865. return pm_chg_charge_dis(the_chip, disable);
  1866. }
  1867. EXPORT_SYMBOL(pm8921_disable_source_current);
  1868. int pm8921_regulate_input_voltage(int voltage)
  1869. {
  1870. int rc;
  1871. if (!the_chip) {
  1872. pr_err("called before init\n");
  1873. return -EINVAL;
  1874. }
  1875. rc = pm_chg_vinmin_set(the_chip, voltage);
  1876. if (rc == 0)
  1877. the_chip->vin_min = voltage;
  1878. return rc;
  1879. }
  1880. #define USB_OV_THRESHOLD_MASK 0x60
  1881. #define USB_OV_THRESHOLD_SHIFT 5
  1882. int pm8921_usb_ovp_set_threshold(enum pm8921_usb_ov_threshold ov)
  1883. {
  1884. u8 temp;
  1885. if (!the_chip) {
  1886. pr_err("called before init\n");
  1887. return -EINVAL;
  1888. }
  1889. if (ov > PM_USB_OV_7V) {
  1890. pr_err("limiting to over voltage threshold to 7volts\n");
  1891. ov = PM_USB_OV_7V;
  1892. }
  1893. temp = USB_OV_THRESHOLD_MASK & (ov << USB_OV_THRESHOLD_SHIFT);
  1894. return pm_chg_masked_write(the_chip, USB_OVP_CONTROL,
  1895. USB_OV_THRESHOLD_MASK, temp);
  1896. }
  1897. EXPORT_SYMBOL(pm8921_usb_ovp_set_threshold);
  1898. #define USB_DEBOUNCE_TIME_MASK 0x06
  1899. #define USB_DEBOUNCE_TIME_SHIFT 1
  1900. int pm8921_usb_ovp_set_hystersis(enum pm8921_usb_debounce_time ms)
  1901. {
  1902. u8 temp;
  1903. if (!the_chip) {
  1904. pr_err("called before init\n");
  1905. return -EINVAL;
  1906. }
  1907. if (ms > PM_USB_DEBOUNCE_80P5MS) {
  1908. pr_err("limiting debounce to 80.5ms\n");
  1909. ms = PM_USB_DEBOUNCE_80P5MS;
  1910. }
  1911. temp = USB_DEBOUNCE_TIME_MASK & (ms << USB_DEBOUNCE_TIME_SHIFT);
  1912. return pm_chg_masked_write(the_chip, USB_OVP_CONTROL,
  1913. USB_DEBOUNCE_TIME_MASK, temp);
  1914. }
  1915. EXPORT_SYMBOL(pm8921_usb_ovp_set_hystersis);
  1916. #define USB_OVP_DISABLE_MASK 0x80
  1917. int pm8921_usb_ovp_disable(int disable)
  1918. {
  1919. u8 temp = 0;
  1920. if (!the_chip) {
  1921. pr_err("called before init\n");
  1922. return -EINVAL;
  1923. }
  1924. if (disable)
  1925. temp = USB_OVP_DISABLE_MASK;
  1926. return pm_chg_masked_write(the_chip, USB_OVP_CONTROL,
  1927. USB_OVP_DISABLE_MASK, temp);
  1928. }
  1929. bool pm8921_is_battery_charging(int *source)
  1930. {
  1931. int fsm_state, is_charging, dc_present, usb_present;
  1932. if (!the_chip) {
  1933. pr_err("called before init\n");
  1934. return -EINVAL;
  1935. }
  1936. fsm_state = pm_chg_get_fsm_state(the_chip);
  1937. is_charging = is_battery_charging(fsm_state);
  1938. if (is_charging == 0) {
  1939. *source = PM8921_CHG_SRC_NONE;
  1940. return is_charging;
  1941. }
  1942. if (source == NULL)
  1943. return is_charging;
  1944. /* the battery is charging, the source is requested, find it */
  1945. dc_present = is_dc_chg_plugged_in(the_chip);
  1946. usb_present = is_usb_chg_plugged_in(the_chip);
  1947. if (dc_present && !usb_present)
  1948. *source = PM8921_CHG_SRC_DC;
  1949. if (usb_present && !dc_present)
  1950. *source = PM8921_CHG_SRC_USB;
  1951. if (usb_present && dc_present)
  1952. /*
  1953. * The system always chooses dc for charging since it has
  1954. * higher priority.
  1955. */
  1956. *source = PM8921_CHG_SRC_DC;
  1957. return is_charging;
  1958. }
  1959. EXPORT_SYMBOL(pm8921_is_battery_charging);
  1960. int pm8921_set_usb_power_supply_type(enum power_supply_type type)
  1961. {
  1962. if (!the_chip) {
  1963. pr_err("called before init\n");
  1964. return -EINVAL;
  1965. }
  1966. if (type < POWER_SUPPLY_TYPE_USB && type > POWER_SUPPLY_TYPE_BATTERY)
  1967. return -EINVAL;
  1968. the_chip->usb_type = type;
  1969. power_supply_changed(&the_chip->usb_psy);
  1970. power_supply_changed(&the_chip->dc_psy);
  1971. return 0;
  1972. }
  1973. EXPORT_SYMBOL_GPL(pm8921_set_usb_power_supply_type);
  1974. int pm8921_batt_temperature(void)
  1975. {
  1976. int temp = 0, rc = 0;
  1977. if (!the_chip) {
  1978. pr_err("called before init\n");
  1979. return -EINVAL;
  1980. }
  1981. rc = get_prop_batt_temp(the_chip, &temp);
  1982. if (rc) {
  1983. pr_err("Unable to read temperature");
  1984. return rc;
  1985. }
  1986. return temp;
  1987. }
  1988. static void handle_usb_insertion_removal(struct pm8921_chg_chip *chip)
  1989. {
  1990. int usb_present;
  1991. pm_chg_failed_clear(chip, 1);
  1992. usb_present = is_usb_chg_plugged_in(chip);
  1993. if (chip->usb_present ^ usb_present) {
  1994. notify_usb_of_the_plugin_event(usb_present);
  1995. chip->usb_present = usb_present;
  1996. power_supply_changed(&chip->usb_psy);
  1997. power_supply_changed(&chip->batt_psy);
  1998. pm8921_bms_calibrate_hkadc();
  1999. }
  2000. if (usb_present) {
  2001. schedule_delayed_work(&chip->unplug_check_work,
  2002. msecs_to_jiffies(UNPLUG_CHECK_RAMP_MS));
  2003. pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
  2004. } else {
  2005. /* USB unplugged reset target current */
  2006. usb_target_ma = 0;
  2007. pm8921_chg_disable_irq(chip, CHG_GONE_IRQ);
  2008. }
  2009. bms_notify_check(chip);
  2010. }
  2011. static void handle_stop_ext_chg(struct pm8921_chg_chip *chip)
  2012. {
  2013. if (!chip->ext_psy) {
  2014. pr_debug("external charger not registered.\n");
  2015. return;
  2016. }
  2017. if (!chip->ext_charging) {
  2018. pr_debug("already not charging.\n");
  2019. return;
  2020. }
  2021. power_supply_set_charge_type(chip->ext_psy,
  2022. POWER_SUPPLY_CHARGE_TYPE_NONE);
  2023. pm8921_disable_source_current(false); /* release BATFET */
  2024. power_supply_changed(&chip->dc_psy);
  2025. chip->ext_charging = false;
  2026. chip->ext_charge_done = false;
  2027. bms_notify_check(chip);
  2028. /* Update battery charging LEDs and user space battery info */
  2029. power_supply_changed(&chip->batt_psy);
  2030. }
  2031. static void handle_start_ext_chg(struct pm8921_chg_chip *chip)
  2032. {
  2033. int dc_present;
  2034. int batt_present;
  2035. int batt_temp_ok;
  2036. unsigned long delay =
  2037. round_jiffies_relative(msecs_to_jiffies(EOC_CHECK_PERIOD_MS));
  2038. if (!chip->ext_psy) {
  2039. pr_debug("external charger not registered.\n");
  2040. return;
  2041. }
  2042. if (chip->ext_charging) {
  2043. pr_debug("already charging.\n");
  2044. return;
  2045. }
  2046. dc_present = is_dc_chg_plugged_in(chip);
  2047. batt_present = pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
  2048. batt_temp_ok = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
  2049. if (!dc_present) {
  2050. pr_warn("%s. dc not present.\n", __func__);
  2051. return;
  2052. }
  2053. if (!batt_present) {
  2054. pr_warn("%s. battery not present.\n", __func__);
  2055. return;
  2056. }
  2057. if (!batt_temp_ok) {
  2058. pr_warn("%s. battery temperature not ok.\n", __func__);
  2059. return;
  2060. }
  2061. /* Force BATFET=ON */
  2062. pm8921_disable_source_current(true);
  2063. schedule_delayed_work(&chip->unplug_check_work,
  2064. msecs_to_jiffies(UNPLUG_CHECK_RAMP_MS));
  2065. power_supply_set_online(chip->ext_psy, dc_present);
  2066. power_supply_set_charge_type(chip->ext_psy,
  2067. POWER_SUPPLY_CHARGE_TYPE_FAST);
  2068. chip->ext_charging = true;
  2069. chip->ext_charge_done = false;
  2070. bms_notify_check(chip);
  2071. /*
  2072. * since we wont get a fastchg irq from external charger
  2073. * use eoc worker to detect end of charging
  2074. */
  2075. schedule_delayed_work(&chip->eoc_work, delay);
  2076. wake_lock(&chip->eoc_wake_lock);
  2077. if (chip->btc_override)
  2078. schedule_delayed_work(&chip->btc_override_work,
  2079. round_jiffies_relative(msecs_to_jiffies
  2080. (chip->btc_delay_ms)));
  2081. /* Update battery charging LEDs and user space battery info */
  2082. power_supply_changed(&chip->batt_psy);
  2083. }
  2084. static void turn_off_ovp_fet(struct pm8921_chg_chip *chip, u16 ovptestreg)
  2085. {
  2086. u8 temp;
  2087. int rc;
  2088. rc = pm_chg_write(chip, ovptestreg, 0x30);
  2089. if (rc) {
  2090. pr_err("Failed to write 0x30 to ovptestreg rc = %d\n", rc);
  2091. return;
  2092. }
  2093. rc = pm8xxx_readb(chip->dev->parent, ovptestreg, &temp);
  2094. if (rc) {
  2095. pr_err("Failed to read from ovptestreg rc = %d\n", rc);
  2096. return;
  2097. }
  2098. /* set ovp fet disable bit and the write bit */
  2099. temp |= 0x81;
  2100. rc = pm_chg_write(chip, ovptestreg, temp);
  2101. if (rc) {
  2102. pr_err("Failed to write 0x%x ovptestreg rc=%d\n", temp, rc);
  2103. return;
  2104. }
  2105. }
  2106. static void turn_on_ovp_fet(struct pm8921_chg_chip *chip, u16 ovptestreg)
  2107. {
  2108. u8 temp;
  2109. int rc;
  2110. rc = pm_chg_write(chip, ovptestreg, 0x30);
  2111. if (rc) {
  2112. pr_err("Failed to write 0x30 to OVP_TEST rc = %d\n", rc);
  2113. return;
  2114. }
  2115. rc = pm8xxx_readb(chip->dev->parent, ovptestreg, &temp);
  2116. if (rc) {
  2117. pr_err("Failed to read from OVP_TEST rc = %d\n", rc);
  2118. return;
  2119. }
  2120. /* unset ovp fet disable bit and set the write bit */
  2121. temp &= 0xFE;
  2122. temp |= 0x80;
  2123. rc = pm_chg_write(chip, ovptestreg, temp);
  2124. if (rc) {
  2125. pr_err("Failed to write 0x%x to OVP_TEST rc = %d\n",
  2126. temp, rc);
  2127. return;
  2128. }
  2129. }
  2130. static int param_open_ovp_counter = 10;
  2131. module_param(param_open_ovp_counter, int, 0644);
  2132. #define USB_ACTIVE_BIT BIT(5)
  2133. #define DC_ACTIVE_BIT BIT(6)
  2134. static int is_active_chg_plugged_in(struct pm8921_chg_chip *chip,
  2135. u8 active_chg_mask)
  2136. {
  2137. if (active_chg_mask & USB_ACTIVE_BIT)
  2138. return pm_chg_get_rt_status(chip, USBIN_VALID_IRQ);
  2139. else if (active_chg_mask & DC_ACTIVE_BIT)
  2140. return pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
  2141. else
  2142. return 0;
  2143. }
  2144. #define WRITE_BANK_4 0xC0
  2145. #define OVP_DEBOUNCE_TIME 0x06
  2146. static void unplug_ovp_fet_open(struct pm8921_chg_chip *chip)
  2147. {
  2148. int chg_gone = 0, active_chg_plugged_in = 0;
  2149. int count = 0;
  2150. u8 active_mask = 0;
  2151. u16 ovpreg, ovptestreg;
  2152. if (is_usb_chg_plugged_in(chip) &&
  2153. (chip->active_path & USB_ACTIVE_BIT)) {
  2154. ovpreg = USB_OVP_CONTROL;
  2155. ovptestreg = USB_OVP_TEST;
  2156. active_mask = USB_ACTIVE_BIT;
  2157. } else if (is_dc_chg_plugged_in(chip) &&
  2158. (chip->active_path & DC_ACTIVE_BIT)) {
  2159. ovpreg = DC_OVP_CONTROL;
  2160. ovptestreg = DC_OVP_TEST;
  2161. active_mask = DC_ACTIVE_BIT;
  2162. } else {
  2163. return;
  2164. }
  2165. while (count++ < param_open_ovp_counter) {
  2166. pm_chg_masked_write(chip, ovpreg, OVP_DEBOUNCE_TIME, 0x0);
  2167. usleep(10);
  2168. active_chg_plugged_in
  2169. = is_active_chg_plugged_in(chip, active_mask);
  2170. chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
  2171. pr_debug("OVP FET count = %d chg_gone=%d, active_valid = %d\n",
  2172. count, chg_gone, active_chg_plugged_in);
  2173. /* note usb_chg_plugged_in=0 => chg_gone=1 */
  2174. if (chg_gone == 1 && active_chg_plugged_in == 1) {
  2175. pr_debug("since chg_gone = 1 dis ovp_fet for 20msec\n");
  2176. turn_off_ovp_fet(chip, ovptestreg);
  2177. msleep(20);
  2178. turn_on_ovp_fet(chip, ovptestreg);
  2179. } else {
  2180. break;
  2181. }
  2182. }
  2183. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917)
  2184. pm_chg_masked_write(chip, ovpreg, OVP_DEBOUNCE_TIME, 0x6);
  2185. else
  2186. pm_chg_masked_write(chip, ovpreg, OVP_DEBOUNCE_TIME, 0x2);
  2187. pr_debug("Exit count=%d chg_gone=%d, active_valid=%d\n",
  2188. count, chg_gone, active_chg_plugged_in);
  2189. return;
  2190. }
  2191. static int find_usb_ma_value(int value)
  2192. {
  2193. int i;
  2194. for (i = ARRAY_SIZE(usb_ma_table) - 1; i >= 0; i--) {
  2195. if (value >= usb_ma_table[i].usb_ma)
  2196. break;
  2197. }
  2198. return i;
  2199. }
  2200. static void decrease_usb_ma_value(int *value)
  2201. {
  2202. int i;
  2203. if (value) {
  2204. i = find_usb_ma_value(*value);
  2205. if (i > 0)
  2206. i--;
  2207. while (!the_chip->iusb_fine_res && i > 0
  2208. && (usb_ma_table[i].value & PM8917_IUSB_FINE_RES))
  2209. i--;
  2210. if (i < 0) {
  2211. pr_err("can't find %dmA in usb_ma_table. Use min.\n",
  2212. *value);
  2213. i = 0;
  2214. }
  2215. *value = usb_ma_table[i].usb_ma;
  2216. }
  2217. }
  2218. static void increase_usb_ma_value(int *value)
  2219. {
  2220. int i;
  2221. if (value) {
  2222. i = find_usb_ma_value(*value);
  2223. if (i < (ARRAY_SIZE(usb_ma_table) - 1))
  2224. i++;
  2225. /* Get next correct entry if IUSB_FINE_RES is not available */
  2226. while (!the_chip->iusb_fine_res
  2227. && (usb_ma_table[i].value & PM8917_IUSB_FINE_RES)
  2228. && i < (ARRAY_SIZE(usb_ma_table) - 1))
  2229. i++;
  2230. *value = usb_ma_table[i].usb_ma;
  2231. }
  2232. }
  2233. static void vin_collapse_check_worker(struct work_struct *work)
  2234. {
  2235. struct delayed_work *dwork = to_delayed_work(work);
  2236. struct pm8921_chg_chip *chip = container_of(dwork,
  2237. struct pm8921_chg_chip, vin_collapse_check_work);
  2238. /*
  2239. * AICL only for wall-chargers. If the charger appears to be plugged
  2240. * back in now, the corresponding unplug must have been because of we
  2241. * were trying to draw more current than the charger can support. In
  2242. * such a case reset usb current to 500mA and decrease the target.
  2243. * The AICL algorithm will step up the current from 500mA to target
  2244. */
  2245. if (is_usb_chg_plugged_in(chip)
  2246. && usb_target_ma > USB_WALL_THRESHOLD_MA
  2247. && !chip->disable_aicl) {
  2248. /* decrease usb_target_ma */
  2249. decrease_usb_ma_value(&usb_target_ma);
  2250. /* reset here, increase in unplug_check_worker */
  2251. __pm8921_charger_vbus_draw(USB_WALL_THRESHOLD_MA);
  2252. pr_debug("usb_now=%d, usb_target = %d\n",
  2253. USB_WALL_THRESHOLD_MA, usb_target_ma);
  2254. if (!delayed_work_pending(&chip->unplug_check_work))
  2255. schedule_delayed_work(&chip->unplug_check_work,
  2256. msecs_to_jiffies
  2257. (UNPLUG_CHECK_WAIT_PERIOD_MS));
  2258. } else {
  2259. handle_usb_insertion_removal(chip);
  2260. }
  2261. }
  2262. #define VIN_MIN_COLLAPSE_CHECK_MS 50
  2263. static irqreturn_t usbin_valid_irq_handler(int irq, void *data)
  2264. {
  2265. if (usb_target_ma)
  2266. schedule_delayed_work(&the_chip->vin_collapse_check_work,
  2267. msecs_to_jiffies(VIN_MIN_COLLAPSE_CHECK_MS));
  2268. else
  2269. handle_usb_insertion_removal(data);
  2270. return IRQ_HANDLED;
  2271. }
  2272. static irqreturn_t batt_inserted_irq_handler(int irq, void *data)
  2273. {
  2274. struct pm8921_chg_chip *chip = data;
  2275. int status;
  2276. status = pm_chg_get_rt_status(chip, BATT_INSERTED_IRQ);
  2277. schedule_work(&chip->battery_id_valid_work);
  2278. handle_start_ext_chg(chip);
  2279. pr_debug("battery present=%d", status);
  2280. power_supply_changed(&chip->batt_psy);
  2281. return IRQ_HANDLED;
  2282. }
  2283. /*
  2284. * this interrupt used to restart charging a battery.
  2285. *
  2286. * Note: When DC-inserted the VBAT can't go low.
  2287. * VPH_PWR is provided by the ext-charger.
  2288. * After End-Of-Charging from DC, charging can be resumed only
  2289. * if DC is removed and then inserted after the battery was in use.
  2290. * Therefore the handle_start_ext_chg() is not called.
  2291. */
  2292. static irqreturn_t vbatdet_low_irq_handler(int irq, void *data)
  2293. {
  2294. struct pm8921_chg_chip *chip = data;
  2295. int high_transition;
  2296. high_transition = pm_chg_get_rt_status(chip, VBATDET_LOW_IRQ);
  2297. if (high_transition) {
  2298. /* enable auto charging */
  2299. pm_chg_auto_enable(chip, !charging_disabled);
  2300. pr_info("batt fell below resume voltage %s\n",
  2301. charging_disabled ? "" : "charger enabled");
  2302. }
  2303. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2304. power_supply_changed(&chip->batt_psy);
  2305. power_supply_changed(&chip->usb_psy);
  2306. power_supply_changed(&chip->dc_psy);
  2307. return IRQ_HANDLED;
  2308. }
  2309. static irqreturn_t chgwdog_irq_handler(int irq, void *data)
  2310. {
  2311. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2312. return IRQ_HANDLED;
  2313. }
  2314. static irqreturn_t vcp_irq_handler(int irq, void *data)
  2315. {
  2316. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2317. return IRQ_HANDLED;
  2318. }
  2319. static irqreturn_t atcdone_irq_handler(int irq, void *data)
  2320. {
  2321. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2322. return IRQ_HANDLED;
  2323. }
  2324. static irqreturn_t atcfail_irq_handler(int irq, void *data)
  2325. {
  2326. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2327. return IRQ_HANDLED;
  2328. }
  2329. static irqreturn_t chgdone_irq_handler(int irq, void *data)
  2330. {
  2331. struct pm8921_chg_chip *chip = data;
  2332. pr_debug("state_changed_to=%d\n", pm_chg_get_fsm_state(data));
  2333. handle_stop_ext_chg(chip);
  2334. power_supply_changed(&chip->batt_psy);
  2335. power_supply_changed(&chip->usb_psy);
  2336. power_supply_changed(&chip->dc_psy);
  2337. bms_notify_check(chip);
  2338. return IRQ_HANDLED;
  2339. }
  2340. static irqreturn_t chgfail_irq_handler(int irq, void *data)
  2341. {
  2342. struct pm8921_chg_chip *chip = data;
  2343. int ret;
  2344. if (!chip->stop_chg_upon_expiry) {
  2345. ret = pm_chg_failed_clear(chip, 1);
  2346. if (ret)
  2347. pr_err("Failed to write CHG_FAILED_CLEAR bit\n");
  2348. }
  2349. pr_err("batt_present = %d, batt_temp_ok = %d, state_changed_to=%d\n",
  2350. get_prop_batt_present(chip),
  2351. pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ),
  2352. pm_chg_get_fsm_state(data));
  2353. power_supply_changed(&chip->batt_psy);
  2354. power_supply_changed(&chip->usb_psy);
  2355. power_supply_changed(&chip->dc_psy);
  2356. return IRQ_HANDLED;
  2357. }
  2358. static irqreturn_t chgstate_irq_handler(int irq, void *data)
  2359. {
  2360. struct pm8921_chg_chip *chip = data;
  2361. pr_debug("state_changed_to=%d\n", pm_chg_get_fsm_state(data));
  2362. power_supply_changed(&chip->batt_psy);
  2363. power_supply_changed(&chip->usb_psy);
  2364. power_supply_changed(&chip->dc_psy);
  2365. bms_notify_check(chip);
  2366. return IRQ_HANDLED;
  2367. }
  2368. enum {
  2369. PON_TIME_25NS = 0x04,
  2370. PON_TIME_50NS = 0x08,
  2371. PON_TIME_100NS = 0x0C,
  2372. };
  2373. static void set_min_pon_time(struct pm8921_chg_chip *chip, int pon_time_ns)
  2374. {
  2375. u8 temp;
  2376. int rc;
  2377. rc = pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0x40);
  2378. if (rc) {
  2379. pr_err("Failed to write 0x70 to CTRL_TEST3 rc = %d\n", rc);
  2380. return;
  2381. }
  2382. rc = pm8xxx_readb(chip->dev->parent, CHG_BUCK_CTRL_TEST3, &temp);
  2383. if (rc) {
  2384. pr_err("Failed to read CTRL_TEST3 rc = %d\n", rc);
  2385. return;
  2386. }
  2387. /* clear the min pon time select bit */
  2388. temp &= 0xF3;
  2389. /* set the pon time */
  2390. temp |= (u8)pon_time_ns;
  2391. /* write enable bank 4 */
  2392. temp |= 0x80;
  2393. rc = pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, temp);
  2394. if (rc) {
  2395. pr_err("Failed to write 0x%x to CTRL_TEST3 rc=%d\n", temp, rc);
  2396. return;
  2397. }
  2398. }
  2399. static void attempt_reverse_boost_fix(struct pm8921_chg_chip *chip)
  2400. {
  2401. pr_debug("Start\n");
  2402. set_min_pon_time(chip, PON_TIME_100NS);
  2403. pm_chg_vinmin_set(chip, chip->vin_min + 200);
  2404. msleep(250);
  2405. pm_chg_vinmin_set(chip, chip->vin_min);
  2406. set_min_pon_time(chip, PON_TIME_25NS);
  2407. pr_debug("End\n");
  2408. }
  2409. #define VIN_ACTIVE_BIT BIT(0)
  2410. #define UNPLUG_WRKARND_RESTORE_WAIT_PERIOD_US 200
  2411. #define VIN_MIN_INCREASE_MV 100
  2412. static void unplug_check_worker(struct work_struct *work)
  2413. {
  2414. struct delayed_work *dwork = to_delayed_work(work);
  2415. struct pm8921_chg_chip *chip = container_of(dwork,
  2416. struct pm8921_chg_chip, unplug_check_work);
  2417. u8 reg_loop = 0, active_path;
  2418. int rc, ibat, active_chg_plugged_in, usb_ma;
  2419. int chg_gone = 0;
  2420. bool ramp = false;
  2421. rc = pm8xxx_readb(chip->dev->parent, PBL_ACCESS1, &active_path);
  2422. if (rc) {
  2423. pr_err("Failed to read PBL_ACCESS1 rc=%d\n", rc);
  2424. return;
  2425. }
  2426. chip->active_path = active_path;
  2427. active_chg_plugged_in = is_active_chg_plugged_in(chip, active_path);
  2428. pr_debug("active_path = 0x%x, active_chg_plugged_in = %d\n",
  2429. active_path, active_chg_plugged_in);
  2430. if (active_path & USB_ACTIVE_BIT) {
  2431. pr_debug("USB charger active\n");
  2432. pm_chg_iusbmax_get(chip, &usb_ma);
  2433. if (usb_ma <= 100) {
  2434. pr_debug(
  2435. "Unenumerated or suspended usb_ma = %d skip\n",
  2436. usb_ma);
  2437. goto check_again_later;
  2438. }
  2439. } else if (active_path & DC_ACTIVE_BIT) {
  2440. pr_debug("DC charger active\n");
  2441. } else {
  2442. /* No charger active */
  2443. if (!(is_usb_chg_plugged_in(chip)
  2444. && !(is_dc_chg_plugged_in(chip)))) {
  2445. get_prop_batt_current(chip, &ibat);
  2446. pr_debug(
  2447. "Stop: chg removed reg_loop = %d, fsm = %d ibat = %d\n",
  2448. pm_chg_get_regulation_loop(chip),
  2449. pm_chg_get_fsm_state(chip), ibat);
  2450. return;
  2451. } else {
  2452. goto check_again_later;
  2453. }
  2454. }
  2455. /* AICL only for usb wall charger */
  2456. if ((active_path & USB_ACTIVE_BIT) && usb_target_ma > 0 &&
  2457. !chip->disable_aicl) {
  2458. reg_loop = pm_chg_get_regulation_loop(chip);
  2459. pr_debug("reg_loop=0x%x usb_ma = %d\n", reg_loop, usb_ma);
  2460. if ((reg_loop & VIN_ACTIVE_BIT) &&
  2461. (usb_ma > USB_WALL_THRESHOLD_MA)
  2462. && !charging_disabled) {
  2463. decrease_usb_ma_value(&usb_ma);
  2464. usb_target_ma = usb_ma;
  2465. /* end AICL here */
  2466. __pm8921_charger_vbus_draw(usb_ma);
  2467. pr_debug("usb_now=%d, usb_target = %d\n",
  2468. usb_ma, usb_target_ma);
  2469. }
  2470. }
  2471. reg_loop = pm_chg_get_regulation_loop(chip);
  2472. pr_debug("reg_loop=0x%x usb_ma = %d\n", reg_loop, usb_ma);
  2473. rc = get_prop_batt_current(chip, &ibat);
  2474. if ((reg_loop & VIN_ACTIVE_BIT) && !chip->disable_chg_rmvl_wrkarnd) {
  2475. if (ibat > 0 && !rc) {
  2476. pr_debug("revboost ibat = %d fsm = %d loop = 0x%x\n",
  2477. ibat, pm_chg_get_fsm_state(chip), reg_loop);
  2478. attempt_reverse_boost_fix(chip);
  2479. /* after reverse boost fix check if the active
  2480. * charger was detected as removed */
  2481. active_chg_plugged_in
  2482. = is_active_chg_plugged_in(chip,
  2483. active_path);
  2484. pr_debug("revboost post: active_chg_plugged_in = %d\n",
  2485. active_chg_plugged_in);
  2486. }
  2487. }
  2488. active_chg_plugged_in = is_active_chg_plugged_in(chip, active_path);
  2489. pr_debug("active_path = 0x%x, active_chg = %d\n",
  2490. active_path, active_chg_plugged_in);
  2491. chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
  2492. if (chg_gone == 1 && active_chg_plugged_in == 1 &&
  2493. !chip->disable_chg_rmvl_wrkarnd) {
  2494. pr_debug("chg_gone=%d, active_chg_plugged_in = %d\n",
  2495. chg_gone, active_chg_plugged_in);
  2496. unplug_ovp_fet_open(chip);
  2497. }
  2498. /* AICL only for usb wall charger */
  2499. if (!(reg_loop & VIN_ACTIVE_BIT) && (active_path & USB_ACTIVE_BIT)
  2500. && usb_target_ma > 0
  2501. && !charging_disabled
  2502. && !chip->disable_aicl) {
  2503. /* only increase iusb_max if vin loop not active */
  2504. if (usb_ma < usb_target_ma) {
  2505. increase_usb_ma_value(&usb_ma);
  2506. if (usb_ma > usb_target_ma)
  2507. usb_ma = usb_target_ma;
  2508. __pm8921_charger_vbus_draw(usb_ma);
  2509. pr_debug("usb_now=%d, usb_target = %d\n",
  2510. usb_ma, usb_target_ma);
  2511. ramp = true;
  2512. } else {
  2513. usb_target_ma = usb_ma;
  2514. }
  2515. }
  2516. check_again_later:
  2517. pr_debug("ramp: %d\n", ramp);
  2518. /* schedule to check again later */
  2519. if (ramp)
  2520. schedule_delayed_work(&chip->unplug_check_work,
  2521. msecs_to_jiffies(UNPLUG_CHECK_RAMP_MS));
  2522. else
  2523. schedule_delayed_work(&chip->unplug_check_work,
  2524. msecs_to_jiffies(UNPLUG_CHECK_WAIT_PERIOD_MS));
  2525. }
  2526. static irqreturn_t loop_change_irq_handler(int irq, void *data)
  2527. {
  2528. struct pm8921_chg_chip *chip = data;
  2529. pr_debug("fsm_state=%d reg_loop=0x%x\n",
  2530. pm_chg_get_fsm_state(data),
  2531. pm_chg_get_regulation_loop(data));
  2532. schedule_work(&chip->unplug_check_work.work);
  2533. return IRQ_HANDLED;
  2534. }
  2535. struct ibatmax_max_adj_entry {
  2536. int ibat_max_ma;
  2537. int max_adj_ma;
  2538. };
  2539. static struct ibatmax_max_adj_entry ibatmax_adj_table[] = {
  2540. {975, 300},
  2541. {1475, 150},
  2542. {1975, 200},
  2543. {2475, 250},
  2544. };
  2545. static int find_ibat_max_adj_ma(int ibat_target_ma)
  2546. {
  2547. int i = 0;
  2548. for (i = ARRAY_SIZE(ibatmax_adj_table); i > 0; i--) {
  2549. if (ibat_target_ma >= ibatmax_adj_table[i - 1].ibat_max_ma)
  2550. break;
  2551. }
  2552. if (i > 0)
  2553. i--;
  2554. return ibatmax_adj_table[i].max_adj_ma;
  2555. }
  2556. static irqreturn_t fastchg_irq_handler(int irq, void *data)
  2557. {
  2558. struct pm8921_chg_chip *chip = data;
  2559. int high_transition;
  2560. high_transition = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  2561. if (high_transition && !delayed_work_pending(&chip->eoc_work)) {
  2562. wake_lock(&chip->eoc_wake_lock);
  2563. schedule_delayed_work(&chip->eoc_work,
  2564. round_jiffies_relative(msecs_to_jiffies
  2565. (EOC_CHECK_PERIOD_MS)));
  2566. }
  2567. if (high_transition
  2568. && chip->btc_override
  2569. && !delayed_work_pending(&chip->btc_override_work)) {
  2570. schedule_delayed_work(&chip->btc_override_work,
  2571. round_jiffies_relative(msecs_to_jiffies
  2572. (chip->btc_delay_ms)));
  2573. }
  2574. power_supply_changed(&chip->batt_psy);
  2575. bms_notify_check(chip);
  2576. return IRQ_HANDLED;
  2577. }
  2578. static irqreturn_t trklchg_irq_handler(int irq, void *data)
  2579. {
  2580. struct pm8921_chg_chip *chip = data;
  2581. power_supply_changed(&chip->batt_psy);
  2582. return IRQ_HANDLED;
  2583. }
  2584. static irqreturn_t batt_removed_irq_handler(int irq, void *data)
  2585. {
  2586. struct pm8921_chg_chip *chip = data;
  2587. int status;
  2588. status = pm_chg_get_rt_status(chip, BATT_REMOVED_IRQ);
  2589. pr_debug("battery present=%d state=%d", !status,
  2590. pm_chg_get_fsm_state(data));
  2591. handle_stop_ext_chg(chip);
  2592. power_supply_changed(&chip->batt_psy);
  2593. return IRQ_HANDLED;
  2594. }
  2595. static irqreturn_t batttemp_hot_irq_handler(int irq, void *data)
  2596. {
  2597. struct pm8921_chg_chip *chip = data;
  2598. handle_stop_ext_chg(chip);
  2599. power_supply_changed(&chip->batt_psy);
  2600. return IRQ_HANDLED;
  2601. }
  2602. static irqreturn_t chghot_irq_handler(int irq, void *data)
  2603. {
  2604. struct pm8921_chg_chip *chip = data;
  2605. pr_debug("Chg hot fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2606. power_supply_changed(&chip->batt_psy);
  2607. power_supply_changed(&chip->usb_psy);
  2608. handle_stop_ext_chg(chip);
  2609. return IRQ_HANDLED;
  2610. }
  2611. static irqreturn_t batttemp_cold_irq_handler(int irq, void *data)
  2612. {
  2613. struct pm8921_chg_chip *chip = data;
  2614. pr_debug("Batt cold fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2615. handle_stop_ext_chg(chip);
  2616. power_supply_changed(&chip->batt_psy);
  2617. power_supply_changed(&chip->usb_psy);
  2618. return IRQ_HANDLED;
  2619. }
  2620. static irqreturn_t chg_gone_irq_handler(int irq, void *data)
  2621. {
  2622. struct pm8921_chg_chip *chip = data;
  2623. int chg_gone, usb_chg_plugged_in;
  2624. usb_chg_plugged_in = is_usb_chg_plugged_in(chip);
  2625. chg_gone = pm_chg_get_rt_status(chip, CHG_GONE_IRQ);
  2626. pr_debug("chg_gone=%d, usb_valid = %d\n", chg_gone, usb_chg_plugged_in);
  2627. pr_debug("Chg gone fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2628. power_supply_changed(&chip->batt_psy);
  2629. power_supply_changed(&chip->usb_psy);
  2630. return IRQ_HANDLED;
  2631. }
  2632. /*
  2633. *
  2634. * bat_temp_ok_irq_handler - is edge triggered, hence it will
  2635. * fire for two cases:
  2636. *
  2637. * If the interrupt line switches to high temperature is okay
  2638. * and thus charging begins.
  2639. * If bat_temp_ok is low this means the temperature is now
  2640. * too hot or cold, so charging is stopped.
  2641. *
  2642. */
  2643. static irqreturn_t bat_temp_ok_irq_handler(int irq, void *data)
  2644. {
  2645. int bat_temp_ok;
  2646. struct pm8921_chg_chip *chip = data;
  2647. bat_temp_ok = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
  2648. pr_debug("batt_temp_ok = %d fsm_state%d\n",
  2649. bat_temp_ok, pm_chg_get_fsm_state(data));
  2650. if (bat_temp_ok)
  2651. handle_start_ext_chg(chip);
  2652. else
  2653. handle_stop_ext_chg(chip);
  2654. power_supply_changed(&chip->batt_psy);
  2655. power_supply_changed(&chip->usb_psy);
  2656. bms_notify_check(chip);
  2657. return IRQ_HANDLED;
  2658. }
  2659. static irqreturn_t coarse_det_low_irq_handler(int irq, void *data)
  2660. {
  2661. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2662. return IRQ_HANDLED;
  2663. }
  2664. static irqreturn_t vdd_loop_irq_handler(int irq, void *data)
  2665. {
  2666. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2667. return IRQ_HANDLED;
  2668. }
  2669. static irqreturn_t vreg_ov_irq_handler(int irq, void *data)
  2670. {
  2671. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2672. return IRQ_HANDLED;
  2673. }
  2674. static irqreturn_t vbatdet_irq_handler(int irq, void *data)
  2675. {
  2676. pr_debug("fsm_state=%d\n", pm_chg_get_fsm_state(data));
  2677. return IRQ_HANDLED;
  2678. }
  2679. static irqreturn_t batfet_irq_handler(int irq, void *data)
  2680. {
  2681. struct pm8921_chg_chip *chip = data;
  2682. pr_debug("vreg ov\n");
  2683. power_supply_changed(&chip->batt_psy);
  2684. return IRQ_HANDLED;
  2685. }
  2686. static irqreturn_t dcin_valid_irq_handler(int irq, void *data)
  2687. {
  2688. struct pm8921_chg_chip *chip = data;
  2689. int dc_present;
  2690. pm_chg_failed_clear(chip, 1);
  2691. dc_present = pm_chg_get_rt_status(chip, DCIN_VALID_IRQ);
  2692. if (chip->dc_present ^ dc_present)
  2693. pm8921_bms_calibrate_hkadc();
  2694. if (dc_present)
  2695. pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
  2696. else
  2697. pm8921_chg_disable_irq(chip, CHG_GONE_IRQ);
  2698. chip->dc_present = dc_present;
  2699. if (chip->ext_psy) {
  2700. if (dc_present)
  2701. handle_start_ext_chg(chip);
  2702. else
  2703. handle_stop_ext_chg(chip);
  2704. } else {
  2705. if (dc_present)
  2706. schedule_delayed_work(&chip->unplug_check_work,
  2707. msecs_to_jiffies(UNPLUG_CHECK_WAIT_PERIOD_MS));
  2708. power_supply_changed(&chip->dc_psy);
  2709. }
  2710. power_supply_changed(&chip->batt_psy);
  2711. return IRQ_HANDLED;
  2712. }
  2713. static irqreturn_t dcin_ov_irq_handler(int irq, void *data)
  2714. {
  2715. struct pm8921_chg_chip *chip = data;
  2716. handle_stop_ext_chg(chip);
  2717. return IRQ_HANDLED;
  2718. }
  2719. static irqreturn_t dcin_uv_irq_handler(int irq, void *data)
  2720. {
  2721. struct pm8921_chg_chip *chip = data;
  2722. handle_stop_ext_chg(chip);
  2723. return IRQ_HANDLED;
  2724. }
  2725. static int __pm_batt_external_power_changed_work(struct device *dev, void *data)
  2726. {
  2727. struct power_supply *psy = &the_chip->batt_psy;
  2728. struct power_supply *epsy = dev_get_drvdata(dev);
  2729. int i, dcin_irq;
  2730. /* Only search for external supply if none is registered */
  2731. if (!the_chip->ext_psy) {
  2732. dcin_irq = the_chip->pmic_chg_irq[DCIN_VALID_IRQ];
  2733. for (i = 0; i < epsy->num_supplicants; i++) {
  2734. if (!strncmp(epsy->supplied_to[i], psy->name, 7)) {
  2735. if (!strncmp(epsy->name, "dc", 2)) {
  2736. the_chip->ext_psy = epsy;
  2737. dcin_valid_irq_handler(dcin_irq,
  2738. the_chip);
  2739. }
  2740. }
  2741. }
  2742. }
  2743. return 0;
  2744. }
  2745. static void pm_batt_external_power_changed(struct power_supply *psy)
  2746. {
  2747. if (!the_chip)
  2748. return;
  2749. /* Only look for an external supply if it hasn't been registered */
  2750. if (!the_chip->ext_psy)
  2751. class_for_each_device(power_supply_class, NULL, psy,
  2752. __pm_batt_external_power_changed_work);
  2753. }
  2754. /**
  2755. * update_heartbeat - internal function to update userspace
  2756. * per update_time minutes
  2757. *
  2758. */
  2759. #define LOW_SOC_HEARTBEAT_MS 20000
  2760. static void update_heartbeat(struct work_struct *work)
  2761. {
  2762. struct delayed_work *dwork = to_delayed_work(work);
  2763. struct pm8921_chg_chip *chip = container_of(dwork,
  2764. struct pm8921_chg_chip, update_heartbeat_work);
  2765. bool chg_present = chip->usb_present || chip->dc_present;
  2766. /* for battery health when charger is not connected */
  2767. if (chip->btc_override && !chg_present)
  2768. schedule_delayed_work(&chip->btc_override_work,
  2769. round_jiffies_relative(msecs_to_jiffies
  2770. (chip->btc_delay_ms)));
  2771. /*
  2772. * check temp thresholds when charger is present and
  2773. * and battery is FULL. The temperature here can impact
  2774. * the charging restart conditions.
  2775. */
  2776. if (chip->btc_override && chg_present &&
  2777. !wake_lock_active(&chip->eoc_wake_lock))
  2778. check_temp_thresholds(chip);
  2779. power_supply_changed(&chip->batt_psy);
  2780. if (chip->recent_reported_soc <= 20)
  2781. schedule_delayed_work(&chip->update_heartbeat_work,
  2782. round_jiffies_relative(msecs_to_jiffies
  2783. (LOW_SOC_HEARTBEAT_MS)));
  2784. else
  2785. schedule_delayed_work(&chip->update_heartbeat_work,
  2786. round_jiffies_relative(msecs_to_jiffies
  2787. (chip->update_time)));
  2788. }
  2789. #define VDD_LOOP_ACTIVE_BIT BIT(3)
  2790. #define VDD_MAX_INCREASE_MV 400
  2791. static int vdd_max_increase_mv = VDD_MAX_INCREASE_MV;
  2792. module_param(vdd_max_increase_mv, int, 0644);
  2793. static int ichg_threshold_ua = -400000;
  2794. module_param(ichg_threshold_ua, int, 0644);
  2795. #define MIN_DELTA_MV_TO_INCREASE_VDD_MAX 13
  2796. #define PM8921_CHG_VDDMAX_RES_MV 10
  2797. static void adjust_vdd_max_for_fastchg(struct pm8921_chg_chip *chip,
  2798. int vbat_batt_terminal_uv)
  2799. {
  2800. int adj_vdd_max_mv, programmed_vdd_max;
  2801. int vbat_batt_terminal_mv;
  2802. int reg_loop;
  2803. int delta_mv = 0;
  2804. if (chip->rconn_mohm == 0) {
  2805. pr_debug("Exiting as rconn_mohm is 0\n");
  2806. return;
  2807. }
  2808. /* adjust vdd_max only in normal temperature zone */
  2809. if (chip->is_bat_cool || chip->is_bat_warm) {
  2810. pr_debug("Exiting is_bat_cool = %d is_batt_warm = %d\n",
  2811. chip->is_bat_cool, chip->is_bat_warm);
  2812. return;
  2813. }
  2814. reg_loop = pm_chg_get_regulation_loop(chip);
  2815. if (!(reg_loop & VDD_LOOP_ACTIVE_BIT)) {
  2816. pr_debug("Exiting Vdd loop is not active reg loop=0x%x\n",
  2817. reg_loop);
  2818. return;
  2819. }
  2820. vbat_batt_terminal_mv = vbat_batt_terminal_uv/1000;
  2821. pm_chg_vddmax_get(the_chip, &programmed_vdd_max);
  2822. delta_mv = chip->max_voltage_mv - vbat_batt_terminal_mv;
  2823. if (delta_mv > 0) /* meaning we want to increase the vddmax */ {
  2824. if (delta_mv < MIN_DELTA_MV_TO_INCREASE_VDD_MAX) {
  2825. pr_debug("vterm = %d is not low enough to inc vdd\n",
  2826. vbat_batt_terminal_mv);
  2827. return;
  2828. }
  2829. }
  2830. adj_vdd_max_mv = programmed_vdd_max + delta_mv;
  2831. pr_debug("vdd_max needs to be changed by %d mv from %d to %d\n",
  2832. delta_mv,
  2833. programmed_vdd_max,
  2834. adj_vdd_max_mv);
  2835. if (adj_vdd_max_mv < chip->max_voltage_mv) {
  2836. pr_debug("adj vdd_max lower than default max voltage\n");
  2837. return;
  2838. }
  2839. adj_vdd_max_mv = (adj_vdd_max_mv / PM8921_CHG_VDDMAX_RES_MV)
  2840. * PM8921_CHG_VDDMAX_RES_MV;
  2841. if (adj_vdd_max_mv > (chip->max_voltage_mv + vdd_max_increase_mv))
  2842. adj_vdd_max_mv = chip->max_voltage_mv + vdd_max_increase_mv;
  2843. pr_debug("adjusting vdd_max_mv to %d to make "
  2844. "vbat_batt_termial_uv = %d to %d\n",
  2845. adj_vdd_max_mv, vbat_batt_terminal_uv, chip->max_voltage_mv);
  2846. pm_chg_vddmax_set(chip, adj_vdd_max_mv);
  2847. }
  2848. static void set_appropriate_vbatdet(struct pm8921_chg_chip *chip)
  2849. {
  2850. if (chip->is_bat_cool)
  2851. pm_chg_vbatdet_set(the_chip,
  2852. the_chip->cool_bat_voltage
  2853. - the_chip->resume_voltage_delta);
  2854. else if (chip->is_bat_warm)
  2855. pm_chg_vbatdet_set(the_chip,
  2856. the_chip->warm_bat_voltage
  2857. - the_chip->resume_voltage_delta);
  2858. else
  2859. pm_chg_vbatdet_set(the_chip,
  2860. the_chip->max_voltage_mv
  2861. - the_chip->resume_voltage_delta);
  2862. }
  2863. static void set_appropriate_battery_current(struct pm8921_chg_chip *chip)
  2864. {
  2865. unsigned int chg_current = chip->max_bat_chg_current;
  2866. if (chip->is_bat_cool)
  2867. chg_current = min(chg_current, chip->cool_bat_chg_current);
  2868. if (chip->is_bat_warm)
  2869. chg_current = min(chg_current, chip->warm_bat_chg_current);
  2870. if (thermal_mitigation != 0 && chip->thermal_mitigation)
  2871. chg_current = min(chg_current,
  2872. chip->thermal_mitigation[thermal_mitigation]);
  2873. pm_chg_ibatmax_set(the_chip, chg_current);
  2874. }
  2875. #define TEMP_HYSTERISIS_DECIDEGC 20
  2876. static void battery_cool(bool enter)
  2877. {
  2878. pr_debug("enter = %d\n", enter);
  2879. if (enter == the_chip->is_bat_cool)
  2880. return;
  2881. the_chip->is_bat_cool = enter;
  2882. if (enter)
  2883. pm_chg_vddmax_set(the_chip, the_chip->cool_bat_voltage);
  2884. else
  2885. pm_chg_vddmax_set(the_chip, the_chip->max_voltage_mv);
  2886. set_appropriate_battery_current(the_chip);
  2887. set_appropriate_vbatdet(the_chip);
  2888. }
  2889. static void battery_warm(bool enter)
  2890. {
  2891. pr_debug("enter = %d\n", enter);
  2892. if (enter == the_chip->is_bat_warm)
  2893. return;
  2894. the_chip->is_bat_warm = enter;
  2895. if (enter)
  2896. pm_chg_vddmax_set(the_chip, the_chip->warm_bat_voltage);
  2897. else
  2898. pm_chg_vddmax_set(the_chip, the_chip->max_voltage_mv);
  2899. set_appropriate_battery_current(the_chip);
  2900. set_appropriate_vbatdet(the_chip);
  2901. }
  2902. static void check_temp_thresholds(struct pm8921_chg_chip *chip)
  2903. {
  2904. int temp = 0, rc;
  2905. rc = get_prop_batt_temp(chip, &temp);
  2906. pr_debug("temp = %d, warm_thr_temp = %d, cool_thr_temp = %d\n",
  2907. temp, chip->warm_temp_dc,
  2908. chip->cool_temp_dc);
  2909. if (chip->warm_temp_dc != INT_MIN) {
  2910. if (chip->is_bat_warm
  2911. && temp < chip->warm_temp_dc - chip->hysteresis_temp_dc)
  2912. battery_warm(false);
  2913. else if (!chip->is_bat_warm && temp >= chip->warm_temp_dc)
  2914. battery_warm(true);
  2915. }
  2916. if (chip->cool_temp_dc != INT_MIN) {
  2917. if (chip->is_bat_cool
  2918. && temp > chip->cool_temp_dc + chip->hysteresis_temp_dc)
  2919. battery_cool(false);
  2920. else if (!chip->is_bat_cool && temp <= chip->cool_temp_dc)
  2921. battery_cool(true);
  2922. }
  2923. }
  2924. enum {
  2925. CHG_IN_PROGRESS,
  2926. CHG_NOT_IN_PROGRESS,
  2927. CHG_FINISHED,
  2928. };
  2929. #define VBAT_TOLERANCE_MV 70
  2930. #define CHG_DISABLE_MSLEEP 100
  2931. static int is_charging_finished(struct pm8921_chg_chip *chip,
  2932. int vbat_batt_terminal_uv, int ichg_meas_ma)
  2933. {
  2934. int vbat_programmed, iterm_programmed, vbat_intended;
  2935. int regulation_loop, fast_chg, vcp;
  2936. int rc;
  2937. static int last_vbat_programmed = -EINVAL;
  2938. if (!is_ext_charging(chip)) {
  2939. /* return if the battery is not being fastcharged */
  2940. fast_chg = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  2941. pr_debug("fast_chg = %d\n", fast_chg);
  2942. if (fast_chg == 0)
  2943. return CHG_NOT_IN_PROGRESS;
  2944. vcp = pm_chg_get_rt_status(chip, VCP_IRQ);
  2945. pr_debug("vcp = %d\n", vcp);
  2946. if (vcp == 1)
  2947. return CHG_IN_PROGRESS;
  2948. /* reset count if battery is hot/cold */
  2949. rc = pm_chg_get_rt_status(chip, BAT_TEMP_OK_IRQ);
  2950. pr_debug("batt_temp_ok = %d\n", rc);
  2951. if (rc == 0)
  2952. return CHG_IN_PROGRESS;
  2953. rc = pm_chg_vddmax_get(chip, &vbat_programmed);
  2954. if (rc) {
  2955. pr_err("couldnt read vddmax rc = %d\n", rc);
  2956. return CHG_IN_PROGRESS;
  2957. }
  2958. pr_debug("vddmax = %d vbat_batt_terminal_uv=%d\n",
  2959. vbat_programmed, vbat_batt_terminal_uv);
  2960. if (last_vbat_programmed == -EINVAL)
  2961. last_vbat_programmed = vbat_programmed;
  2962. if (last_vbat_programmed != vbat_programmed) {
  2963. /* vddmax changed, reset and check again */
  2964. pr_debug("vddmax = %d last_vdd_max=%d\n",
  2965. vbat_programmed, last_vbat_programmed);
  2966. last_vbat_programmed = vbat_programmed;
  2967. return CHG_IN_PROGRESS;
  2968. }
  2969. if (chip->is_bat_cool)
  2970. vbat_intended = chip->cool_bat_voltage;
  2971. else if (chip->is_bat_warm)
  2972. vbat_intended = chip->warm_bat_voltage;
  2973. else
  2974. vbat_intended = chip->max_voltage_mv;
  2975. if (vbat_batt_terminal_uv / 1000
  2976. < vbat_intended - MIN_DELTA_MV_TO_INCREASE_VDD_MAX) {
  2977. pr_debug("terminal_uv:%d < vbat_intended:%d-hyst:%d\n",
  2978. vbat_batt_terminal_uv,
  2979. vbat_intended,
  2980. vbat_intended);
  2981. return CHG_IN_PROGRESS;
  2982. }
  2983. regulation_loop = pm_chg_get_regulation_loop(chip);
  2984. if (regulation_loop < 0) {
  2985. pr_err("couldnt read the regulation loop err=%d\n",
  2986. regulation_loop);
  2987. return CHG_IN_PROGRESS;
  2988. }
  2989. pr_debug("regulation_loop=%d\n", regulation_loop);
  2990. if (regulation_loop != 0 && regulation_loop != VDD_LOOP)
  2991. return CHG_IN_PROGRESS;
  2992. } /* !is_ext_charging */
  2993. /* reset count if battery chg current is more than iterm */
  2994. rc = pm_chg_iterm_get(chip, &iterm_programmed);
  2995. if (rc) {
  2996. pr_err("couldnt read iterm rc = %d\n", rc);
  2997. return CHG_IN_PROGRESS;
  2998. }
  2999. pr_debug("iterm_programmed = %d ichg_meas_ma=%d\n",
  3000. iterm_programmed, ichg_meas_ma);
  3001. /*
  3002. * ichg_meas_ma < 0 means battery is drawing current
  3003. * ichg_meas_ma > 0 means battery is providing current
  3004. */
  3005. if (ichg_meas_ma > 0)
  3006. return CHG_IN_PROGRESS;
  3007. if (ichg_meas_ma * -1 > iterm_programmed)
  3008. return CHG_IN_PROGRESS;
  3009. return CHG_FINISHED;
  3010. }
  3011. #define COMP_OVERRIDE_HOT_BANK 6
  3012. #define COMP_OVERRIDE_COLD_BANK 7
  3013. #define COMP_OVERRIDE_BIT BIT(1)
  3014. static int pm_chg_override_cold(struct pm8921_chg_chip *chip, int flag)
  3015. {
  3016. u8 val;
  3017. int rc = 0;
  3018. val = 0x80 | COMP_OVERRIDE_COLD_BANK << 2 | COMP_OVERRIDE_BIT;
  3019. if (flag)
  3020. val |= 0x01;
  3021. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3022. if (rc < 0)
  3023. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3024. pr_debug("btc cold = %d val = 0x%x\n", flag, val);
  3025. return rc;
  3026. }
  3027. static int pm_chg_override_hot(struct pm8921_chg_chip *chip, int flag)
  3028. {
  3029. u8 val;
  3030. int rc = 0;
  3031. val = 0x80 | COMP_OVERRIDE_HOT_BANK << 2 | COMP_OVERRIDE_BIT;
  3032. if (flag)
  3033. val |= 0x01;
  3034. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3035. if (rc < 0)
  3036. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3037. pr_debug("btc hot = %d val = 0x%x\n", flag, val);
  3038. return rc;
  3039. }
  3040. static void __devinit pm8921_chg_btc_override_init(struct pm8921_chg_chip *chip)
  3041. {
  3042. int rc = 0;
  3043. u8 reg;
  3044. u8 val;
  3045. val = COMP_OVERRIDE_HOT_BANK << 2;
  3046. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3047. if (rc < 0) {
  3048. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3049. goto cold_init;
  3050. }
  3051. rc = pm8xxx_readb(chip->dev->parent, COMPARATOR_OVERRIDE, &reg);
  3052. if (rc < 0) {
  3053. pr_err("Could not read bank %d of override rc = %d\n",
  3054. COMP_OVERRIDE_HOT_BANK, rc);
  3055. goto cold_init;
  3056. }
  3057. if ((reg & COMP_OVERRIDE_BIT) != COMP_OVERRIDE_BIT) {
  3058. /* for now override it as not hot */
  3059. rc = pm_chg_override_hot(chip, 0);
  3060. if (rc < 0)
  3061. pr_err("Could not override hot rc = %d\n", rc);
  3062. }
  3063. cold_init:
  3064. val = COMP_OVERRIDE_COLD_BANK << 2;
  3065. rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, val);
  3066. if (rc < 0) {
  3067. pr_err("Could not write 0x%x to override rc = %d\n", val, rc);
  3068. return;
  3069. }
  3070. rc = pm8xxx_readb(chip->dev->parent, COMPARATOR_OVERRIDE, &reg);
  3071. if (rc < 0) {
  3072. pr_err("Could not read bank %d of override rc = %d\n",
  3073. COMP_OVERRIDE_COLD_BANK, rc);
  3074. return;
  3075. }
  3076. if ((reg & COMP_OVERRIDE_BIT) != COMP_OVERRIDE_BIT) {
  3077. /* for now override it as not cold */
  3078. rc = pm_chg_override_cold(chip, 0);
  3079. if (rc < 0)
  3080. pr_err("Could not override cold rc = %d\n", rc);
  3081. }
  3082. }
  3083. static void btc_override_worker(struct work_struct *work)
  3084. {
  3085. int decidegc;
  3086. int temp;
  3087. int rc = 0;
  3088. struct delayed_work *dwork = to_delayed_work(work);
  3089. struct pm8921_chg_chip *chip = container_of(dwork,
  3090. struct pm8921_chg_chip, btc_override_work);
  3091. if (!chip->btc_override) {
  3092. pr_err("called when not enabled\n");
  3093. return;
  3094. }
  3095. rc = get_prop_batt_temp(chip, &decidegc);
  3096. if (rc) {
  3097. pr_info("Failed to read temperature\n");
  3098. goto fail_btc_temp;
  3099. }
  3100. pr_debug("temp=%d\n", decidegc);
  3101. temp = pm_chg_get_rt_status(chip, BATTTEMP_HOT_IRQ);
  3102. if (temp) {
  3103. if (decidegc < chip->btc_override_hot_decidegc -
  3104. chip->hysteresis_temp_dc)
  3105. /* stop forcing batt hot */
  3106. rc = pm_chg_override_hot(chip, 0);
  3107. if (rc)
  3108. pr_err("Couldnt write 0 to hot comp\n");
  3109. } else {
  3110. if (decidegc >= chip->btc_override_hot_decidegc)
  3111. /* start forcing batt hot */
  3112. rc = pm_chg_override_hot(chip, 1);
  3113. if (rc && chip->btc_panic_if_cant_stop_chg)
  3114. panic("Couldnt override comps to stop chg\n");
  3115. }
  3116. temp = pm_chg_get_rt_status(chip, BATTTEMP_COLD_IRQ);
  3117. if (temp) {
  3118. if (decidegc > chip->btc_override_cold_decidegc +
  3119. chip->hysteresis_temp_dc)
  3120. /* stop forcing batt cold */
  3121. rc = pm_chg_override_cold(chip, 0);
  3122. if (rc)
  3123. pr_err("Couldnt write 0 to cold comp\n");
  3124. } else {
  3125. if (decidegc <= chip->btc_override_cold_decidegc)
  3126. /* start forcing batt cold */
  3127. rc = pm_chg_override_cold(chip, 1);
  3128. if (rc && chip->btc_panic_if_cant_stop_chg)
  3129. panic("Couldnt override comps to stop chg\n");
  3130. }
  3131. if ((is_dc_chg_plugged_in(the_chip) || is_usb_chg_plugged_in(the_chip))
  3132. && get_prop_batt_status(chip) != POWER_SUPPLY_STATUS_FULL) {
  3133. schedule_delayed_work(&chip->btc_override_work,
  3134. round_jiffies_relative(msecs_to_jiffies
  3135. (chip->btc_delay_ms)));
  3136. return;
  3137. }
  3138. fail_btc_temp:
  3139. rc = pm_chg_override_hot(chip, 0);
  3140. if (rc)
  3141. pr_err("Couldnt write 0 to hot comp\n");
  3142. rc = pm_chg_override_cold(chip, 0);
  3143. if (rc)
  3144. pr_err("Couldnt write 0 to cold comp\n");
  3145. }
  3146. /**
  3147. * eoc_worker - internal function to check if battery EOC
  3148. * has happened
  3149. *
  3150. * If all conditions favouring, if the charge current is
  3151. * less than the term current for three consecutive times
  3152. * an EOC has happened.
  3153. * The wakelock is released if there is no need to reshedule
  3154. * - this happens when the battery is removed or EOC has
  3155. * happened
  3156. */
  3157. #define CONSECUTIVE_COUNT 3
  3158. static void eoc_worker(struct work_struct *work)
  3159. {
  3160. struct delayed_work *dwork = to_delayed_work(work);
  3161. struct pm8921_chg_chip *chip = container_of(dwork,
  3162. struct pm8921_chg_chip, eoc_work);
  3163. static int count;
  3164. int end;
  3165. int vbat_meas_uv, vbat_meas_mv;
  3166. int ichg_meas_ua, ichg_meas_ma;
  3167. int vbat_batt_terminal_uv;
  3168. pm8921_bms_get_simultaneous_battery_voltage_and_current(
  3169. &ichg_meas_ua, &vbat_meas_uv);
  3170. vbat_meas_mv = vbat_meas_uv / 1000;
  3171. /* rconn_mohm is in milliOhms */
  3172. ichg_meas_ma = ichg_meas_ua / 1000;
  3173. vbat_batt_terminal_uv = vbat_meas_uv
  3174. + ichg_meas_ma
  3175. * the_chip->rconn_mohm;
  3176. end = is_charging_finished(chip, vbat_batt_terminal_uv, ichg_meas_ma);
  3177. if (end == CHG_NOT_IN_PROGRESS && (!chip->btc_override ||
  3178. !(chip->usb_present || chip->dc_present))) {
  3179. count = 0;
  3180. goto eoc_worker_stop;
  3181. }
  3182. if (end == CHG_FINISHED) {
  3183. count++;
  3184. } else {
  3185. count = 0;
  3186. }
  3187. if (count == CONSECUTIVE_COUNT) {
  3188. count = 0;
  3189. pr_info("End of Charging\n");
  3190. pm_chg_auto_enable(chip, 0);
  3191. if (is_ext_charging(chip))
  3192. chip->ext_charge_done = true;
  3193. if (chip->is_bat_warm || chip->is_bat_cool)
  3194. chip->bms_notify.is_battery_full = 0;
  3195. else
  3196. chip->bms_notify.is_battery_full = 1;
  3197. /* declare end of charging by invoking chgdone interrupt */
  3198. chgdone_irq_handler(chip->pmic_chg_irq[CHGDONE_IRQ], chip);
  3199. } else {
  3200. check_temp_thresholds(chip);
  3201. if (end != CHG_NOT_IN_PROGRESS)
  3202. adjust_vdd_max_for_fastchg(chip, vbat_batt_terminal_uv);
  3203. pr_debug("EOC count = %d\n", count);
  3204. schedule_delayed_work(&chip->eoc_work,
  3205. round_jiffies_relative(msecs_to_jiffies
  3206. (EOC_CHECK_PERIOD_MS)));
  3207. return;
  3208. }
  3209. eoc_worker_stop:
  3210. /* set the vbatdet back, in case it was changed to trigger charging */
  3211. set_appropriate_vbatdet(chip);
  3212. wake_unlock(&chip->eoc_wake_lock);
  3213. }
  3214. /**
  3215. * set_disable_status_param -
  3216. *
  3217. * Internal function to disable battery charging and also disable drawing
  3218. * any current from the source. The device is forced to run on a battery
  3219. * after this.
  3220. */
  3221. static int set_disable_status_param(const char *val, struct kernel_param *kp)
  3222. {
  3223. int ret;
  3224. struct pm8921_chg_chip *chip = the_chip;
  3225. ret = param_set_int(val, kp);
  3226. if (ret) {
  3227. pr_err("error setting value %d\n", ret);
  3228. return ret;
  3229. }
  3230. pr_info("factory set disable param to %d\n", charging_disabled);
  3231. if (chip) {
  3232. pm_chg_auto_enable(chip, !charging_disabled);
  3233. pm_chg_charge_dis(chip, charging_disabled);
  3234. }
  3235. return 0;
  3236. }
  3237. module_param_call(disabled, set_disable_status_param, param_get_uint,
  3238. &charging_disabled, 0644);
  3239. static int rconn_mohm;
  3240. static int set_rconn_mohm(const char *val, struct kernel_param *kp)
  3241. {
  3242. int ret;
  3243. struct pm8921_chg_chip *chip = the_chip;
  3244. ret = param_set_int(val, kp);
  3245. if (ret) {
  3246. pr_err("error setting value %d\n", ret);
  3247. return ret;
  3248. }
  3249. if (chip)
  3250. chip->rconn_mohm = rconn_mohm;
  3251. return 0;
  3252. }
  3253. module_param_call(rconn_mohm, set_rconn_mohm, param_get_uint,
  3254. &rconn_mohm, 0644);
  3255. /**
  3256. * set_thermal_mitigation_level -
  3257. *
  3258. * Internal function to control battery charging current to reduce
  3259. * temperature
  3260. */
  3261. static int set_therm_mitigation_level(const char *val, struct kernel_param *kp)
  3262. {
  3263. int ret;
  3264. struct pm8921_chg_chip *chip = the_chip;
  3265. ret = param_set_int(val, kp);
  3266. if (ret) {
  3267. pr_err("error setting value %d\n", ret);
  3268. return ret;
  3269. }
  3270. if (!chip) {
  3271. pr_err("called before init\n");
  3272. return -EINVAL;
  3273. }
  3274. if (!chip->thermal_mitigation) {
  3275. pr_err("no thermal mitigation\n");
  3276. return -EINVAL;
  3277. }
  3278. if (thermal_mitigation < 0
  3279. || thermal_mitigation >= chip->thermal_levels) {
  3280. pr_err("out of bound level selected\n");
  3281. return -EINVAL;
  3282. }
  3283. set_appropriate_battery_current(chip);
  3284. return ret;
  3285. }
  3286. module_param_call(thermal_mitigation, set_therm_mitigation_level,
  3287. param_get_uint,
  3288. &thermal_mitigation, 0644);
  3289. static int set_usb_max_current(const char *val, struct kernel_param *kp)
  3290. {
  3291. int ret, mA;
  3292. struct pm8921_chg_chip *chip = the_chip;
  3293. ret = param_set_int(val, kp);
  3294. if (ret) {
  3295. pr_err("error setting value %d\n", ret);
  3296. return ret;
  3297. }
  3298. if (chip) {
  3299. pr_warn("setting current max to %d\n", usb_max_current);
  3300. pm_chg_iusbmax_get(chip, &mA);
  3301. if (mA > usb_max_current)
  3302. pm8921_charger_vbus_draw(usb_max_current);
  3303. return 0;
  3304. }
  3305. return -EINVAL;
  3306. }
  3307. module_param_call(usb_max_current, set_usb_max_current,
  3308. param_get_uint, &usb_max_current, 0644);
  3309. static void free_irqs(struct pm8921_chg_chip *chip)
  3310. {
  3311. int i;
  3312. for (i = 0; i < PM_CHG_MAX_INTS; i++)
  3313. if (chip->pmic_chg_irq[i]) {
  3314. free_irq(chip->pmic_chg_irq[i], chip);
  3315. chip->pmic_chg_irq[i] = 0;
  3316. }
  3317. }
  3318. #define PM8921_USB_TRIM_SEL_BIT BIT(6)
  3319. /* determines the initial present states */
  3320. static void __devinit determine_initial_state(struct pm8921_chg_chip *chip)
  3321. {
  3322. int fsm_state;
  3323. int is_fast_chg;
  3324. int rc = 0;
  3325. u8 trim_sel_reg = 0, regsbi;
  3326. chip->dc_present = !!is_dc_chg_plugged_in(chip);
  3327. chip->usb_present = !!is_usb_chg_plugged_in(chip);
  3328. notify_usb_of_the_plugin_event(chip->usb_present);
  3329. if (chip->usb_present || chip->dc_present) {
  3330. schedule_delayed_work(&chip->unplug_check_work,
  3331. msecs_to_jiffies(UNPLUG_CHECK_WAIT_PERIOD_MS));
  3332. pm8921_chg_enable_irq(chip, CHG_GONE_IRQ);
  3333. if (chip->btc_override)
  3334. schedule_delayed_work(&chip->btc_override_work,
  3335. round_jiffies_relative(msecs_to_jiffies
  3336. (chip->btc_delay_ms)));
  3337. }
  3338. pm8921_chg_enable_irq(chip, DCIN_VALID_IRQ);
  3339. pm8921_chg_enable_irq(chip, USBIN_VALID_IRQ);
  3340. pm8921_chg_enable_irq(chip, BATT_REMOVED_IRQ);
  3341. pm8921_chg_enable_irq(chip, BATT_INSERTED_IRQ);
  3342. pm8921_chg_enable_irq(chip, DCIN_OV_IRQ);
  3343. pm8921_chg_enable_irq(chip, DCIN_UV_IRQ);
  3344. pm8921_chg_enable_irq(chip, CHGFAIL_IRQ);
  3345. pm8921_chg_enable_irq(chip, FASTCHG_IRQ);
  3346. pm8921_chg_enable_irq(chip, VBATDET_LOW_IRQ);
  3347. pm8921_chg_enable_irq(chip, BAT_TEMP_OK_IRQ);
  3348. if (get_prop_batt_present(the_chip) || is_dc_chg_plugged_in(the_chip))
  3349. if (usb_chg_current)
  3350. /*
  3351. * Reissue a vbus draw call only if a battery
  3352. * or DC is present. We don't want to brown out the
  3353. * device if usb is its only source
  3354. */
  3355. __pm8921_charger_vbus_draw(usb_chg_current);
  3356. usb_chg_current = 0;
  3357. /*
  3358. * The bootloader could have started charging, a fastchg interrupt
  3359. * might not happen. Check the real time status and if it is fast
  3360. * charging invoke the handler so that the eoc worker could be
  3361. * started
  3362. */
  3363. is_fast_chg = pm_chg_get_rt_status(chip, FASTCHG_IRQ);
  3364. if (is_fast_chg)
  3365. fastchg_irq_handler(chip->pmic_chg_irq[FASTCHG_IRQ], chip);
  3366. fsm_state = pm_chg_get_fsm_state(chip);
  3367. if (is_battery_charging(fsm_state)) {
  3368. chip->bms_notify.is_charging = 1;
  3369. pm8921_bms_charging_began();
  3370. }
  3371. check_battery_valid(chip);
  3372. pr_debug("usb = %d, dc = %d batt = %d state=%d\n",
  3373. chip->usb_present,
  3374. chip->dc_present,
  3375. get_prop_batt_present(chip),
  3376. fsm_state);
  3377. /* Determine which USB trim column to use */
  3378. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917) {
  3379. chip->usb_trim_table = usb_trim_8917_table;
  3380. } else if (pm8xxx_get_version(chip->dev->parent) ==
  3381. PM8XXX_VERSION_8038) {
  3382. chip->usb_trim_table = usb_trim_8038_table;
  3383. } else if (pm8xxx_get_version(chip->dev->parent) ==
  3384. PM8XXX_VERSION_8921) {
  3385. rc = pm8xxx_readb(chip->dev->parent, REG_SBI_CONFIG, &regsbi);
  3386. rc |= pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, 0x5E);
  3387. rc |= pm8xxx_readb(chip->dev->parent, PM8921_USB_TRIM_SEL,
  3388. &trim_sel_reg);
  3389. rc |= pm8xxx_writeb(chip->dev->parent, REG_SBI_CONFIG, regsbi);
  3390. if (rc)
  3391. pr_err("Failed to read trim sel register rc=%d\n", rc);
  3392. if (trim_sel_reg & PM8921_USB_TRIM_SEL_BIT)
  3393. chip->usb_trim_table = usb_trim_pm8921_table_1;
  3394. else
  3395. chip->usb_trim_table = usb_trim_pm8921_table_2;
  3396. }
  3397. }
  3398. struct pm_chg_irq_init_data {
  3399. unsigned int irq_id;
  3400. char *name;
  3401. unsigned long flags;
  3402. irqreturn_t (*handler)(int, void *);
  3403. };
  3404. #define CHG_IRQ(_id, _flags, _handler) \
  3405. { \
  3406. .irq_id = _id, \
  3407. .name = #_id, \
  3408. .flags = _flags, \
  3409. .handler = _handler, \
  3410. }
  3411. struct pm_chg_irq_init_data chg_irq_data[] = {
  3412. CHG_IRQ(USBIN_VALID_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3413. usbin_valid_irq_handler),
  3414. CHG_IRQ(BATT_INSERTED_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3415. batt_inserted_irq_handler),
  3416. CHG_IRQ(VBATDET_LOW_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3417. vbatdet_low_irq_handler),
  3418. CHG_IRQ(CHGWDOG_IRQ, IRQF_TRIGGER_RISING, chgwdog_irq_handler),
  3419. CHG_IRQ(VCP_IRQ, IRQF_TRIGGER_RISING, vcp_irq_handler),
  3420. CHG_IRQ(ATCDONE_IRQ, IRQF_TRIGGER_RISING, atcdone_irq_handler),
  3421. CHG_IRQ(ATCFAIL_IRQ, IRQF_TRIGGER_RISING, atcfail_irq_handler),
  3422. CHG_IRQ(CHGDONE_IRQ, IRQF_TRIGGER_RISING, chgdone_irq_handler),
  3423. CHG_IRQ(CHGFAIL_IRQ, IRQF_TRIGGER_RISING, chgfail_irq_handler),
  3424. CHG_IRQ(CHGSTATE_IRQ, IRQF_TRIGGER_RISING, chgstate_irq_handler),
  3425. CHG_IRQ(LOOP_CHANGE_IRQ, IRQF_TRIGGER_RISING, loop_change_irq_handler),
  3426. CHG_IRQ(FASTCHG_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3427. fastchg_irq_handler),
  3428. CHG_IRQ(TRKLCHG_IRQ, IRQF_TRIGGER_RISING, trklchg_irq_handler),
  3429. CHG_IRQ(BATT_REMOVED_IRQ, IRQF_TRIGGER_RISING,
  3430. batt_removed_irq_handler),
  3431. CHG_IRQ(BATTTEMP_HOT_IRQ, IRQF_TRIGGER_RISING,
  3432. batttemp_hot_irq_handler),
  3433. CHG_IRQ(CHGHOT_IRQ, IRQF_TRIGGER_RISING, chghot_irq_handler),
  3434. CHG_IRQ(BATTTEMP_COLD_IRQ, IRQF_TRIGGER_RISING,
  3435. batttemp_cold_irq_handler),
  3436. CHG_IRQ(CHG_GONE_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3437. chg_gone_irq_handler),
  3438. CHG_IRQ(BAT_TEMP_OK_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3439. bat_temp_ok_irq_handler),
  3440. CHG_IRQ(COARSE_DET_LOW_IRQ, IRQF_TRIGGER_RISING,
  3441. coarse_det_low_irq_handler),
  3442. CHG_IRQ(VDD_LOOP_IRQ, IRQF_TRIGGER_RISING, vdd_loop_irq_handler),
  3443. CHG_IRQ(VREG_OV_IRQ, IRQF_TRIGGER_RISING, vreg_ov_irq_handler),
  3444. CHG_IRQ(VBATDET_IRQ, IRQF_TRIGGER_RISING, vbatdet_irq_handler),
  3445. CHG_IRQ(BATFET_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3446. batfet_irq_handler),
  3447. CHG_IRQ(DCIN_VALID_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3448. dcin_valid_irq_handler),
  3449. CHG_IRQ(DCIN_OV_IRQ, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  3450. dcin_ov_irq_handler),
  3451. CHG_IRQ(DCIN_UV_IRQ, IRQF_TRIGGER_RISING, dcin_uv_irq_handler),
  3452. };
  3453. static int __devinit request_irqs(struct pm8921_chg_chip *chip,
  3454. struct platform_device *pdev)
  3455. {
  3456. struct resource *res;
  3457. int ret, i;
  3458. ret = 0;
  3459. bitmap_fill(chip->enabled_irqs, PM_CHG_MAX_INTS);
  3460. for (i = 0; i < ARRAY_SIZE(chg_irq_data); i++) {
  3461. res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
  3462. chg_irq_data[i].name);
  3463. if (res == NULL) {
  3464. pr_err("couldn't find %s\n", chg_irq_data[i].name);
  3465. goto err_out;
  3466. }
  3467. chip->pmic_chg_irq[chg_irq_data[i].irq_id] = res->start;
  3468. ret = request_irq(res->start, chg_irq_data[i].handler,
  3469. chg_irq_data[i].flags,
  3470. chg_irq_data[i].name, chip);
  3471. if (ret < 0) {
  3472. pr_err("couldn't request %d (%s) %d\n", res->start,
  3473. chg_irq_data[i].name, ret);
  3474. chip->pmic_chg_irq[chg_irq_data[i].irq_id] = 0;
  3475. goto err_out;
  3476. }
  3477. pm8921_chg_disable_irq(chip, chg_irq_data[i].irq_id);
  3478. }
  3479. return 0;
  3480. err_out:
  3481. free_irqs(chip);
  3482. return -EINVAL;
  3483. }
  3484. static void pm8921_chg_force_19p2mhz_clk(struct pm8921_chg_chip *chip)
  3485. {
  3486. int err;
  3487. u8 temp;
  3488. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_ON);
  3489. temp = 0xD1;
  3490. err = pm_chg_write(chip, CHG_TEST, temp);
  3491. if (err) {
  3492. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3493. return;
  3494. }
  3495. temp = 0xD3;
  3496. err = pm_chg_write(chip, CHG_TEST, temp);
  3497. if (err) {
  3498. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3499. return;
  3500. }
  3501. temp = 0xD1;
  3502. err = pm_chg_write(chip, CHG_TEST, temp);
  3503. if (err) {
  3504. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3505. return;
  3506. }
  3507. temp = 0xD5;
  3508. err = pm_chg_write(chip, CHG_TEST, temp);
  3509. if (err) {
  3510. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3511. return;
  3512. }
  3513. udelay(183);
  3514. temp = 0xD1;
  3515. err = pm_chg_write(chip, CHG_TEST, temp);
  3516. if (err) {
  3517. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3518. return;
  3519. }
  3520. temp = 0xD0;
  3521. err = pm_chg_write(chip, CHG_TEST, temp);
  3522. if (err) {
  3523. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3524. return;
  3525. }
  3526. udelay(32);
  3527. temp = 0xD1;
  3528. err = pm_chg_write(chip, CHG_TEST, temp);
  3529. if (err) {
  3530. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3531. return;
  3532. }
  3533. temp = 0xD3;
  3534. err = pm_chg_write(chip, CHG_TEST, temp);
  3535. if (err) {
  3536. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3537. return;
  3538. }
  3539. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_OFF);
  3540. }
  3541. static void pm8921_chg_set_hw_clk_switching(struct pm8921_chg_chip *chip)
  3542. {
  3543. int err;
  3544. u8 temp;
  3545. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_ON);
  3546. temp = 0xD1;
  3547. err = pm_chg_write(chip, CHG_TEST, temp);
  3548. if (err) {
  3549. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3550. return;
  3551. }
  3552. temp = 0xD0;
  3553. err = pm_chg_write(chip, CHG_TEST, temp);
  3554. if (err) {
  3555. pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
  3556. return;
  3557. }
  3558. msm_xo_mode_vote(chip->voter, MSM_XO_MODE_OFF);
  3559. }
  3560. #define VREF_BATT_THERM_FORCE_ON BIT(7)
  3561. static void detect_battery_removal(struct pm8921_chg_chip *chip)
  3562. {
  3563. u8 temp;
  3564. pm8xxx_readb(chip->dev->parent, CHG_CNTRL, &temp);
  3565. pr_debug("upon restart CHG_CNTRL = 0x%x\n", temp);
  3566. if (!(temp & VREF_BATT_THERM_FORCE_ON))
  3567. /*
  3568. * batt therm force on bit is battery backed and is default 0
  3569. * The charger sets this bit at init time. If this bit is found
  3570. * 0 that means the battery was removed. Tell the bms about it
  3571. */
  3572. pm8921_bms_invalidate_shutdown_soc();
  3573. }
  3574. #define ENUM_TIMER_STOP_BIT BIT(1)
  3575. #define BOOT_DONE_BIT BIT(6)
  3576. #define CHG_BATFET_ON_BIT BIT(3)
  3577. #define CHG_VCP_EN BIT(0)
  3578. #define CHG_BAT_TEMP_DIS_BIT BIT(2)
  3579. #define SAFE_CURRENT_MA 1500
  3580. #define PM_SUB_REV 0x001
  3581. #define MIN_CHARGE_CURRENT_MA 350
  3582. #define DEFAULT_SAFETY_MINUTES 500
  3583. static int __devinit pm8921_chg_hw_init(struct pm8921_chg_chip *chip)
  3584. {
  3585. u8 subrev;
  3586. int rc, vdd_safe, fcc_uah, safety_time = DEFAULT_SAFETY_MINUTES;
  3587. /* forcing 19p2mhz before accessing any charger registers */
  3588. pm8921_chg_force_19p2mhz_clk(chip);
  3589. detect_battery_removal(chip);
  3590. rc = pm_chg_masked_write(chip, SYS_CONFIG_2,
  3591. BOOT_DONE_BIT, BOOT_DONE_BIT);
  3592. if (rc) {
  3593. pr_err("Failed to set BOOT_DONE_BIT rc=%d\n", rc);
  3594. return rc;
  3595. }
  3596. vdd_safe = chip->max_voltage_mv + VDD_MAX_INCREASE_MV;
  3597. if (vdd_safe > PM8921_CHG_VDDSAFE_MAX)
  3598. vdd_safe = PM8921_CHG_VDDSAFE_MAX;
  3599. rc = pm_chg_vddsafe_set(chip, vdd_safe);
  3600. if (rc) {
  3601. pr_err("Failed to set safe voltage to %d rc=%d\n",
  3602. chip->max_voltage_mv, rc);
  3603. return rc;
  3604. }
  3605. rc = pm_chg_vbatdet_set(chip,
  3606. chip->max_voltage_mv
  3607. - chip->resume_voltage_delta);
  3608. if (rc) {
  3609. pr_err("Failed to set vbatdet comprator voltage to %d rc=%d\n",
  3610. chip->max_voltage_mv - chip->resume_voltage_delta, rc);
  3611. return rc;
  3612. }
  3613. rc = pm_chg_vddmax_set(chip, chip->max_voltage_mv);
  3614. if (rc) {
  3615. pr_err("Failed to set max voltage to %d rc=%d\n",
  3616. chip->max_voltage_mv, rc);
  3617. return rc;
  3618. }
  3619. if (chip->safe_current_ma == 0)
  3620. chip->safe_current_ma = SAFE_CURRENT_MA;
  3621. rc = pm_chg_ibatsafe_set(chip, chip->safe_current_ma);
  3622. if (rc) {
  3623. pr_err("Failed to set max voltage to %d rc=%d\n",
  3624. SAFE_CURRENT_MA, rc);
  3625. return rc;
  3626. }
  3627. rc = pm_chg_ibatmax_set(chip, chip->max_bat_chg_current);
  3628. if (rc) {
  3629. pr_err("Failed to set max current to 400 rc=%d\n", rc);
  3630. return rc;
  3631. }
  3632. rc = pm_chg_iterm_set(chip, chip->term_current);
  3633. if (rc) {
  3634. pr_err("Failed to set term current to %d rc=%d\n",
  3635. chip->term_current, rc);
  3636. return rc;
  3637. }
  3638. /* Disable the ENUM TIMER */
  3639. rc = pm_chg_masked_write(chip, PBL_ACCESS2, ENUM_TIMER_STOP_BIT,
  3640. ENUM_TIMER_STOP_BIT);
  3641. if (rc) {
  3642. pr_err("Failed to set enum timer stop rc=%d\n", rc);
  3643. return rc;
  3644. }
  3645. fcc_uah = pm8921_bms_get_fcc();
  3646. if (fcc_uah > 0) {
  3647. safety_time = div_s64((s64)fcc_uah * 60,
  3648. 1000 * MIN_CHARGE_CURRENT_MA);
  3649. /* add 20 minutes of buffer time */
  3650. safety_time += 20;
  3651. /* make sure we do not exceed the maximum programmable time */
  3652. if (safety_time > PM8921_CHG_TCHG_MAX)
  3653. safety_time = PM8921_CHG_TCHG_MAX;
  3654. }
  3655. rc = pm_chg_tchg_max_set(chip, safety_time);
  3656. if (rc) {
  3657. pr_err("Failed to set max time to %d minutes rc=%d\n",
  3658. safety_time, rc);
  3659. return rc;
  3660. }
  3661. if (chip->ttrkl_time != 0) {
  3662. rc = pm_chg_ttrkl_max_set(chip, chip->ttrkl_time);
  3663. if (rc) {
  3664. pr_err("Failed to set trkl time to %d minutes rc=%d\n",
  3665. chip->ttrkl_time, rc);
  3666. return rc;
  3667. }
  3668. }
  3669. if (chip->vin_min != 0) {
  3670. rc = pm_chg_vinmin_set(chip, chip->vin_min);
  3671. if (rc) {
  3672. pr_err("Failed to set vin min to %d mV rc=%d\n",
  3673. chip->vin_min, rc);
  3674. return rc;
  3675. }
  3676. } else {
  3677. chip->vin_min = pm_chg_vinmin_get(chip);
  3678. }
  3679. rc = pm_chg_disable_wd(chip);
  3680. if (rc) {
  3681. pr_err("Failed to disable wd rc=%d\n", rc);
  3682. return rc;
  3683. }
  3684. rc = pm_chg_masked_write(chip, CHG_CNTRL_2,
  3685. CHG_BAT_TEMP_DIS_BIT, 0);
  3686. if (rc) {
  3687. pr_err("Failed to enable temp control chg rc=%d\n", rc);
  3688. return rc;
  3689. }
  3690. /* switch to a 3.2Mhz for the buck */
  3691. if (pm8xxx_get_revision(chip->dev->parent) >= PM8XXX_REVISION_8038_1p0)
  3692. rc = pm_chg_write(chip,
  3693. CHG_BUCK_CLOCK_CTRL_8038, 0x15);
  3694. else
  3695. rc = pm_chg_write(chip,
  3696. CHG_BUCK_CLOCK_CTRL, 0x15);
  3697. if (rc) {
  3698. pr_err("Failed to switch buck clk rc=%d\n", rc);
  3699. return rc;
  3700. }
  3701. if (chip->trkl_voltage != 0) {
  3702. rc = pm_chg_vtrkl_low_set(chip, chip->trkl_voltage);
  3703. if (rc) {
  3704. pr_err("Failed to set trkl voltage to %dmv rc=%d\n",
  3705. chip->trkl_voltage, rc);
  3706. return rc;
  3707. }
  3708. }
  3709. if (chip->weak_voltage != 0) {
  3710. rc = pm_chg_vweak_set(chip, chip->weak_voltage);
  3711. if (rc) {
  3712. pr_err("Failed to set weak voltage to %dmv rc=%d\n",
  3713. chip->weak_voltage, rc);
  3714. return rc;
  3715. }
  3716. }
  3717. if (chip->trkl_current != 0) {
  3718. rc = pm_chg_itrkl_set(chip, chip->trkl_current);
  3719. if (rc) {
  3720. pr_err("Failed to set trkl current to %dmA rc=%d\n",
  3721. chip->trkl_voltage, rc);
  3722. return rc;
  3723. }
  3724. }
  3725. if (chip->weak_current != 0) {
  3726. rc = pm_chg_iweak_set(chip, chip->weak_current);
  3727. if (rc) {
  3728. pr_err("Failed to set weak current to %dmA rc=%d\n",
  3729. chip->weak_current, rc);
  3730. return rc;
  3731. }
  3732. }
  3733. rc = pm_chg_batt_cold_temp_config(chip, chip->cold_thr);
  3734. if (rc) {
  3735. pr_err("Failed to set cold config %d rc=%d\n",
  3736. chip->cold_thr, rc);
  3737. }
  3738. rc = pm_chg_batt_hot_temp_config(chip, chip->hot_thr);
  3739. if (rc) {
  3740. pr_err("Failed to set hot config %d rc=%d\n",
  3741. chip->hot_thr, rc);
  3742. }
  3743. rc = pm_chg_led_src_config(chip, chip->led_src_config);
  3744. if (rc) {
  3745. pr_err("Failed to set charger LED src config %d rc=%d\n",
  3746. chip->led_src_config, rc);
  3747. }
  3748. /* Workarounds for die 3.0 */
  3749. if (pm8xxx_get_revision(chip->dev->parent) == PM8XXX_REVISION_8921_3p0
  3750. && pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8921) {
  3751. rc = pm8xxx_readb(chip->dev->parent, PM_SUB_REV, &subrev);
  3752. if (rc) {
  3753. pr_err("read failed: addr=%03X, rc=%d\n",
  3754. PM_SUB_REV, rc);
  3755. return rc;
  3756. }
  3757. /* Check if die 3.0.1 is present */
  3758. if (subrev & 0x1)
  3759. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0xA4);
  3760. else
  3761. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0xAC);
  3762. }
  3763. if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8917) {
  3764. /* Set PM8917 USB_OVP debounce time to 15 ms */
  3765. rc = pm_chg_masked_write(chip, USB_OVP_CONTROL,
  3766. OVP_DEBOUNCE_TIME, 0x6);
  3767. if (rc) {
  3768. pr_err("Failed to set USB OVP db rc=%d\n", rc);
  3769. return rc;
  3770. }
  3771. /* Enable isub_fine resolution AICL for PM8917 */
  3772. chip->iusb_fine_res = true;
  3773. if (chip->uvd_voltage_mv) {
  3774. rc = pm_chg_uvd_threshold_set(chip,
  3775. chip->uvd_voltage_mv);
  3776. if (rc) {
  3777. pr_err("Failed to set UVD threshold %drc=%d\n",
  3778. chip->uvd_voltage_mv, rc);
  3779. return rc;
  3780. }
  3781. }
  3782. }
  3783. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0xD9);
  3784. /* Disable EOC FSM processing */
  3785. pm_chg_write(chip, CHG_BUCK_CTRL_TEST3, 0x91);
  3786. rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON,
  3787. VREF_BATT_THERM_FORCE_ON);
  3788. if (rc)
  3789. pr_err("Failed to Force Vref therm rc=%d\n", rc);
  3790. rc = pm_chg_charge_dis(chip, charging_disabled);
  3791. if (rc) {
  3792. pr_err("Failed to disable CHG_CHARGE_DIS bit rc=%d\n", rc);
  3793. return rc;
  3794. }
  3795. rc = pm_chg_auto_enable(chip, !charging_disabled);
  3796. if (rc) {
  3797. pr_err("Failed to enable charging rc=%d\n", rc);
  3798. return rc;
  3799. }
  3800. return 0;
  3801. }
  3802. static int get_rt_status(void *data, u64 * val)
  3803. {
  3804. int i = (int)data;
  3805. int ret;
  3806. /* global irq number is passed in via data */
  3807. ret = pm_chg_get_rt_status(the_chip, i);
  3808. *val = ret;
  3809. return 0;
  3810. }
  3811. DEFINE_SIMPLE_ATTRIBUTE(rt_fops, get_rt_status, NULL, "%llu\n");
  3812. static int get_fsm_status(void *data, u64 * val)
  3813. {
  3814. u8 temp;
  3815. temp = pm_chg_get_fsm_state(the_chip);
  3816. *val = temp;
  3817. return 0;
  3818. }
  3819. DEFINE_SIMPLE_ATTRIBUTE(fsm_fops, get_fsm_status, NULL, "%llu\n");
  3820. static int get_reg_loop(void *data, u64 * val)
  3821. {
  3822. u8 temp;
  3823. if (!the_chip) {
  3824. pr_err("%s called before init\n", __func__);
  3825. return -EINVAL;
  3826. }
  3827. temp = pm_chg_get_regulation_loop(the_chip);
  3828. *val = temp;
  3829. return 0;
  3830. }
  3831. DEFINE_SIMPLE_ATTRIBUTE(reg_loop_fops, get_reg_loop, NULL, "0x%02llx\n");
  3832. static int get_reg(void *data, u64 * val)
  3833. {
  3834. int addr = (int)data;
  3835. int ret;
  3836. u8 temp;
  3837. ret = pm8xxx_readb(the_chip->dev->parent, addr, &temp);
  3838. if (ret) {
  3839. pr_err("pm8xxx_readb to %x value =%d errored = %d\n",
  3840. addr, temp, ret);
  3841. return -EAGAIN;
  3842. }
  3843. *val = temp;
  3844. return 0;
  3845. }
  3846. static int set_reg(void *data, u64 val)
  3847. {
  3848. int addr = (int)data;
  3849. int ret;
  3850. u8 temp;
  3851. temp = (u8) val;
  3852. ret = pm_chg_write(the_chip, addr, temp);
  3853. if (ret) {
  3854. pr_err("pm_chg_write to %x value =%d errored = %d\n",
  3855. addr, temp, ret);
  3856. return -EAGAIN;
  3857. }
  3858. return 0;
  3859. }
  3860. DEFINE_SIMPLE_ATTRIBUTE(reg_fops, get_reg, set_reg, "0x%02llx\n");
  3861. static int reg_loop;
  3862. #define MAX_REG_LOOP_CHAR 10
  3863. static int get_reg_loop_param(char *buf, struct kernel_param *kp)
  3864. {
  3865. u8 temp;
  3866. if (!the_chip) {
  3867. pr_err("called before init\n");
  3868. return -EINVAL;
  3869. }
  3870. temp = pm_chg_get_regulation_loop(the_chip);
  3871. return snprintf(buf, MAX_REG_LOOP_CHAR, "%d", temp);
  3872. }
  3873. module_param_call(reg_loop, NULL, get_reg_loop_param,
  3874. &reg_loop, 0644);
  3875. static int max_chg_ma;
  3876. #define MAX_MA_CHAR 10
  3877. static int get_max_chg_ma_param(char *buf, struct kernel_param *kp)
  3878. {
  3879. if (!the_chip) {
  3880. pr_err("called before init\n");
  3881. return -EINVAL;
  3882. }
  3883. return snprintf(buf, MAX_MA_CHAR, "%d", the_chip->max_bat_chg_current);
  3884. }
  3885. module_param_call(max_chg_ma, NULL, get_max_chg_ma_param,
  3886. &max_chg_ma, 0644);
  3887. static int ibatmax_ma;
  3888. static int set_ibat_max(const char *val, struct kernel_param *kp)
  3889. {
  3890. int rc;
  3891. if (!the_chip) {
  3892. pr_err("called before init\n");
  3893. return -EINVAL;
  3894. }
  3895. rc = param_set_int(val, kp);
  3896. if (rc) {
  3897. pr_err("error setting value %d\n", rc);
  3898. return rc;
  3899. }
  3900. if (abs(ibatmax_ma - the_chip->max_bat_chg_current)
  3901. <= the_chip->ibatmax_max_adj_ma) {
  3902. rc = pm_chg_ibatmax_set(the_chip, ibatmax_ma);
  3903. if (rc) {
  3904. pr_err("Failed to set ibatmax rc = %d\n", rc);
  3905. return rc;
  3906. }
  3907. }
  3908. return 0;
  3909. }
  3910. static int get_ibat_max(char *buf, struct kernel_param *kp)
  3911. {
  3912. int ibat_ma;
  3913. int rc;
  3914. if (!the_chip) {
  3915. pr_err("called before init\n");
  3916. return -EINVAL;
  3917. }
  3918. rc = pm_chg_ibatmax_get(the_chip, &ibat_ma);
  3919. if (rc) {
  3920. pr_err("ibatmax_get error = %d\n", rc);
  3921. return rc;
  3922. }
  3923. return snprintf(buf, MAX_MA_CHAR, "%d", ibat_ma);
  3924. }
  3925. module_param_call(ibatmax_ma, set_ibat_max, get_ibat_max,
  3926. &ibatmax_ma, 0644);
  3927. enum {
  3928. BAT_WARM_ZONE,
  3929. BAT_COOL_ZONE,
  3930. };
  3931. static int get_warm_cool(void *data, u64 * val)
  3932. {
  3933. if (!the_chip) {
  3934. pr_err("%s called before init\n", __func__);
  3935. return -EINVAL;
  3936. }
  3937. if ((int)data == BAT_WARM_ZONE)
  3938. *val = the_chip->is_bat_warm;
  3939. if ((int)data == BAT_COOL_ZONE)
  3940. *val = the_chip->is_bat_cool;
  3941. return 0;
  3942. }
  3943. DEFINE_SIMPLE_ATTRIBUTE(warm_cool_fops, get_warm_cool, NULL, "0x%lld\n");
  3944. static void create_debugfs_entries(struct pm8921_chg_chip *chip)
  3945. {
  3946. int i;
  3947. chip->dent = debugfs_create_dir("pm8921_chg", NULL);
  3948. if (IS_ERR(chip->dent)) {
  3949. pr_err("pmic charger couldnt create debugfs dir\n");
  3950. return;
  3951. }
  3952. debugfs_create_file("CHG_CNTRL", 0644, chip->dent,
  3953. (void *)CHG_CNTRL, &reg_fops);
  3954. debugfs_create_file("CHG_CNTRL_2", 0644, chip->dent,
  3955. (void *)CHG_CNTRL_2, &reg_fops);
  3956. debugfs_create_file("CHG_CNTRL_3", 0644, chip->dent,
  3957. (void *)CHG_CNTRL_3, &reg_fops);
  3958. debugfs_create_file("PBL_ACCESS1", 0644, chip->dent,
  3959. (void *)PBL_ACCESS1, &reg_fops);
  3960. debugfs_create_file("PBL_ACCESS2", 0644, chip->dent,
  3961. (void *)PBL_ACCESS2, &reg_fops);
  3962. debugfs_create_file("SYS_CONFIG_1", 0644, chip->dent,
  3963. (void *)SYS_CONFIG_1, &reg_fops);
  3964. debugfs_create_file("SYS_CONFIG_2", 0644, chip->dent,
  3965. (void *)SYS_CONFIG_2, &reg_fops);
  3966. debugfs_create_file("CHG_VDD_MAX", 0644, chip->dent,
  3967. (void *)CHG_VDD_MAX, &reg_fops);
  3968. debugfs_create_file("CHG_VDD_SAFE", 0644, chip->dent,
  3969. (void *)CHG_VDD_SAFE, &reg_fops);
  3970. debugfs_create_file("CHG_VBAT_DET", 0644, chip->dent,
  3971. (void *)CHG_VBAT_DET, &reg_fops);
  3972. debugfs_create_file("CHG_IBAT_MAX", 0644, chip->dent,
  3973. (void *)CHG_IBAT_MAX, &reg_fops);
  3974. debugfs_create_file("CHG_IBAT_SAFE", 0644, chip->dent,
  3975. (void *)CHG_IBAT_SAFE, &reg_fops);
  3976. debugfs_create_file("CHG_VIN_MIN", 0644, chip->dent,
  3977. (void *)CHG_VIN_MIN, &reg_fops);
  3978. debugfs_create_file("CHG_VTRICKLE", 0644, chip->dent,
  3979. (void *)CHG_VTRICKLE, &reg_fops);
  3980. debugfs_create_file("CHG_ITRICKLE", 0644, chip->dent,
  3981. (void *)CHG_ITRICKLE, &reg_fops);
  3982. debugfs_create_file("CHG_ITERM", 0644, chip->dent,
  3983. (void *)CHG_ITERM, &reg_fops);
  3984. debugfs_create_file("CHG_TCHG_MAX", 0644, chip->dent,
  3985. (void *)CHG_TCHG_MAX, &reg_fops);
  3986. debugfs_create_file("CHG_TWDOG", 0644, chip->dent,
  3987. (void *)CHG_TWDOG, &reg_fops);
  3988. debugfs_create_file("CHG_TEMP_THRESH", 0644, chip->dent,
  3989. (void *)CHG_TEMP_THRESH, &reg_fops);
  3990. debugfs_create_file("CHG_COMP_OVR", 0644, chip->dent,
  3991. (void *)CHG_COMP_OVR, &reg_fops);
  3992. debugfs_create_file("CHG_BUCK_CTRL_TEST1", 0644, chip->dent,
  3993. (void *)CHG_BUCK_CTRL_TEST1, &reg_fops);
  3994. debugfs_create_file("CHG_BUCK_CTRL_TEST2", 0644, chip->dent,
  3995. (void *)CHG_BUCK_CTRL_TEST2, &reg_fops);
  3996. debugfs_create_file("CHG_BUCK_CTRL_TEST3", 0644, chip->dent,
  3997. (void *)CHG_BUCK_CTRL_TEST3, &reg_fops);
  3998. debugfs_create_file("CHG_TEST", 0644, chip->dent,
  3999. (void *)CHG_TEST, &reg_fops);
  4000. debugfs_create_file("FSM_STATE", 0644, chip->dent, NULL,
  4001. &fsm_fops);
  4002. debugfs_create_file("REGULATION_LOOP_CONTROL", 0644, chip->dent, NULL,
  4003. &reg_loop_fops);
  4004. debugfs_create_file("BAT_WARM_ZONE", 0644, chip->dent,
  4005. (void *)BAT_WARM_ZONE, &warm_cool_fops);
  4006. debugfs_create_file("BAT_COOL_ZONE", 0644, chip->dent,
  4007. (void *)BAT_COOL_ZONE, &warm_cool_fops);
  4008. for (i = 0; i < ARRAY_SIZE(chg_irq_data); i++) {
  4009. if (chip->pmic_chg_irq[chg_irq_data[i].irq_id])
  4010. debugfs_create_file(chg_irq_data[i].name, 0444,
  4011. chip->dent,
  4012. (void *)chg_irq_data[i].irq_id,
  4013. &rt_fops);
  4014. }
  4015. }
  4016. static int pm8921_charger_suspend_noirq(struct device *dev)
  4017. {
  4018. int rc;
  4019. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4020. rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON, 0);
  4021. if (rc)
  4022. pr_err("Failed to Force Vref therm off rc=%d\n", rc);
  4023. rc = pm8921_chg_set_lpm(chip, 1);
  4024. if (rc)
  4025. pr_err("Failed to set lpm rc=%d\n", rc);
  4026. pm8921_chg_set_hw_clk_switching(chip);
  4027. return 0;
  4028. }
  4029. static int pm8921_charger_resume_noirq(struct device *dev)
  4030. {
  4031. int rc;
  4032. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4033. rc = pm8921_chg_set_lpm(chip, 0);
  4034. if (rc)
  4035. pr_err("Failed to set lpm rc=%d\n", rc);
  4036. pm8921_chg_force_19p2mhz_clk(chip);
  4037. rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON,
  4038. VREF_BATT_THERM_FORCE_ON);
  4039. if (rc)
  4040. pr_err("Failed to Force Vref therm on rc=%d\n", rc);
  4041. return 0;
  4042. }
  4043. static int pm8921_charger_resume(struct device *dev)
  4044. {
  4045. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4046. if (pm8921_chg_is_enabled(chip, LOOP_CHANGE_IRQ)) {
  4047. disable_irq_wake(chip->pmic_chg_irq[LOOP_CHANGE_IRQ]);
  4048. pm8921_chg_disable_irq(chip, LOOP_CHANGE_IRQ);
  4049. }
  4050. if (chip->btc_override && (is_dc_chg_plugged_in(the_chip) ||
  4051. is_usb_chg_plugged_in(the_chip)))
  4052. schedule_delayed_work(&chip->btc_override_work, 0);
  4053. schedule_delayed_work(&chip->update_heartbeat_work, 0);
  4054. return 0;
  4055. }
  4056. static int pm8921_charger_suspend(struct device *dev)
  4057. {
  4058. struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
  4059. cancel_delayed_work_sync(&chip->update_heartbeat_work);
  4060. if (chip->btc_override)
  4061. cancel_delayed_work_sync(&chip->btc_override_work);
  4062. if (is_usb_chg_plugged_in(chip)) {
  4063. pm8921_chg_enable_irq(chip, LOOP_CHANGE_IRQ);
  4064. enable_irq_wake(chip->pmic_chg_irq[LOOP_CHANGE_IRQ]);
  4065. }
  4066. return 0;
  4067. }
  4068. static int __devinit pm8921_charger_probe(struct platform_device *pdev)
  4069. {
  4070. int rc = 0;
  4071. struct pm8921_chg_chip *chip;
  4072. const struct pm8921_charger_platform_data *pdata
  4073. = pdev->dev.platform_data;
  4074. if (!pdata) {
  4075. pr_err("missing platform data\n");
  4076. return -EINVAL;
  4077. }
  4078. chip = kzalloc(sizeof(struct pm8921_chg_chip),
  4079. GFP_KERNEL);
  4080. if (!chip) {
  4081. pr_err("Cannot allocate pm_chg_chip\n");
  4082. return -ENOMEM;
  4083. }
  4084. chip->dev = &pdev->dev;
  4085. chip->ttrkl_time = pdata->ttrkl_time;
  4086. chip->update_time = pdata->update_time;
  4087. chip->max_voltage_mv = pdata->max_voltage;
  4088. chip->alarm_low_mv = pdata->alarm_low_mv;
  4089. chip->alarm_high_mv = pdata->alarm_high_mv;
  4090. chip->min_voltage_mv = pdata->min_voltage;
  4091. chip->safe_current_ma = pdata->safe_current_ma;
  4092. chip->uvd_voltage_mv = pdata->uvd_thresh_voltage;
  4093. chip->resume_voltage_delta = pdata->resume_voltage_delta;
  4094. chip->resume_charge_percent = pdata->resume_charge_percent;
  4095. chip->term_current = pdata->term_current;
  4096. chip->vbat_channel = pdata->charger_cdata.vbat_channel;
  4097. chip->batt_temp_channel = pdata->charger_cdata.batt_temp_channel;
  4098. chip->batt_id_channel = pdata->charger_cdata.batt_id_channel;
  4099. chip->batt_id_min = pdata->batt_id_min;
  4100. chip->batt_id_max = pdata->batt_id_max;
  4101. if (pdata->cool_temp != INT_MIN)
  4102. chip->cool_temp_dc = pdata->cool_temp * 10;
  4103. else
  4104. chip->cool_temp_dc = INT_MIN;
  4105. if (pdata->warm_temp != INT_MIN)
  4106. chip->warm_temp_dc = pdata->warm_temp * 10;
  4107. else
  4108. chip->warm_temp_dc = INT_MIN;
  4109. if (pdata->hysteresis_temp)
  4110. chip->hysteresis_temp_dc = pdata->hysteresis_temp * 10;
  4111. else
  4112. chip->hysteresis_temp_dc = TEMP_HYSTERISIS_DECIDEGC;
  4113. chip->temp_check_period = pdata->temp_check_period;
  4114. chip->max_bat_chg_current = pdata->max_bat_chg_current;
  4115. /* Assign to corresponding module parameter */
  4116. usb_max_current = pdata->usb_max_current;
  4117. chip->cool_bat_chg_current = pdata->cool_bat_chg_current;
  4118. chip->warm_bat_chg_current = pdata->warm_bat_chg_current;
  4119. chip->cool_bat_voltage = pdata->cool_bat_voltage;
  4120. chip->warm_bat_voltage = pdata->warm_bat_voltage;
  4121. chip->trkl_voltage = pdata->trkl_voltage;
  4122. chip->weak_voltage = pdata->weak_voltage;
  4123. chip->trkl_current = pdata->trkl_current;
  4124. chip->weak_current = pdata->weak_current;
  4125. chip->vin_min = pdata->vin_min;
  4126. chip->thermal_mitigation = pdata->thermal_mitigation;
  4127. chip->thermal_levels = pdata->thermal_levels;
  4128. chip->disable_chg_rmvl_wrkarnd = pdata->disable_chg_rmvl_wrkarnd;
  4129. chip->cold_thr = pdata->cold_thr;
  4130. chip->hot_thr = pdata->hot_thr;
  4131. chip->rconn_mohm = pdata->rconn_mohm;
  4132. chip->led_src_config = pdata->led_src_config;
  4133. chip->has_dc_supply = pdata->has_dc_supply;
  4134. chip->battery_less_hardware = pdata->battery_less_hardware;
  4135. chip->btc_override = pdata->btc_override;
  4136. if (chip->btc_override) {
  4137. chip->btc_delay_ms = pdata->btc_delay_ms;
  4138. chip->btc_override_cold_decidegc
  4139. = pdata->btc_override_cold_degc * 10;
  4140. chip->btc_override_hot_decidegc
  4141. = pdata->btc_override_hot_degc * 10;
  4142. chip->btc_panic_if_cant_stop_chg
  4143. = pdata->btc_panic_if_cant_stop_chg;
  4144. }
  4145. if (chip->battery_less_hardware)
  4146. charging_disabled = 1;
  4147. chip->ibatmax_max_adj_ma = find_ibat_max_adj_ma(
  4148. chip->max_bat_chg_current);
  4149. chip->voter = msm_xo_get(MSM_XO_TCXO_D0, "pm8921_charger");
  4150. rc = pm8921_chg_hw_init(chip);
  4151. if (rc) {
  4152. pr_err("couldn't init hardware rc=%d\n", rc);
  4153. goto free_chip;
  4154. }
  4155. if (chip->btc_override)
  4156. pm8921_chg_btc_override_init(chip);
  4157. chip->stop_chg_upon_expiry = pdata->stop_chg_upon_expiry;
  4158. chip->usb_type = POWER_SUPPLY_TYPE_UNKNOWN;
  4159. chip->usb_psy.name = "usb";
  4160. chip->usb_psy.type = POWER_SUPPLY_TYPE_USB;
  4161. chip->usb_psy.supplied_to = pm_power_supplied_to;
  4162. chip->usb_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to);
  4163. chip->usb_psy.properties = pm_power_props_usb;
  4164. chip->usb_psy.num_properties = ARRAY_SIZE(pm_power_props_usb);
  4165. chip->usb_psy.get_property = pm_power_get_property_usb;
  4166. chip->usb_psy.set_property = pm_power_set_property_usb;
  4167. chip->usb_psy.property_is_writeable = usb_property_is_writeable;
  4168. chip->dc_psy.name = "pm8921-dc";
  4169. chip->dc_psy.type = POWER_SUPPLY_TYPE_MAINS;
  4170. chip->dc_psy.supplied_to = pm_power_supplied_to;
  4171. chip->dc_psy.num_supplicants = ARRAY_SIZE(pm_power_supplied_to);
  4172. chip->dc_psy.properties = pm_power_props_mains;
  4173. chip->dc_psy.num_properties = ARRAY_SIZE(pm_power_props_mains);
  4174. chip->dc_psy.get_property = pm_power_get_property_mains;
  4175. chip->batt_psy.name = "battery";
  4176. chip->batt_psy.type = POWER_SUPPLY_TYPE_BATTERY;
  4177. chip->batt_psy.properties = msm_batt_power_props;
  4178. chip->batt_psy.num_properties = ARRAY_SIZE(msm_batt_power_props);
  4179. chip->batt_psy.get_property = pm_batt_power_get_property;
  4180. chip->batt_psy.external_power_changed = pm_batt_external_power_changed;
  4181. rc = power_supply_register(chip->dev, &chip->usb_psy);
  4182. if (rc < 0) {
  4183. pr_err("power_supply_register usb failed rc = %d\n", rc);
  4184. goto free_chip;
  4185. }
  4186. rc = power_supply_register(chip->dev, &chip->dc_psy);
  4187. if (rc < 0) {
  4188. pr_err("power_supply_register usb failed rc = %d\n", rc);
  4189. goto unregister_usb;
  4190. }
  4191. rc = power_supply_register(chip->dev, &chip->batt_psy);
  4192. if (rc < 0) {
  4193. pr_err("power_supply_register batt failed rc = %d\n", rc);
  4194. goto unregister_dc;
  4195. }
  4196. platform_set_drvdata(pdev, chip);
  4197. the_chip = chip;
  4198. wake_lock_init(&chip->eoc_wake_lock, WAKE_LOCK_SUSPEND, "pm8921_eoc");
  4199. INIT_DELAYED_WORK(&chip->eoc_work, eoc_worker);
  4200. INIT_DELAYED_WORK(&chip->vin_collapse_check_work,
  4201. vin_collapse_check_worker);
  4202. INIT_DELAYED_WORK(&chip->unplug_check_work, unplug_check_worker);
  4203. INIT_WORK(&chip->bms_notify.work, bms_notify);
  4204. INIT_WORK(&chip->battery_id_valid_work, battery_id_valid);
  4205. INIT_DELAYED_WORK(&chip->update_heartbeat_work, update_heartbeat);
  4206. INIT_DELAYED_WORK(&chip->btc_override_work, btc_override_worker);
  4207. rc = request_irqs(chip, pdev);
  4208. if (rc) {
  4209. pr_err("couldn't register interrupts rc=%d\n", rc);
  4210. goto unregister_batt;
  4211. }
  4212. enable_irq_wake(chip->pmic_chg_irq[USBIN_VALID_IRQ]);
  4213. enable_irq_wake(chip->pmic_chg_irq[DCIN_VALID_IRQ]);
  4214. enable_irq_wake(chip->pmic_chg_irq[VBATDET_LOW_IRQ]);
  4215. enable_irq_wake(chip->pmic_chg_irq[FASTCHG_IRQ]);
  4216. create_debugfs_entries(chip);
  4217. /* determine what state the charger is in */
  4218. determine_initial_state(chip);
  4219. if (chip->update_time)
  4220. schedule_delayed_work(&chip->update_heartbeat_work,
  4221. round_jiffies_relative(msecs_to_jiffies
  4222. (chip->update_time)));
  4223. return 0;
  4224. unregister_batt:
  4225. wake_lock_destroy(&chip->eoc_wake_lock);
  4226. power_supply_unregister(&chip->batt_psy);
  4227. unregister_dc:
  4228. power_supply_unregister(&chip->dc_psy);
  4229. unregister_usb:
  4230. power_supply_unregister(&chip->usb_psy);
  4231. free_chip:
  4232. kfree(chip);
  4233. return rc;
  4234. }
  4235. static int __devexit pm8921_charger_remove(struct platform_device *pdev)
  4236. {
  4237. struct pm8921_chg_chip *chip = platform_get_drvdata(pdev);
  4238. free_irqs(chip);
  4239. platform_set_drvdata(pdev, NULL);
  4240. the_chip = NULL;
  4241. kfree(chip);
  4242. return 0;
  4243. }
  4244. static const struct dev_pm_ops pm8921_pm_ops = {
  4245. .suspend = pm8921_charger_suspend,
  4246. .suspend_noirq = pm8921_charger_suspend_noirq,
  4247. .resume_noirq = pm8921_charger_resume_noirq,
  4248. .resume = pm8921_charger_resume,
  4249. };
  4250. static struct platform_driver pm8921_charger_driver = {
  4251. .probe = pm8921_charger_probe,
  4252. .remove = __devexit_p(pm8921_charger_remove),
  4253. .driver = {
  4254. .name = PM8921_CHARGER_DEV_NAME,
  4255. .owner = THIS_MODULE,
  4256. .pm = &pm8921_pm_ops,
  4257. },
  4258. };
  4259. static int __init pm8921_charger_init(void)
  4260. {
  4261. return platform_driver_register(&pm8921_charger_driver);
  4262. }
  4263. static void __exit pm8921_charger_exit(void)
  4264. {
  4265. platform_driver_unregister(&pm8921_charger_driver);
  4266. }
  4267. late_initcall(pm8921_charger_init);
  4268. module_exit(pm8921_charger_exit);
  4269. MODULE_LICENSE("GPL v2");
  4270. MODULE_DESCRIPTION("PMIC8921 charger/battery driver");
  4271. MODULE_VERSION("1.0");
  4272. MODULE_ALIAS("platform:" PM8921_CHARGER_DEV_NAME);