tsif.c 49 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798
  1. /*
  2. * TSIF Driver
  3. *
  4. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 and
  8. * only version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. */
  16. #include <linux/module.h> /* Needed by all modules */
  17. #include <linux/kernel.h> /* Needed for KERN_INFO */
  18. #include <linux/init.h> /* Needed for the macros */
  19. #include <linux/err.h> /* IS_ERR etc. */
  20. #include <linux/platform_device.h>
  21. #include <linux/ioport.h> /* XXX_mem_region */
  22. #include <linux/debugfs.h>
  23. #include <linux/dma-mapping.h> /* dma_XXX */
  24. #include <linux/delay.h> /* msleep */
  25. #include <linux/io.h> /* ioXXX */
  26. #include <linux/uaccess.h> /* copy_from_user */
  27. #include <linux/clk.h>
  28. #include <linux/wakelock.h>
  29. #include <linux/tsif_api.h>
  30. #include <linux/pm_runtime.h>
  31. #include <linux/slab.h> /* kfree, kzalloc */
  32. #include <linux/gpio.h>
  33. #include <mach/dma.h>
  34. #include <mach/msm_tsif.h>
  35. /*
  36. * TSIF register offsets
  37. */
  38. #define TSIF_STS_CTL_OFF (0x0)
  39. #define TSIF_TIME_LIMIT_OFF (0x4)
  40. #define TSIF_CLK_REF_OFF (0x8)
  41. #define TSIF_LPBK_FLAGS_OFF (0xc)
  42. #define TSIF_LPBK_DATA_OFF (0x10)
  43. #define TSIF_TEST_CTL_OFF (0x14)
  44. #define TSIF_TEST_MODE_OFF (0x18)
  45. #define TSIF_TEST_RESET_OFF (0x1c)
  46. #define TSIF_TEST_EXPORT_OFF (0x20)
  47. #define TSIF_TEST_CURRENT_OFF (0x24)
  48. #define TSIF_DATA_PORT_OFF (0x100)
  49. /* bits for TSIF_STS_CTL register */
  50. #define TSIF_STS_CTL_EN_IRQ (1 << 28)
  51. #define TSIF_STS_CTL_PACK_AVAIL (1 << 27)
  52. #define TSIF_STS_CTL_1ST_PACKET (1 << 26)
  53. #define TSIF_STS_CTL_OVERFLOW (1 << 25)
  54. #define TSIF_STS_CTL_LOST_SYNC (1 << 24)
  55. #define TSIF_STS_CTL_TIMEOUT (1 << 23)
  56. #define TSIF_STS_CTL_INV_SYNC (1 << 21)
  57. #define TSIF_STS_CTL_INV_NULL (1 << 20)
  58. #define TSIF_STS_CTL_INV_ERROR (1 << 19)
  59. #define TSIF_STS_CTL_INV_ENABLE (1 << 18)
  60. #define TSIF_STS_CTL_INV_DATA (1 << 17)
  61. #define TSIF_STS_CTL_INV_CLOCK (1 << 16)
  62. #define TSIF_STS_CTL_SPARE (1 << 15)
  63. #define TSIF_STS_CTL_EN_NULL (1 << 11)
  64. #define TSIF_STS_CTL_EN_ERROR (1 << 10)
  65. #define TSIF_STS_CTL_LAST_BIT (1 << 9)
  66. #define TSIF_STS_CTL_EN_TIME_LIM (1 << 8)
  67. #define TSIF_STS_CTL_EN_TCR (1 << 7)
  68. #define TSIF_STS_CTL_TEST_MODE (3 << 5)
  69. #define TSIF_STS_CTL_EN_DM (1 << 4)
  70. #define TSIF_STS_CTL_STOP (1 << 3)
  71. #define TSIF_STS_CTL_START (1 << 0)
  72. /*
  73. * Data buffering parameters
  74. *
  75. * Data stored in cyclic buffer;
  76. *
  77. * Data organized in chunks of packets.
  78. * One chunk processed at a time by the data mover
  79. *
  80. */
  81. #define TSIF_PKTS_IN_CHUNK_DEFAULT (16) /**< packets in one DM chunk */
  82. #define TSIF_CHUNKS_IN_BUF_DEFAULT (8)
  83. #define TSIF_PKTS_IN_CHUNK (tsif_device->pkts_per_chunk)
  84. #define TSIF_CHUNKS_IN_BUF (tsif_device->chunks_per_buf)
  85. #define TSIF_PKTS_IN_BUF (TSIF_PKTS_IN_CHUNK * TSIF_CHUNKS_IN_BUF)
  86. #define TSIF_BUF_SIZE (TSIF_PKTS_IN_BUF * TSIF_PKT_SIZE)
  87. #define TSIF_MAX_ID 1
  88. #define ROW_RESET (MSM_CLK_CTL_BASE + 0x214)
  89. #define GLBL_CLK_ENA (MSM_CLK_CTL_BASE + 0x000)
  90. #define CLK_HALT_STATEB (MSM_CLK_CTL_BASE + 0x104)
  91. #define TSIF_NS_REG (MSM_CLK_CTL_BASE + 0x0b4)
  92. #define TV_NS_REG (MSM_CLK_CTL_BASE + 0x0bc)
  93. /* used to create debugfs entries */
  94. static const struct {
  95. const char *name;
  96. mode_t mode;
  97. int offset;
  98. } debugfs_tsif_regs[] = {
  99. {"sts_ctl", S_IRUGO | S_IWUSR, TSIF_STS_CTL_OFF},
  100. {"time_limit", S_IRUGO | S_IWUSR, TSIF_TIME_LIMIT_OFF},
  101. {"clk_ref", S_IRUGO | S_IWUSR, TSIF_CLK_REF_OFF},
  102. {"lpbk_flags", S_IRUGO | S_IWUSR, TSIF_LPBK_FLAGS_OFF},
  103. {"lpbk_data", S_IRUGO | S_IWUSR, TSIF_LPBK_DATA_OFF},
  104. {"test_ctl", S_IRUGO | S_IWUSR, TSIF_TEST_CTL_OFF},
  105. {"test_mode", S_IRUGO | S_IWUSR, TSIF_TEST_MODE_OFF},
  106. {"test_reset", S_IWUSR, TSIF_TEST_RESET_OFF},
  107. {"test_export", S_IRUGO | S_IWUSR, TSIF_TEST_EXPORT_OFF},
  108. {"test_current", S_IRUGO, TSIF_TEST_CURRENT_OFF},
  109. {"data_port", S_IRUSR, TSIF_DATA_PORT_OFF},
  110. };
  111. /* structures for Data Mover */
  112. struct tsif_dmov_cmd {
  113. dmov_box box;
  114. dma_addr_t box_ptr;
  115. };
  116. struct msm_tsif_device;
  117. struct tsif_xfer {
  118. struct msm_dmov_cmd hdr;
  119. struct msm_tsif_device *tsif_device;
  120. int busy;
  121. int wi; /**< set devices's write index after xfer */
  122. };
  123. struct msm_tsif_device {
  124. struct list_head devlist;
  125. struct platform_device *pdev;
  126. struct resource *memres;
  127. void __iomem *base;
  128. unsigned int irq;
  129. int mode;
  130. u32 time_limit;
  131. int clock_inverse;
  132. int data_inverse;
  133. int sync_inverse;
  134. int enable_inverse;
  135. enum tsif_state state;
  136. struct wake_lock wake_lock;
  137. /* clocks */
  138. struct clk *tsif_clk;
  139. struct clk *tsif_pclk;
  140. struct clk *tsif_ref_clk;
  141. /* debugfs */
  142. struct dentry *dent_tsif;
  143. struct dentry *debugfs_tsif_regs[ARRAY_SIZE(debugfs_tsif_regs)];
  144. struct dentry *debugfs_gpio;
  145. struct dentry *debugfs_action;
  146. struct dentry *debugfs_dma;
  147. struct dentry *debugfs_databuf;
  148. struct debugfs_blob_wrapper blob_wrapper_databuf;
  149. /* DMA related */
  150. int dma;
  151. int crci;
  152. void *data_buffer;
  153. dma_addr_t data_buffer_dma;
  154. u32 pkts_per_chunk;
  155. u32 chunks_per_buf;
  156. int ri;
  157. int wi;
  158. int dmwi; /**< DataMover write index */
  159. struct tsif_dmov_cmd *dmov_cmd[2];
  160. dma_addr_t dmov_cmd_dma[2];
  161. struct tsif_xfer xfer[2];
  162. struct tasklet_struct dma_refill;
  163. struct tasklet_struct clocks_off;
  164. /* statistics */
  165. u32 stat_rx;
  166. u32 stat_overflow;
  167. u32 stat_lost_sync;
  168. u32 stat_timeout;
  169. u32 stat_dmov_err;
  170. u32 stat_soft_drop;
  171. int stat_ifi; /* inter frame interval */
  172. u32 stat0, stat1;
  173. /* client */
  174. void *client_data;
  175. void (*client_notify)(void *client_data);
  176. };
  177. /* ===clocks begin=== */
  178. static void tsif_put_clocks(struct msm_tsif_device *tsif_device)
  179. {
  180. if (tsif_device->tsif_clk) {
  181. clk_put(tsif_device->tsif_clk);
  182. tsif_device->tsif_clk = NULL;
  183. }
  184. if (tsif_device->tsif_pclk) {
  185. clk_put(tsif_device->tsif_pclk);
  186. tsif_device->tsif_pclk = NULL;
  187. }
  188. if (tsif_device->tsif_ref_clk) {
  189. clk_put(tsif_device->tsif_ref_clk);
  190. tsif_device->tsif_ref_clk = NULL;
  191. }
  192. }
  193. static int tsif_get_clocks(struct msm_tsif_device *tsif_device)
  194. {
  195. struct msm_tsif_platform_data *pdata =
  196. tsif_device->pdev->dev.platform_data;
  197. int rc = 0;
  198. if (pdata->tsif_clk) {
  199. tsif_device->tsif_clk = clk_get(&tsif_device->pdev->dev,
  200. pdata->tsif_clk);
  201. if (IS_ERR(tsif_device->tsif_clk)) {
  202. rc = PTR_ERR(tsif_device->tsif_clk);
  203. tsif_device->tsif_clk = NULL;
  204. goto ret;
  205. }
  206. }
  207. if (pdata->tsif_pclk) {
  208. tsif_device->tsif_pclk = clk_get(&tsif_device->pdev->dev,
  209. pdata->tsif_pclk);
  210. if (IS_ERR(tsif_device->tsif_pclk)) {
  211. rc = PTR_ERR(tsif_device->tsif_pclk);
  212. tsif_device->tsif_pclk = NULL;
  213. goto ret;
  214. }
  215. }
  216. if (pdata->tsif_ref_clk) {
  217. tsif_device->tsif_ref_clk = clk_get(&tsif_device->pdev->dev,
  218. pdata->tsif_ref_clk);
  219. if (IS_ERR(tsif_device->tsif_ref_clk)) {
  220. rc = PTR_ERR(tsif_device->tsif_ref_clk);
  221. tsif_device->tsif_ref_clk = NULL;
  222. goto ret;
  223. }
  224. }
  225. return 0;
  226. ret:
  227. tsif_put_clocks(tsif_device);
  228. return rc;
  229. }
  230. static void tsif_clock(struct msm_tsif_device *tsif_device, int on)
  231. {
  232. if (on) {
  233. if (tsif_device->tsif_clk)
  234. clk_prepare_enable(tsif_device->tsif_clk);
  235. if (tsif_device->tsif_pclk)
  236. clk_prepare_enable(tsif_device->tsif_pclk);
  237. clk_prepare_enable(tsif_device->tsif_ref_clk);
  238. } else {
  239. if (tsif_device->tsif_clk)
  240. clk_disable_unprepare(tsif_device->tsif_clk);
  241. if (tsif_device->tsif_pclk)
  242. clk_disable_unprepare(tsif_device->tsif_pclk);
  243. clk_disable_unprepare(tsif_device->tsif_ref_clk);
  244. }
  245. }
  246. static void tsif_clocks_off(unsigned long data)
  247. {
  248. struct msm_tsif_device *tsif_device = (struct msm_tsif_device *) data;
  249. tsif_clock(tsif_device, 0);
  250. }
  251. /* ===clocks end=== */
  252. /* ===gpio begin=== */
  253. static int tsif_gpios_disable(const struct msm_gpio *table, int size)
  254. {
  255. int rc = 0;
  256. int i;
  257. const struct msm_gpio *g;
  258. for (i = size-1; i >= 0; i--) {
  259. int tmp;
  260. g = table + i;
  261. tmp = gpio_tlmm_config(GPIO_CFG(GPIO_PIN(g->gpio_cfg),
  262. 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
  263. GPIO_CFG_DISABLE);
  264. if (tmp) {
  265. pr_err("gpio_tlmm_config(0x%08x, GPIO_CFG_DISABLE)"
  266. " <%s> failed: %d\n",
  267. g->gpio_cfg, g->label ?: "?", rc);
  268. pr_err("pin %d func %d dir %d pull %d drvstr %d\n",
  269. GPIO_PIN(g->gpio_cfg), GPIO_FUNC(g->gpio_cfg),
  270. GPIO_DIR(g->gpio_cfg), GPIO_PULL(g->gpio_cfg),
  271. GPIO_DRVSTR(g->gpio_cfg));
  272. if (!rc)
  273. rc = tmp;
  274. }
  275. }
  276. return rc;
  277. }
  278. static int tsif_gpios_enable(const struct msm_gpio *table, int size)
  279. {
  280. int rc;
  281. int i;
  282. const struct msm_gpio *g;
  283. for (i = 0; i < size; i++) {
  284. g = table + i;
  285. rc = gpio_tlmm_config(g->gpio_cfg, GPIO_CFG_ENABLE);
  286. if (rc) {
  287. pr_err("gpio_tlmm_config(0x%08x, GPIO_CFG_ENABLE)"
  288. " <%s> failed: %d\n",
  289. g->gpio_cfg, g->label ?: "?", rc);
  290. pr_err("pin %d func %d dir %d pull %d drvstr %d\n",
  291. GPIO_PIN(g->gpio_cfg), GPIO_FUNC(g->gpio_cfg),
  292. GPIO_DIR(g->gpio_cfg), GPIO_PULL(g->gpio_cfg),
  293. GPIO_DRVSTR(g->gpio_cfg));
  294. goto err;
  295. }
  296. }
  297. return 0;
  298. err:
  299. tsif_gpios_disable(table, i);
  300. return rc;
  301. }
  302. static int tsif_gpios_request_enable(const struct msm_gpio *table, int size)
  303. {
  304. int rc;
  305. rc = tsif_gpios_enable(table, size);
  306. return rc;
  307. }
  308. static void tsif_gpios_disable_free(const struct msm_gpio *table, int size)
  309. {
  310. tsif_gpios_disable(table, size);
  311. }
  312. static int tsif_start_gpios(struct msm_tsif_device *tsif_device)
  313. {
  314. struct msm_tsif_platform_data *pdata =
  315. tsif_device->pdev->dev.platform_data;
  316. return tsif_gpios_request_enable(pdata->gpios, pdata->num_gpios);
  317. }
  318. static void tsif_stop_gpios(struct msm_tsif_device *tsif_device)
  319. {
  320. struct msm_tsif_platform_data *pdata =
  321. tsif_device->pdev->dev.platform_data;
  322. tsif_gpios_disable_free(pdata->gpios, pdata->num_gpios);
  323. }
  324. /* ===gpio end=== */
  325. static int tsif_start_hw(struct msm_tsif_device *tsif_device)
  326. {
  327. u32 ctl = TSIF_STS_CTL_EN_IRQ |
  328. TSIF_STS_CTL_EN_TIME_LIM |
  329. TSIF_STS_CTL_EN_TCR |
  330. TSIF_STS_CTL_EN_DM;
  331. if (tsif_device->clock_inverse)
  332. ctl |= TSIF_STS_CTL_INV_CLOCK;
  333. if (tsif_device->data_inverse)
  334. ctl |= TSIF_STS_CTL_INV_DATA;
  335. if (tsif_device->sync_inverse)
  336. ctl |= TSIF_STS_CTL_INV_SYNC;
  337. if (tsif_device->enable_inverse)
  338. ctl |= TSIF_STS_CTL_INV_ENABLE;
  339. dev_info(&tsif_device->pdev->dev, "%s\n", __func__);
  340. switch (tsif_device->mode) {
  341. case 1: /* mode 1 */
  342. ctl |= (0 << 5);
  343. break;
  344. case 2: /* mode 2 */
  345. ctl |= (1 << 5);
  346. break;
  347. case 3: /* manual - control from debugfs */
  348. return 0;
  349. break;
  350. default:
  351. return -EINVAL;
  352. }
  353. iowrite32(ctl, tsif_device->base + TSIF_STS_CTL_OFF);
  354. iowrite32(tsif_device->time_limit,
  355. tsif_device->base + TSIF_TIME_LIMIT_OFF);
  356. wmb();
  357. iowrite32(ctl | TSIF_STS_CTL_START,
  358. tsif_device->base + TSIF_STS_CTL_OFF);
  359. wmb();
  360. ctl = ioread32(tsif_device->base + TSIF_STS_CTL_OFF);
  361. return (ctl & TSIF_STS_CTL_START) ? 0 : -EFAULT;
  362. }
  363. static void tsif_stop_hw(struct msm_tsif_device *tsif_device)
  364. {
  365. iowrite32(TSIF_STS_CTL_STOP, tsif_device->base + TSIF_STS_CTL_OFF);
  366. wmb();
  367. }
  368. /* ===DMA begin=== */
  369. /**
  370. * TSIF DMA theory of operation
  371. *
  372. * Circular memory buffer \a tsif_mem_buffer allocated;
  373. * 4 pointers points to and moved forward on:
  374. * - \a ri index of first ready to read packet.
  375. * Updated by client's call to tsif_reclaim_packets()
  376. * - \a wi points to the next packet to be written by DM.
  377. * Data below is valid and will not be overriden by DMA.
  378. * Moved on DM callback
  379. * - \a dmwi points to the next packet not scheduled yet for DM
  380. * moved when packet scheduled for DM
  381. *
  382. * In addition, DM xfer keep internal \a wi - copy of \a tsif_device->dmwi
  383. * at time immediately after scheduling.
  384. *
  385. * Initially, 2 packets get scheduled for the DM.
  386. *
  387. * Upon packet receive, DM writes packet to the pre-programmed
  388. * location and invoke its callback.
  389. *
  390. * DM callback moves sets wi pointer to \a xfer->wi;
  391. * then it schedules next packet for DM and moves \a dmwi pointer.
  392. *
  393. * Buffer overflow handling
  394. *
  395. * If \a dmwi == \a ri-1, buffer is full and \a dmwi can't be advanced.
  396. * DMA re-scheduled to the same index.
  397. * Callback check and not move \a wi to become equal to \a ri
  398. *
  399. * On \a read request, data between \a ri and \a wi pointers may be read;
  400. * \ri pointer moved accordingly.
  401. *
  402. * It is always granted, on modulo sizeof(tsif_mem_buffer), that
  403. * \a wi is between [\a ri, \a dmwi]
  404. *
  405. * Amount of data available is (wi-ri)*TSIF_PKT_SIZE
  406. *
  407. * Number of scheduled packets for DM: (dmwi-wi)
  408. */
  409. /**
  410. * tsif_dma_schedule - schedule DMA transfers
  411. *
  412. * @tsif_device: device
  413. *
  414. * Executed from process context on init, or from tasklet when
  415. * re-scheduling upon DMA completion.
  416. * This prevent concurrent execution from several CPU's
  417. */
  418. static void tsif_dma_schedule(struct msm_tsif_device *tsif_device)
  419. {
  420. int i, dmwi0, dmwi1, found = 0;
  421. /* find free entry */
  422. for (i = 0; i < 2; i++) {
  423. struct tsif_xfer *xfer = &tsif_device->xfer[i];
  424. if (xfer->busy)
  425. continue;
  426. found++;
  427. xfer->busy = 1;
  428. dmwi0 = tsif_device->dmwi;
  429. tsif_device->dmov_cmd[i]->box.dst_row_addr =
  430. tsif_device->data_buffer_dma + TSIF_PKT_SIZE * dmwi0;
  431. /* proposed value for dmwi */
  432. dmwi1 = (dmwi0 + TSIF_PKTS_IN_CHUNK) % TSIF_PKTS_IN_BUF;
  433. /**
  434. * If dmwi going to overlap with ri,
  435. * overflow occurs because data was not read.
  436. * Still get this packet, to not interrupt TSIF
  437. * hardware, but do not advance dmwi.
  438. *
  439. * Upon receive, packet will be dropped.
  440. */
  441. if (dmwi1 != tsif_device->ri) {
  442. tsif_device->dmwi = dmwi1;
  443. } else {
  444. dev_info(&tsif_device->pdev->dev,
  445. "Overflow detected\n");
  446. }
  447. xfer->wi = tsif_device->dmwi;
  448. #ifdef CONFIG_TSIF_DEBUG
  449. dev_info(&tsif_device->pdev->dev,
  450. "schedule xfer[%d] -> [%2d]{%2d}\n",
  451. i, dmwi0, xfer->wi);
  452. #endif
  453. /* complete all the writes to box */
  454. dma_coherent_pre_ops();
  455. msm_dmov_enqueue_cmd(tsif_device->dma, &xfer->hdr);
  456. }
  457. if (!found)
  458. dev_info(&tsif_device->pdev->dev,
  459. "All xfer entries are busy\n");
  460. }
  461. /**
  462. * tsif_dmov_complete_func - DataMover completion callback
  463. *
  464. * @cmd: original DM command
  465. * @result: DM result
  466. * @err: optional error buffer
  467. *
  468. * Executed in IRQ context (Data Mover's IRQ)
  469. * DataMover's spinlock @msm_dmov_lock held.
  470. */
  471. static void tsif_dmov_complete_func(struct msm_dmov_cmd *cmd,
  472. unsigned int result,
  473. struct msm_dmov_errdata *err)
  474. {
  475. int i;
  476. u32 data_offset;
  477. struct tsif_xfer *xfer;
  478. struct msm_tsif_device *tsif_device;
  479. int reschedule = 0;
  480. if (!(result & DMOV_RSLT_VALID)) { /* can I trust to @cmd? */
  481. pr_err("Invalid DMOV result: rc=0x%08x, cmd = %p", result, cmd);
  482. return;
  483. }
  484. /* restore original context */
  485. xfer = container_of(cmd, struct tsif_xfer, hdr);
  486. tsif_device = xfer->tsif_device;
  487. i = xfer - tsif_device->xfer;
  488. data_offset = tsif_device->dmov_cmd[i]->box.dst_row_addr -
  489. tsif_device->data_buffer_dma;
  490. /* order reads from the xferred buffer */
  491. dma_coherent_post_ops();
  492. if (result & DMOV_RSLT_DONE) {
  493. int w = data_offset / TSIF_PKT_SIZE;
  494. tsif_device->stat_rx++;
  495. /*
  496. * sowtware overflow when I was scheduled?
  497. *
  498. * @w is where this xfer was actually written to;
  499. * @xfer->wi is where device's @wi will be set;
  500. *
  501. * if these 2 are equal, we are short in space and
  502. * going to overwrite this xfer - this is "soft drop"
  503. */
  504. if (w == xfer->wi)
  505. tsif_device->stat_soft_drop++;
  506. reschedule = (tsif_device->state == tsif_state_running);
  507. #ifdef CONFIG_TSIF_DEBUG
  508. /* IFI calculation */
  509. /*
  510. * update stat_ifi (inter frame interval)
  511. *
  512. * Calculate time difference between last and 1-st
  513. * packets in chunk
  514. *
  515. * To be removed after tuning
  516. */
  517. if (TSIF_PKTS_IN_CHUNK > 1) {
  518. void *ptr = tsif_device->data_buffer + data_offset;
  519. u32 *p0 = ptr;
  520. u32 *p1 = ptr + (TSIF_PKTS_IN_CHUNK - 1) *
  521. TSIF_PKT_SIZE;
  522. u32 tts0 = TSIF_STATUS_TTS(tsif_device->stat0 =
  523. tsif_pkt_status(p0));
  524. u32 tts1 = TSIF_STATUS_TTS(tsif_device->stat1 =
  525. tsif_pkt_status(p1));
  526. tsif_device->stat_ifi = (tts1 - tts0) /
  527. (TSIF_PKTS_IN_CHUNK - 1);
  528. }
  529. #endif
  530. } else {
  531. /**
  532. * Error or flush
  533. *
  534. * To recover - re-open TSIF device.
  535. */
  536. /* mark status "not valid" in data buffer */
  537. int n;
  538. void *ptr = tsif_device->data_buffer + data_offset;
  539. for (n = 0; n < TSIF_PKTS_IN_CHUNK; n++) {
  540. u32 *p = ptr + (n * TSIF_PKT_SIZE);
  541. /* last dword is status + TTS */
  542. p[TSIF_PKT_SIZE / sizeof(*p) - 1] = 0;
  543. }
  544. if (result & DMOV_RSLT_ERROR) {
  545. dev_err(&tsif_device->pdev->dev,
  546. "DMA error (0x%08x)\n", result);
  547. tsif_device->stat_dmov_err++;
  548. /* force device close */
  549. if (tsif_device->state == tsif_state_running) {
  550. tsif_stop_hw(tsif_device);
  551. /*
  552. * This branch is taken only in case of
  553. * severe hardware problem (I don't even know
  554. * what should happen for DMOV_RSLT_ERROR);
  555. * thus I prefer code simplicity over
  556. * performance.
  557. * Clocks are turned off from outside the
  558. * interrupt context.
  559. */
  560. tasklet_schedule(&tsif_device->clocks_off);
  561. tsif_device->state = tsif_state_flushing;
  562. }
  563. }
  564. if (result & DMOV_RSLT_FLUSH) {
  565. /*
  566. * Flushing normally happens in process of
  567. * @tsif_stop(), when we are waiting for outstanding
  568. * DMA commands to be flushed.
  569. */
  570. dev_info(&tsif_device->pdev->dev,
  571. "DMA channel flushed (0x%08x)\n", result);
  572. if (tsif_device->state == tsif_state_flushing) {
  573. if ((!tsif_device->xfer[0].busy) &&
  574. (!tsif_device->xfer[1].busy)) {
  575. tsif_device->state = tsif_state_stopped;
  576. }
  577. }
  578. }
  579. if (err)
  580. dev_err(&tsif_device->pdev->dev,
  581. "Flush data: %08x %08x %08x %08x %08x %08x\n",
  582. err->flush[0], err->flush[1], err->flush[2],
  583. err->flush[3], err->flush[4], err->flush[5]);
  584. }
  585. tsif_device->wi = xfer->wi;
  586. xfer->busy = 0;
  587. if (tsif_device->client_notify)
  588. tsif_device->client_notify(tsif_device->client_data);
  589. /*
  590. * Can't schedule next DMA -
  591. * DataMover driver still hold its semaphore,
  592. * deadlock will occur.
  593. */
  594. if (reschedule)
  595. tasklet_schedule(&tsif_device->dma_refill);
  596. }
  597. /**
  598. * tsif_dma_refill - tasklet function for tsif_device->dma_refill
  599. *
  600. * @data: tsif_device
  601. *
  602. * Reschedule DMA requests
  603. *
  604. * Executed in tasklet
  605. */
  606. static void tsif_dma_refill(unsigned long data)
  607. {
  608. struct msm_tsif_device *tsif_device = (struct msm_tsif_device *) data;
  609. if (tsif_device->state == tsif_state_running)
  610. tsif_dma_schedule(tsif_device);
  611. }
  612. /**
  613. * tsif_dma_flush - flush DMA channel
  614. *
  615. * @tsif_device:
  616. *
  617. * busy wait till DMA flushed
  618. */
  619. static void tsif_dma_flush(struct msm_tsif_device *tsif_device)
  620. {
  621. if (tsif_device->xfer[0].busy || tsif_device->xfer[1].busy) {
  622. tsif_device->state = tsif_state_flushing;
  623. while (tsif_device->xfer[0].busy ||
  624. tsif_device->xfer[1].busy) {
  625. msm_dmov_flush(tsif_device->dma, 1);
  626. usleep(10000);
  627. }
  628. }
  629. tsif_device->state = tsif_state_stopped;
  630. if (tsif_device->client_notify)
  631. tsif_device->client_notify(tsif_device->client_data);
  632. }
  633. static void tsif_dma_exit(struct msm_tsif_device *tsif_device)
  634. {
  635. int i;
  636. tsif_device->state = tsif_state_flushing;
  637. tasklet_kill(&tsif_device->dma_refill);
  638. tsif_dma_flush(tsif_device);
  639. for (i = 0; i < 2; i++) {
  640. if (tsif_device->dmov_cmd[i]) {
  641. dma_free_coherent(NULL, sizeof(struct tsif_dmov_cmd),
  642. tsif_device->dmov_cmd[i],
  643. tsif_device->dmov_cmd_dma[i]);
  644. tsif_device->dmov_cmd[i] = NULL;
  645. }
  646. }
  647. if (tsif_device->data_buffer) {
  648. tsif_device->blob_wrapper_databuf.data = NULL;
  649. tsif_device->blob_wrapper_databuf.size = 0;
  650. dma_free_coherent(NULL, TSIF_BUF_SIZE,
  651. tsif_device->data_buffer,
  652. tsif_device->data_buffer_dma);
  653. tsif_device->data_buffer = NULL;
  654. }
  655. }
  656. static int tsif_dma_init(struct msm_tsif_device *tsif_device)
  657. {
  658. int i;
  659. /* TODO: allocate all DMA memory in one buffer */
  660. /* Note: don't pass device,
  661. it require coherent_dma_mask id device definition */
  662. tsif_device->data_buffer = dma_alloc_coherent(NULL, TSIF_BUF_SIZE,
  663. &tsif_device->data_buffer_dma, GFP_KERNEL);
  664. if (!tsif_device->data_buffer)
  665. goto err;
  666. dev_info(&tsif_device->pdev->dev, "data_buffer: %p phys 0x%08x\n",
  667. tsif_device->data_buffer, tsif_device->data_buffer_dma);
  668. tsif_device->blob_wrapper_databuf.data = tsif_device->data_buffer;
  669. tsif_device->blob_wrapper_databuf.size = TSIF_BUF_SIZE;
  670. tsif_device->ri = 0;
  671. tsif_device->wi = 0;
  672. tsif_device->dmwi = 0;
  673. for (i = 0; i < 2; i++) {
  674. dmov_box *box;
  675. struct msm_dmov_cmd *hdr;
  676. tsif_device->dmov_cmd[i] = dma_alloc_coherent(NULL,
  677. sizeof(struct tsif_dmov_cmd),
  678. &tsif_device->dmov_cmd_dma[i], GFP_KERNEL);
  679. if (!tsif_device->dmov_cmd[i])
  680. goto err;
  681. dev_info(&tsif_device->pdev->dev, "dma[%i]: %p phys 0x%08x\n",
  682. i, tsif_device->dmov_cmd[i],
  683. tsif_device->dmov_cmd_dma[i]);
  684. /* dst in 16 LSB, src in 16 MSB */
  685. box = &(tsif_device->dmov_cmd[i]->box);
  686. box->cmd = CMD_MODE_BOX | CMD_LC |
  687. CMD_SRC_CRCI(tsif_device->crci);
  688. box->src_row_addr =
  689. tsif_device->memres->start + TSIF_DATA_PORT_OFF;
  690. box->src_dst_len = (TSIF_PKT_SIZE << 16) | TSIF_PKT_SIZE;
  691. box->num_rows = (TSIF_PKTS_IN_CHUNK << 16) | TSIF_PKTS_IN_CHUNK;
  692. box->row_offset = (0 << 16) | TSIF_PKT_SIZE;
  693. tsif_device->dmov_cmd[i]->box_ptr = CMD_PTR_LP |
  694. DMOV_CMD_ADDR(tsif_device->dmov_cmd_dma[i] +
  695. offsetof(struct tsif_dmov_cmd, box));
  696. tsif_device->xfer[i].tsif_device = tsif_device;
  697. hdr = &tsif_device->xfer[i].hdr;
  698. hdr->cmdptr = DMOV_CMD_ADDR(tsif_device->dmov_cmd_dma[i] +
  699. offsetof(struct tsif_dmov_cmd, box_ptr));
  700. hdr->complete_func = tsif_dmov_complete_func;
  701. }
  702. msm_dmov_flush(tsif_device->dma, 1);
  703. return 0;
  704. err:
  705. dev_err(&tsif_device->pdev->dev, "Failed to allocate DMA buffers\n");
  706. tsif_dma_exit(tsif_device);
  707. return -ENOMEM;
  708. }
  709. /* ===DMA end=== */
  710. /* ===IRQ begin=== */
  711. static irqreturn_t tsif_irq(int irq, void *dev_id)
  712. {
  713. struct msm_tsif_device *tsif_device = dev_id;
  714. u32 sts_ctl = ioread32(tsif_device->base + TSIF_STS_CTL_OFF);
  715. if (!(sts_ctl & (TSIF_STS_CTL_PACK_AVAIL |
  716. TSIF_STS_CTL_OVERFLOW |
  717. TSIF_STS_CTL_LOST_SYNC |
  718. TSIF_STS_CTL_TIMEOUT))) {
  719. dev_warn(&tsif_device->pdev->dev, "Spurious interrupt\n");
  720. return IRQ_NONE;
  721. }
  722. if (sts_ctl & TSIF_STS_CTL_PACK_AVAIL) {
  723. dev_info(&tsif_device->pdev->dev, "TSIF IRQ: PACK_AVAIL\n");
  724. tsif_device->stat_rx++;
  725. }
  726. if (sts_ctl & TSIF_STS_CTL_OVERFLOW) {
  727. dev_info(&tsif_device->pdev->dev, "TSIF IRQ: OVERFLOW\n");
  728. tsif_device->stat_overflow++;
  729. }
  730. if (sts_ctl & TSIF_STS_CTL_LOST_SYNC) {
  731. dev_info(&tsif_device->pdev->dev, "TSIF IRQ: LOST SYNC\n");
  732. tsif_device->stat_lost_sync++;
  733. }
  734. if (sts_ctl & TSIF_STS_CTL_TIMEOUT) {
  735. dev_info(&tsif_device->pdev->dev, "TSIF IRQ: TIMEOUT\n");
  736. tsif_device->stat_timeout++;
  737. }
  738. iowrite32(sts_ctl, tsif_device->base + TSIF_STS_CTL_OFF);
  739. wmb();
  740. return IRQ_HANDLED;
  741. }
  742. /* ===IRQ end=== */
  743. /* ===Device attributes begin=== */
  744. static ssize_t show_stats(struct device *dev, struct device_attribute *attr,
  745. char *buf)
  746. {
  747. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  748. char *state_string;
  749. switch (tsif_device->state) {
  750. case tsif_state_stopped:
  751. state_string = "stopped";
  752. break;
  753. case tsif_state_running:
  754. state_string = "running";
  755. break;
  756. case tsif_state_flushing:
  757. state_string = "flushing";
  758. break;
  759. default:
  760. state_string = "???";
  761. }
  762. return snprintf(buf, PAGE_SIZE,
  763. "Device %s\n"
  764. "Mode = %d\n"
  765. "Time limit = %d\n"
  766. "State %s\n"
  767. "Client = %p\n"
  768. "Pkt/Buf = %d\n"
  769. "Pkt/chunk = %d\n"
  770. "Clock inv = %d\n"
  771. "Data inv = %d\n"
  772. "Sync inv = %d\n"
  773. "Enable inv = %d\n"
  774. "--statistics--\n"
  775. "Rx chunks = %d\n"
  776. "Overflow = %d\n"
  777. "Lost sync = %d\n"
  778. "Timeout = %d\n"
  779. "DMA error = %d\n"
  780. "Soft drop = %d\n"
  781. "IFI = %d\n"
  782. "(0x%08x - 0x%08x) / %d\n"
  783. "--debug--\n"
  784. "GLBL_CLK_ENA = 0x%08x\n"
  785. "ROW_RESET = 0x%08x\n"
  786. "CLK_HALT_STATEB = 0x%08x\n"
  787. "TV_NS_REG = 0x%08x\n"
  788. "TSIF_NS_REG = 0x%08x\n",
  789. dev_name(dev),
  790. tsif_device->mode,
  791. tsif_device->time_limit,
  792. state_string,
  793. tsif_device->client_data,
  794. TSIF_PKTS_IN_BUF,
  795. TSIF_PKTS_IN_CHUNK,
  796. tsif_device->clock_inverse,
  797. tsif_device->data_inverse,
  798. tsif_device->sync_inverse,
  799. tsif_device->enable_inverse,
  800. tsif_device->stat_rx,
  801. tsif_device->stat_overflow,
  802. tsif_device->stat_lost_sync,
  803. tsif_device->stat_timeout,
  804. tsif_device->stat_dmov_err,
  805. tsif_device->stat_soft_drop,
  806. tsif_device->stat_ifi,
  807. tsif_device->stat1,
  808. tsif_device->stat0,
  809. TSIF_PKTS_IN_CHUNK - 1,
  810. ioread32(GLBL_CLK_ENA),
  811. ioread32(ROW_RESET),
  812. ioread32(CLK_HALT_STATEB),
  813. ioread32(TV_NS_REG),
  814. ioread32(TSIF_NS_REG)
  815. );
  816. }
  817. /**
  818. * set_stats - reset statistics on write
  819. *
  820. * @dev:
  821. * @attr:
  822. * @buf:
  823. * @count:
  824. */
  825. static ssize_t set_stats(struct device *dev, struct device_attribute *attr,
  826. const char *buf, size_t count)
  827. {
  828. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  829. tsif_device->stat_rx = 0;
  830. tsif_device->stat_overflow = 0;
  831. tsif_device->stat_lost_sync = 0;
  832. tsif_device->stat_timeout = 0;
  833. tsif_device->stat_dmov_err = 0;
  834. tsif_device->stat_soft_drop = 0;
  835. tsif_device->stat_ifi = 0;
  836. return count;
  837. }
  838. static DEVICE_ATTR(stats, S_IRUGO | S_IWUSR, show_stats, set_stats);
  839. static ssize_t show_mode(struct device *dev, struct device_attribute *attr,
  840. char *buf)
  841. {
  842. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  843. return snprintf(buf, PAGE_SIZE, "%d\n", tsif_device->mode);
  844. }
  845. static ssize_t set_mode(struct device *dev, struct device_attribute *attr,
  846. const char *buf, size_t count)
  847. {
  848. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  849. int value;
  850. int rc;
  851. if (1 != sscanf(buf, "%d", &value)) {
  852. dev_err(&tsif_device->pdev->dev,
  853. "Failed to parse integer: <%s>\n", buf);
  854. return -EINVAL;
  855. }
  856. rc = tsif_set_mode(tsif_device, value);
  857. if (!rc)
  858. rc = count;
  859. return rc;
  860. }
  861. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, show_mode, set_mode);
  862. static ssize_t show_time_limit(struct device *dev,
  863. struct device_attribute *attr,
  864. char *buf)
  865. {
  866. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  867. return snprintf(buf, PAGE_SIZE, "%d\n", tsif_device->time_limit);
  868. }
  869. static ssize_t set_time_limit(struct device *dev,
  870. struct device_attribute *attr,
  871. const char *buf, size_t count)
  872. {
  873. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  874. int value;
  875. int rc;
  876. if (1 != sscanf(buf, "%d", &value)) {
  877. dev_err(&tsif_device->pdev->dev,
  878. "Failed to parse integer: <%s>\n", buf);
  879. return -EINVAL;
  880. }
  881. rc = tsif_set_time_limit(tsif_device, value);
  882. if (!rc)
  883. rc = count;
  884. return rc;
  885. }
  886. static DEVICE_ATTR(time_limit, S_IRUGO | S_IWUSR,
  887. show_time_limit, set_time_limit);
  888. static ssize_t show_buf_config(struct device *dev,
  889. struct device_attribute *attr,
  890. char *buf)
  891. {
  892. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  893. return snprintf(buf, PAGE_SIZE, "%d * %d\n",
  894. tsif_device->pkts_per_chunk,
  895. tsif_device->chunks_per_buf);
  896. }
  897. static ssize_t set_buf_config(struct device *dev,
  898. struct device_attribute *attr,
  899. const char *buf, size_t count)
  900. {
  901. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  902. u32 p, c;
  903. int rc;
  904. if (2 != sscanf(buf, "%d * %d", &p, &c)) {
  905. dev_err(&tsif_device->pdev->dev,
  906. "Failed to parse integer: <%s>\n", buf);
  907. return -EINVAL;
  908. }
  909. rc = tsif_set_buf_config(tsif_device, p, c);
  910. if (!rc)
  911. rc = count;
  912. return rc;
  913. }
  914. static DEVICE_ATTR(buf_config, S_IRUGO | S_IWUSR,
  915. show_buf_config, set_buf_config);
  916. static ssize_t show_clk_inverse(struct device *dev,
  917. struct device_attribute *attr, char *buf)
  918. {
  919. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  920. return snprintf(buf, PAGE_SIZE, "%d\n", tsif_device->clock_inverse);
  921. }
  922. static ssize_t set_clk_inverse(struct device *dev,
  923. struct device_attribute *attr, const char *buf, size_t count)
  924. {
  925. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  926. int value;
  927. int rc;
  928. if (1 != sscanf(buf, "%d", &value)) {
  929. dev_err(&tsif_device->pdev->dev,
  930. "Failed to parse integer: <%s>\n", buf);
  931. return -EINVAL;
  932. }
  933. rc = tsif_set_clk_inverse(tsif_device, value);
  934. if (!rc)
  935. rc = count;
  936. return rc;
  937. }
  938. static DEVICE_ATTR(clk_inverse, S_IRUGO | S_IWUSR,
  939. show_clk_inverse, set_clk_inverse);
  940. static ssize_t show_data_inverse(struct device *dev,
  941. struct device_attribute *attr, char *buf)
  942. {
  943. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  944. return snprintf(buf, PAGE_SIZE, "%d\n", tsif_device->data_inverse);
  945. }
  946. static ssize_t set_data_inverse(struct device *dev,
  947. struct device_attribute *attr, const char *buf, size_t count)
  948. {
  949. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  950. int value;
  951. int rc;
  952. if (1 != sscanf(buf, "%d", &value)) {
  953. dev_err(&tsif_device->pdev->dev,
  954. "Failed to parse integer: <%s>\n", buf);
  955. return -EINVAL;
  956. }
  957. rc = tsif_set_data_inverse(tsif_device, value);
  958. if (!rc)
  959. rc = count;
  960. return rc;
  961. }
  962. static DEVICE_ATTR(data_inverse, S_IRUGO | S_IWUSR,
  963. show_data_inverse, set_data_inverse);
  964. static ssize_t show_sync_inverse(struct device *dev,
  965. struct device_attribute *attr, char *buf)
  966. {
  967. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  968. return snprintf(buf, PAGE_SIZE, "%d\n", tsif_device->sync_inverse);
  969. }
  970. static ssize_t set_sync_inverse(struct device *dev,
  971. struct device_attribute *attr, const char *buf, size_t count)
  972. {
  973. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  974. int value;
  975. int rc;
  976. if (1 != sscanf(buf, "%d", &value)) {
  977. dev_err(&tsif_device->pdev->dev,
  978. "Failed to parse integer: <%s>\n", buf);
  979. return -EINVAL;
  980. }
  981. rc = tsif_set_sync_inverse(tsif_device, value);
  982. if (!rc)
  983. rc = count;
  984. return rc;
  985. }
  986. static DEVICE_ATTR(sync_inverse, S_IRUGO | S_IWUSR,
  987. show_sync_inverse, set_sync_inverse);
  988. static ssize_t show_enable_inverse(struct device *dev,
  989. struct device_attribute *attr, char *buf)
  990. {
  991. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  992. return snprintf(buf, PAGE_SIZE, "%d\n", tsif_device->enable_inverse);
  993. }
  994. static ssize_t set_enable_inverse(struct device *dev,
  995. struct device_attribute *attr, const char *buf, size_t count)
  996. {
  997. struct msm_tsif_device *tsif_device = dev_get_drvdata(dev);
  998. int value;
  999. int rc;
  1000. if (1 != sscanf(buf, "%d", &value)) {
  1001. dev_err(&tsif_device->pdev->dev,
  1002. "Failed to parse integer: <%s>\n", buf);
  1003. return -EINVAL;
  1004. }
  1005. rc = tsif_set_enable_inverse(tsif_device, value);
  1006. if (!rc)
  1007. rc = count;
  1008. return rc;
  1009. }
  1010. static DEVICE_ATTR(enable_inverse, S_IRUGO | S_IWUSR,
  1011. show_enable_inverse, set_enable_inverse);
  1012. static struct attribute *dev_attrs[] = {
  1013. &dev_attr_stats.attr,
  1014. &dev_attr_mode.attr,
  1015. &dev_attr_time_limit.attr,
  1016. &dev_attr_buf_config.attr,
  1017. &dev_attr_clk_inverse.attr,
  1018. &dev_attr_data_inverse.attr,
  1019. &dev_attr_sync_inverse.attr,
  1020. &dev_attr_enable_inverse.attr,
  1021. NULL,
  1022. };
  1023. static struct attribute_group dev_attr_grp = {
  1024. .attrs = dev_attrs,
  1025. };
  1026. /* ===Device attributes end=== */
  1027. /* ===debugfs begin=== */
  1028. static int debugfs_iomem_x32_set(void *data, u64 val)
  1029. {
  1030. iowrite32(val, data);
  1031. wmb();
  1032. return 0;
  1033. }
  1034. static int debugfs_iomem_x32_get(void *data, u64 *val)
  1035. {
  1036. *val = ioread32(data);
  1037. return 0;
  1038. }
  1039. DEFINE_SIMPLE_ATTRIBUTE(fops_iomem_x32, debugfs_iomem_x32_get,
  1040. debugfs_iomem_x32_set, "0x%08llx\n");
  1041. struct dentry *debugfs_create_iomem_x32(const char *name, mode_t mode,
  1042. struct dentry *parent, u32 *value)
  1043. {
  1044. return debugfs_create_file(name, mode, parent, value, &fops_iomem_x32);
  1045. }
  1046. static int action_open(struct msm_tsif_device *tsif_device)
  1047. {
  1048. int rc = -EINVAL;
  1049. int result;
  1050. struct msm_tsif_platform_data *pdata =
  1051. tsif_device->pdev->dev.platform_data;
  1052. dev_info(&tsif_device->pdev->dev, "%s\n", __func__);
  1053. if (tsif_device->state != tsif_state_stopped)
  1054. return -EAGAIN;
  1055. rc = tsif_dma_init(tsif_device);
  1056. if (rc) {
  1057. dev_err(&tsif_device->pdev->dev, "failed to init DMA\n");
  1058. return rc;
  1059. }
  1060. tsif_device->state = tsif_state_running;
  1061. /*
  1062. * DMA should be scheduled prior to TSIF hardware initialization,
  1063. * otherwise "bus error" will be reported by Data Mover
  1064. */
  1065. enable_irq(tsif_device->irq);
  1066. tsif_clock(tsif_device, 1);
  1067. tsif_dma_schedule(tsif_device);
  1068. /*
  1069. * init the device if required
  1070. */
  1071. if (pdata->init)
  1072. pdata->init(pdata);
  1073. rc = tsif_start_hw(tsif_device);
  1074. if (rc) {
  1075. dev_err(&tsif_device->pdev->dev, "Unable to start HW\n");
  1076. tsif_dma_exit(tsif_device);
  1077. tsif_clock(tsif_device, 0);
  1078. disable_irq(tsif_device->irq);
  1079. return rc;
  1080. }
  1081. /* make sure the GPIO's are set up */
  1082. rc = tsif_start_gpios(tsif_device);
  1083. if (rc) {
  1084. dev_err(&tsif_device->pdev->dev, "failed to start GPIOs\n");
  1085. tsif_stop_hw(tsif_device);
  1086. tsif_dma_exit(tsif_device);
  1087. tsif_clock(tsif_device, 0);
  1088. disable_irq(tsif_device->irq);
  1089. return rc;
  1090. }
  1091. result = pm_runtime_get(&tsif_device->pdev->dev);
  1092. if (result < 0) {
  1093. dev_err(&tsif_device->pdev->dev,
  1094. "Runtime PM: Unable to wake up the device, rc = %d\n",
  1095. result);
  1096. tsif_stop_gpios(tsif_device);
  1097. tsif_stop_hw(tsif_device);
  1098. tsif_dma_exit(tsif_device);
  1099. tsif_clock(tsif_device, 0);
  1100. disable_irq(tsif_device->irq);
  1101. return result;
  1102. }
  1103. wake_lock(&tsif_device->wake_lock);
  1104. return 0;
  1105. }
  1106. static int action_close(struct msm_tsif_device *tsif_device)
  1107. {
  1108. dev_info(&tsif_device->pdev->dev, "%s, state %d\n", __func__,
  1109. (int)tsif_device->state);
  1110. /* turn off the GPIO's to prevent new data from entering */
  1111. tsif_stop_gpios(tsif_device);
  1112. /* we unfortunately must sleep here to give the ADM time to
  1113. * complete any outstanding reads after the GPIO's are turned
  1114. * off. There is no indication from the ADM hardware that
  1115. * there are any outstanding reads on the bus, and if we
  1116. * stop the TSIF too quickly, it can cause a bus error.
  1117. */
  1118. msleep(250);
  1119. /* now we can stop the core */
  1120. tsif_stop_hw(tsif_device);
  1121. tsif_dma_exit(tsif_device);
  1122. tsif_clock(tsif_device, 0);
  1123. disable_irq(tsif_device->irq);
  1124. pm_runtime_put(&tsif_device->pdev->dev);
  1125. wake_unlock(&tsif_device->wake_lock);
  1126. return 0;
  1127. }
  1128. static struct {
  1129. int (*func)(struct msm_tsif_device *);
  1130. const char *name;
  1131. } actions[] = {
  1132. { action_open, "open"},
  1133. { action_close, "close"},
  1134. };
  1135. static ssize_t tsif_debugfs_action_write(struct file *filp,
  1136. const char __user *userbuf,
  1137. size_t count, loff_t *f_pos)
  1138. {
  1139. int i;
  1140. struct msm_tsif_device *tsif_device = filp->private_data;
  1141. char s[40];
  1142. int len = min(sizeof(s) - 1, count);
  1143. if (copy_from_user(s, userbuf, len))
  1144. return -EFAULT;
  1145. s[len] = '\0';
  1146. dev_info(&tsif_device->pdev->dev, "%s:%s\n", __func__, s);
  1147. for (i = 0; i < ARRAY_SIZE(actions); i++) {
  1148. if (!strncmp(s, actions[i].name,
  1149. min(count, strlen(actions[i].name)))) {
  1150. int rc = actions[i].func(tsif_device);
  1151. if (!rc)
  1152. rc = count;
  1153. return rc;
  1154. }
  1155. }
  1156. return -EINVAL;
  1157. }
  1158. static int tsif_debugfs_generic_open(struct inode *inode, struct file *filp)
  1159. {
  1160. filp->private_data = inode->i_private;
  1161. return 0;
  1162. }
  1163. static const struct file_operations fops_debugfs_action = {
  1164. .open = tsif_debugfs_generic_open,
  1165. .write = tsif_debugfs_action_write,
  1166. };
  1167. static ssize_t tsif_debugfs_dma_read(struct file *filp, char __user *userbuf,
  1168. size_t count, loff_t *f_pos)
  1169. {
  1170. static char bufa[200];
  1171. static char *buf = bufa;
  1172. int sz = sizeof(bufa);
  1173. struct msm_tsif_device *tsif_device = filp->private_data;
  1174. int len = 0;
  1175. if (tsif_device) {
  1176. int i;
  1177. len += snprintf(buf + len, sz - len,
  1178. "ri %3d | wi %3d | dmwi %3d |",
  1179. tsif_device->ri, tsif_device->wi,
  1180. tsif_device->dmwi);
  1181. for (i = 0; i < 2; i++) {
  1182. struct tsif_xfer *xfer = &tsif_device->xfer[i];
  1183. if (xfer->busy) {
  1184. u32 dst =
  1185. tsif_device->dmov_cmd[i]->box.dst_row_addr;
  1186. u32 base = tsif_device->data_buffer_dma;
  1187. int w = (dst - base) / TSIF_PKT_SIZE;
  1188. len += snprintf(buf + len, sz - len,
  1189. " [%3d]{%3d}",
  1190. w, xfer->wi);
  1191. } else {
  1192. len += snprintf(buf + len, sz - len,
  1193. " ---idle---");
  1194. }
  1195. }
  1196. len += snprintf(buf + len, sz - len, "\n");
  1197. } else {
  1198. len += snprintf(buf + len, sz - len, "No TSIF device???\n");
  1199. }
  1200. return simple_read_from_buffer(userbuf, count, f_pos, buf, len);
  1201. }
  1202. static const struct file_operations fops_debugfs_dma = {
  1203. .open = tsif_debugfs_generic_open,
  1204. .read = tsif_debugfs_dma_read,
  1205. };
  1206. static ssize_t tsif_debugfs_gpios_read(struct file *filp, char __user *userbuf,
  1207. size_t count, loff_t *f_pos)
  1208. {
  1209. static char bufa[300];
  1210. static char *buf = bufa;
  1211. int sz = sizeof(bufa);
  1212. struct msm_tsif_device *tsif_device = filp->private_data;
  1213. int len = 0;
  1214. if (tsif_device) {
  1215. struct msm_tsif_platform_data *pdata =
  1216. tsif_device->pdev->dev.platform_data;
  1217. int i;
  1218. for (i = 0; i < pdata->num_gpios; i++) {
  1219. if (pdata->gpios[i].gpio_cfg) {
  1220. int x = !!gpio_get_value(GPIO_PIN(
  1221. pdata->gpios[i].gpio_cfg));
  1222. len += snprintf(buf + len, sz - len,
  1223. "%15s: %d\n",
  1224. pdata->gpios[i].label, x);
  1225. }
  1226. }
  1227. } else {
  1228. len += snprintf(buf + len, sz - len, "No TSIF device???\n");
  1229. }
  1230. return simple_read_from_buffer(userbuf, count, f_pos, buf, len);
  1231. }
  1232. static const struct file_operations fops_debugfs_gpios = {
  1233. .open = tsif_debugfs_generic_open,
  1234. .read = tsif_debugfs_gpios_read,
  1235. };
  1236. static void tsif_debugfs_init(struct msm_tsif_device *tsif_device)
  1237. {
  1238. tsif_device->dent_tsif = debugfs_create_dir(
  1239. dev_name(&tsif_device->pdev->dev), NULL);
  1240. if (tsif_device->dent_tsif) {
  1241. int i;
  1242. void __iomem *base = tsif_device->base;
  1243. for (i = 0; i < ARRAY_SIZE(debugfs_tsif_regs); i++) {
  1244. tsif_device->debugfs_tsif_regs[i] =
  1245. debugfs_create_iomem_x32(
  1246. debugfs_tsif_regs[i].name,
  1247. debugfs_tsif_regs[i].mode,
  1248. tsif_device->dent_tsif,
  1249. base + debugfs_tsif_regs[i].offset);
  1250. }
  1251. tsif_device->debugfs_gpio = debugfs_create_file("gpios",
  1252. S_IRUGO,
  1253. tsif_device->dent_tsif, tsif_device, &fops_debugfs_gpios);
  1254. tsif_device->debugfs_action = debugfs_create_file("action",
  1255. S_IWUSR,
  1256. tsif_device->dent_tsif, tsif_device, &fops_debugfs_action);
  1257. tsif_device->debugfs_dma = debugfs_create_file("dma",
  1258. S_IRUGO,
  1259. tsif_device->dent_tsif, tsif_device, &fops_debugfs_dma);
  1260. tsif_device->debugfs_databuf = debugfs_create_blob("data_buf",
  1261. S_IRUGO,
  1262. tsif_device->dent_tsif, &tsif_device->blob_wrapper_databuf);
  1263. }
  1264. }
  1265. static void tsif_debugfs_exit(struct msm_tsif_device *tsif_device)
  1266. {
  1267. if (tsif_device->dent_tsif) {
  1268. int i;
  1269. debugfs_remove_recursive(tsif_device->dent_tsif);
  1270. tsif_device->dent_tsif = NULL;
  1271. for (i = 0; i < ARRAY_SIZE(debugfs_tsif_regs); i++)
  1272. tsif_device->debugfs_tsif_regs[i] = NULL;
  1273. tsif_device->debugfs_gpio = NULL;
  1274. tsif_device->debugfs_action = NULL;
  1275. tsif_device->debugfs_dma = NULL;
  1276. tsif_device->debugfs_databuf = NULL;
  1277. }
  1278. }
  1279. /* ===debugfs end=== */
  1280. /* ===module begin=== */
  1281. static LIST_HEAD(tsif_devices);
  1282. static struct msm_tsif_device *tsif_find_by_id(int id)
  1283. {
  1284. struct msm_tsif_device *tsif_device;
  1285. list_for_each_entry(tsif_device, &tsif_devices, devlist) {
  1286. if (tsif_device->pdev->id == id)
  1287. return tsif_device;
  1288. }
  1289. return NULL;
  1290. }
  1291. static int __devinit msm_tsif_probe(struct platform_device *pdev)
  1292. {
  1293. int rc = -ENODEV;
  1294. struct msm_tsif_platform_data *plat = pdev->dev.platform_data;
  1295. struct msm_tsif_device *tsif_device;
  1296. struct resource *res;
  1297. /* check device validity */
  1298. /* must have platform data */
  1299. if (!plat) {
  1300. dev_err(&pdev->dev, "Platform data not available\n");
  1301. rc = -EINVAL;
  1302. goto out;
  1303. }
  1304. if ((pdev->id < 0) || (pdev->id > TSIF_MAX_ID)) {
  1305. dev_err(&pdev->dev, "Invalid device ID %d\n", pdev->id);
  1306. rc = -EINVAL;
  1307. goto out;
  1308. }
  1309. /* OK, we will use this device */
  1310. tsif_device = kzalloc(sizeof(struct msm_tsif_device), GFP_KERNEL);
  1311. if (!tsif_device) {
  1312. dev_err(&pdev->dev, "Failed to allocate memory for device\n");
  1313. rc = -ENOMEM;
  1314. goto out;
  1315. }
  1316. /* cross links */
  1317. tsif_device->pdev = pdev;
  1318. platform_set_drvdata(pdev, tsif_device);
  1319. tsif_device->mode = 1;
  1320. tsif_device->clock_inverse = 0;
  1321. tsif_device->data_inverse = 0;
  1322. tsif_device->sync_inverse = 0;
  1323. tsif_device->enable_inverse = 0;
  1324. tsif_device->pkts_per_chunk = TSIF_PKTS_IN_CHUNK_DEFAULT;
  1325. tsif_device->chunks_per_buf = TSIF_CHUNKS_IN_BUF_DEFAULT;
  1326. tasklet_init(&tsif_device->dma_refill, tsif_dma_refill,
  1327. (unsigned long)tsif_device);
  1328. tasklet_init(&tsif_device->clocks_off, tsif_clocks_off,
  1329. (unsigned long)tsif_device);
  1330. rc = tsif_get_clocks(tsif_device);
  1331. if (rc)
  1332. goto err_clocks;
  1333. /* map I/O memory */
  1334. tsif_device->memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1335. if (!tsif_device->memres) {
  1336. dev_err(&pdev->dev, "Missing MEM resource\n");
  1337. rc = -ENXIO;
  1338. goto err_rgn;
  1339. }
  1340. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  1341. if (!res) {
  1342. dev_err(&pdev->dev, "Missing DMA resource\n");
  1343. rc = -ENXIO;
  1344. goto err_rgn;
  1345. }
  1346. tsif_device->dma = res->start;
  1347. tsif_device->crci = res->end;
  1348. tsif_device->base = ioremap(tsif_device->memres->start,
  1349. resource_size(tsif_device->memres));
  1350. if (!tsif_device->base) {
  1351. dev_err(&pdev->dev, "ioremap failed\n");
  1352. goto err_ioremap;
  1353. }
  1354. dev_info(&pdev->dev, "remapped phys 0x%08x => virt %p\n",
  1355. tsif_device->memres->start, tsif_device->base);
  1356. pm_runtime_set_active(&pdev->dev);
  1357. pm_runtime_enable(&pdev->dev);
  1358. tsif_debugfs_init(tsif_device);
  1359. rc = platform_get_irq(pdev, 0);
  1360. if (rc > 0) {
  1361. tsif_device->irq = rc;
  1362. rc = request_irq(tsif_device->irq, tsif_irq, IRQF_SHARED,
  1363. dev_name(&pdev->dev), tsif_device);
  1364. disable_irq(tsif_device->irq);
  1365. }
  1366. if (rc) {
  1367. dev_err(&pdev->dev, "failed to request IRQ %d : %d\n",
  1368. tsif_device->irq, rc);
  1369. goto err_irq;
  1370. }
  1371. rc = sysfs_create_group(&pdev->dev.kobj, &dev_attr_grp);
  1372. if (rc) {
  1373. dev_err(&pdev->dev, "failed to create dev. attrs : %d\n", rc);
  1374. goto err_attrs;
  1375. }
  1376. wake_lock_init(&tsif_device->wake_lock, WAKE_LOCK_SUSPEND,
  1377. dev_name(&pdev->dev));
  1378. dev_info(&pdev->dev, "Configured irq %d memory 0x%08x DMA %d CRCI %d\n",
  1379. tsif_device->irq, tsif_device->memres->start,
  1380. tsif_device->dma, tsif_device->crci);
  1381. list_add(&tsif_device->devlist, &tsif_devices);
  1382. return 0;
  1383. /* error path */
  1384. sysfs_remove_group(&pdev->dev.kobj, &dev_attr_grp);
  1385. err_attrs:
  1386. free_irq(tsif_device->irq, tsif_device);
  1387. err_irq:
  1388. tsif_debugfs_exit(tsif_device);
  1389. iounmap(tsif_device->base);
  1390. err_ioremap:
  1391. err_rgn:
  1392. tsif_put_clocks(tsif_device);
  1393. err_clocks:
  1394. kfree(tsif_device);
  1395. out:
  1396. return rc;
  1397. }
  1398. static int __devexit msm_tsif_remove(struct platform_device *pdev)
  1399. {
  1400. struct msm_tsif_device *tsif_device = platform_get_drvdata(pdev);
  1401. dev_info(&pdev->dev, "Unload\n");
  1402. list_del(&tsif_device->devlist);
  1403. wake_lock_destroy(&tsif_device->wake_lock);
  1404. sysfs_remove_group(&pdev->dev.kobj, &dev_attr_grp);
  1405. free_irq(tsif_device->irq, tsif_device);
  1406. tsif_debugfs_exit(tsif_device);
  1407. tsif_dma_exit(tsif_device);
  1408. tsif_stop_gpios(tsif_device);
  1409. iounmap(tsif_device->base);
  1410. tsif_put_clocks(tsif_device);
  1411. pm_runtime_put(&pdev->dev);
  1412. pm_runtime_disable(&pdev->dev);
  1413. kfree(tsif_device);
  1414. return 0;
  1415. }
  1416. static int tsif_runtime_suspend(struct device *dev)
  1417. {
  1418. dev_dbg(dev, "pm_runtime: suspending...\n");
  1419. return 0;
  1420. }
  1421. static int tsif_runtime_resume(struct device *dev)
  1422. {
  1423. dev_dbg(dev, "pm_runtime: resuming...\n");
  1424. return 0;
  1425. }
  1426. static const struct dev_pm_ops tsif_dev_pm_ops = {
  1427. .runtime_suspend = tsif_runtime_suspend,
  1428. .runtime_resume = tsif_runtime_resume,
  1429. };
  1430. static struct platform_driver msm_tsif_driver = {
  1431. .probe = msm_tsif_probe,
  1432. .remove = __exit_p(msm_tsif_remove),
  1433. .driver = {
  1434. .name = "msm_tsif",
  1435. .pm = &tsif_dev_pm_ops,
  1436. },
  1437. };
  1438. static int __init mod_init(void)
  1439. {
  1440. int rc = platform_driver_register(&msm_tsif_driver);
  1441. if (rc)
  1442. pr_err("TSIF: platform_driver_register failed: %d\n", rc);
  1443. return rc;
  1444. }
  1445. static void __exit mod_exit(void)
  1446. {
  1447. platform_driver_unregister(&msm_tsif_driver);
  1448. }
  1449. /* ===module end=== */
  1450. /* public API */
  1451. int tsif_get_active(void)
  1452. {
  1453. struct msm_tsif_device *tsif_device;
  1454. list_for_each_entry(tsif_device, &tsif_devices, devlist) {
  1455. return tsif_device->pdev->id;
  1456. }
  1457. return -ENODEV;
  1458. }
  1459. EXPORT_SYMBOL(tsif_get_active);
  1460. void *tsif_attach(int id, void (*notify)(void *client_data), void *data)
  1461. {
  1462. struct msm_tsif_device *tsif_device = tsif_find_by_id(id);
  1463. if (!tsif_device)
  1464. return ERR_PTR(-ENODEV);
  1465. if (tsif_device->client_notify || tsif_device->client_data)
  1466. return ERR_PTR(-EBUSY);
  1467. tsif_device->client_notify = notify;
  1468. tsif_device->client_data = data;
  1469. /* prevent from unloading */
  1470. get_device(&tsif_device->pdev->dev);
  1471. return tsif_device;
  1472. }
  1473. EXPORT_SYMBOL(tsif_attach);
  1474. void tsif_detach(void *cookie)
  1475. {
  1476. struct msm_tsif_device *tsif_device = cookie;
  1477. tsif_device->client_notify = NULL;
  1478. tsif_device->client_data = NULL;
  1479. put_device(&tsif_device->pdev->dev);
  1480. }
  1481. EXPORT_SYMBOL(tsif_detach);
  1482. void tsif_get_info(void *cookie, void **pdata, int *psize)
  1483. {
  1484. struct msm_tsif_device *tsif_device = cookie;
  1485. if (pdata)
  1486. *pdata = tsif_device->data_buffer;
  1487. if (psize)
  1488. *psize = TSIF_PKTS_IN_BUF;
  1489. }
  1490. EXPORT_SYMBOL(tsif_get_info);
  1491. int tsif_set_mode(void *cookie, int mode)
  1492. {
  1493. struct msm_tsif_device *tsif_device = cookie;
  1494. if (tsif_device->state != tsif_state_stopped) {
  1495. dev_err(&tsif_device->pdev->dev,
  1496. "Can't change mode while device is active\n");
  1497. return -EBUSY;
  1498. }
  1499. switch (mode) {
  1500. case 1:
  1501. case 2:
  1502. case 3:
  1503. tsif_device->mode = mode;
  1504. break;
  1505. default:
  1506. dev_err(&tsif_device->pdev->dev, "Invalid mode: %d\n", mode);
  1507. return -EINVAL;
  1508. }
  1509. return 0;
  1510. }
  1511. EXPORT_SYMBOL(tsif_set_mode);
  1512. int tsif_set_time_limit(void *cookie, u32 value)
  1513. {
  1514. struct msm_tsif_device *tsif_device = cookie;
  1515. if (tsif_device->state != tsif_state_stopped) {
  1516. dev_err(&tsif_device->pdev->dev,
  1517. "Can't change time limit while device is active\n");
  1518. return -EBUSY;
  1519. }
  1520. if (value != (value & 0xFFFFFF)) {
  1521. dev_err(&tsif_device->pdev->dev,
  1522. "Invalid time limit (should be 24 bit): %#x\n", value);
  1523. return -EINVAL;
  1524. }
  1525. tsif_device->time_limit = value;
  1526. return 0;
  1527. }
  1528. EXPORT_SYMBOL(tsif_set_time_limit);
  1529. int tsif_set_buf_config(void *cookie, u32 pkts_in_chunk, u32 chunks_in_buf)
  1530. {
  1531. struct msm_tsif_device *tsif_device = cookie;
  1532. if (tsif_device->data_buffer) {
  1533. dev_err(&tsif_device->pdev->dev,
  1534. "Data buffer already allocated: %p\n",
  1535. tsif_device->data_buffer);
  1536. return -EBUSY;
  1537. }
  1538. /* check for crazy user */
  1539. if (pkts_in_chunk * chunks_in_buf > 10240) {
  1540. dev_err(&tsif_device->pdev->dev,
  1541. "Buffer requested is too large: %d * %d\n",
  1542. pkts_in_chunk,
  1543. chunks_in_buf);
  1544. return -EINVAL;
  1545. }
  1546. /* parameters are OK, execute */
  1547. tsif_device->pkts_per_chunk = pkts_in_chunk;
  1548. tsif_device->chunks_per_buf = chunks_in_buf;
  1549. return 0;
  1550. }
  1551. EXPORT_SYMBOL(tsif_set_buf_config);
  1552. int tsif_set_clk_inverse(void *cookie, int value)
  1553. {
  1554. struct msm_tsif_device *tsif_device = cookie;
  1555. if (tsif_device->state != tsif_state_stopped) {
  1556. dev_err(&tsif_device->pdev->dev,
  1557. "Can't change clock inverse while device is active\n");
  1558. return -EBUSY;
  1559. }
  1560. if ((value != 0) && (value != 1)) {
  1561. dev_err(&tsif_device->pdev->dev,
  1562. "Invalid parameter, either 0 or 1: %#x\n", value);
  1563. return -EINVAL;
  1564. }
  1565. tsif_device->clock_inverse = value;
  1566. return 0;
  1567. }
  1568. EXPORT_SYMBOL(tsif_set_clk_inverse);
  1569. int tsif_set_data_inverse(void *cookie, int value)
  1570. {
  1571. struct msm_tsif_device *tsif_device = cookie;
  1572. if (tsif_device->state != tsif_state_stopped) {
  1573. dev_err(&tsif_device->pdev->dev,
  1574. "Can't change data inverse while device is active\n");
  1575. return -EBUSY;
  1576. }
  1577. if ((value != 0) && (value != 1)) {
  1578. dev_err(&tsif_device->pdev->dev,
  1579. "Invalid parameter, either 0 or 1: %#x\n", value);
  1580. return -EINVAL;
  1581. }
  1582. tsif_device->data_inverse = value;
  1583. return 0;
  1584. }
  1585. EXPORT_SYMBOL(tsif_set_data_inverse);
  1586. int tsif_set_sync_inverse(void *cookie, int value)
  1587. {
  1588. struct msm_tsif_device *tsif_device = cookie;
  1589. if (tsif_device->state != tsif_state_stopped) {
  1590. dev_err(&tsif_device->pdev->dev,
  1591. "Can't change sync inverse while device is active\n");
  1592. return -EBUSY;
  1593. }
  1594. if ((value != 0) && (value != 1)) {
  1595. dev_err(&tsif_device->pdev->dev,
  1596. "Invalid parameter, either 0 or 1: %#x\n", value);
  1597. return -EINVAL;
  1598. }
  1599. tsif_device->sync_inverse = value;
  1600. return 0;
  1601. }
  1602. EXPORT_SYMBOL(tsif_set_sync_inverse);
  1603. int tsif_set_enable_inverse(void *cookie, int value)
  1604. {
  1605. struct msm_tsif_device *tsif_device = cookie;
  1606. if (tsif_device->state != tsif_state_stopped) {
  1607. dev_err(&tsif_device->pdev->dev,
  1608. "Can't change enable inverse while device is active\n");
  1609. return -EBUSY;
  1610. }
  1611. if ((value != 0) && (value != 1)) {
  1612. dev_err(&tsif_device->pdev->dev,
  1613. "Invalid parameter, either 0 or 1: %#x\n", value);
  1614. return -EINVAL;
  1615. }
  1616. tsif_device->enable_inverse = value;
  1617. return 0;
  1618. }
  1619. EXPORT_SYMBOL(tsif_set_enable_inverse);
  1620. void tsif_get_state(void *cookie, int *ri, int *wi, enum tsif_state *state)
  1621. {
  1622. struct msm_tsif_device *tsif_device = cookie;
  1623. if (ri)
  1624. *ri = tsif_device->ri;
  1625. if (wi)
  1626. *wi = tsif_device->wi;
  1627. if (state)
  1628. *state = tsif_device->state;
  1629. }
  1630. EXPORT_SYMBOL(tsif_get_state);
  1631. int tsif_start(void *cookie)
  1632. {
  1633. struct msm_tsif_device *tsif_device = cookie;
  1634. return action_open(tsif_device);
  1635. }
  1636. EXPORT_SYMBOL(tsif_start);
  1637. void tsif_stop(void *cookie)
  1638. {
  1639. struct msm_tsif_device *tsif_device = cookie;
  1640. action_close(tsif_device);
  1641. }
  1642. EXPORT_SYMBOL(tsif_stop);
  1643. int tsif_get_ref_clk_counter(void *cookie, u32 *tcr_counter)
  1644. {
  1645. struct msm_tsif_device *tsif_device = cookie;
  1646. if (!tsif_device || !tcr_counter)
  1647. return -EINVAL;
  1648. if (tsif_device->state == tsif_state_running)
  1649. *tcr_counter = ioread32(tsif_device->base + TSIF_CLK_REF_OFF);
  1650. else
  1651. *tcr_counter = 0;
  1652. return 0;
  1653. }
  1654. EXPORT_SYMBOL(tsif_get_ref_clk_counter);
  1655. void tsif_reclaim_packets(void *cookie, int read_index)
  1656. {
  1657. struct msm_tsif_device *tsif_device = cookie;
  1658. tsif_device->ri = read_index;
  1659. }
  1660. EXPORT_SYMBOL(tsif_reclaim_packets);
  1661. module_init(mod_init);
  1662. module_exit(mod_exit);
  1663. MODULE_DESCRIPTION("TSIF (Transport Stream Interface)"
  1664. " Driver for the MSM chipset");
  1665. MODULE_LICENSE("GPL v2");