drm_modes.c 34 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183
  1. /*
  2. * Copyright © 1997-2003 by The XFree86 Project, Inc.
  3. * Copyright © 2007 Dave Airlie
  4. * Copyright © 2007-2008 Intel Corporation
  5. * Jesse Barnes <jesse.barnes@intel.com>
  6. * Copyright 2005-2006 Luc Verhaegen
  7. * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice shall be included in
  17. * all copies or substantial portions of the Software.
  18. *
  19. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  22. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  23. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  24. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  25. * OTHER DEALINGS IN THE SOFTWARE.
  26. *
  27. * Except as contained in this notice, the name of the copyright holder(s)
  28. * and author(s) shall not be used in advertising or otherwise to promote
  29. * the sale, use or other dealings in this Software without prior written
  30. * authorization from the copyright holder(s) and author(s).
  31. */
  32. #include <linux/list.h>
  33. #include <linux/list_sort.h>
  34. #include <linux/export.h>
  35. #include "drmP.h"
  36. #include "drm.h"
  37. #include "drm_crtc.h"
  38. /**
  39. * drm_mode_debug_printmodeline - debug print a mode
  40. * @dev: DRM device
  41. * @mode: mode to print
  42. *
  43. * LOCKING:
  44. * None.
  45. *
  46. * Describe @mode using DRM_DEBUG.
  47. */
  48. void drm_mode_debug_printmodeline(struct drm_display_mode *mode)
  49. {
  50. DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
  51. "0x%x 0x%x\n",
  52. mode->base.id, mode->name, mode->vrefresh, mode->clock,
  53. mode->hdisplay, mode->hsync_start,
  54. mode->hsync_end, mode->htotal,
  55. mode->vdisplay, mode->vsync_start,
  56. mode->vsync_end, mode->vtotal, mode->type, mode->flags);
  57. }
  58. EXPORT_SYMBOL(drm_mode_debug_printmodeline);
  59. /**
  60. * drm_cvt_mode -create a modeline based on CVT algorithm
  61. * @dev: DRM device
  62. * @hdisplay: hdisplay size
  63. * @vdisplay: vdisplay size
  64. * @vrefresh : vrefresh rate
  65. * @reduced : Whether the GTF calculation is simplified
  66. * @interlaced:Whether the interlace is supported
  67. *
  68. * LOCKING:
  69. * none.
  70. *
  71. * return the modeline based on CVT algorithm
  72. *
  73. * This function is called to generate the modeline based on CVT algorithm
  74. * according to the hdisplay, vdisplay, vrefresh.
  75. * It is based from the VESA(TM) Coordinated Video Timing Generator by
  76. * Graham Loveridge April 9, 2003 available at
  77. * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
  78. *
  79. * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
  80. * What I have done is to translate it by using integer calculation.
  81. */
  82. #define HV_FACTOR 1000
  83. struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
  84. int vdisplay, int vrefresh,
  85. bool reduced, bool interlaced, bool margins)
  86. {
  87. /* 1) top/bottom margin size (% of height) - default: 1.8, */
  88. #define CVT_MARGIN_PERCENTAGE 18
  89. /* 2) character cell horizontal granularity (pixels) - default 8 */
  90. #define CVT_H_GRANULARITY 8
  91. /* 3) Minimum vertical porch (lines) - default 3 */
  92. #define CVT_MIN_V_PORCH 3
  93. /* 4) Minimum number of vertical back porch lines - default 6 */
  94. #define CVT_MIN_V_BPORCH 6
  95. /* Pixel Clock step (kHz) */
  96. #define CVT_CLOCK_STEP 250
  97. struct drm_display_mode *drm_mode;
  98. unsigned int vfieldrate, hperiod;
  99. int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
  100. int interlace;
  101. /* allocate the drm_display_mode structure. If failure, we will
  102. * return directly
  103. */
  104. drm_mode = drm_mode_create(dev);
  105. if (!drm_mode)
  106. return NULL;
  107. /* the CVT default refresh rate is 60Hz */
  108. if (!vrefresh)
  109. vrefresh = 60;
  110. /* the required field fresh rate */
  111. if (interlaced)
  112. vfieldrate = vrefresh * 2;
  113. else
  114. vfieldrate = vrefresh;
  115. /* horizontal pixels */
  116. hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
  117. /* determine the left&right borders */
  118. hmargin = 0;
  119. if (margins) {
  120. hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
  121. hmargin -= hmargin % CVT_H_GRANULARITY;
  122. }
  123. /* find the total active pixels */
  124. drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
  125. /* find the number of lines per field */
  126. if (interlaced)
  127. vdisplay_rnd = vdisplay / 2;
  128. else
  129. vdisplay_rnd = vdisplay;
  130. /* find the top & bottom borders */
  131. vmargin = 0;
  132. if (margins)
  133. vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
  134. drm_mode->vdisplay = vdisplay + 2 * vmargin;
  135. /* Interlaced */
  136. if (interlaced)
  137. interlace = 1;
  138. else
  139. interlace = 0;
  140. /* Determine VSync Width from aspect ratio */
  141. if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
  142. vsync = 4;
  143. else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
  144. vsync = 5;
  145. else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
  146. vsync = 6;
  147. else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
  148. vsync = 7;
  149. else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
  150. vsync = 7;
  151. else /* custom */
  152. vsync = 10;
  153. if (!reduced) {
  154. /* simplify the GTF calculation */
  155. /* 4) Minimum time of vertical sync + back porch interval (µs)
  156. * default 550.0
  157. */
  158. int tmp1, tmp2;
  159. #define CVT_MIN_VSYNC_BP 550
  160. /* 3) Nominal HSync width (% of line period) - default 8 */
  161. #define CVT_HSYNC_PERCENTAGE 8
  162. unsigned int hblank_percentage;
  163. int vsyncandback_porch, vback_porch, hblank;
  164. /* estimated the horizontal period */
  165. tmp1 = HV_FACTOR * 1000000 -
  166. CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
  167. tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
  168. interlace;
  169. hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
  170. tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
  171. /* 9. Find number of lines in sync + backporch */
  172. if (tmp1 < (vsync + CVT_MIN_V_PORCH))
  173. vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
  174. else
  175. vsyncandback_porch = tmp1;
  176. /* 10. Find number of lines in back porch */
  177. vback_porch = vsyncandback_porch - vsync;
  178. drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
  179. vsyncandback_porch + CVT_MIN_V_PORCH;
  180. /* 5) Definition of Horizontal blanking time limitation */
  181. /* Gradient (%/kHz) - default 600 */
  182. #define CVT_M_FACTOR 600
  183. /* Offset (%) - default 40 */
  184. #define CVT_C_FACTOR 40
  185. /* Blanking time scaling factor - default 128 */
  186. #define CVT_K_FACTOR 128
  187. /* Scaling factor weighting - default 20 */
  188. #define CVT_J_FACTOR 20
  189. #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
  190. #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
  191. CVT_J_FACTOR)
  192. /* 12. Find ideal blanking duty cycle from formula */
  193. hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
  194. hperiod / 1000;
  195. /* 13. Blanking time */
  196. if (hblank_percentage < 20 * HV_FACTOR)
  197. hblank_percentage = 20 * HV_FACTOR;
  198. hblank = drm_mode->hdisplay * hblank_percentage /
  199. (100 * HV_FACTOR - hblank_percentage);
  200. hblank -= hblank % (2 * CVT_H_GRANULARITY);
  201. /* 14. find the total pixes per line */
  202. drm_mode->htotal = drm_mode->hdisplay + hblank;
  203. drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
  204. drm_mode->hsync_start = drm_mode->hsync_end -
  205. (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
  206. drm_mode->hsync_start += CVT_H_GRANULARITY -
  207. drm_mode->hsync_start % CVT_H_GRANULARITY;
  208. /* fill the Vsync values */
  209. drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
  210. drm_mode->vsync_end = drm_mode->vsync_start + vsync;
  211. } else {
  212. /* Reduced blanking */
  213. /* Minimum vertical blanking interval time (µs)- default 460 */
  214. #define CVT_RB_MIN_VBLANK 460
  215. /* Fixed number of clocks for horizontal sync */
  216. #define CVT_RB_H_SYNC 32
  217. /* Fixed number of clocks for horizontal blanking */
  218. #define CVT_RB_H_BLANK 160
  219. /* Fixed number of lines for vertical front porch - default 3*/
  220. #define CVT_RB_VFPORCH 3
  221. int vbilines;
  222. int tmp1, tmp2;
  223. /* 8. Estimate Horizontal period. */
  224. tmp1 = HV_FACTOR * 1000000 -
  225. CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
  226. tmp2 = vdisplay_rnd + 2 * vmargin;
  227. hperiod = tmp1 / (tmp2 * vfieldrate);
  228. /* 9. Find number of lines in vertical blanking */
  229. vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
  230. /* 10. Check if vertical blanking is sufficient */
  231. if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
  232. vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
  233. /* 11. Find total number of lines in vertical field */
  234. drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
  235. /* 12. Find total number of pixels in a line */
  236. drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
  237. /* Fill in HSync values */
  238. drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
  239. drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
  240. /* Fill in VSync values */
  241. drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
  242. drm_mode->vsync_end = drm_mode->vsync_start + vsync;
  243. }
  244. /* 15/13. Find pixel clock frequency (kHz for xf86) */
  245. drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
  246. drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
  247. /* 18/16. Find actual vertical frame frequency */
  248. /* ignore - just set the mode flag for interlaced */
  249. if (interlaced) {
  250. drm_mode->vtotal *= 2;
  251. drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
  252. }
  253. /* Fill the mode line name */
  254. drm_mode_set_name(drm_mode);
  255. if (reduced)
  256. drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
  257. DRM_MODE_FLAG_NVSYNC);
  258. else
  259. drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
  260. DRM_MODE_FLAG_NHSYNC);
  261. return drm_mode;
  262. }
  263. EXPORT_SYMBOL(drm_cvt_mode);
  264. /**
  265. * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
  266. *
  267. * @dev :drm device
  268. * @hdisplay :hdisplay size
  269. * @vdisplay :vdisplay size
  270. * @vrefresh :vrefresh rate.
  271. * @interlaced :whether the interlace is supported
  272. * @margins :desired margin size
  273. * @GTF_[MCKJ] :extended GTF formula parameters
  274. *
  275. * LOCKING.
  276. * none.
  277. *
  278. * return the modeline based on full GTF algorithm.
  279. *
  280. * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
  281. * in here multiplied by two. For a C of 40, pass in 80.
  282. */
  283. struct drm_display_mode *
  284. drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
  285. int vrefresh, bool interlaced, int margins,
  286. int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
  287. { /* 1) top/bottom margin size (% of height) - default: 1.8, */
  288. #define GTF_MARGIN_PERCENTAGE 18
  289. /* 2) character cell horizontal granularity (pixels) - default 8 */
  290. #define GTF_CELL_GRAN 8
  291. /* 3) Minimum vertical porch (lines) - default 3 */
  292. #define GTF_MIN_V_PORCH 1
  293. /* width of vsync in lines */
  294. #define V_SYNC_RQD 3
  295. /* width of hsync as % of total line */
  296. #define H_SYNC_PERCENT 8
  297. /* min time of vsync + back porch (microsec) */
  298. #define MIN_VSYNC_PLUS_BP 550
  299. /* C' and M' are part of the Blanking Duty Cycle computation */
  300. #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
  301. #define GTF_M_PRIME (GTF_K * GTF_M / 256)
  302. struct drm_display_mode *drm_mode;
  303. unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
  304. int top_margin, bottom_margin;
  305. int interlace;
  306. unsigned int hfreq_est;
  307. int vsync_plus_bp, vback_porch;
  308. unsigned int vtotal_lines, vfieldrate_est, hperiod;
  309. unsigned int vfield_rate, vframe_rate;
  310. int left_margin, right_margin;
  311. unsigned int total_active_pixels, ideal_duty_cycle;
  312. unsigned int hblank, total_pixels, pixel_freq;
  313. int hsync, hfront_porch, vodd_front_porch_lines;
  314. unsigned int tmp1, tmp2;
  315. drm_mode = drm_mode_create(dev);
  316. if (!drm_mode)
  317. return NULL;
  318. /* 1. In order to give correct results, the number of horizontal
  319. * pixels requested is first processed to ensure that it is divisible
  320. * by the character size, by rounding it to the nearest character
  321. * cell boundary:
  322. */
  323. hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
  324. hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
  325. /* 2. If interlace is requested, the number of vertical lines assumed
  326. * by the calculation must be halved, as the computation calculates
  327. * the number of vertical lines per field.
  328. */
  329. if (interlaced)
  330. vdisplay_rnd = vdisplay / 2;
  331. else
  332. vdisplay_rnd = vdisplay;
  333. /* 3. Find the frame rate required: */
  334. if (interlaced)
  335. vfieldrate_rqd = vrefresh * 2;
  336. else
  337. vfieldrate_rqd = vrefresh;
  338. /* 4. Find number of lines in Top margin: */
  339. top_margin = 0;
  340. if (margins)
  341. top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
  342. 1000;
  343. /* 5. Find number of lines in bottom margin: */
  344. bottom_margin = top_margin;
  345. /* 6. If interlace is required, then set variable interlace: */
  346. if (interlaced)
  347. interlace = 1;
  348. else
  349. interlace = 0;
  350. /* 7. Estimate the Horizontal frequency */
  351. {
  352. tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
  353. tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
  354. 2 + interlace;
  355. hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
  356. }
  357. /* 8. Find the number of lines in V sync + back porch */
  358. /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
  359. vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
  360. vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
  361. /* 9. Find the number of lines in V back porch alone: */
  362. vback_porch = vsync_plus_bp - V_SYNC_RQD;
  363. /* 10. Find the total number of lines in Vertical field period: */
  364. vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
  365. vsync_plus_bp + GTF_MIN_V_PORCH;
  366. /* 11. Estimate the Vertical field frequency: */
  367. vfieldrate_est = hfreq_est / vtotal_lines;
  368. /* 12. Find the actual horizontal period: */
  369. hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
  370. /* 13. Find the actual Vertical field frequency: */
  371. vfield_rate = hfreq_est / vtotal_lines;
  372. /* 14. Find the Vertical frame frequency: */
  373. if (interlaced)
  374. vframe_rate = vfield_rate / 2;
  375. else
  376. vframe_rate = vfield_rate;
  377. /* 15. Find number of pixels in left margin: */
  378. if (margins)
  379. left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
  380. 1000;
  381. else
  382. left_margin = 0;
  383. /* 16.Find number of pixels in right margin: */
  384. right_margin = left_margin;
  385. /* 17.Find total number of active pixels in image and left and right */
  386. total_active_pixels = hdisplay_rnd + left_margin + right_margin;
  387. /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
  388. ideal_duty_cycle = GTF_C_PRIME * 1000 -
  389. (GTF_M_PRIME * 1000000 / hfreq_est);
  390. /* 19.Find the number of pixels in the blanking time to the nearest
  391. * double character cell: */
  392. hblank = total_active_pixels * ideal_duty_cycle /
  393. (100000 - ideal_duty_cycle);
  394. hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
  395. hblank = hblank * 2 * GTF_CELL_GRAN;
  396. /* 20.Find total number of pixels: */
  397. total_pixels = total_active_pixels + hblank;
  398. /* 21.Find pixel clock frequency: */
  399. pixel_freq = total_pixels * hfreq_est / 1000;
  400. /* Stage 1 computations are now complete; I should really pass
  401. * the results to another function and do the Stage 2 computations,
  402. * but I only need a few more values so I'll just append the
  403. * computations here for now */
  404. /* 17. Find the number of pixels in the horizontal sync period: */
  405. hsync = H_SYNC_PERCENT * total_pixels / 100;
  406. hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
  407. hsync = hsync * GTF_CELL_GRAN;
  408. /* 18. Find the number of pixels in horizontal front porch period */
  409. hfront_porch = hblank / 2 - hsync;
  410. /* 36. Find the number of lines in the odd front porch period: */
  411. vodd_front_porch_lines = GTF_MIN_V_PORCH ;
  412. /* finally, pack the results in the mode struct */
  413. drm_mode->hdisplay = hdisplay_rnd;
  414. drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
  415. drm_mode->hsync_end = drm_mode->hsync_start + hsync;
  416. drm_mode->htotal = total_pixels;
  417. drm_mode->vdisplay = vdisplay_rnd;
  418. drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
  419. drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
  420. drm_mode->vtotal = vtotal_lines;
  421. drm_mode->clock = pixel_freq;
  422. if (interlaced) {
  423. drm_mode->vtotal *= 2;
  424. drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
  425. }
  426. drm_mode_set_name(drm_mode);
  427. if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
  428. drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
  429. else
  430. drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
  431. return drm_mode;
  432. }
  433. EXPORT_SYMBOL(drm_gtf_mode_complex);
  434. /**
  435. * drm_gtf_mode - create the modeline based on GTF algorithm
  436. *
  437. * @dev :drm device
  438. * @hdisplay :hdisplay size
  439. * @vdisplay :vdisplay size
  440. * @vrefresh :vrefresh rate.
  441. * @interlaced :whether the interlace is supported
  442. * @margins :whether the margin is supported
  443. *
  444. * LOCKING.
  445. * none.
  446. *
  447. * return the modeline based on GTF algorithm
  448. *
  449. * This function is to create the modeline based on the GTF algorithm.
  450. * Generalized Timing Formula is derived from:
  451. * GTF Spreadsheet by Andy Morrish (1/5/97)
  452. * available at http://www.vesa.org
  453. *
  454. * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
  455. * What I have done is to translate it by using integer calculation.
  456. * I also refer to the function of fb_get_mode in the file of
  457. * drivers/video/fbmon.c
  458. *
  459. * Standard GTF parameters:
  460. * M = 600
  461. * C = 40
  462. * K = 128
  463. * J = 20
  464. */
  465. struct drm_display_mode *
  466. drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
  467. bool lace, int margins)
  468. {
  469. return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
  470. margins, 600, 40 * 2, 128, 20 * 2);
  471. }
  472. EXPORT_SYMBOL(drm_gtf_mode);
  473. /**
  474. * drm_mode_set_name - set the name on a mode
  475. * @mode: name will be set in this mode
  476. *
  477. * LOCKING:
  478. * None.
  479. *
  480. * Set the name of @mode to a standard format.
  481. */
  482. void drm_mode_set_name(struct drm_display_mode *mode)
  483. {
  484. bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
  485. snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
  486. mode->hdisplay, mode->vdisplay,
  487. interlaced ? "i" : "");
  488. }
  489. EXPORT_SYMBOL(drm_mode_set_name);
  490. /**
  491. * drm_mode_list_concat - move modes from one list to another
  492. * @head: source list
  493. * @new: dst list
  494. *
  495. * LOCKING:
  496. * Caller must ensure both lists are locked.
  497. *
  498. * Move all the modes from @head to @new.
  499. */
  500. void drm_mode_list_concat(struct list_head *head, struct list_head *new)
  501. {
  502. struct list_head *entry, *tmp;
  503. list_for_each_safe(entry, tmp, head) {
  504. list_move_tail(entry, new);
  505. }
  506. }
  507. EXPORT_SYMBOL(drm_mode_list_concat);
  508. /**
  509. * drm_mode_width - get the width of a mode
  510. * @mode: mode
  511. *
  512. * LOCKING:
  513. * None.
  514. *
  515. * Return @mode's width (hdisplay) value.
  516. *
  517. * FIXME: is this needed?
  518. *
  519. * RETURNS:
  520. * @mode->hdisplay
  521. */
  522. int drm_mode_width(struct drm_display_mode *mode)
  523. {
  524. return mode->hdisplay;
  525. }
  526. EXPORT_SYMBOL(drm_mode_width);
  527. /**
  528. * drm_mode_height - get the height of a mode
  529. * @mode: mode
  530. *
  531. * LOCKING:
  532. * None.
  533. *
  534. * Return @mode's height (vdisplay) value.
  535. *
  536. * FIXME: is this needed?
  537. *
  538. * RETURNS:
  539. * @mode->vdisplay
  540. */
  541. int drm_mode_height(struct drm_display_mode *mode)
  542. {
  543. return mode->vdisplay;
  544. }
  545. EXPORT_SYMBOL(drm_mode_height);
  546. /** drm_mode_hsync - get the hsync of a mode
  547. * @mode: mode
  548. *
  549. * LOCKING:
  550. * None.
  551. *
  552. * Return @modes's hsync rate in kHz, rounded to the nearest int.
  553. */
  554. int drm_mode_hsync(const struct drm_display_mode *mode)
  555. {
  556. unsigned int calc_val;
  557. if (mode->hsync)
  558. return mode->hsync;
  559. if (mode->htotal < 0)
  560. return 0;
  561. calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
  562. calc_val += 500; /* round to 1000Hz */
  563. calc_val /= 1000; /* truncate to kHz */
  564. return calc_val;
  565. }
  566. EXPORT_SYMBOL(drm_mode_hsync);
  567. /**
  568. * drm_mode_vrefresh - get the vrefresh of a mode
  569. * @mode: mode
  570. *
  571. * LOCKING:
  572. * None.
  573. *
  574. * Return @mode's vrefresh rate in Hz or calculate it if necessary.
  575. *
  576. * FIXME: why is this needed? shouldn't vrefresh be set already?
  577. *
  578. * RETURNS:
  579. * Vertical refresh rate. It will be the result of actual value plus 0.5.
  580. * If it is 70.288, it will return 70Hz.
  581. * If it is 59.6, it will return 60Hz.
  582. */
  583. int drm_mode_vrefresh(const struct drm_display_mode *mode)
  584. {
  585. int refresh = 0;
  586. unsigned int calc_val;
  587. if (mode->vrefresh > 0)
  588. refresh = mode->vrefresh;
  589. else if (mode->htotal > 0 && mode->vtotal > 0) {
  590. int vtotal;
  591. vtotal = mode->vtotal;
  592. /* work out vrefresh the value will be x1000 */
  593. calc_val = (mode->clock * 1000);
  594. calc_val /= mode->htotal;
  595. refresh = (calc_val + vtotal / 2) / vtotal;
  596. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  597. refresh *= 2;
  598. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  599. refresh /= 2;
  600. if (mode->vscan > 1)
  601. refresh /= mode->vscan;
  602. }
  603. return refresh;
  604. }
  605. EXPORT_SYMBOL(drm_mode_vrefresh);
  606. /**
  607. * drm_mode_set_crtcinfo - set CRTC modesetting parameters
  608. * @p: mode
  609. * @adjust_flags: unused? (FIXME)
  610. *
  611. * LOCKING:
  612. * None.
  613. *
  614. * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
  615. */
  616. void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
  617. {
  618. if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
  619. return;
  620. p->crtc_hdisplay = p->hdisplay;
  621. p->crtc_hsync_start = p->hsync_start;
  622. p->crtc_hsync_end = p->hsync_end;
  623. p->crtc_htotal = p->htotal;
  624. p->crtc_hskew = p->hskew;
  625. p->crtc_vdisplay = p->vdisplay;
  626. p->crtc_vsync_start = p->vsync_start;
  627. p->crtc_vsync_end = p->vsync_end;
  628. p->crtc_vtotal = p->vtotal;
  629. if (p->flags & DRM_MODE_FLAG_INTERLACE) {
  630. if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
  631. p->crtc_vdisplay /= 2;
  632. p->crtc_vsync_start /= 2;
  633. p->crtc_vsync_end /= 2;
  634. p->crtc_vtotal /= 2;
  635. }
  636. }
  637. if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
  638. p->crtc_vdisplay *= 2;
  639. p->crtc_vsync_start *= 2;
  640. p->crtc_vsync_end *= 2;
  641. p->crtc_vtotal *= 2;
  642. }
  643. if (p->vscan > 1) {
  644. p->crtc_vdisplay *= p->vscan;
  645. p->crtc_vsync_start *= p->vscan;
  646. p->crtc_vsync_end *= p->vscan;
  647. p->crtc_vtotal *= p->vscan;
  648. }
  649. p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
  650. p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
  651. p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
  652. p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
  653. p->crtc_hadjusted = false;
  654. p->crtc_vadjusted = false;
  655. }
  656. EXPORT_SYMBOL(drm_mode_set_crtcinfo);
  657. /**
  658. * drm_mode_copy - copy the mode
  659. * @dst: mode to overwrite
  660. * @src: mode to copy
  661. *
  662. * LOCKING:
  663. * None.
  664. *
  665. * Copy an existing mode into another mode, preserving the object id
  666. * of the destination mode.
  667. */
  668. void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
  669. {
  670. int id = dst->base.id;
  671. *dst = *src;
  672. dst->base.id = id;
  673. INIT_LIST_HEAD(&dst->head);
  674. }
  675. EXPORT_SYMBOL(drm_mode_copy);
  676. /**
  677. * drm_mode_duplicate - allocate and duplicate an existing mode
  678. * @m: mode to duplicate
  679. *
  680. * LOCKING:
  681. * None.
  682. *
  683. * Just allocate a new mode, copy the existing mode into it, and return
  684. * a pointer to it. Used to create new instances of established modes.
  685. */
  686. struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
  687. const struct drm_display_mode *mode)
  688. {
  689. struct drm_display_mode *nmode;
  690. nmode = drm_mode_create(dev);
  691. if (!nmode)
  692. return NULL;
  693. drm_mode_copy(nmode, mode);
  694. return nmode;
  695. }
  696. EXPORT_SYMBOL(drm_mode_duplicate);
  697. /**
  698. * drm_mode_equal - test modes for equality
  699. * @mode1: first mode
  700. * @mode2: second mode
  701. *
  702. * LOCKING:
  703. * None.
  704. *
  705. * Check to see if @mode1 and @mode2 are equivalent.
  706. *
  707. * RETURNS:
  708. * True if the modes are equal, false otherwise.
  709. */
  710. bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2)
  711. {
  712. /* do clock check convert to PICOS so fb modes get matched
  713. * the same */
  714. if (mode1->clock && mode2->clock) {
  715. if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
  716. return false;
  717. } else if (mode1->clock != mode2->clock)
  718. return false;
  719. if (mode1->hdisplay == mode2->hdisplay &&
  720. mode1->hsync_start == mode2->hsync_start &&
  721. mode1->hsync_end == mode2->hsync_end &&
  722. mode1->htotal == mode2->htotal &&
  723. mode1->hskew == mode2->hskew &&
  724. mode1->vdisplay == mode2->vdisplay &&
  725. mode1->vsync_start == mode2->vsync_start &&
  726. mode1->vsync_end == mode2->vsync_end &&
  727. mode1->vtotal == mode2->vtotal &&
  728. mode1->vscan == mode2->vscan &&
  729. mode1->flags == mode2->flags)
  730. return true;
  731. return false;
  732. }
  733. EXPORT_SYMBOL(drm_mode_equal);
  734. /**
  735. * drm_mode_validate_size - make sure modes adhere to size constraints
  736. * @dev: DRM device
  737. * @mode_list: list of modes to check
  738. * @maxX: maximum width
  739. * @maxY: maximum height
  740. * @maxPitch: max pitch
  741. *
  742. * LOCKING:
  743. * Caller must hold a lock protecting @mode_list.
  744. *
  745. * The DRM device (@dev) has size and pitch limits. Here we validate the
  746. * modes we probed for @dev against those limits and set their status as
  747. * necessary.
  748. */
  749. void drm_mode_validate_size(struct drm_device *dev,
  750. struct list_head *mode_list,
  751. int maxX, int maxY, int maxPitch)
  752. {
  753. struct drm_display_mode *mode;
  754. list_for_each_entry(mode, mode_list, head) {
  755. if (maxPitch > 0 && mode->hdisplay > maxPitch)
  756. mode->status = MODE_BAD_WIDTH;
  757. if (maxX > 0 && mode->hdisplay > maxX)
  758. mode->status = MODE_VIRTUAL_X;
  759. if (maxY > 0 && mode->vdisplay > maxY)
  760. mode->status = MODE_VIRTUAL_Y;
  761. }
  762. }
  763. EXPORT_SYMBOL(drm_mode_validate_size);
  764. /**
  765. * drm_mode_validate_clocks - validate modes against clock limits
  766. * @dev: DRM device
  767. * @mode_list: list of modes to check
  768. * @min: minimum clock rate array
  769. * @max: maximum clock rate array
  770. * @n_ranges: number of clock ranges (size of arrays)
  771. *
  772. * LOCKING:
  773. * Caller must hold a lock protecting @mode_list.
  774. *
  775. * Some code may need to check a mode list against the clock limits of the
  776. * device in question. This function walks the mode list, testing to make
  777. * sure each mode falls within a given range (defined by @min and @max
  778. * arrays) and sets @mode->status as needed.
  779. */
  780. void drm_mode_validate_clocks(struct drm_device *dev,
  781. struct list_head *mode_list,
  782. int *min, int *max, int n_ranges)
  783. {
  784. struct drm_display_mode *mode;
  785. int i;
  786. list_for_each_entry(mode, mode_list, head) {
  787. bool good = false;
  788. for (i = 0; i < n_ranges; i++) {
  789. if (mode->clock >= min[i] && mode->clock <= max[i]) {
  790. good = true;
  791. break;
  792. }
  793. }
  794. if (!good)
  795. mode->status = MODE_CLOCK_RANGE;
  796. }
  797. }
  798. EXPORT_SYMBOL(drm_mode_validate_clocks);
  799. /**
  800. * drm_mode_prune_invalid - remove invalid modes from mode list
  801. * @dev: DRM device
  802. * @mode_list: list of modes to check
  803. * @verbose: be verbose about it
  804. *
  805. * LOCKING:
  806. * Caller must hold a lock protecting @mode_list.
  807. *
  808. * Once mode list generation is complete, a caller can use this routine to
  809. * remove invalid modes from a mode list. If any of the modes have a
  810. * status other than %MODE_OK, they are removed from @mode_list and freed.
  811. */
  812. void drm_mode_prune_invalid(struct drm_device *dev,
  813. struct list_head *mode_list, bool verbose)
  814. {
  815. struct drm_display_mode *mode, *t;
  816. list_for_each_entry_safe(mode, t, mode_list, head) {
  817. if (mode->status != MODE_OK) {
  818. list_del(&mode->head);
  819. if (verbose) {
  820. drm_mode_debug_printmodeline(mode);
  821. DRM_DEBUG_KMS("Not using %s mode %d\n",
  822. mode->name, mode->status);
  823. }
  824. drm_mode_destroy(dev, mode);
  825. }
  826. }
  827. }
  828. EXPORT_SYMBOL(drm_mode_prune_invalid);
  829. /**
  830. * drm_mode_compare - compare modes for favorability
  831. * @priv: unused
  832. * @lh_a: list_head for first mode
  833. * @lh_b: list_head for second mode
  834. *
  835. * LOCKING:
  836. * None.
  837. *
  838. * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
  839. * which is better.
  840. *
  841. * RETURNS:
  842. * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
  843. * positive if @lh_b is better than @lh_a.
  844. */
  845. static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
  846. {
  847. struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
  848. struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
  849. int diff;
  850. diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
  851. ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
  852. if (diff)
  853. return diff;
  854. diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
  855. if (diff)
  856. return diff;
  857. diff = b->clock - a->clock;
  858. return diff;
  859. }
  860. /**
  861. * drm_mode_sort - sort mode list
  862. * @mode_list: list to sort
  863. *
  864. * LOCKING:
  865. * Caller must hold a lock protecting @mode_list.
  866. *
  867. * Sort @mode_list by favorability, putting good modes first.
  868. */
  869. void drm_mode_sort(struct list_head *mode_list)
  870. {
  871. list_sort(NULL, mode_list, drm_mode_compare);
  872. }
  873. EXPORT_SYMBOL(drm_mode_sort);
  874. /**
  875. * drm_mode_connector_list_update - update the mode list for the connector
  876. * @connector: the connector to update
  877. *
  878. * LOCKING:
  879. * Caller must hold a lock protecting @mode_list.
  880. *
  881. * This moves the modes from the @connector probed_modes list
  882. * to the actual mode list. It compares the probed mode against the current
  883. * list and only adds different modes. All modes unverified after this point
  884. * will be removed by the prune invalid modes.
  885. */
  886. void drm_mode_connector_list_update(struct drm_connector *connector)
  887. {
  888. struct drm_display_mode *mode;
  889. struct drm_display_mode *pmode, *pt;
  890. int found_it;
  891. list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
  892. head) {
  893. found_it = 0;
  894. /* go through current modes checking for the new probed mode */
  895. list_for_each_entry(mode, &connector->modes, head) {
  896. if (drm_mode_equal(pmode, mode)) {
  897. found_it = 1;
  898. /* if equal delete the probed mode */
  899. mode->status = pmode->status;
  900. /* Merge type bits together */
  901. mode->type |= pmode->type;
  902. list_del(&pmode->head);
  903. drm_mode_destroy(connector->dev, pmode);
  904. break;
  905. }
  906. }
  907. if (!found_it) {
  908. list_move_tail(&pmode->head, &connector->modes);
  909. }
  910. }
  911. }
  912. EXPORT_SYMBOL(drm_mode_connector_list_update);
  913. /**
  914. * drm_mode_parse_command_line_for_connector - parse command line for connector
  915. * @mode_option - per connector mode option
  916. * @connector - connector to parse line for
  917. *
  918. * This parses the connector specific then generic command lines for
  919. * modes and options to configure the connector.
  920. *
  921. * This uses the same parameters as the fb modedb.c, except for extra
  922. * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
  923. *
  924. * enable/enable Digital/disable bit at the end
  925. */
  926. bool drm_mode_parse_command_line_for_connector(const char *mode_option,
  927. struct drm_connector *connector,
  928. struct drm_cmdline_mode *mode)
  929. {
  930. const char *name;
  931. unsigned int namelen;
  932. bool res_specified = false, bpp_specified = false, refresh_specified = false;
  933. unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
  934. bool yres_specified = false, cvt = false, rb = false;
  935. bool interlace = false, margins = false, was_digit = false;
  936. int i;
  937. enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
  938. #ifdef CONFIG_FB
  939. if (!mode_option)
  940. mode_option = fb_mode_option;
  941. #endif
  942. if (!mode_option) {
  943. mode->specified = false;
  944. return false;
  945. }
  946. name = mode_option;
  947. namelen = strlen(name);
  948. for (i = namelen-1; i >= 0; i--) {
  949. switch (name[i]) {
  950. case '@':
  951. if (!refresh_specified && !bpp_specified &&
  952. !yres_specified && !cvt && !rb && was_digit) {
  953. refresh = simple_strtol(&name[i+1], NULL, 10);
  954. refresh_specified = true;
  955. was_digit = false;
  956. } else
  957. goto done;
  958. break;
  959. case '-':
  960. if (!bpp_specified && !yres_specified && !cvt &&
  961. !rb && was_digit) {
  962. bpp = simple_strtol(&name[i+1], NULL, 10);
  963. bpp_specified = true;
  964. was_digit = false;
  965. } else
  966. goto done;
  967. break;
  968. case 'x':
  969. if (!yres_specified && was_digit) {
  970. yres = simple_strtol(&name[i+1], NULL, 10);
  971. yres_specified = true;
  972. was_digit = false;
  973. } else
  974. goto done;
  975. case '0' ... '9':
  976. was_digit = true;
  977. break;
  978. case 'M':
  979. if (yres_specified || cvt || was_digit)
  980. goto done;
  981. cvt = true;
  982. break;
  983. case 'R':
  984. if (yres_specified || cvt || rb || was_digit)
  985. goto done;
  986. rb = true;
  987. break;
  988. case 'm':
  989. if (cvt || yres_specified || was_digit)
  990. goto done;
  991. margins = true;
  992. break;
  993. case 'i':
  994. if (cvt || yres_specified || was_digit)
  995. goto done;
  996. interlace = true;
  997. break;
  998. case 'e':
  999. if (yres_specified || bpp_specified || refresh_specified ||
  1000. was_digit || (force != DRM_FORCE_UNSPECIFIED))
  1001. goto done;
  1002. force = DRM_FORCE_ON;
  1003. break;
  1004. case 'D':
  1005. if (yres_specified || bpp_specified || refresh_specified ||
  1006. was_digit || (force != DRM_FORCE_UNSPECIFIED))
  1007. goto done;
  1008. if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
  1009. (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
  1010. force = DRM_FORCE_ON;
  1011. else
  1012. force = DRM_FORCE_ON_DIGITAL;
  1013. break;
  1014. case 'd':
  1015. if (yres_specified || bpp_specified || refresh_specified ||
  1016. was_digit || (force != DRM_FORCE_UNSPECIFIED))
  1017. goto done;
  1018. force = DRM_FORCE_OFF;
  1019. break;
  1020. default:
  1021. goto done;
  1022. }
  1023. }
  1024. if (i < 0 && yres_specified) {
  1025. char *ch;
  1026. xres = simple_strtol(name, &ch, 10);
  1027. if ((ch != NULL) && (*ch == 'x'))
  1028. res_specified = true;
  1029. else
  1030. i = ch - name;
  1031. } else if (!yres_specified && was_digit) {
  1032. /* catch mode that begins with digits but has no 'x' */
  1033. i = 0;
  1034. }
  1035. done:
  1036. if (i >= 0) {
  1037. printk(KERN_WARNING
  1038. "parse error at position %i in video mode '%s'\n",
  1039. i, name);
  1040. mode->specified = false;
  1041. return false;
  1042. }
  1043. if (res_specified) {
  1044. mode->specified = true;
  1045. mode->xres = xres;
  1046. mode->yres = yres;
  1047. }
  1048. if (refresh_specified) {
  1049. mode->refresh_specified = true;
  1050. mode->refresh = refresh;
  1051. }
  1052. if (bpp_specified) {
  1053. mode->bpp_specified = true;
  1054. mode->bpp = bpp;
  1055. }
  1056. mode->rb = rb;
  1057. mode->cvt = cvt;
  1058. mode->interlace = interlace;
  1059. mode->margins = margins;
  1060. mode->force = force;
  1061. return true;
  1062. }
  1063. EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
  1064. struct drm_display_mode *
  1065. drm_mode_create_from_cmdline_mode(struct drm_device *dev,
  1066. struct drm_cmdline_mode *cmd)
  1067. {
  1068. struct drm_display_mode *mode;
  1069. if (cmd->cvt)
  1070. mode = drm_cvt_mode(dev,
  1071. cmd->xres, cmd->yres,
  1072. cmd->refresh_specified ? cmd->refresh : 60,
  1073. cmd->rb, cmd->interlace,
  1074. cmd->margins);
  1075. else
  1076. mode = drm_gtf_mode(dev,
  1077. cmd->xres, cmd->yres,
  1078. cmd->refresh_specified ? cmd->refresh : 60,
  1079. cmd->interlace,
  1080. cmd->margins);
  1081. if (!mode)
  1082. return NULL;
  1083. drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
  1084. return mode;
  1085. }
  1086. EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);